blob: 760e0e3e118ef0bdec44d521460680dbb0b5ecbd [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Bartlomiej Zolnierkiewicz1c164ac2007-07-20 01:11:56 +02002 * linux/drivers/ide/pci/serverworks.c Version 0.22 Jun 27 2007
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * Copyright (C) 1998-2000 Michel Aubry
5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz
6 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
Bartlomiej Zolnierkiewicz9445de72007-05-16 00:51:42 +02007 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 * Portions copyright (c) 2001 Sun Microsystems
9 *
10 *
11 * RCC/ServerWorks IDE driver for Linux
12 *
13 * OSB4: `Open South Bridge' IDE Interface (fn 1)
14 * supports UDMA mode 2 (33 MB/s)
15 *
16 * CSB5: `Champion South Bridge' IDE Interface (fn 1)
17 * all revisions support UDMA mode 4 (66 MB/s)
18 * revision A2.0 and up support UDMA mode 5 (100 MB/s)
19 *
20 * *** The CSB5 does not provide ANY register ***
21 * *** to detect 80-conductor cable presence. ***
22 *
23 * CSB6: `Champion South Bridge' IDE Interface (optional: third channel)
24 *
Narendra Sankar84f57fb2005-08-18 22:30:35 +020025 * HT1000: AKA BCM5785 - Hypertransport Southbridge for Opteron systems. IDE
26 * controller same as the CSB6. Single channel ATA100 only.
27 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070028 * Documentation:
29 * Available under NDA only. Errata info very hard to get.
30 *
31 */
32
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include <linux/types.h>
34#include <linux/module.h>
35#include <linux/kernel.h>
36#include <linux/ioport.h>
37#include <linux/pci.h>
38#include <linux/hdreg.h>
39#include <linux/ide.h>
40#include <linux/init.h>
41#include <linux/delay.h>
42
43#include <asm/io.h>
44
45#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */
46#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
47
48/* Seagate Barracuda ATA IV Family drives in UDMA mode 5
49 * can overrun their FIFOs when used with the CSB5 */
50static const char *svwks_bad_ata100[] = {
51 "ST320011A",
52 "ST340016A",
53 "ST360021A",
54 "ST380021A",
55 NULL
56};
57
Linus Torvalds1da177e2005-04-16 15:20:36 -070058static struct pci_dev *isa_dev;
59
60static int check_in_drive_lists (ide_drive_t *drive, const char **list)
61{
62 while (*list)
63 if (!strcmp(*list++, drive->id->model))
64 return 1;
65 return 0;
66}
67
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020068static u8 svwks_udma_filter(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -070069{
70 struct pci_dev *dev = HWIF(drive)->pci_dev;
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020071 u8 mask = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070072
Narendra Sankar84f57fb2005-08-18 22:30:35 +020073 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE)
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020074 return 0x1f;
Linus Torvalds1da177e2005-04-16 15:20:36 -070075 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
76 u32 reg = 0;
77 if (isa_dev)
78 pci_read_config_dword(isa_dev, 0x64, &reg);
79
80 /*
81 * Don't enable UDMA on disk devices for the moment
82 */
83 if(drive->media == ide_disk)
84 return 0;
85 /* Check the OSB4 DMA33 enable bit */
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020086 return ((reg & 0x00004000) == 0x00004000) ? 0x07 : 0;
Auke Kok44c10132007-06-08 15:46:36 -070087 } else if (dev->revision < SVWKS_CSB5_REVISION_NEW) {
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020088 return 0x07;
Auke Kok44c10132007-06-08 15:46:36 -070089 } else if (dev->revision >= SVWKS_CSB5_REVISION_NEW) {
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020090 u8 btr = 0, mode;
Linus Torvalds1da177e2005-04-16 15:20:36 -070091 pci_read_config_byte(dev, 0x5A, &btr);
92 mode = btr & 0x3;
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020093
Linus Torvalds1da177e2005-04-16 15:20:36 -070094 /* If someone decides to do UDMA133 on CSB5 the same
95 issue will bite so be inclusive */
96 if (mode > 2 && check_in_drive_lists(drive, svwks_bad_ata100))
97 mode = 2;
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020098
99 switch(mode) {
Tony Battersby0c824b52007-10-16 22:29:52 +0200100 case 3: mask = 0x3f; break;
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +0200101 case 2: mask = 0x1f; break;
102 case 1: mask = 0x07; break;
103 default: mask = 0x00; break;
104 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105 }
106 if (((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
107 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) &&
108 (!(PCI_FUNC(dev->devfn) & 1)))
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +0200109 mask = 0x1f;
110
111 return mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112}
113
114static u8 svwks_csb_check (struct pci_dev *dev)
115{
116 switch (dev->device) {
117 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
118 case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
119 case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
Narendra Sankar84f57fb2005-08-18 22:30:35 +0200120 case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121 return 1;
122 default:
123 break;
124 }
125 return 0;
126}
Bartlomiej Zolnierkiewicz1880a8d2007-07-20 01:11:56 +0200127
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200128static void svwks_set_pio_mode(ide_drive_t *drive, const u8 pio)
Bartlomiej Zolnierkiewicz1880a8d2007-07-20 01:11:56 +0200129{
130 static const u8 pio_modes[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 };
131 static const u8 drive_pci[] = { 0x41, 0x40, 0x43, 0x42 };
132
133 struct pci_dev *dev = drive->hwif->pci_dev;
134
135 pci_write_config_byte(dev, drive_pci[drive->dn], pio_modes[pio]);
136
137 if (svwks_csb_check(dev)) {
138 u16 csb_pio = 0;
139
140 pci_read_config_word(dev, 0x4a, &csb_pio);
141
142 csb_pio &= ~(0x0f << (4 * drive->dn));
143 csb_pio |= (pio << (4 * drive->dn));
144
145 pci_write_config_word(dev, 0x4a, csb_pio);
146 }
147}
148
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200149static void svwks_set_dma_mode(ide_drive_t *drive, const u8 speed)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150{
Alan Coxf201f502006-06-28 04:27:02 -0700151 static const u8 udma_modes[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 };
152 static const u8 dma_modes[] = { 0x77, 0x21, 0x20 };
Alan Coxf201f502006-06-28 04:27:02 -0700153 static const u8 drive_pci2[] = { 0x45, 0x44, 0x47, 0x46 };
Linus Torvalds1da177e2005-04-16 15:20:36 -0700154
155 ide_hwif_t *hwif = HWIF(drive);
156 struct pci_dev *dev = hwif->pci_dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157 u8 unit = (drive->select.b.unit & 0x01);
Bartlomiej Zolnierkiewicz1880a8d2007-07-20 01:11:56 +0200158
159 u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0;
160
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161 /* If we are about to put a disk into UDMA mode we screwed up.
162 Our code assumes we never _ever_ do this on an OSB4 */
163
164 if(dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4 &&
165 drive->media == ide_disk && speed >= XFER_UDMA_0)
166 BUG();
Bartlomiej Zolnierkiewiczb740d882007-07-09 23:17:53 +0200167
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168 pci_read_config_byte(dev, (0x56|hwif->channel), &ultra_timing);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169 pci_read_config_byte(dev, 0x54, &ultra_enable);
170
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171 ultra_timing &= ~(0x0F << (4*unit));
172 ultra_enable &= ~(0x01 << drive->dn);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173
174 switch(speed) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175 case XFER_MW_DMA_2:
176 case XFER_MW_DMA_1:
177 case XFER_MW_DMA_0:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178 dma_timing |= dma_modes[speed - XFER_MW_DMA_0];
179 break;
180
181 case XFER_UDMA_5:
182 case XFER_UDMA_4:
183 case XFER_UDMA_3:
184 case XFER_UDMA_2:
185 case XFER_UDMA_1:
186 case XFER_UDMA_0:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187 dma_timing |= dma_modes[2];
188 ultra_timing |= ((udma_modes[speed - XFER_UDMA_0]) << (4*unit));
189 ultra_enable |= (0x01 << drive->dn);
190 default:
191 break;
192 }
193
Linus Torvalds1da177e2005-04-16 15:20:36 -0700194 pci_write_config_byte(dev, drive_pci2[drive->dn], dma_timing);
195 pci_write_config_byte(dev, (0x56|hwif->channel), ultra_timing);
196 pci_write_config_byte(dev, 0x54, ultra_enable);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197}
198
Linus Torvalds1da177e2005-04-16 15:20:36 -0700199static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const char *name)
200{
201 unsigned int reg;
202 u8 btr;
203
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204 /* force Master Latency Timer value to 64 PCICLKs */
205 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x40);
206
207 /* OSB4 : South Bridge and IDE */
208 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
Alan Cox970a6132006-09-30 23:27:29 -0700209 isa_dev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210 PCI_DEVICE_ID_SERVERWORKS_OSB4, NULL);
211 if (isa_dev) {
212 pci_read_config_dword(isa_dev, 0x64, &reg);
213 reg &= ~0x00002000; /* disable 600ns interrupt mask */
214 if(!(reg & 0x00004000))
215 printk(KERN_DEBUG "%s: UDMA not BIOS enabled.\n", name);
216 reg |= 0x00004000; /* enable UDMA/33 support */
217 pci_write_config_dword(isa_dev, 0x64, reg);
218 }
219 }
220
221 /* setup CSB5/CSB6 : South Bridge and IDE option RAID */
222 else if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) ||
223 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
224 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) {
225
226 /* Third Channel Test */
227 if (!(PCI_FUNC(dev->devfn) & 1)) {
228 struct pci_dev * findev = NULL;
229 u32 reg4c = 0;
Alan Cox970a6132006-09-30 23:27:29 -0700230 findev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231 PCI_DEVICE_ID_SERVERWORKS_CSB5, NULL);
232 if (findev) {
233 pci_read_config_dword(findev, 0x4C, &reg4c);
234 reg4c &= ~0x000007FF;
235 reg4c |= 0x00000040;
236 reg4c |= 0x00000020;
237 pci_write_config_dword(findev, 0x4C, reg4c);
Alan Cox970a6132006-09-30 23:27:29 -0700238 pci_dev_put(findev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700239 }
240 outb_p(0x06, 0x0c00);
241 dev->irq = inb_p(0x0c01);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700242 } else {
243 struct pci_dev * findev = NULL;
244 u8 reg41 = 0;
245
Alan Cox970a6132006-09-30 23:27:29 -0700246 findev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247 PCI_DEVICE_ID_SERVERWORKS_CSB6, NULL);
248 if (findev) {
249 pci_read_config_byte(findev, 0x41, &reg41);
250 reg41 &= ~0x40;
251 pci_write_config_byte(findev, 0x41, reg41);
Alan Cox970a6132006-09-30 23:27:29 -0700252 pci_dev_put(findev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700253 }
254 /*
255 * This is a device pin issue on CSB6.
256 * Since there will be a future raid mode,
257 * early versions of the chipset require the
258 * interrupt pin to be set, and it is a compatibility
259 * mode issue.
260 */
261 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE)
262 dev->irq = 0;
263 }
264// pci_read_config_dword(dev, 0x40, &pioreg)
265// pci_write_config_dword(dev, 0x40, 0x99999999);
266// pci_read_config_dword(dev, 0x44, &dmareg);
267// pci_write_config_dword(dev, 0x44, 0xFFFFFFFF);
268 /* setup the UDMA Control register
269 *
270 * 1. clear bit 6 to enable DMA
271 * 2. enable DMA modes with bits 0-1
272 * 00 : legacy
273 * 01 : udma2
274 * 10 : udma2/udma4
275 * 11 : udma2/udma4/udma5
276 */
277 pci_read_config_byte(dev, 0x5A, &btr);
278 btr &= ~0x40;
279 if (!(PCI_FUNC(dev->devfn) & 1))
280 btr |= 0x2;
281 else
Auke Kok44c10132007-06-08 15:46:36 -0700282 btr |= (dev->revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283 pci_write_config_byte(dev, 0x5A, btr);
284 }
Narendra Sankar84f57fb2005-08-18 22:30:35 +0200285 /* Setup HT1000 SouthBridge Controller - Single Channel Only */
286 else if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) {
287 pci_read_config_byte(dev, 0x5A, &btr);
288 btr &= ~0x40;
289 btr |= 0x3;
290 pci_write_config_byte(dev, 0x5A, btr);
291 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700292
Alan Coxf201f502006-06-28 04:27:02 -0700293 return dev->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700294}
295
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200296static u8 __devinit ata66_svwks_svwks(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700297{
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200298 return ATA_CBL_PATA80;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299}
300
301/* On Dell PowerEdge servers with a CSB5/CSB6, the top two bits
302 * of the subsystem device ID indicate presence of an 80-pin cable.
303 * Bit 15 clear = secondary IDE channel does not have 80-pin cable.
304 * Bit 15 set = secondary IDE channel has 80-pin cable.
305 * Bit 14 clear = primary IDE channel does not have 80-pin cable.
306 * Bit 14 set = primary IDE channel has 80-pin cable.
307 */
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200308static u8 __devinit ata66_svwks_dell(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700309{
310 struct pci_dev *dev = hwif->pci_dev;
311 if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL &&
312 dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
313 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE ||
314 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE))
315 return ((1 << (hwif->channel + 14)) &
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200316 dev->subsystem_device) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
317 return ATA_CBL_PATA40;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318}
319
320/* Sun Cobalt Alpine hardware avoids the 80-pin cable
321 * detect issue by attaching the drives directly to the board.
322 * This check follows the Dell precedent (how scary is that?!)
323 *
324 * WARNING: this only works on Alpine hardware!
325 */
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200326static u8 __devinit ata66_svwks_cobalt(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327{
328 struct pci_dev *dev = hwif->pci_dev;
329 if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN &&
330 dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
331 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE)
332 return ((1 << (hwif->channel + 14)) &
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200333 dev->subsystem_device) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
334 return ATA_CBL_PATA40;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335}
336
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200337static u8 __devinit ata66_svwks(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338{
339 struct pci_dev *dev = hwif->pci_dev;
340
Linus Torvalds1da177e2005-04-16 15:20:36 -0700341 /* Server Works */
342 if (dev->subsystem_vendor == PCI_VENDOR_ID_SERVERWORKS)
343 return ata66_svwks_svwks (hwif);
344
345 /* Dell PowerEdge */
346 if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL)
347 return ata66_svwks_dell (hwif);
348
349 /* Cobalt Alpine */
350 if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN)
351 return ata66_svwks_cobalt (hwif);
352
Alan Coxf201f502006-06-28 04:27:02 -0700353 /* Per Specified Design by OEM, and ASIC Architect */
354 if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
355 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2))
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200356 return ATA_CBL_PATA80;
Alan Coxf201f502006-06-28 04:27:02 -0700357
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200358 return ATA_CBL_PATA40;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700359}
360
Linus Torvalds1da177e2005-04-16 15:20:36 -0700361static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
362{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700363 if (!hwif->irq)
364 hwif->irq = hwif->channel ? 15 : 14;
365
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200366 hwif->set_pio_mode = &svwks_set_pio_mode;
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200367 hwif->set_dma_mode = &svwks_set_dma_mode;
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +0200368 hwif->udma_filter = &svwks_udma_filter;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700369
Bartlomiej Zolnierkiewicz1880a8d2007-07-20 01:11:56 +0200370 hwif->drives[0].autotune = 1;
371 hwif->drives[1].autotune = 1;
372
373 if (!hwif->dma_base)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700374 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375
Bartlomiej Zolnierkiewicz946f8e42007-02-17 02:40:23 +0100376 if (hwif->pci_dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200377 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
378 hwif->cbl = ata66_svwks(hwif);
Bartlomiej Zolnierkiewicz946f8e42007-02-17 02:40:23 +0100379 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700380}
381
Linus Torvalds1da177e2005-04-16 15:20:36 -0700382static int __devinit init_setup_svwks (struct pci_dev *dev, ide_pci_device_t *d)
383{
384 return ide_setup_pci_device(dev, d);
385}
386
Alan Coxbb732d72005-06-27 15:24:29 -0700387static int __devinit init_setup_csb6 (struct pci_dev *dev, ide_pci_device_t *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388{
389 if (!(PCI_FUNC(dev->devfn) & 1)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700390 if (dev->resource[0].start == 0x01f1)
Bartlomiej Zolnierkiewicz7cab14a2007-10-19 00:30:06 +0200391 d->host_flags |= IDE_HFLAG_BOOTABLE;
392 else
393 d->host_flags &= ~IDE_HFLAG_BOOTABLE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700394 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395
Bartlomiej Zolnierkiewicza5d8c5c2007-07-20 01:11:55 +0200396 if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE ||
397 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2) &&
398 (!(PCI_FUNC(dev->devfn) & 1)))
399 d->host_flags |= IDE_HFLAG_SINGLE;
400 else
401 d->host_flags &= ~IDE_HFLAG_SINGLE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700402
403 return ide_setup_pci_device(dev, d);
404}
405
406static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
407 { /* 0 */
408 .name = "SvrWks OSB4",
409 .init_setup = init_setup_svwks,
410 .init_chipset = init_chipset_svwks,
411 .init_hwif = init_hwif_svwks,
Bartlomiej Zolnierkiewicz7cab14a2007-10-19 00:30:06 +0200412 .host_flags = IDE_HFLAG_BOOTABLE,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200413 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200414 .mwdma_mask = ATA_MWDMA2,
415 .udma_mask = 0x00, /* UDMA is problematic on OSB4 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700416 },{ /* 1 */
417 .name = "SvrWks CSB5",
418 .init_setup = init_setup_svwks,
419 .init_chipset = init_chipset_svwks,
420 .init_hwif = init_hwif_svwks,
Bartlomiej Zolnierkiewicz7cab14a2007-10-19 00:30:06 +0200421 .host_flags = IDE_HFLAG_BOOTABLE,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200422 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200423 .mwdma_mask = ATA_MWDMA2,
424 .udma_mask = ATA_UDMA5,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425 },{ /* 2 */
426 .name = "SvrWks CSB6",
427 .init_setup = init_setup_csb6,
428 .init_chipset = init_chipset_svwks,
429 .init_hwif = init_hwif_svwks,
Bartlomiej Zolnierkiewicz7cab14a2007-10-19 00:30:06 +0200430 .host_flags = IDE_HFLAG_BOOTABLE,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200431 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200432 .mwdma_mask = ATA_MWDMA2,
433 .udma_mask = ATA_UDMA5,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700434 },{ /* 3 */
435 .name = "SvrWks CSB6",
436 .init_setup = init_setup_csb6,
437 .init_chipset = init_chipset_svwks,
438 .init_hwif = init_hwif_svwks,
Bartlomiej Zolnierkiewicz7cab14a2007-10-19 00:30:06 +0200439 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_BOOTABLE,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200440 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200441 .mwdma_mask = ATA_MWDMA2,
442 .udma_mask = ATA_UDMA5,
Narendra Sankar84f57fb2005-08-18 22:30:35 +0200443 },{ /* 4 */
444 .name = "SvrWks HT1000",
445 .init_setup = init_setup_svwks,
446 .init_chipset = init_chipset_svwks,
447 .init_hwif = init_hwif_svwks,
Bartlomiej Zolnierkiewicz7cab14a2007-10-19 00:30:06 +0200448 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_BOOTABLE,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200449 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200450 .mwdma_mask = ATA_MWDMA2,
451 .udma_mask = ATA_UDMA5,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700452 }
453};
454
455/**
456 * svwks_init_one - called when a OSB/CSB is found
457 * @dev: the svwks device
458 * @id: the matching pci id
459 *
460 * Called when the PCI registration layer (or the IDE initialization)
461 * finds a device matching our IDE device tables.
462 */
463
464static int __devinit svwks_init_one(struct pci_dev *dev, const struct pci_device_id *id)
465{
466 ide_pci_device_t *d = &serverworks_chipsets[id->driver_data];
467
468 return d->init_setup(dev, d);
469}
470
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +0200471static const struct pci_device_id svwks_pci_tbl[] = {
472 { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4IDE), 0 },
473 { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE), 1 },
474 { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE), 2 },
475 { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2), 3 },
476 { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000IDE), 4 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700477 { 0, },
478};
479MODULE_DEVICE_TABLE(pci, svwks_pci_tbl);
480
481static struct pci_driver driver = {
482 .name = "Serverworks_IDE",
483 .id_table = svwks_pci_tbl,
484 .probe = svwks_init_one,
485};
486
Bartlomiej Zolnierkiewicz82ab1ee2007-01-27 13:46:56 +0100487static int __init svwks_ide_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700488{
489 return ide_pci_register_driver(&driver);
490}
491
492module_init(svwks_ide_init);
493
494MODULE_AUTHOR("Michael Aubry. Andrzej Krzysztofowicz, Andre Hedrick");
495MODULE_DESCRIPTION("PCI driver module for Serverworks OSB4/CSB5/CSB6 IDE");
496MODULE_LICENSE("GPL");