Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1 | /* |
Joerg Roedel | 5d0d715 | 2010-10-13 11:13:21 +0200 | [diff] [blame] | 2 | * Copyright (C) 2007-2010 Advanced Micro Devices, Inc. |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 3 | * Author: Joerg Roedel <joerg.roedel@amd.com> |
| 4 | * Leo Duran <leo.duran@amd.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | */ |
| 19 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 20 | #include <linux/ratelimit.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 21 | #include <linux/pci.h> |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 22 | #include <linux/pci-ats.h> |
Akinobu Mita | a66022c | 2009-12-15 16:48:28 -0800 | [diff] [blame] | 23 | #include <linux/bitmap.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 24 | #include <linux/slab.h> |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 25 | #include <linux/debugfs.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 26 | #include <linux/scatterlist.h> |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 27 | #include <linux/dma-mapping.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 28 | #include <linux/iommu-helper.h> |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 29 | #include <linux/iommu.h> |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 30 | #include <linux/delay.h> |
Joerg Roedel | 403f81d | 2011-06-14 16:44:25 +0200 | [diff] [blame] | 31 | #include <linux/amd-iommu.h> |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 32 | #include <linux/notifier.h> |
| 33 | #include <linux/export.h> |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 34 | #include <linux/irq.h> |
| 35 | #include <linux/msi.h> |
| 36 | #include <asm/irq_remapping.h> |
| 37 | #include <asm/io_apic.h> |
| 38 | #include <asm/apic.h> |
| 39 | #include <asm/hw_irq.h> |
Joerg Roedel | 17f5b56 | 2011-07-06 17:14:44 +0200 | [diff] [blame] | 40 | #include <asm/msidef.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 41 | #include <asm/proto.h> |
FUJITA Tomonori | 46a7fa2 | 2008-07-11 10:23:42 +0900 | [diff] [blame] | 42 | #include <asm/iommu.h> |
Joerg Roedel | 1d9b16d | 2008-11-27 18:39:15 +0100 | [diff] [blame] | 43 | #include <asm/gart.h> |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 44 | #include <asm/dma.h> |
Joerg Roedel | 403f81d | 2011-06-14 16:44:25 +0200 | [diff] [blame] | 45 | |
| 46 | #include "amd_iommu_proto.h" |
| 47 | #include "amd_iommu_types.h" |
Joerg Roedel | 6b474b8 | 2012-06-26 16:46:04 +0200 | [diff] [blame] | 48 | #include "irq_remapping.h" |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 49 | |
| 50 | #define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28)) |
| 51 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 52 | #define LOOP_TIMEOUT 100000 |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 53 | |
Ohad Ben-Cohen | aa3de9c | 2011-11-10 11:32:29 +0200 | [diff] [blame] | 54 | /* |
| 55 | * This bitmap is used to advertise the page sizes our hardware support |
| 56 | * to the IOMMU core, which will then use this information to split |
| 57 | * physically contiguous memory regions it is mapping into page sizes |
| 58 | * that we support. |
| 59 | * |
Joerg Roedel | 954e3dd | 2012-12-02 15:35:37 +0100 | [diff] [blame] | 60 | * 512GB Pages are not supported due to a hardware bug |
Ohad Ben-Cohen | aa3de9c | 2011-11-10 11:32:29 +0200 | [diff] [blame] | 61 | */ |
Joerg Roedel | 954e3dd | 2012-12-02 15:35:37 +0100 | [diff] [blame] | 62 | #define AMD_IOMMU_PGSIZES ((~0xFFFUL) & ~(2ULL << 38)) |
Ohad Ben-Cohen | aa3de9c | 2011-11-10 11:32:29 +0200 | [diff] [blame] | 63 | |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 64 | static DEFINE_RWLOCK(amd_iommu_devtable_lock); |
| 65 | |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 66 | /* A list of preallocated protection domains */ |
| 67 | static LIST_HEAD(iommu_pd_list); |
| 68 | static DEFINE_SPINLOCK(iommu_pd_list_lock); |
| 69 | |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 70 | /* List of all available dev_data structures */ |
| 71 | static LIST_HEAD(dev_data_list); |
| 72 | static DEFINE_SPINLOCK(dev_data_list_lock); |
| 73 | |
Joerg Roedel | 6efed63 | 2012-06-14 15:52:58 +0200 | [diff] [blame] | 74 | LIST_HEAD(ioapic_map); |
| 75 | LIST_HEAD(hpet_map); |
| 76 | |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 77 | /* |
| 78 | * Domain for untranslated devices - only allocated |
| 79 | * if iommu=pt passed on kernel cmd line. |
| 80 | */ |
| 81 | static struct protection_domain *pt_domain; |
| 82 | |
Thierry Reding | b22f643 | 2014-06-27 09:03:12 +0200 | [diff] [blame] | 83 | static const struct iommu_ops amd_iommu_ops; |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 84 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 85 | static ATOMIC_NOTIFIER_HEAD(ppr_notifier); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 86 | int amd_iommu_max_glx_val = -1; |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 87 | |
Joerg Roedel | ac1534a | 2012-06-21 14:52:40 +0200 | [diff] [blame] | 88 | static struct dma_map_ops amd_iommu_dma_ops; |
| 89 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 90 | /* |
| 91 | * general struct to manage commands send to an IOMMU |
| 92 | */ |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 93 | struct iommu_cmd { |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 94 | u32 data[4]; |
| 95 | }; |
| 96 | |
Joerg Roedel | 05152a0 | 2012-06-15 16:53:51 +0200 | [diff] [blame] | 97 | struct kmem_cache *amd_iommu_irq_cache; |
| 98 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 99 | static void update_domain(struct protection_domain *domain); |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 100 | static int __init alloc_passthrough_domain(void); |
Chris Wright | c1eee67 | 2009-05-21 00:56:58 -0700 | [diff] [blame] | 101 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 102 | /**************************************************************************** |
| 103 | * |
| 104 | * Helper functions |
| 105 | * |
| 106 | ****************************************************************************/ |
| 107 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 108 | static struct iommu_dev_data *alloc_dev_data(u16 devid) |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 109 | { |
| 110 | struct iommu_dev_data *dev_data; |
| 111 | unsigned long flags; |
| 112 | |
| 113 | dev_data = kzalloc(sizeof(*dev_data), GFP_KERNEL); |
| 114 | if (!dev_data) |
| 115 | return NULL; |
| 116 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 117 | dev_data->devid = devid; |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 118 | atomic_set(&dev_data->bind, 0); |
| 119 | |
| 120 | spin_lock_irqsave(&dev_data_list_lock, flags); |
| 121 | list_add_tail(&dev_data->dev_data_list, &dev_data_list); |
| 122 | spin_unlock_irqrestore(&dev_data_list_lock, flags); |
| 123 | |
| 124 | return dev_data; |
| 125 | } |
| 126 | |
| 127 | static void free_dev_data(struct iommu_dev_data *dev_data) |
| 128 | { |
| 129 | unsigned long flags; |
| 130 | |
| 131 | spin_lock_irqsave(&dev_data_list_lock, flags); |
| 132 | list_del(&dev_data->dev_data_list); |
| 133 | spin_unlock_irqrestore(&dev_data_list_lock, flags); |
| 134 | |
| 135 | kfree(dev_data); |
| 136 | } |
| 137 | |
Joerg Roedel | 3b03bb7 | 2011-06-09 18:53:25 +0200 | [diff] [blame] | 138 | static struct iommu_dev_data *search_dev_data(u16 devid) |
| 139 | { |
| 140 | struct iommu_dev_data *dev_data; |
| 141 | unsigned long flags; |
| 142 | |
| 143 | spin_lock_irqsave(&dev_data_list_lock, flags); |
| 144 | list_for_each_entry(dev_data, &dev_data_list, dev_data_list) { |
| 145 | if (dev_data->devid == devid) |
| 146 | goto out_unlock; |
| 147 | } |
| 148 | |
| 149 | dev_data = NULL; |
| 150 | |
| 151 | out_unlock: |
| 152 | spin_unlock_irqrestore(&dev_data_list_lock, flags); |
| 153 | |
| 154 | return dev_data; |
| 155 | } |
| 156 | |
| 157 | static struct iommu_dev_data *find_dev_data(u16 devid) |
| 158 | { |
| 159 | struct iommu_dev_data *dev_data; |
| 160 | |
| 161 | dev_data = search_dev_data(devid); |
| 162 | |
| 163 | if (dev_data == NULL) |
| 164 | dev_data = alloc_dev_data(devid); |
| 165 | |
| 166 | return dev_data; |
| 167 | } |
| 168 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 169 | static inline u16 get_device_id(struct device *dev) |
| 170 | { |
| 171 | struct pci_dev *pdev = to_pci_dev(dev); |
| 172 | |
Shuah Khan | 6f2729b | 2013-02-27 17:07:30 -0700 | [diff] [blame] | 173 | return PCI_DEVID(pdev->bus->number, pdev->devfn); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 174 | } |
| 175 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 176 | static struct iommu_dev_data *get_dev_data(struct device *dev) |
| 177 | { |
| 178 | return dev->archdata.iommu; |
| 179 | } |
| 180 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 181 | static bool pci_iommuv2_capable(struct pci_dev *pdev) |
| 182 | { |
| 183 | static const int caps[] = { |
| 184 | PCI_EXT_CAP_ID_ATS, |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 185 | PCI_EXT_CAP_ID_PRI, |
| 186 | PCI_EXT_CAP_ID_PASID, |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 187 | }; |
| 188 | int i, pos; |
| 189 | |
| 190 | for (i = 0; i < 3; ++i) { |
| 191 | pos = pci_find_ext_capability(pdev, caps[i]); |
| 192 | if (pos == 0) |
| 193 | return false; |
| 194 | } |
| 195 | |
| 196 | return true; |
| 197 | } |
| 198 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 199 | static bool pdev_pri_erratum(struct pci_dev *pdev, u32 erratum) |
| 200 | { |
| 201 | struct iommu_dev_data *dev_data; |
| 202 | |
| 203 | dev_data = get_dev_data(&pdev->dev); |
| 204 | |
| 205 | return dev_data->errata & (1 << erratum) ? true : false; |
| 206 | } |
| 207 | |
Joerg Roedel | 71c7098 | 2009-11-24 16:43:06 +0100 | [diff] [blame] | 208 | /* |
| 209 | * In this function the list of preallocated protection domains is traversed to |
| 210 | * find the domain for a specific device |
| 211 | */ |
| 212 | static struct dma_ops_domain *find_protection_domain(u16 devid) |
| 213 | { |
| 214 | struct dma_ops_domain *entry, *ret = NULL; |
| 215 | unsigned long flags; |
| 216 | u16 alias = amd_iommu_alias_table[devid]; |
| 217 | |
| 218 | if (list_empty(&iommu_pd_list)) |
| 219 | return NULL; |
| 220 | |
| 221 | spin_lock_irqsave(&iommu_pd_list_lock, flags); |
| 222 | |
| 223 | list_for_each_entry(entry, &iommu_pd_list, list) { |
| 224 | if (entry->target_dev == devid || |
| 225 | entry->target_dev == alias) { |
| 226 | ret = entry; |
| 227 | break; |
| 228 | } |
| 229 | } |
| 230 | |
| 231 | spin_unlock_irqrestore(&iommu_pd_list_lock, flags); |
| 232 | |
| 233 | return ret; |
| 234 | } |
| 235 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 236 | /* |
| 237 | * This function checks if the driver got a valid device from the caller to |
| 238 | * avoid dereferencing invalid pointers. |
| 239 | */ |
| 240 | static bool check_device(struct device *dev) |
| 241 | { |
| 242 | u16 devid; |
| 243 | |
| 244 | if (!dev || !dev->dma_mask) |
| 245 | return false; |
| 246 | |
Yijing Wang | b82a227 | 2013-12-05 19:42:41 +0800 | [diff] [blame] | 247 | /* No PCI device */ |
| 248 | if (!dev_is_pci(dev)) |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 249 | return false; |
| 250 | |
| 251 | devid = get_device_id(dev); |
| 252 | |
| 253 | /* Out of our scope? */ |
| 254 | if (devid > amd_iommu_last_bdf) |
| 255 | return false; |
| 256 | |
| 257 | if (amd_iommu_rlookup_table[devid] == NULL) |
| 258 | return false; |
| 259 | |
| 260 | return true; |
| 261 | } |
| 262 | |
Alex Williamson | 25b11ce | 2014-09-19 10:03:13 -0600 | [diff] [blame] | 263 | static void init_iommu_group(struct device *dev) |
Alex Williamson | 2851db2 | 2012-10-08 22:49:41 -0600 | [diff] [blame] | 264 | { |
Alex Williamson | 2851db2 | 2012-10-08 22:49:41 -0600 | [diff] [blame] | 265 | struct iommu_group *group; |
Alex Williamson | 2851db2 | 2012-10-08 22:49:41 -0600 | [diff] [blame] | 266 | |
Alex Williamson | 65d5352 | 2014-07-03 09:51:30 -0600 | [diff] [blame] | 267 | group = iommu_group_get_for_dev(dev); |
Alex Williamson | 25b11ce | 2014-09-19 10:03:13 -0600 | [diff] [blame] | 268 | if (!IS_ERR(group)) |
| 269 | iommu_group_put(group); |
Alex Williamson | eb9c952 | 2012-10-08 22:49:35 -0600 | [diff] [blame] | 270 | } |
| 271 | |
Alex Williamson | c193109 | 2014-07-03 09:51:24 -0600 | [diff] [blame] | 272 | static int __last_alias(struct pci_dev *pdev, u16 alias, void *data) |
| 273 | { |
| 274 | *(u16 *)data = alias; |
| 275 | return 0; |
| 276 | } |
| 277 | |
| 278 | static u16 get_alias(struct device *dev) |
| 279 | { |
| 280 | struct pci_dev *pdev = to_pci_dev(dev); |
| 281 | u16 devid, ivrs_alias, pci_alias; |
| 282 | |
| 283 | devid = get_device_id(dev); |
| 284 | ivrs_alias = amd_iommu_alias_table[devid]; |
| 285 | pci_for_each_dma_alias(pdev, __last_alias, &pci_alias); |
| 286 | |
| 287 | if (ivrs_alias == pci_alias) |
| 288 | return ivrs_alias; |
| 289 | |
| 290 | /* |
| 291 | * DMA alias showdown |
| 292 | * |
| 293 | * The IVRS is fairly reliable in telling us about aliases, but it |
| 294 | * can't know about every screwy device. If we don't have an IVRS |
| 295 | * reported alias, use the PCI reported alias. In that case we may |
| 296 | * still need to initialize the rlookup and dev_table entries if the |
| 297 | * alias is to a non-existent device. |
| 298 | */ |
| 299 | if (ivrs_alias == devid) { |
| 300 | if (!amd_iommu_rlookup_table[pci_alias]) { |
| 301 | amd_iommu_rlookup_table[pci_alias] = |
| 302 | amd_iommu_rlookup_table[devid]; |
| 303 | memcpy(amd_iommu_dev_table[pci_alias].data, |
| 304 | amd_iommu_dev_table[devid].data, |
| 305 | sizeof(amd_iommu_dev_table[pci_alias].data)); |
| 306 | } |
| 307 | |
| 308 | return pci_alias; |
| 309 | } |
| 310 | |
| 311 | pr_info("AMD-Vi: Using IVRS reported alias %02x:%02x.%d " |
| 312 | "for device %s[%04x:%04x], kernel reported alias " |
| 313 | "%02x:%02x.%d\n", PCI_BUS_NUM(ivrs_alias), PCI_SLOT(ivrs_alias), |
| 314 | PCI_FUNC(ivrs_alias), dev_name(dev), pdev->vendor, pdev->device, |
| 315 | PCI_BUS_NUM(pci_alias), PCI_SLOT(pci_alias), |
| 316 | PCI_FUNC(pci_alias)); |
| 317 | |
| 318 | /* |
| 319 | * If we don't have a PCI DMA alias and the IVRS alias is on the same |
| 320 | * bus, then the IVRS table may know about a quirk that we don't. |
| 321 | */ |
| 322 | if (pci_alias == devid && |
| 323 | PCI_BUS_NUM(ivrs_alias) == pdev->bus->number) { |
| 324 | pdev->dev_flags |= PCI_DEV_FLAGS_DMA_ALIAS_DEVFN; |
| 325 | pdev->dma_alias_devfn = ivrs_alias & 0xff; |
| 326 | pr_info("AMD-Vi: Added PCI DMA alias %02x.%d for %s\n", |
| 327 | PCI_SLOT(ivrs_alias), PCI_FUNC(ivrs_alias), |
| 328 | dev_name(dev)); |
| 329 | } |
| 330 | |
| 331 | return ivrs_alias; |
| 332 | } |
| 333 | |
Alex Williamson | eb9c952 | 2012-10-08 22:49:35 -0600 | [diff] [blame] | 334 | static int iommu_init_device(struct device *dev) |
| 335 | { |
| 336 | struct pci_dev *pdev = to_pci_dev(dev); |
| 337 | struct iommu_dev_data *dev_data; |
| 338 | u16 alias; |
Alex Williamson | eb9c952 | 2012-10-08 22:49:35 -0600 | [diff] [blame] | 339 | |
| 340 | if (dev->archdata.iommu) |
| 341 | return 0; |
| 342 | |
| 343 | dev_data = find_dev_data(get_device_id(dev)); |
| 344 | if (!dev_data) |
| 345 | return -ENOMEM; |
| 346 | |
Alex Williamson | c193109 | 2014-07-03 09:51:24 -0600 | [diff] [blame] | 347 | alias = get_alias(dev); |
| 348 | |
Alex Williamson | eb9c952 | 2012-10-08 22:49:35 -0600 | [diff] [blame] | 349 | if (alias != dev_data->devid) { |
| 350 | struct iommu_dev_data *alias_data; |
| 351 | |
| 352 | alias_data = find_dev_data(alias); |
| 353 | if (alias_data == NULL) { |
| 354 | pr_err("AMD-Vi: Warning: Unhandled device %s\n", |
| 355 | dev_name(dev)); |
| 356 | free_dev_data(dev_data); |
| 357 | return -ENOTSUPP; |
| 358 | } |
| 359 | dev_data->alias_data = alias_data; |
| 360 | } |
| 361 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 362 | if (pci_iommuv2_capable(pdev)) { |
| 363 | struct amd_iommu *iommu; |
| 364 | |
| 365 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 366 | dev_data->iommu_v2 = iommu->is_iommu_v2; |
| 367 | } |
| 368 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 369 | dev->archdata.iommu = dev_data; |
| 370 | |
Alex Williamson | 066f2e9 | 2014-06-12 16:12:37 -0600 | [diff] [blame] | 371 | iommu_device_link(amd_iommu_rlookup_table[dev_data->devid]->iommu_dev, |
| 372 | dev); |
| 373 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 374 | return 0; |
| 375 | } |
| 376 | |
Joerg Roedel | 2601887 | 2011-06-06 16:50:14 +0200 | [diff] [blame] | 377 | static void iommu_ignore_device(struct device *dev) |
| 378 | { |
| 379 | u16 devid, alias; |
| 380 | |
| 381 | devid = get_device_id(dev); |
| 382 | alias = amd_iommu_alias_table[devid]; |
| 383 | |
| 384 | memset(&amd_iommu_dev_table[devid], 0, sizeof(struct dev_table_entry)); |
| 385 | memset(&amd_iommu_dev_table[alias], 0, sizeof(struct dev_table_entry)); |
| 386 | |
| 387 | amd_iommu_rlookup_table[devid] = NULL; |
| 388 | amd_iommu_rlookup_table[alias] = NULL; |
| 389 | } |
| 390 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 391 | static void iommu_uninit_device(struct device *dev) |
| 392 | { |
Alex Williamson | c193109 | 2014-07-03 09:51:24 -0600 | [diff] [blame] | 393 | struct iommu_dev_data *dev_data = search_dev_data(get_device_id(dev)); |
| 394 | |
| 395 | if (!dev_data) |
| 396 | return; |
| 397 | |
Alex Williamson | 066f2e9 | 2014-06-12 16:12:37 -0600 | [diff] [blame] | 398 | iommu_device_unlink(amd_iommu_rlookup_table[dev_data->devid]->iommu_dev, |
| 399 | dev); |
| 400 | |
Alex Williamson | 9dcd613 | 2012-05-30 14:19:07 -0600 | [diff] [blame] | 401 | iommu_group_remove_device(dev); |
| 402 | |
Alex Williamson | c193109 | 2014-07-03 09:51:24 -0600 | [diff] [blame] | 403 | /* Unlink from alias, it may change if another device is re-plugged */ |
| 404 | dev_data->alias_data = NULL; |
| 405 | |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 406 | /* |
Alex Williamson | c193109 | 2014-07-03 09:51:24 -0600 | [diff] [blame] | 407 | * We keep dev_data around for unplugged devices and reuse it when the |
| 408 | * device is re-plugged - not doing so would introduce a ton of races. |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 409 | */ |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 410 | } |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 411 | |
| 412 | void __init amd_iommu_uninit_devices(void) |
| 413 | { |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 414 | struct iommu_dev_data *dev_data, *n; |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 415 | struct pci_dev *pdev = NULL; |
| 416 | |
| 417 | for_each_pci_dev(pdev) { |
| 418 | |
| 419 | if (!check_device(&pdev->dev)) |
| 420 | continue; |
| 421 | |
| 422 | iommu_uninit_device(&pdev->dev); |
| 423 | } |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 424 | |
| 425 | /* Free all of our dev_data structures */ |
| 426 | list_for_each_entry_safe(dev_data, n, &dev_data_list, dev_data_list) |
| 427 | free_dev_data(dev_data); |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 428 | } |
| 429 | |
| 430 | int __init amd_iommu_init_devices(void) |
| 431 | { |
| 432 | struct pci_dev *pdev = NULL; |
| 433 | int ret = 0; |
| 434 | |
| 435 | for_each_pci_dev(pdev) { |
| 436 | |
| 437 | if (!check_device(&pdev->dev)) |
| 438 | continue; |
| 439 | |
| 440 | ret = iommu_init_device(&pdev->dev); |
Joerg Roedel | 2601887 | 2011-06-06 16:50:14 +0200 | [diff] [blame] | 441 | if (ret == -ENOTSUPP) |
| 442 | iommu_ignore_device(&pdev->dev); |
| 443 | else if (ret) |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 444 | goto out_free; |
| 445 | } |
| 446 | |
Alex Williamson | 25b11ce | 2014-09-19 10:03:13 -0600 | [diff] [blame] | 447 | /* |
| 448 | * Initialize IOMMU groups only after iommu_init_device() has |
| 449 | * had a chance to populate any IVRS defined aliases. |
| 450 | */ |
| 451 | for_each_pci_dev(pdev) { |
| 452 | if (check_device(&pdev->dev)) |
| 453 | init_iommu_group(&pdev->dev); |
| 454 | } |
| 455 | |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 456 | return 0; |
| 457 | |
| 458 | out_free: |
| 459 | |
| 460 | amd_iommu_uninit_devices(); |
| 461 | |
| 462 | return ret; |
| 463 | } |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 464 | #ifdef CONFIG_AMD_IOMMU_STATS |
| 465 | |
| 466 | /* |
| 467 | * Initialization code for statistics collection |
| 468 | */ |
| 469 | |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 470 | DECLARE_STATS_COUNTER(compl_wait); |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 471 | DECLARE_STATS_COUNTER(cnt_map_single); |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 472 | DECLARE_STATS_COUNTER(cnt_unmap_single); |
Joerg Roedel | d03f067a | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 473 | DECLARE_STATS_COUNTER(cnt_map_sg); |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 474 | DECLARE_STATS_COUNTER(cnt_unmap_sg); |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 475 | DECLARE_STATS_COUNTER(cnt_alloc_coherent); |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 476 | DECLARE_STATS_COUNTER(cnt_free_coherent); |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 477 | DECLARE_STATS_COUNTER(cross_page); |
Joerg Roedel | f57d98a | 2008-12-12 15:46:29 +0100 | [diff] [blame] | 478 | DECLARE_STATS_COUNTER(domain_flush_single); |
Joerg Roedel | 18811f5 | 2008-12-12 15:48:28 +0100 | [diff] [blame] | 479 | DECLARE_STATS_COUNTER(domain_flush_all); |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 480 | DECLARE_STATS_COUNTER(alloced_io_mem); |
Joerg Roedel | 8ecaf8f | 2008-12-12 16:13:04 +0100 | [diff] [blame] | 481 | DECLARE_STATS_COUNTER(total_map_requests); |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 482 | DECLARE_STATS_COUNTER(complete_ppr); |
| 483 | DECLARE_STATS_COUNTER(invalidate_iotlb); |
| 484 | DECLARE_STATS_COUNTER(invalidate_iotlb_all); |
| 485 | DECLARE_STATS_COUNTER(pri_requests); |
| 486 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 487 | static struct dentry *stats_dir; |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 488 | static struct dentry *de_fflush; |
| 489 | |
| 490 | static void amd_iommu_stats_add(struct __iommu_counter *cnt) |
| 491 | { |
| 492 | if (stats_dir == NULL) |
| 493 | return; |
| 494 | |
| 495 | cnt->dent = debugfs_create_u64(cnt->name, 0444, stats_dir, |
| 496 | &cnt->value); |
| 497 | } |
| 498 | |
| 499 | static void amd_iommu_stats_init(void) |
| 500 | { |
| 501 | stats_dir = debugfs_create_dir("amd-iommu", NULL); |
| 502 | if (stats_dir == NULL) |
| 503 | return; |
| 504 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 505 | de_fflush = debugfs_create_bool("fullflush", 0444, stats_dir, |
Dan Carpenter | 3775d48 | 2012-06-27 12:09:18 +0300 | [diff] [blame] | 506 | &amd_iommu_unmap_flush); |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 507 | |
| 508 | amd_iommu_stats_add(&compl_wait); |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 509 | amd_iommu_stats_add(&cnt_map_single); |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 510 | amd_iommu_stats_add(&cnt_unmap_single); |
Joerg Roedel | d03f067a | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 511 | amd_iommu_stats_add(&cnt_map_sg); |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 512 | amd_iommu_stats_add(&cnt_unmap_sg); |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 513 | amd_iommu_stats_add(&cnt_alloc_coherent); |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 514 | amd_iommu_stats_add(&cnt_free_coherent); |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 515 | amd_iommu_stats_add(&cross_page); |
Joerg Roedel | f57d98a | 2008-12-12 15:46:29 +0100 | [diff] [blame] | 516 | amd_iommu_stats_add(&domain_flush_single); |
Joerg Roedel | 18811f5 | 2008-12-12 15:48:28 +0100 | [diff] [blame] | 517 | amd_iommu_stats_add(&domain_flush_all); |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 518 | amd_iommu_stats_add(&alloced_io_mem); |
Joerg Roedel | 8ecaf8f | 2008-12-12 16:13:04 +0100 | [diff] [blame] | 519 | amd_iommu_stats_add(&total_map_requests); |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 520 | amd_iommu_stats_add(&complete_ppr); |
| 521 | amd_iommu_stats_add(&invalidate_iotlb); |
| 522 | amd_iommu_stats_add(&invalidate_iotlb_all); |
| 523 | amd_iommu_stats_add(&pri_requests); |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 524 | } |
| 525 | |
| 526 | #endif |
| 527 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 528 | /**************************************************************************** |
| 529 | * |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 530 | * Interrupt handling functions |
| 531 | * |
| 532 | ****************************************************************************/ |
| 533 | |
Joerg Roedel | e3e5987 | 2009-09-03 14:02:10 +0200 | [diff] [blame] | 534 | static void dump_dte_entry(u16 devid) |
| 535 | { |
| 536 | int i; |
| 537 | |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 538 | for (i = 0; i < 4; ++i) |
| 539 | pr_err("AMD-Vi: DTE[%d]: %016llx\n", i, |
Joerg Roedel | e3e5987 | 2009-09-03 14:02:10 +0200 | [diff] [blame] | 540 | amd_iommu_dev_table[devid].data[i]); |
| 541 | } |
| 542 | |
Joerg Roedel | 945b4ac | 2009-09-03 14:25:02 +0200 | [diff] [blame] | 543 | static void dump_command(unsigned long phys_addr) |
| 544 | { |
| 545 | struct iommu_cmd *cmd = phys_to_virt(phys_addr); |
| 546 | int i; |
| 547 | |
| 548 | for (i = 0; i < 4; ++i) |
| 549 | pr_err("AMD-Vi: CMD[%d]: %08x\n", i, cmd->data[i]); |
| 550 | } |
| 551 | |
Joerg Roedel | a345b23 | 2009-09-03 15:01:43 +0200 | [diff] [blame] | 552 | static void iommu_print_event(struct amd_iommu *iommu, void *__evt) |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 553 | { |
Joerg Roedel | 3d06fca | 2012-04-12 14:12:00 +0200 | [diff] [blame] | 554 | int type, devid, domid, flags; |
| 555 | volatile u32 *event = __evt; |
| 556 | int count = 0; |
| 557 | u64 address; |
| 558 | |
| 559 | retry: |
| 560 | type = (event[1] >> EVENT_TYPE_SHIFT) & EVENT_TYPE_MASK; |
| 561 | devid = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK; |
| 562 | domid = (event[1] >> EVENT_DOMID_SHIFT) & EVENT_DOMID_MASK; |
| 563 | flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK; |
| 564 | address = (u64)(((u64)event[3]) << 32) | event[2]; |
| 565 | |
| 566 | if (type == 0) { |
| 567 | /* Did we hit the erratum? */ |
| 568 | if (++count == LOOP_TIMEOUT) { |
| 569 | pr_err("AMD-Vi: No event written to event log\n"); |
| 570 | return; |
| 571 | } |
| 572 | udelay(1); |
| 573 | goto retry; |
| 574 | } |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 575 | |
Joerg Roedel | 4c6f40d | 2009-09-01 16:43:58 +0200 | [diff] [blame] | 576 | printk(KERN_ERR "AMD-Vi: Event logged ["); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 577 | |
| 578 | switch (type) { |
| 579 | case EVENT_TYPE_ILL_DEV: |
| 580 | printk("ILLEGAL_DEV_TABLE_ENTRY device=%02x:%02x.%x " |
| 581 | "address=0x%016llx flags=0x%04x]\n", |
Shuah Khan | c5081cd | 2013-02-27 17:07:19 -0700 | [diff] [blame] | 582 | PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 583 | address, flags); |
Joerg Roedel | e3e5987 | 2009-09-03 14:02:10 +0200 | [diff] [blame] | 584 | dump_dte_entry(devid); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 585 | break; |
| 586 | case EVENT_TYPE_IO_FAULT: |
| 587 | printk("IO_PAGE_FAULT device=%02x:%02x.%x " |
| 588 | "domain=0x%04x address=0x%016llx flags=0x%04x]\n", |
Shuah Khan | c5081cd | 2013-02-27 17:07:19 -0700 | [diff] [blame] | 589 | PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 590 | domid, address, flags); |
| 591 | break; |
| 592 | case EVENT_TYPE_DEV_TAB_ERR: |
| 593 | printk("DEV_TAB_HARDWARE_ERROR device=%02x:%02x.%x " |
| 594 | "address=0x%016llx flags=0x%04x]\n", |
Shuah Khan | c5081cd | 2013-02-27 17:07:19 -0700 | [diff] [blame] | 595 | PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 596 | address, flags); |
| 597 | break; |
| 598 | case EVENT_TYPE_PAGE_TAB_ERR: |
| 599 | printk("PAGE_TAB_HARDWARE_ERROR device=%02x:%02x.%x " |
| 600 | "domain=0x%04x address=0x%016llx flags=0x%04x]\n", |
Shuah Khan | c5081cd | 2013-02-27 17:07:19 -0700 | [diff] [blame] | 601 | PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 602 | domid, address, flags); |
| 603 | break; |
| 604 | case EVENT_TYPE_ILL_CMD: |
| 605 | printk("ILLEGAL_COMMAND_ERROR address=0x%016llx]\n", address); |
Joerg Roedel | 945b4ac | 2009-09-03 14:25:02 +0200 | [diff] [blame] | 606 | dump_command(address); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 607 | break; |
| 608 | case EVENT_TYPE_CMD_HARD_ERR: |
| 609 | printk("COMMAND_HARDWARE_ERROR address=0x%016llx " |
| 610 | "flags=0x%04x]\n", address, flags); |
| 611 | break; |
| 612 | case EVENT_TYPE_IOTLB_INV_TO: |
| 613 | printk("IOTLB_INV_TIMEOUT device=%02x:%02x.%x " |
| 614 | "address=0x%016llx]\n", |
Shuah Khan | c5081cd | 2013-02-27 17:07:19 -0700 | [diff] [blame] | 615 | PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 616 | address); |
| 617 | break; |
| 618 | case EVENT_TYPE_INV_DEV_REQ: |
| 619 | printk("INVALID_DEVICE_REQUEST device=%02x:%02x.%x " |
| 620 | "address=0x%016llx flags=0x%04x]\n", |
Shuah Khan | c5081cd | 2013-02-27 17:07:19 -0700 | [diff] [blame] | 621 | PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 622 | address, flags); |
| 623 | break; |
| 624 | default: |
| 625 | printk(KERN_ERR "UNKNOWN type=0x%02x]\n", type); |
| 626 | } |
Joerg Roedel | 3d06fca | 2012-04-12 14:12:00 +0200 | [diff] [blame] | 627 | |
| 628 | memset(__evt, 0, 4 * sizeof(u32)); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 629 | } |
| 630 | |
| 631 | static void iommu_poll_events(struct amd_iommu *iommu) |
| 632 | { |
| 633 | u32 head, tail; |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 634 | |
| 635 | head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 636 | tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); |
| 637 | |
| 638 | while (head != tail) { |
Joerg Roedel | a345b23 | 2009-09-03 15:01:43 +0200 | [diff] [blame] | 639 | iommu_print_event(iommu, iommu->evt_buf + head); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 640 | head = (head + EVENT_ENTRY_SIZE) % iommu->evt_buf_size; |
| 641 | } |
| 642 | |
| 643 | writel(head, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 644 | } |
| 645 | |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 646 | static void iommu_handle_ppr_entry(struct amd_iommu *iommu, u64 *raw) |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 647 | { |
| 648 | struct amd_iommu_fault fault; |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 649 | |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 650 | INC_STATS_COUNTER(pri_requests); |
| 651 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 652 | if (PPR_REQ_TYPE(raw[0]) != PPR_REQ_FAULT) { |
| 653 | pr_err_ratelimited("AMD-Vi: Unknown PPR request received\n"); |
| 654 | return; |
| 655 | } |
| 656 | |
| 657 | fault.address = raw[1]; |
| 658 | fault.pasid = PPR_PASID(raw[0]); |
| 659 | fault.device_id = PPR_DEVID(raw[0]); |
| 660 | fault.tag = PPR_TAG(raw[0]); |
| 661 | fault.flags = PPR_FLAGS(raw[0]); |
| 662 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 663 | atomic_notifier_call_chain(&ppr_notifier, 0, &fault); |
| 664 | } |
| 665 | |
| 666 | static void iommu_poll_ppr_log(struct amd_iommu *iommu) |
| 667 | { |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 668 | u32 head, tail; |
| 669 | |
| 670 | if (iommu->ppr_log == NULL) |
| 671 | return; |
| 672 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 673 | head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); |
| 674 | tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET); |
| 675 | |
| 676 | while (head != tail) { |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 677 | volatile u64 *raw; |
| 678 | u64 entry[2]; |
| 679 | int i; |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 680 | |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 681 | raw = (u64 *)(iommu->ppr_log + head); |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 682 | |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 683 | /* |
| 684 | * Hardware bug: Interrupt may arrive before the entry is |
| 685 | * written to memory. If this happens we need to wait for the |
| 686 | * entry to arrive. |
| 687 | */ |
| 688 | for (i = 0; i < LOOP_TIMEOUT; ++i) { |
| 689 | if (PPR_REQ_TYPE(raw[0]) != 0) |
| 690 | break; |
| 691 | udelay(1); |
| 692 | } |
| 693 | |
| 694 | /* Avoid memcpy function-call overhead */ |
| 695 | entry[0] = raw[0]; |
| 696 | entry[1] = raw[1]; |
| 697 | |
| 698 | /* |
| 699 | * To detect the hardware bug we need to clear the entry |
| 700 | * back to zero. |
| 701 | */ |
| 702 | raw[0] = raw[1] = 0UL; |
| 703 | |
| 704 | /* Update head pointer of hardware ring-buffer */ |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 705 | head = (head + PPR_ENTRY_SIZE) % PPR_LOG_SIZE; |
| 706 | writel(head, iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 707 | |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 708 | /* Handle PPR entry */ |
| 709 | iommu_handle_ppr_entry(iommu, entry); |
| 710 | |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 711 | /* Refresh ring-buffer information */ |
| 712 | head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 713 | tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET); |
| 714 | } |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 715 | } |
| 716 | |
Joerg Roedel | 72fe00f | 2011-05-10 10:50:42 +0200 | [diff] [blame] | 717 | irqreturn_t amd_iommu_int_thread(int irq, void *data) |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 718 | { |
Suravee Suthikulpanit | 3f398bc | 2013-04-22 16:32:34 -0500 | [diff] [blame] | 719 | struct amd_iommu *iommu = (struct amd_iommu *) data; |
| 720 | u32 status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 721 | |
Suravee Suthikulpanit | 3f398bc | 2013-04-22 16:32:34 -0500 | [diff] [blame] | 722 | while (status & (MMIO_STATUS_EVT_INT_MASK | MMIO_STATUS_PPR_INT_MASK)) { |
| 723 | /* Enable EVT and PPR interrupts again */ |
| 724 | writel((MMIO_STATUS_EVT_INT_MASK | MMIO_STATUS_PPR_INT_MASK), |
| 725 | iommu->mmio_base + MMIO_STATUS_OFFSET); |
| 726 | |
| 727 | if (status & MMIO_STATUS_EVT_INT_MASK) { |
| 728 | pr_devel("AMD-Vi: Processing IOMMU Event Log\n"); |
| 729 | iommu_poll_events(iommu); |
| 730 | } |
| 731 | |
| 732 | if (status & MMIO_STATUS_PPR_INT_MASK) { |
| 733 | pr_devel("AMD-Vi: Processing IOMMU PPR Log\n"); |
| 734 | iommu_poll_ppr_log(iommu); |
| 735 | } |
| 736 | |
| 737 | /* |
| 738 | * Hardware bug: ERBT1312 |
| 739 | * When re-enabling interrupt (by writing 1 |
| 740 | * to clear the bit), the hardware might also try to set |
| 741 | * the interrupt bit in the event status register. |
| 742 | * In this scenario, the bit will be set, and disable |
| 743 | * subsequent interrupts. |
| 744 | * |
| 745 | * Workaround: The IOMMU driver should read back the |
| 746 | * status register and check if the interrupt bits are cleared. |
| 747 | * If not, driver will need to go through the interrupt handler |
| 748 | * again and re-clear the bits |
| 749 | */ |
| 750 | status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 751 | } |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 752 | return IRQ_HANDLED; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 753 | } |
| 754 | |
Joerg Roedel | 72fe00f | 2011-05-10 10:50:42 +0200 | [diff] [blame] | 755 | irqreturn_t amd_iommu_int_handler(int irq, void *data) |
| 756 | { |
| 757 | return IRQ_WAKE_THREAD; |
| 758 | } |
| 759 | |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 760 | /**************************************************************************** |
| 761 | * |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 762 | * IOMMU command queuing functions |
| 763 | * |
| 764 | ****************************************************************************/ |
| 765 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 766 | static int wait_on_sem(volatile u64 *sem) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 767 | { |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 768 | int i = 0; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 769 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 770 | while (*sem == 0 && i < LOOP_TIMEOUT) { |
| 771 | udelay(1); |
| 772 | i += 1; |
| 773 | } |
| 774 | |
| 775 | if (i == LOOP_TIMEOUT) { |
| 776 | pr_alert("AMD-Vi: Completion-Wait loop timed out\n"); |
| 777 | return -EIO; |
| 778 | } |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 779 | |
| 780 | return 0; |
| 781 | } |
| 782 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 783 | static void copy_cmd_to_buffer(struct amd_iommu *iommu, |
| 784 | struct iommu_cmd *cmd, |
| 785 | u32 tail) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 786 | { |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 787 | u8 *target; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 788 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 789 | target = iommu->cmd_buf + tail; |
| 790 | tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 791 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 792 | /* Copy command to buffer */ |
| 793 | memcpy(target, cmd, sizeof(*cmd)); |
| 794 | |
| 795 | /* Tell the IOMMU about it */ |
| 796 | writel(tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
| 797 | } |
| 798 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 799 | static void build_completion_wait(struct iommu_cmd *cmd, u64 address) |
Joerg Roedel | ded4673 | 2011-04-06 10:53:48 +0200 | [diff] [blame] | 800 | { |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 801 | WARN_ON(address & 0x7ULL); |
| 802 | |
Joerg Roedel | ded4673 | 2011-04-06 10:53:48 +0200 | [diff] [blame] | 803 | memset(cmd, 0, sizeof(*cmd)); |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 804 | cmd->data[0] = lower_32_bits(__pa(address)) | CMD_COMPL_WAIT_STORE_MASK; |
| 805 | cmd->data[1] = upper_32_bits(__pa(address)); |
| 806 | cmd->data[2] = 1; |
Joerg Roedel | ded4673 | 2011-04-06 10:53:48 +0200 | [diff] [blame] | 807 | CMD_SET_TYPE(cmd, CMD_COMPL_WAIT); |
| 808 | } |
| 809 | |
Joerg Roedel | 94fe79e | 2011-04-06 11:07:21 +0200 | [diff] [blame] | 810 | static void build_inv_dte(struct iommu_cmd *cmd, u16 devid) |
| 811 | { |
| 812 | memset(cmd, 0, sizeof(*cmd)); |
| 813 | cmd->data[0] = devid; |
| 814 | CMD_SET_TYPE(cmd, CMD_INV_DEV_ENTRY); |
| 815 | } |
| 816 | |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 817 | static void build_inv_iommu_pages(struct iommu_cmd *cmd, u64 address, |
| 818 | size_t size, u16 domid, int pde) |
| 819 | { |
| 820 | u64 pages; |
| 821 | int s; |
| 822 | |
| 823 | pages = iommu_num_pages(address, size, PAGE_SIZE); |
| 824 | s = 0; |
| 825 | |
| 826 | if (pages > 1) { |
| 827 | /* |
| 828 | * If we have to flush more than one page, flush all |
| 829 | * TLB entries for this domain |
| 830 | */ |
| 831 | address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; |
| 832 | s = 1; |
| 833 | } |
| 834 | |
| 835 | address &= PAGE_MASK; |
| 836 | |
| 837 | memset(cmd, 0, sizeof(*cmd)); |
| 838 | cmd->data[1] |= domid; |
| 839 | cmd->data[2] = lower_32_bits(address); |
| 840 | cmd->data[3] = upper_32_bits(address); |
| 841 | CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES); |
| 842 | if (s) /* size bit - we flush more than one 4kb page */ |
| 843 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
Frank Arnold | df805ab | 2012-08-27 19:21:04 +0200 | [diff] [blame] | 844 | if (pde) /* PDE bit - we want to flush everything, not only the PTEs */ |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 845 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK; |
| 846 | } |
| 847 | |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 848 | static void build_inv_iotlb_pages(struct iommu_cmd *cmd, u16 devid, int qdep, |
| 849 | u64 address, size_t size) |
| 850 | { |
| 851 | u64 pages; |
| 852 | int s; |
| 853 | |
| 854 | pages = iommu_num_pages(address, size, PAGE_SIZE); |
| 855 | s = 0; |
| 856 | |
| 857 | if (pages > 1) { |
| 858 | /* |
| 859 | * If we have to flush more than one page, flush all |
| 860 | * TLB entries for this domain |
| 861 | */ |
| 862 | address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; |
| 863 | s = 1; |
| 864 | } |
| 865 | |
| 866 | address &= PAGE_MASK; |
| 867 | |
| 868 | memset(cmd, 0, sizeof(*cmd)); |
| 869 | cmd->data[0] = devid; |
| 870 | cmd->data[0] |= (qdep & 0xff) << 24; |
| 871 | cmd->data[1] = devid; |
| 872 | cmd->data[2] = lower_32_bits(address); |
| 873 | cmd->data[3] = upper_32_bits(address); |
| 874 | CMD_SET_TYPE(cmd, CMD_INV_IOTLB_PAGES); |
| 875 | if (s) |
| 876 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 877 | } |
| 878 | |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 879 | static void build_inv_iommu_pasid(struct iommu_cmd *cmd, u16 domid, int pasid, |
| 880 | u64 address, bool size) |
| 881 | { |
| 882 | memset(cmd, 0, sizeof(*cmd)); |
| 883 | |
| 884 | address &= ~(0xfffULL); |
| 885 | |
Suravee Suthikulpanit | a919a01 | 2014-03-05 18:54:18 -0600 | [diff] [blame] | 886 | cmd->data[0] = pasid; |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 887 | cmd->data[1] = domid; |
| 888 | cmd->data[2] = lower_32_bits(address); |
| 889 | cmd->data[3] = upper_32_bits(address); |
| 890 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK; |
| 891 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_GN_MASK; |
| 892 | if (size) |
| 893 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 894 | CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES); |
| 895 | } |
| 896 | |
| 897 | static void build_inv_iotlb_pasid(struct iommu_cmd *cmd, u16 devid, int pasid, |
| 898 | int qdep, u64 address, bool size) |
| 899 | { |
| 900 | memset(cmd, 0, sizeof(*cmd)); |
| 901 | |
| 902 | address &= ~(0xfffULL); |
| 903 | |
| 904 | cmd->data[0] = devid; |
Jay Cornwall | e8d2d82 | 2014-02-26 15:49:31 -0600 | [diff] [blame] | 905 | cmd->data[0] |= ((pasid >> 8) & 0xff) << 16; |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 906 | cmd->data[0] |= (qdep & 0xff) << 24; |
| 907 | cmd->data[1] = devid; |
Jay Cornwall | e8d2d82 | 2014-02-26 15:49:31 -0600 | [diff] [blame] | 908 | cmd->data[1] |= (pasid & 0xff) << 16; |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 909 | cmd->data[2] = lower_32_bits(address); |
| 910 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_GN_MASK; |
| 911 | cmd->data[3] = upper_32_bits(address); |
| 912 | if (size) |
| 913 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 914 | CMD_SET_TYPE(cmd, CMD_INV_IOTLB_PAGES); |
| 915 | } |
| 916 | |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 917 | static void build_complete_ppr(struct iommu_cmd *cmd, u16 devid, int pasid, |
| 918 | int status, int tag, bool gn) |
| 919 | { |
| 920 | memset(cmd, 0, sizeof(*cmd)); |
| 921 | |
| 922 | cmd->data[0] = devid; |
| 923 | if (gn) { |
Suravee Suthikulpanit | a919a01 | 2014-03-05 18:54:18 -0600 | [diff] [blame] | 924 | cmd->data[1] = pasid; |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 925 | cmd->data[2] = CMD_INV_IOMMU_PAGES_GN_MASK; |
| 926 | } |
| 927 | cmd->data[3] = tag & 0x1ff; |
| 928 | cmd->data[3] |= (status & PPR_STATUS_MASK) << PPR_STATUS_SHIFT; |
| 929 | |
| 930 | CMD_SET_TYPE(cmd, CMD_COMPLETE_PPR); |
| 931 | } |
| 932 | |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 933 | static void build_inv_all(struct iommu_cmd *cmd) |
| 934 | { |
| 935 | memset(cmd, 0, sizeof(*cmd)); |
| 936 | CMD_SET_TYPE(cmd, CMD_INV_ALL); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 937 | } |
| 938 | |
Joerg Roedel | 7ef2798 | 2012-06-21 16:46:04 +0200 | [diff] [blame] | 939 | static void build_inv_irt(struct iommu_cmd *cmd, u16 devid) |
| 940 | { |
| 941 | memset(cmd, 0, sizeof(*cmd)); |
| 942 | cmd->data[0] = devid; |
| 943 | CMD_SET_TYPE(cmd, CMD_INV_IRT); |
| 944 | } |
| 945 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 946 | /* |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 947 | * Writes the command to the IOMMUs command buffer and informs the |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 948 | * hardware about the new command. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 949 | */ |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 950 | static int iommu_queue_command_sync(struct amd_iommu *iommu, |
| 951 | struct iommu_cmd *cmd, |
| 952 | bool sync) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 953 | { |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 954 | u32 left, tail, head, next_tail; |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 955 | unsigned long flags; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 956 | |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 957 | WARN_ON(iommu->cmd_buf_size & CMD_BUFFER_UNINITIALIZED); |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 958 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 959 | again: |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 960 | spin_lock_irqsave(&iommu->lock, flags); |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 961 | |
| 962 | head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); |
| 963 | tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
| 964 | next_tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size; |
| 965 | left = (head - next_tail) % iommu->cmd_buf_size; |
| 966 | |
| 967 | if (left <= 2) { |
| 968 | struct iommu_cmd sync_cmd; |
| 969 | volatile u64 sem = 0; |
| 970 | int ret; |
| 971 | |
| 972 | build_completion_wait(&sync_cmd, (u64)&sem); |
| 973 | copy_cmd_to_buffer(iommu, &sync_cmd, tail); |
| 974 | |
| 975 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 976 | |
| 977 | if ((ret = wait_on_sem(&sem)) != 0) |
| 978 | return ret; |
| 979 | |
| 980 | goto again; |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 981 | } |
| 982 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 983 | copy_cmd_to_buffer(iommu, cmd, tail); |
Joerg Roedel | 519c31b | 2008-08-14 19:55:15 +0200 | [diff] [blame] | 984 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 985 | /* We need to sync now to make sure all commands are processed */ |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 986 | iommu->need_sync = sync; |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 987 | |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 988 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 989 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 990 | return 0; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 991 | } |
| 992 | |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 993 | static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) |
| 994 | { |
| 995 | return iommu_queue_command_sync(iommu, cmd, true); |
| 996 | } |
| 997 | |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 998 | /* |
| 999 | * This function queues a completion wait command into the command |
| 1000 | * buffer of an IOMMU |
| 1001 | */ |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 1002 | static int iommu_completion_wait(struct amd_iommu *iommu) |
| 1003 | { |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 1004 | struct iommu_cmd cmd; |
| 1005 | volatile u64 sem = 0; |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 1006 | int ret; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 1007 | |
| 1008 | if (!iommu->need_sync) |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 1009 | return 0; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 1010 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 1011 | build_completion_wait(&cmd, (u64)&sem); |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 1012 | |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 1013 | ret = iommu_queue_command_sync(iommu, &cmd, false); |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 1014 | if (ret) |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 1015 | return ret; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 1016 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 1017 | return wait_on_sem(&sem); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1018 | } |
| 1019 | |
Joerg Roedel | d8c1308 | 2011-04-06 18:51:26 +0200 | [diff] [blame] | 1020 | static int iommu_flush_dte(struct amd_iommu *iommu, u16 devid) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1021 | { |
| 1022 | struct iommu_cmd cmd; |
| 1023 | |
Joerg Roedel | d8c1308 | 2011-04-06 18:51:26 +0200 | [diff] [blame] | 1024 | build_inv_dte(&cmd, devid); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1025 | |
Joerg Roedel | d8c1308 | 2011-04-06 18:51:26 +0200 | [diff] [blame] | 1026 | return iommu_queue_command(iommu, &cmd); |
| 1027 | } |
| 1028 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1029 | static void iommu_flush_dte_all(struct amd_iommu *iommu) |
| 1030 | { |
| 1031 | u32 devid; |
| 1032 | |
| 1033 | for (devid = 0; devid <= 0xffff; ++devid) |
| 1034 | iommu_flush_dte(iommu, devid); |
| 1035 | |
| 1036 | iommu_completion_wait(iommu); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1037 | } |
| 1038 | |
| 1039 | /* |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1040 | * This function uses heavy locking and may disable irqs for some time. But |
| 1041 | * this is no issue because it is only called during resume. |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1042 | */ |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1043 | static void iommu_flush_tlb_all(struct amd_iommu *iommu) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1044 | { |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1045 | u32 dom_id; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1046 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1047 | for (dom_id = 0; dom_id <= 0xffff; ++dom_id) { |
| 1048 | struct iommu_cmd cmd; |
| 1049 | build_inv_iommu_pages(&cmd, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, |
| 1050 | dom_id, 1); |
| 1051 | iommu_queue_command(iommu, &cmd); |
| 1052 | } |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1053 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1054 | iommu_completion_wait(iommu); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1055 | } |
| 1056 | |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 1057 | static void iommu_flush_all(struct amd_iommu *iommu) |
| 1058 | { |
| 1059 | struct iommu_cmd cmd; |
| 1060 | |
| 1061 | build_inv_all(&cmd); |
| 1062 | |
| 1063 | iommu_queue_command(iommu, &cmd); |
| 1064 | iommu_completion_wait(iommu); |
| 1065 | } |
| 1066 | |
Joerg Roedel | 7ef2798 | 2012-06-21 16:46:04 +0200 | [diff] [blame] | 1067 | static void iommu_flush_irt(struct amd_iommu *iommu, u16 devid) |
| 1068 | { |
| 1069 | struct iommu_cmd cmd; |
| 1070 | |
| 1071 | build_inv_irt(&cmd, devid); |
| 1072 | |
| 1073 | iommu_queue_command(iommu, &cmd); |
| 1074 | } |
| 1075 | |
| 1076 | static void iommu_flush_irt_all(struct amd_iommu *iommu) |
| 1077 | { |
| 1078 | u32 devid; |
| 1079 | |
| 1080 | for (devid = 0; devid <= MAX_DEV_TABLE_ENTRIES; devid++) |
| 1081 | iommu_flush_irt(iommu, devid); |
| 1082 | |
| 1083 | iommu_completion_wait(iommu); |
| 1084 | } |
| 1085 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1086 | void iommu_flush_all_caches(struct amd_iommu *iommu) |
| 1087 | { |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 1088 | if (iommu_feature(iommu, FEATURE_IA)) { |
| 1089 | iommu_flush_all(iommu); |
| 1090 | } else { |
| 1091 | iommu_flush_dte_all(iommu); |
Joerg Roedel | 7ef2798 | 2012-06-21 16:46:04 +0200 | [diff] [blame] | 1092 | iommu_flush_irt_all(iommu); |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 1093 | iommu_flush_tlb_all(iommu); |
| 1094 | } |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1095 | } |
| 1096 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1097 | /* |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1098 | * Command send function for flushing on-device TLB |
| 1099 | */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1100 | static int device_flush_iotlb(struct iommu_dev_data *dev_data, |
| 1101 | u64 address, size_t size) |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1102 | { |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1103 | struct amd_iommu *iommu; |
| 1104 | struct iommu_cmd cmd; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1105 | int qdep; |
| 1106 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 1107 | qdep = dev_data->ats.qdep; |
| 1108 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1109 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 1110 | build_inv_iotlb_pages(&cmd, dev_data->devid, qdep, address, size); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1111 | |
| 1112 | return iommu_queue_command(iommu, &cmd); |
| 1113 | } |
| 1114 | |
| 1115 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1116 | * Command send function for invalidating a device table entry |
| 1117 | */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1118 | static int device_flush_dte(struct iommu_dev_data *dev_data) |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 1119 | { |
| 1120 | struct amd_iommu *iommu; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1121 | int ret; |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 1122 | |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1123 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 1124 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 1125 | ret = iommu_flush_dte(iommu, dev_data->devid); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1126 | if (ret) |
| 1127 | return ret; |
| 1128 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 1129 | if (dev_data->ats.enabled) |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1130 | ret = device_flush_iotlb(dev_data, 0, ~0UL); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1131 | |
| 1132 | return ret; |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 1133 | } |
| 1134 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1135 | /* |
| 1136 | * TLB invalidation function which is called from the mapping functions. |
| 1137 | * It invalidates a single PTE if the range to flush is within a single |
| 1138 | * page. Otherwise it flushes the whole TLB of the IOMMU. |
| 1139 | */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1140 | static void __domain_flush_pages(struct protection_domain *domain, |
| 1141 | u64 address, size_t size, int pde) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1142 | { |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1143 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 1144 | struct iommu_cmd cmd; |
| 1145 | int ret = 0, i; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1146 | |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 1147 | build_inv_iommu_pages(&cmd, address, size, domain->id, pde); |
Joerg Roedel | 999ba41 | 2008-07-03 19:35:08 +0200 | [diff] [blame] | 1148 | |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 1149 | for (i = 0; i < amd_iommus_present; ++i) { |
| 1150 | if (!domain->dev_iommu[i]) |
| 1151 | continue; |
| 1152 | |
| 1153 | /* |
| 1154 | * Devices of this domain are behind this IOMMU |
| 1155 | * We need a TLB flush |
| 1156 | */ |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 1157 | ret |= iommu_queue_command(amd_iommus[i], &cmd); |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 1158 | } |
| 1159 | |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1160 | list_for_each_entry(dev_data, &domain->dev_list, list) { |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1161 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 1162 | if (!dev_data->ats.enabled) |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1163 | continue; |
| 1164 | |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1165 | ret |= device_flush_iotlb(dev_data, address, size); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1166 | } |
| 1167 | |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 1168 | WARN_ON(ret); |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 1169 | } |
| 1170 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1171 | static void domain_flush_pages(struct protection_domain *domain, |
| 1172 | u64 address, size_t size) |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 1173 | { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1174 | __domain_flush_pages(domain, address, size, 0); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1175 | } |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1176 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1177 | /* Flush the whole IO/TLB for a given protection domain */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1178 | static void domain_flush_tlb(struct protection_domain *domain) |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1179 | { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1180 | __domain_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 0); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1181 | } |
| 1182 | |
Chris Wright | 42a49f9 | 2009-06-15 15:42:00 +0200 | [diff] [blame] | 1183 | /* Flush the whole IO/TLB for a given protection domain - including PDE */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1184 | static void domain_flush_tlb_pde(struct protection_domain *domain) |
Chris Wright | 42a49f9 | 2009-06-15 15:42:00 +0200 | [diff] [blame] | 1185 | { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1186 | __domain_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 1); |
| 1187 | } |
| 1188 | |
| 1189 | static void domain_flush_complete(struct protection_domain *domain) |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1190 | { |
| 1191 | int i; |
| 1192 | |
| 1193 | for (i = 0; i < amd_iommus_present; ++i) { |
| 1194 | if (!domain->dev_iommu[i]) |
| 1195 | continue; |
| 1196 | |
| 1197 | /* |
| 1198 | * Devices of this domain are behind this IOMMU |
| 1199 | * We need to wait for completion of all commands. |
| 1200 | */ |
| 1201 | iommu_completion_wait(amd_iommus[i]); |
| 1202 | } |
| 1203 | } |
| 1204 | |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1205 | |
Joerg Roedel | 43f4960 | 2008-12-02 21:01:12 +0100 | [diff] [blame] | 1206 | /* |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1207 | * This function flushes the DTEs for all devices in domain |
Joerg Roedel | 43f4960 | 2008-12-02 21:01:12 +0100 | [diff] [blame] | 1208 | */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1209 | static void domain_flush_devices(struct protection_domain *domain) |
Joerg Roedel | bfd1be1 | 2009-05-05 15:33:57 +0200 | [diff] [blame] | 1210 | { |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1211 | struct iommu_dev_data *dev_data; |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1212 | |
| 1213 | list_for_each_entry(dev_data, &domain->dev_list, list) |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1214 | device_flush_dte(dev_data); |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1215 | } |
| 1216 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1217 | /**************************************************************************** |
| 1218 | * |
| 1219 | * The functions below are used the create the page table mappings for |
| 1220 | * unity mapped regions. |
| 1221 | * |
| 1222 | ****************************************************************************/ |
| 1223 | |
| 1224 | /* |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1225 | * This function is used to add another level to an IO page table. Adding |
| 1226 | * another level increases the size of the address space by 9 bits to a size up |
| 1227 | * to 64 bits. |
| 1228 | */ |
| 1229 | static bool increase_address_space(struct protection_domain *domain, |
| 1230 | gfp_t gfp) |
| 1231 | { |
| 1232 | u64 *pte; |
| 1233 | |
| 1234 | if (domain->mode == PAGE_MODE_6_LEVEL) |
| 1235 | /* address space already 64 bit large */ |
| 1236 | return false; |
| 1237 | |
| 1238 | pte = (void *)get_zeroed_page(gfp); |
| 1239 | if (!pte) |
| 1240 | return false; |
| 1241 | |
| 1242 | *pte = PM_LEVEL_PDE(domain->mode, |
| 1243 | virt_to_phys(domain->pt_root)); |
| 1244 | domain->pt_root = pte; |
| 1245 | domain->mode += 1; |
| 1246 | domain->updated = true; |
| 1247 | |
| 1248 | return true; |
| 1249 | } |
| 1250 | |
| 1251 | static u64 *alloc_pte(struct protection_domain *domain, |
| 1252 | unsigned long address, |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1253 | unsigned long page_size, |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1254 | u64 **pte_page, |
| 1255 | gfp_t gfp) |
| 1256 | { |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1257 | int level, end_lvl; |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1258 | u64 *pte, *page; |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1259 | |
| 1260 | BUG_ON(!is_power_of_2(page_size)); |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1261 | |
| 1262 | while (address > PM_LEVEL_SIZE(domain->mode)) |
| 1263 | increase_address_space(domain, gfp); |
| 1264 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1265 | level = domain->mode - 1; |
| 1266 | pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; |
| 1267 | address = PAGE_SIZE_ALIGN(address, page_size); |
| 1268 | end_lvl = PAGE_SIZE_LEVEL(page_size); |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1269 | |
| 1270 | while (level > end_lvl) { |
| 1271 | if (!IOMMU_PTE_PRESENT(*pte)) { |
| 1272 | page = (u64 *)get_zeroed_page(gfp); |
| 1273 | if (!page) |
| 1274 | return NULL; |
| 1275 | *pte = PM_LEVEL_PDE(level, virt_to_phys(page)); |
| 1276 | } |
| 1277 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1278 | /* No level skipping support yet */ |
| 1279 | if (PM_PTE_LEVEL(*pte) != level) |
| 1280 | return NULL; |
| 1281 | |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1282 | level -= 1; |
| 1283 | |
| 1284 | pte = IOMMU_PTE_PAGE(*pte); |
| 1285 | |
| 1286 | if (pte_page && level == end_lvl) |
| 1287 | *pte_page = pte; |
| 1288 | |
| 1289 | pte = &pte[PM_LEVEL_INDEX(level, address)]; |
| 1290 | } |
| 1291 | |
| 1292 | return pte; |
| 1293 | } |
| 1294 | |
| 1295 | /* |
| 1296 | * This function checks if there is a PTE for a given dma address. If |
| 1297 | * there is one, it returns the pointer to it. |
| 1298 | */ |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1299 | static u64 *fetch_pte(struct protection_domain *domain, unsigned long address) |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1300 | { |
| 1301 | int level; |
| 1302 | u64 *pte; |
| 1303 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1304 | if (address > PM_LEVEL_SIZE(domain->mode)) |
| 1305 | return NULL; |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1306 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1307 | level = domain->mode - 1; |
| 1308 | pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; |
| 1309 | |
| 1310 | while (level > 0) { |
| 1311 | |
| 1312 | /* Not Present */ |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1313 | if (!IOMMU_PTE_PRESENT(*pte)) |
| 1314 | return NULL; |
| 1315 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1316 | /* Large PTE */ |
| 1317 | if (PM_PTE_LEVEL(*pte) == 0x07) { |
| 1318 | unsigned long pte_mask, __pte; |
| 1319 | |
| 1320 | /* |
| 1321 | * If we have a series of large PTEs, make |
| 1322 | * sure to return a pointer to the first one. |
| 1323 | */ |
| 1324 | pte_mask = PTE_PAGE_SIZE(*pte); |
| 1325 | pte_mask = ~((PAGE_SIZE_PTE_COUNT(pte_mask) << 3) - 1); |
| 1326 | __pte = ((unsigned long)pte) & pte_mask; |
| 1327 | |
| 1328 | return (u64 *)__pte; |
| 1329 | } |
| 1330 | |
| 1331 | /* No level skipping support yet */ |
| 1332 | if (PM_PTE_LEVEL(*pte) != level) |
| 1333 | return NULL; |
| 1334 | |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1335 | level -= 1; |
| 1336 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1337 | /* Walk to the next level */ |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1338 | pte = IOMMU_PTE_PAGE(*pte); |
| 1339 | pte = &pte[PM_LEVEL_INDEX(level, address)]; |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1340 | } |
| 1341 | |
| 1342 | return pte; |
| 1343 | } |
| 1344 | |
| 1345 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1346 | * Generic mapping functions. It maps a physical address into a DMA |
| 1347 | * address space. It allocates the page table pages if necessary. |
| 1348 | * In the future it can be extended to a generic mapping function |
| 1349 | * supporting all features of AMD IOMMU page tables like level skipping |
| 1350 | * and full 64 bit address spaces. |
| 1351 | */ |
Joerg Roedel | 38e817f | 2008-12-02 17:27:52 +0100 | [diff] [blame] | 1352 | static int iommu_map_page(struct protection_domain *dom, |
| 1353 | unsigned long bus_addr, |
| 1354 | unsigned long phys_addr, |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 1355 | int prot, |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1356 | unsigned long page_size) |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1357 | { |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 1358 | u64 __pte, *pte; |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1359 | int i, count; |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 1360 | |
Joerg Roedel | bad1cac | 2009-09-02 16:52:23 +0200 | [diff] [blame] | 1361 | if (!(prot & IOMMU_PROT_MASK)) |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1362 | return -EINVAL; |
| 1363 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1364 | bus_addr = PAGE_ALIGN(bus_addr); |
| 1365 | phys_addr = PAGE_ALIGN(phys_addr); |
| 1366 | count = PAGE_SIZE_PTE_COUNT(page_size); |
| 1367 | pte = alloc_pte(dom, bus_addr, page_size, NULL, GFP_KERNEL); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1368 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1369 | for (i = 0; i < count; ++i) |
| 1370 | if (IOMMU_PTE_PRESENT(pte[i])) |
| 1371 | return -EBUSY; |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1372 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1373 | if (page_size > PAGE_SIZE) { |
| 1374 | __pte = PAGE_SIZE_PTE(phys_addr, page_size); |
| 1375 | __pte |= PM_LEVEL_ENC(7) | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 1376 | } else |
| 1377 | __pte = phys_addr | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 1378 | |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1379 | if (prot & IOMMU_PROT_IR) |
| 1380 | __pte |= IOMMU_PTE_IR; |
| 1381 | if (prot & IOMMU_PROT_IW) |
| 1382 | __pte |= IOMMU_PTE_IW; |
| 1383 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1384 | for (i = 0; i < count; ++i) |
| 1385 | pte[i] = __pte; |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1386 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 1387 | update_domain(dom); |
| 1388 | |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1389 | return 0; |
| 1390 | } |
| 1391 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1392 | static unsigned long iommu_unmap_page(struct protection_domain *dom, |
| 1393 | unsigned long bus_addr, |
| 1394 | unsigned long page_size) |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1395 | { |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1396 | unsigned long long unmap_size, unmapped; |
| 1397 | u64 *pte; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1398 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1399 | BUG_ON(!is_power_of_2(page_size)); |
| 1400 | |
| 1401 | unmapped = 0; |
| 1402 | |
| 1403 | while (unmapped < page_size) { |
| 1404 | |
| 1405 | pte = fetch_pte(dom, bus_addr); |
| 1406 | |
| 1407 | if (!pte) { |
| 1408 | /* |
| 1409 | * No PTE for this address |
| 1410 | * move forward in 4kb steps |
| 1411 | */ |
| 1412 | unmap_size = PAGE_SIZE; |
| 1413 | } else if (PM_PTE_LEVEL(*pte) == 0) { |
| 1414 | /* 4kb PTE found for this address */ |
| 1415 | unmap_size = PAGE_SIZE; |
| 1416 | *pte = 0ULL; |
| 1417 | } else { |
| 1418 | int count, i; |
| 1419 | |
| 1420 | /* Large PTE found which maps this address */ |
| 1421 | unmap_size = PTE_PAGE_SIZE(*pte); |
Alex Williamson | 60d0ca3 | 2013-06-21 14:33:19 -0600 | [diff] [blame] | 1422 | |
| 1423 | /* Only unmap from the first pte in the page */ |
| 1424 | if ((unmap_size - 1) & bus_addr) |
| 1425 | break; |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1426 | count = PAGE_SIZE_PTE_COUNT(unmap_size); |
| 1427 | for (i = 0; i < count; i++) |
| 1428 | pte[i] = 0ULL; |
| 1429 | } |
| 1430 | |
| 1431 | bus_addr = (bus_addr & ~(unmap_size - 1)) + unmap_size; |
| 1432 | unmapped += unmap_size; |
| 1433 | } |
| 1434 | |
Alex Williamson | 60d0ca3 | 2013-06-21 14:33:19 -0600 | [diff] [blame] | 1435 | BUG_ON(unmapped && !is_power_of_2(unmapped)); |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1436 | |
| 1437 | return unmapped; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1438 | } |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1439 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1440 | /* |
| 1441 | * This function checks if a specific unity mapping entry is needed for |
| 1442 | * this specific IOMMU. |
| 1443 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1444 | static int iommu_for_unity_map(struct amd_iommu *iommu, |
| 1445 | struct unity_map_entry *entry) |
| 1446 | { |
| 1447 | u16 bdf, i; |
| 1448 | |
| 1449 | for (i = entry->devid_start; i <= entry->devid_end; ++i) { |
| 1450 | bdf = amd_iommu_alias_table[i]; |
| 1451 | if (amd_iommu_rlookup_table[bdf] == iommu) |
| 1452 | return 1; |
| 1453 | } |
| 1454 | |
| 1455 | return 0; |
| 1456 | } |
| 1457 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1458 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1459 | * This function actually applies the mapping to the page table of the |
| 1460 | * dma_ops domain. |
| 1461 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1462 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, |
| 1463 | struct unity_map_entry *e) |
| 1464 | { |
| 1465 | u64 addr; |
| 1466 | int ret; |
| 1467 | |
| 1468 | for (addr = e->address_start; addr < e->address_end; |
| 1469 | addr += PAGE_SIZE) { |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 1470 | ret = iommu_map_page(&dma_dom->domain, addr, addr, e->prot, |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1471 | PAGE_SIZE); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1472 | if (ret) |
| 1473 | return ret; |
| 1474 | /* |
| 1475 | * if unity mapping is in aperture range mark the page |
| 1476 | * as allocated in the aperture |
| 1477 | */ |
| 1478 | if (addr < dma_dom->aperture_size) |
Joerg Roedel | c323956 | 2009-05-12 10:56:44 +0200 | [diff] [blame] | 1479 | __set_bit(addr >> PAGE_SHIFT, |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1480 | dma_dom->aperture[0]->bitmap); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1481 | } |
| 1482 | |
| 1483 | return 0; |
| 1484 | } |
| 1485 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1486 | /* |
Joerg Roedel | 171e7b3 | 2009-11-24 17:47:56 +0100 | [diff] [blame] | 1487 | * Init the unity mappings for a specific IOMMU in the system |
| 1488 | * |
| 1489 | * Basically iterates over all unity mapping entries and applies them to |
| 1490 | * the default domain DMA of that IOMMU if necessary. |
| 1491 | */ |
| 1492 | static int iommu_init_unity_mappings(struct amd_iommu *iommu) |
| 1493 | { |
| 1494 | struct unity_map_entry *entry; |
| 1495 | int ret; |
| 1496 | |
| 1497 | list_for_each_entry(entry, &amd_iommu_unity_map, list) { |
| 1498 | if (!iommu_for_unity_map(iommu, entry)) |
| 1499 | continue; |
| 1500 | ret = dma_ops_unity_map(iommu->default_dom, entry); |
| 1501 | if (ret) |
| 1502 | return ret; |
| 1503 | } |
| 1504 | |
| 1505 | return 0; |
| 1506 | } |
| 1507 | |
| 1508 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1509 | * Inits the unity mappings required for a specific device |
| 1510 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1511 | static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom, |
| 1512 | u16 devid) |
| 1513 | { |
| 1514 | struct unity_map_entry *e; |
| 1515 | int ret; |
| 1516 | |
| 1517 | list_for_each_entry(e, &amd_iommu_unity_map, list) { |
| 1518 | if (!(devid >= e->devid_start && devid <= e->devid_end)) |
| 1519 | continue; |
| 1520 | ret = dma_ops_unity_map(dma_dom, e); |
| 1521 | if (ret) |
| 1522 | return ret; |
| 1523 | } |
| 1524 | |
| 1525 | return 0; |
| 1526 | } |
| 1527 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1528 | /**************************************************************************** |
| 1529 | * |
| 1530 | * The next functions belong to the address allocator for the dma_ops |
| 1531 | * interface functions. They work like the allocators in the other IOMMU |
| 1532 | * drivers. Its basically a bitmap which marks the allocated pages in |
| 1533 | * the aperture. Maybe it could be enhanced in the future to a more |
| 1534 | * efficient allocator. |
| 1535 | * |
| 1536 | ****************************************************************************/ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1537 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1538 | /* |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1539 | * The address allocator core functions. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1540 | * |
| 1541 | * called with domain->lock held |
| 1542 | */ |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1543 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1544 | /* |
Joerg Roedel | 171e7b3 | 2009-11-24 17:47:56 +0100 | [diff] [blame] | 1545 | * Used to reserve address ranges in the aperture (e.g. for exclusion |
| 1546 | * ranges. |
| 1547 | */ |
| 1548 | static void dma_ops_reserve_addresses(struct dma_ops_domain *dom, |
| 1549 | unsigned long start_page, |
| 1550 | unsigned int pages) |
| 1551 | { |
| 1552 | unsigned int i, last_page = dom->aperture_size >> PAGE_SHIFT; |
| 1553 | |
| 1554 | if (start_page + pages > last_page) |
| 1555 | pages = last_page - start_page; |
| 1556 | |
| 1557 | for (i = start_page; i < start_page + pages; ++i) { |
| 1558 | int index = i / APERTURE_RANGE_PAGES; |
| 1559 | int page = i % APERTURE_RANGE_PAGES; |
| 1560 | __set_bit(page, dom->aperture[index]->bitmap); |
| 1561 | } |
| 1562 | } |
| 1563 | |
| 1564 | /* |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1565 | * This function is used to add a new aperture range to an existing |
| 1566 | * aperture in case of dma_ops domain allocation or address allocation |
| 1567 | * failure. |
| 1568 | */ |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 1569 | static int alloc_new_range(struct dma_ops_domain *dma_dom, |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1570 | bool populate, gfp_t gfp) |
| 1571 | { |
| 1572 | int index = dma_dom->aperture_size >> APERTURE_RANGE_SHIFT; |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 1573 | struct amd_iommu *iommu; |
Joerg Roedel | 17f5b56 | 2011-07-06 17:14:44 +0200 | [diff] [blame] | 1574 | unsigned long i, old_size; |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1575 | |
Joerg Roedel | f5e9705 | 2009-05-22 12:31:53 +0200 | [diff] [blame] | 1576 | #ifdef CONFIG_IOMMU_STRESS |
| 1577 | populate = false; |
| 1578 | #endif |
| 1579 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1580 | if (index >= APERTURE_MAX_RANGES) |
| 1581 | return -ENOMEM; |
| 1582 | |
| 1583 | dma_dom->aperture[index] = kzalloc(sizeof(struct aperture_range), gfp); |
| 1584 | if (!dma_dom->aperture[index]) |
| 1585 | return -ENOMEM; |
| 1586 | |
| 1587 | dma_dom->aperture[index]->bitmap = (void *)get_zeroed_page(gfp); |
| 1588 | if (!dma_dom->aperture[index]->bitmap) |
| 1589 | goto out_free; |
| 1590 | |
| 1591 | dma_dom->aperture[index]->offset = dma_dom->aperture_size; |
| 1592 | |
| 1593 | if (populate) { |
| 1594 | unsigned long address = dma_dom->aperture_size; |
| 1595 | int i, num_ptes = APERTURE_RANGE_PAGES / 512; |
| 1596 | u64 *pte, *pte_page; |
| 1597 | |
| 1598 | for (i = 0; i < num_ptes; ++i) { |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1599 | pte = alloc_pte(&dma_dom->domain, address, PAGE_SIZE, |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1600 | &pte_page, gfp); |
| 1601 | if (!pte) |
| 1602 | goto out_free; |
| 1603 | |
| 1604 | dma_dom->aperture[index]->pte_pages[i] = pte_page; |
| 1605 | |
| 1606 | address += APERTURE_RANGE_SIZE / 64; |
| 1607 | } |
| 1608 | } |
| 1609 | |
Joerg Roedel | 17f5b56 | 2011-07-06 17:14:44 +0200 | [diff] [blame] | 1610 | old_size = dma_dom->aperture_size; |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1611 | dma_dom->aperture_size += APERTURE_RANGE_SIZE; |
| 1612 | |
Joerg Roedel | 17f5b56 | 2011-07-06 17:14:44 +0200 | [diff] [blame] | 1613 | /* Reserve address range used for MSI messages */ |
| 1614 | if (old_size < MSI_ADDR_BASE_LO && |
| 1615 | dma_dom->aperture_size > MSI_ADDR_BASE_LO) { |
| 1616 | unsigned long spage; |
| 1617 | int pages; |
| 1618 | |
| 1619 | pages = iommu_num_pages(MSI_ADDR_BASE_LO, 0x10000, PAGE_SIZE); |
| 1620 | spage = MSI_ADDR_BASE_LO >> PAGE_SHIFT; |
| 1621 | |
| 1622 | dma_ops_reserve_addresses(dma_dom, spage, pages); |
| 1623 | } |
| 1624 | |
Uwe Kleine-König | b595076 | 2010-11-01 15:38:34 -0400 | [diff] [blame] | 1625 | /* Initialize the exclusion range if necessary */ |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 1626 | for_each_iommu(iommu) { |
| 1627 | if (iommu->exclusion_start && |
| 1628 | iommu->exclusion_start >= dma_dom->aperture[index]->offset |
| 1629 | && iommu->exclusion_start < dma_dom->aperture_size) { |
| 1630 | unsigned long startpage; |
| 1631 | int pages = iommu_num_pages(iommu->exclusion_start, |
| 1632 | iommu->exclusion_length, |
| 1633 | PAGE_SIZE); |
| 1634 | startpage = iommu->exclusion_start >> PAGE_SHIFT; |
| 1635 | dma_ops_reserve_addresses(dma_dom, startpage, pages); |
| 1636 | } |
Joerg Roedel | 00cd122 | 2009-05-19 09:52:40 +0200 | [diff] [blame] | 1637 | } |
| 1638 | |
| 1639 | /* |
| 1640 | * Check for areas already mapped as present in the new aperture |
| 1641 | * range and mark those pages as reserved in the allocator. Such |
| 1642 | * mappings may already exist as a result of requested unity |
| 1643 | * mappings for devices. |
| 1644 | */ |
| 1645 | for (i = dma_dom->aperture[index]->offset; |
| 1646 | i < dma_dom->aperture_size; |
| 1647 | i += PAGE_SIZE) { |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1648 | u64 *pte = fetch_pte(&dma_dom->domain, i); |
Joerg Roedel | 00cd122 | 2009-05-19 09:52:40 +0200 | [diff] [blame] | 1649 | if (!pte || !IOMMU_PTE_PRESENT(*pte)) |
| 1650 | continue; |
| 1651 | |
Joerg Roedel | fcd0861 | 2011-10-11 17:41:32 +0200 | [diff] [blame] | 1652 | dma_ops_reserve_addresses(dma_dom, i >> PAGE_SHIFT, 1); |
Joerg Roedel | 00cd122 | 2009-05-19 09:52:40 +0200 | [diff] [blame] | 1653 | } |
| 1654 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 1655 | update_domain(&dma_dom->domain); |
| 1656 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1657 | return 0; |
| 1658 | |
| 1659 | out_free: |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 1660 | update_domain(&dma_dom->domain); |
| 1661 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1662 | free_page((unsigned long)dma_dom->aperture[index]->bitmap); |
| 1663 | |
| 1664 | kfree(dma_dom->aperture[index]); |
| 1665 | dma_dom->aperture[index] = NULL; |
| 1666 | |
| 1667 | return -ENOMEM; |
| 1668 | } |
| 1669 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1670 | static unsigned long dma_ops_area_alloc(struct device *dev, |
| 1671 | struct dma_ops_domain *dom, |
| 1672 | unsigned int pages, |
| 1673 | unsigned long align_mask, |
| 1674 | u64 dma_mask, |
| 1675 | unsigned long start) |
| 1676 | { |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1677 | unsigned long next_bit = dom->next_address % APERTURE_RANGE_SIZE; |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1678 | int max_index = dom->aperture_size >> APERTURE_RANGE_SHIFT; |
| 1679 | int i = start >> APERTURE_RANGE_SHIFT; |
| 1680 | unsigned long boundary_size; |
| 1681 | unsigned long address = -1; |
| 1682 | unsigned long limit; |
| 1683 | |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1684 | next_bit >>= PAGE_SHIFT; |
| 1685 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1686 | boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1, |
| 1687 | PAGE_SIZE) >> PAGE_SHIFT; |
| 1688 | |
| 1689 | for (;i < max_index; ++i) { |
| 1690 | unsigned long offset = dom->aperture[i]->offset >> PAGE_SHIFT; |
| 1691 | |
| 1692 | if (dom->aperture[i]->offset >= dma_mask) |
| 1693 | break; |
| 1694 | |
| 1695 | limit = iommu_device_max_index(APERTURE_RANGE_PAGES, offset, |
| 1696 | dma_mask >> PAGE_SHIFT); |
| 1697 | |
| 1698 | address = iommu_area_alloc(dom->aperture[i]->bitmap, |
| 1699 | limit, next_bit, pages, 0, |
| 1700 | boundary_size, align_mask); |
| 1701 | if (address != -1) { |
| 1702 | address = dom->aperture[i]->offset + |
| 1703 | (address << PAGE_SHIFT); |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1704 | dom->next_address = address + (pages << PAGE_SHIFT); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1705 | break; |
| 1706 | } |
| 1707 | |
| 1708 | next_bit = 0; |
| 1709 | } |
| 1710 | |
| 1711 | return address; |
| 1712 | } |
| 1713 | |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1714 | static unsigned long dma_ops_alloc_addresses(struct device *dev, |
| 1715 | struct dma_ops_domain *dom, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 1716 | unsigned int pages, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1717 | unsigned long align_mask, |
| 1718 | u64 dma_mask) |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1719 | { |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1720 | unsigned long address; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1721 | |
Joerg Roedel | fe16f08 | 2009-05-22 12:27:53 +0200 | [diff] [blame] | 1722 | #ifdef CONFIG_IOMMU_STRESS |
| 1723 | dom->next_address = 0; |
| 1724 | dom->need_flush = true; |
| 1725 | #endif |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1726 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1727 | address = dma_ops_area_alloc(dev, dom, pages, align_mask, |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1728 | dma_mask, dom->next_address); |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1729 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1730 | if (address == -1) { |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1731 | dom->next_address = 0; |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1732 | address = dma_ops_area_alloc(dev, dom, pages, align_mask, |
| 1733 | dma_mask, 0); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1734 | dom->need_flush = true; |
| 1735 | } |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1736 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1737 | if (unlikely(address == -1)) |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 1738 | address = DMA_ERROR_CODE; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1739 | |
| 1740 | WARN_ON((address + (PAGE_SIZE*pages)) > dom->aperture_size); |
| 1741 | |
| 1742 | return address; |
| 1743 | } |
| 1744 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1745 | /* |
| 1746 | * The address free function. |
| 1747 | * |
| 1748 | * called with domain->lock held |
| 1749 | */ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1750 | static void dma_ops_free_addresses(struct dma_ops_domain *dom, |
| 1751 | unsigned long address, |
| 1752 | unsigned int pages) |
| 1753 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1754 | unsigned i = address >> APERTURE_RANGE_SHIFT; |
| 1755 | struct aperture_range *range = dom->aperture[i]; |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 1756 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1757 | BUG_ON(i >= APERTURE_MAX_RANGES || range == NULL); |
| 1758 | |
Joerg Roedel | 47bccd6 | 2009-05-22 12:40:54 +0200 | [diff] [blame] | 1759 | #ifdef CONFIG_IOMMU_STRESS |
| 1760 | if (i < 4) |
| 1761 | return; |
| 1762 | #endif |
| 1763 | |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1764 | if (address >= dom->next_address) |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 1765 | dom->need_flush = true; |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1766 | |
| 1767 | address = (address % APERTURE_RANGE_SIZE) >> PAGE_SHIFT; |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1768 | |
Akinobu Mita | a66022c | 2009-12-15 16:48:28 -0800 | [diff] [blame] | 1769 | bitmap_clear(range->bitmap, address, pages); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1770 | |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1771 | } |
| 1772 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1773 | /**************************************************************************** |
| 1774 | * |
| 1775 | * The next functions belong to the domain allocation. A domain is |
| 1776 | * allocated for every IOMMU as the default domain. If device isolation |
| 1777 | * is enabled, every device get its own domain. The most important thing |
| 1778 | * about domains is the page table mapping the DMA address space they |
| 1779 | * contain. |
| 1780 | * |
| 1781 | ****************************************************************************/ |
| 1782 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 1783 | /* |
| 1784 | * This function adds a protection domain to the global protection domain list |
| 1785 | */ |
| 1786 | static void add_domain_to_list(struct protection_domain *domain) |
| 1787 | { |
| 1788 | unsigned long flags; |
| 1789 | |
| 1790 | spin_lock_irqsave(&amd_iommu_pd_lock, flags); |
| 1791 | list_add(&domain->list, &amd_iommu_pd_list); |
| 1792 | spin_unlock_irqrestore(&amd_iommu_pd_lock, flags); |
| 1793 | } |
| 1794 | |
| 1795 | /* |
| 1796 | * This function removes a protection domain to the global |
| 1797 | * protection domain list |
| 1798 | */ |
| 1799 | static void del_domain_from_list(struct protection_domain *domain) |
| 1800 | { |
| 1801 | unsigned long flags; |
| 1802 | |
| 1803 | spin_lock_irqsave(&amd_iommu_pd_lock, flags); |
| 1804 | list_del(&domain->list); |
| 1805 | spin_unlock_irqrestore(&amd_iommu_pd_lock, flags); |
| 1806 | } |
| 1807 | |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1808 | static u16 domain_id_alloc(void) |
| 1809 | { |
| 1810 | unsigned long flags; |
| 1811 | int id; |
| 1812 | |
| 1813 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 1814 | id = find_first_zero_bit(amd_iommu_pd_alloc_bitmap, MAX_DOMAIN_ID); |
| 1815 | BUG_ON(id == 0); |
| 1816 | if (id > 0 && id < MAX_DOMAIN_ID) |
| 1817 | __set_bit(id, amd_iommu_pd_alloc_bitmap); |
| 1818 | else |
| 1819 | id = 0; |
| 1820 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 1821 | |
| 1822 | return id; |
| 1823 | } |
| 1824 | |
Joerg Roedel | a2acfb7 | 2008-12-02 18:28:53 +0100 | [diff] [blame] | 1825 | static void domain_id_free(int id) |
| 1826 | { |
| 1827 | unsigned long flags; |
| 1828 | |
| 1829 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 1830 | if (id > 0 && id < MAX_DOMAIN_ID) |
| 1831 | __clear_bit(id, amd_iommu_pd_alloc_bitmap); |
| 1832 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 1833 | } |
Joerg Roedel | a2acfb7 | 2008-12-02 18:28:53 +0100 | [diff] [blame] | 1834 | |
Joerg Roedel | 5c34c40 | 2013-06-20 20:22:58 +0200 | [diff] [blame] | 1835 | #define DEFINE_FREE_PT_FN(LVL, FN) \ |
| 1836 | static void free_pt_##LVL (unsigned long __pt) \ |
| 1837 | { \ |
| 1838 | unsigned long p; \ |
| 1839 | u64 *pt; \ |
| 1840 | int i; \ |
| 1841 | \ |
| 1842 | pt = (u64 *)__pt; \ |
| 1843 | \ |
| 1844 | for (i = 0; i < 512; ++i) { \ |
| 1845 | if (!IOMMU_PTE_PRESENT(pt[i])) \ |
| 1846 | continue; \ |
| 1847 | \ |
| 1848 | p = (unsigned long)IOMMU_PTE_PAGE(pt[i]); \ |
| 1849 | FN(p); \ |
| 1850 | } \ |
| 1851 | free_page((unsigned long)pt); \ |
| 1852 | } |
| 1853 | |
| 1854 | DEFINE_FREE_PT_FN(l2, free_page) |
| 1855 | DEFINE_FREE_PT_FN(l3, free_pt_l2) |
| 1856 | DEFINE_FREE_PT_FN(l4, free_pt_l3) |
| 1857 | DEFINE_FREE_PT_FN(l5, free_pt_l4) |
| 1858 | DEFINE_FREE_PT_FN(l6, free_pt_l5) |
| 1859 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 1860 | static void free_pagetable(struct protection_domain *domain) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1861 | { |
Joerg Roedel | 5c34c40 | 2013-06-20 20:22:58 +0200 | [diff] [blame] | 1862 | unsigned long root = (unsigned long)domain->pt_root; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1863 | |
Joerg Roedel | 5c34c40 | 2013-06-20 20:22:58 +0200 | [diff] [blame] | 1864 | switch (domain->mode) { |
| 1865 | case PAGE_MODE_NONE: |
| 1866 | break; |
| 1867 | case PAGE_MODE_1_LEVEL: |
| 1868 | free_page(root); |
| 1869 | break; |
| 1870 | case PAGE_MODE_2_LEVEL: |
| 1871 | free_pt_l2(root); |
| 1872 | break; |
| 1873 | case PAGE_MODE_3_LEVEL: |
| 1874 | free_pt_l3(root); |
| 1875 | break; |
| 1876 | case PAGE_MODE_4_LEVEL: |
| 1877 | free_pt_l4(root); |
| 1878 | break; |
| 1879 | case PAGE_MODE_5_LEVEL: |
| 1880 | free_pt_l5(root); |
| 1881 | break; |
| 1882 | case PAGE_MODE_6_LEVEL: |
| 1883 | free_pt_l6(root); |
| 1884 | break; |
| 1885 | default: |
| 1886 | BUG(); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1887 | } |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1888 | } |
| 1889 | |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 1890 | static void free_gcr3_tbl_level1(u64 *tbl) |
| 1891 | { |
| 1892 | u64 *ptr; |
| 1893 | int i; |
| 1894 | |
| 1895 | for (i = 0; i < 512; ++i) { |
| 1896 | if (!(tbl[i] & GCR3_VALID)) |
| 1897 | continue; |
| 1898 | |
| 1899 | ptr = __va(tbl[i] & PAGE_MASK); |
| 1900 | |
| 1901 | free_page((unsigned long)ptr); |
| 1902 | } |
| 1903 | } |
| 1904 | |
| 1905 | static void free_gcr3_tbl_level2(u64 *tbl) |
| 1906 | { |
| 1907 | u64 *ptr; |
| 1908 | int i; |
| 1909 | |
| 1910 | for (i = 0; i < 512; ++i) { |
| 1911 | if (!(tbl[i] & GCR3_VALID)) |
| 1912 | continue; |
| 1913 | |
| 1914 | ptr = __va(tbl[i] & PAGE_MASK); |
| 1915 | |
| 1916 | free_gcr3_tbl_level1(ptr); |
| 1917 | } |
| 1918 | } |
| 1919 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 1920 | static void free_gcr3_table(struct protection_domain *domain) |
| 1921 | { |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 1922 | if (domain->glx == 2) |
| 1923 | free_gcr3_tbl_level2(domain->gcr3_tbl); |
| 1924 | else if (domain->glx == 1) |
| 1925 | free_gcr3_tbl_level1(domain->gcr3_tbl); |
| 1926 | else if (domain->glx != 0) |
| 1927 | BUG(); |
| 1928 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 1929 | free_page((unsigned long)domain->gcr3_tbl); |
| 1930 | } |
| 1931 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1932 | /* |
| 1933 | * Free a domain, only used if something went wrong in the |
| 1934 | * allocation path and we need to free an already allocated page table |
| 1935 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1936 | static void dma_ops_domain_free(struct dma_ops_domain *dom) |
| 1937 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1938 | int i; |
| 1939 | |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1940 | if (!dom) |
| 1941 | return; |
| 1942 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 1943 | del_domain_from_list(&dom->domain); |
| 1944 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 1945 | free_pagetable(&dom->domain); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1946 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1947 | for (i = 0; i < APERTURE_MAX_RANGES; ++i) { |
| 1948 | if (!dom->aperture[i]) |
| 1949 | continue; |
| 1950 | free_page((unsigned long)dom->aperture[i]->bitmap); |
| 1951 | kfree(dom->aperture[i]); |
| 1952 | } |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1953 | |
| 1954 | kfree(dom); |
| 1955 | } |
| 1956 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1957 | /* |
| 1958 | * Allocates a new protection domain usable for the dma_ops functions. |
Uwe Kleine-König | b595076 | 2010-11-01 15:38:34 -0400 | [diff] [blame] | 1959 | * It also initializes the page table and the address allocator data |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1960 | * structures required for the dma_ops interface |
| 1961 | */ |
Joerg Roedel | 87a64d5 | 2009-11-24 17:26:43 +0100 | [diff] [blame] | 1962 | static struct dma_ops_domain *dma_ops_domain_alloc(void) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1963 | { |
| 1964 | struct dma_ops_domain *dma_dom; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1965 | |
| 1966 | dma_dom = kzalloc(sizeof(struct dma_ops_domain), GFP_KERNEL); |
| 1967 | if (!dma_dom) |
| 1968 | return NULL; |
| 1969 | |
| 1970 | spin_lock_init(&dma_dom->domain.lock); |
| 1971 | |
| 1972 | dma_dom->domain.id = domain_id_alloc(); |
| 1973 | if (dma_dom->domain.id == 0) |
| 1974 | goto free_dma_dom; |
Joerg Roedel | 7c392cb | 2009-11-26 11:13:32 +0100 | [diff] [blame] | 1975 | INIT_LIST_HEAD(&dma_dom->domain.dev_list); |
Joerg Roedel | 8f7a017 | 2009-09-02 16:55:24 +0200 | [diff] [blame] | 1976 | dma_dom->domain.mode = PAGE_MODE_2_LEVEL; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1977 | dma_dom->domain.pt_root = (void *)get_zeroed_page(GFP_KERNEL); |
Joerg Roedel | 9fdb19d | 2008-12-02 17:46:25 +0100 | [diff] [blame] | 1978 | dma_dom->domain.flags = PD_DMA_OPS_MASK; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1979 | dma_dom->domain.priv = dma_dom; |
| 1980 | if (!dma_dom->domain.pt_root) |
| 1981 | goto free_dma_dom; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1982 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1983 | dma_dom->need_flush = false; |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 1984 | dma_dom->target_dev = 0xffff; |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1985 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 1986 | add_domain_to_list(&dma_dom->domain); |
| 1987 | |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 1988 | if (alloc_new_range(dma_dom, true, GFP_KERNEL)) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1989 | goto free_dma_dom; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1990 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1991 | /* |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1992 | * mark the first page as allocated so we never return 0 as |
| 1993 | * a valid dma-address. So we can use 0 as error value |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1994 | */ |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1995 | dma_dom->aperture[0]->bitmap[0] = 1; |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1996 | dma_dom->next_address = 0; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1997 | |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1998 | |
| 1999 | return dma_dom; |
| 2000 | |
| 2001 | free_dma_dom: |
| 2002 | dma_ops_domain_free(dma_dom); |
| 2003 | |
| 2004 | return NULL; |
| 2005 | } |
| 2006 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2007 | /* |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2008 | * little helper function to check whether a given protection domain is a |
| 2009 | * dma_ops domain |
| 2010 | */ |
| 2011 | static bool dma_ops_domain(struct protection_domain *domain) |
| 2012 | { |
| 2013 | return domain->flags & PD_DMA_OPS_MASK; |
| 2014 | } |
| 2015 | |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2016 | static void set_dte_entry(u16 devid, struct protection_domain *domain, bool ats) |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2017 | { |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 2018 | u64 pte_root = 0; |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 2019 | u64 flags = 0; |
Joerg Roedel | 863c74e | 2008-12-02 17:56:36 +0100 | [diff] [blame] | 2020 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 2021 | if (domain->mode != PAGE_MODE_NONE) |
| 2022 | pte_root = virt_to_phys(domain->pt_root); |
| 2023 | |
Joerg Roedel | 38ddf41 | 2008-09-11 10:38:32 +0200 | [diff] [blame] | 2024 | pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK) |
| 2025 | << DEV_ENTRY_MODE_SHIFT; |
| 2026 | pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2027 | |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 2028 | flags = amd_iommu_dev_table[devid].data[1]; |
| 2029 | |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2030 | if (ats) |
| 2031 | flags |= DTE_FLAG_IOTLB; |
| 2032 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2033 | if (domain->flags & PD_IOMMUV2_MASK) { |
| 2034 | u64 gcr3 = __pa(domain->gcr3_tbl); |
| 2035 | u64 glx = domain->glx; |
| 2036 | u64 tmp; |
| 2037 | |
| 2038 | pte_root |= DTE_FLAG_GV; |
| 2039 | pte_root |= (glx & DTE_GLX_MASK) << DTE_GLX_SHIFT; |
| 2040 | |
| 2041 | /* First mask out possible old values for GCR3 table */ |
| 2042 | tmp = DTE_GCR3_VAL_B(~0ULL) << DTE_GCR3_SHIFT_B; |
| 2043 | flags &= ~tmp; |
| 2044 | |
| 2045 | tmp = DTE_GCR3_VAL_C(~0ULL) << DTE_GCR3_SHIFT_C; |
| 2046 | flags &= ~tmp; |
| 2047 | |
| 2048 | /* Encode GCR3 table into DTE */ |
| 2049 | tmp = DTE_GCR3_VAL_A(gcr3) << DTE_GCR3_SHIFT_A; |
| 2050 | pte_root |= tmp; |
| 2051 | |
| 2052 | tmp = DTE_GCR3_VAL_B(gcr3) << DTE_GCR3_SHIFT_B; |
| 2053 | flags |= tmp; |
| 2054 | |
| 2055 | tmp = DTE_GCR3_VAL_C(gcr3) << DTE_GCR3_SHIFT_C; |
| 2056 | flags |= tmp; |
| 2057 | } |
| 2058 | |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 2059 | flags &= ~(0xffffUL); |
| 2060 | flags |= domain->id; |
| 2061 | |
| 2062 | amd_iommu_dev_table[devid].data[1] = flags; |
| 2063 | amd_iommu_dev_table[devid].data[0] = pte_root; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2064 | } |
| 2065 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2066 | static void clear_dte_entry(u16 devid) |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2067 | { |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2068 | /* remove entry from the device table seen by the hardware */ |
| 2069 | amd_iommu_dev_table[devid].data[0] = IOMMU_PTE_P | IOMMU_PTE_TV; |
| 2070 | amd_iommu_dev_table[devid].data[1] = 0; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2071 | |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 2072 | amd_iommu_apply_erratum_63(devid); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2073 | } |
| 2074 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2075 | static void do_attach(struct iommu_dev_data *dev_data, |
| 2076 | struct protection_domain *domain) |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2077 | { |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2078 | struct amd_iommu *iommu; |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2079 | bool ats; |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2080 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2081 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 2082 | ats = dev_data->ats.enabled; |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2083 | |
| 2084 | /* Update data structures */ |
| 2085 | dev_data->domain = domain; |
| 2086 | list_add(&dev_data->list, &domain->dev_list); |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 2087 | set_dte_entry(dev_data->devid, domain, ats); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2088 | |
| 2089 | /* Do reference counting */ |
| 2090 | domain->dev_iommu[iommu->index] += 1; |
| 2091 | domain->dev_cnt += 1; |
| 2092 | |
| 2093 | /* Flush the DTE entry */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 2094 | device_flush_dte(dev_data); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2095 | } |
| 2096 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2097 | static void do_detach(struct iommu_dev_data *dev_data) |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2098 | { |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2099 | struct amd_iommu *iommu; |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2100 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2101 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 2102 | |
Joerg Roedel | c459611 | 2009-11-20 14:57:32 +0100 | [diff] [blame] | 2103 | /* decrease reference counters */ |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2104 | dev_data->domain->dev_iommu[iommu->index] -= 1; |
| 2105 | dev_data->domain->dev_cnt -= 1; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2106 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2107 | /* Update data structures */ |
| 2108 | dev_data->domain = NULL; |
| 2109 | list_del(&dev_data->list); |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 2110 | clear_dte_entry(dev_data->devid); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2111 | |
| 2112 | /* Flush the DTE entry */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 2113 | device_flush_dte(dev_data); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2114 | } |
| 2115 | |
| 2116 | /* |
| 2117 | * If a device is not yet associated with a domain, this function does |
| 2118 | * assigns it visible for the hardware |
| 2119 | */ |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2120 | static int __attach_device(struct iommu_dev_data *dev_data, |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2121 | struct protection_domain *domain) |
| 2122 | { |
Julia Lawall | 84fe6c1 | 2010-05-27 12:31:51 +0200 | [diff] [blame] | 2123 | int ret; |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2124 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2125 | /* lock domain */ |
| 2126 | spin_lock(&domain->lock); |
| 2127 | |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 2128 | if (dev_data->alias_data != NULL) { |
| 2129 | struct iommu_dev_data *alias_data = dev_data->alias_data; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2130 | |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 2131 | /* Some sanity checks */ |
| 2132 | ret = -EBUSY; |
| 2133 | if (alias_data->domain != NULL && |
| 2134 | alias_data->domain != domain) |
| 2135 | goto out_unlock; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2136 | |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 2137 | if (dev_data->domain != NULL && |
| 2138 | dev_data->domain != domain) |
| 2139 | goto out_unlock; |
| 2140 | |
| 2141 | /* Do real assignment */ |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2142 | if (alias_data->domain == NULL) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2143 | do_attach(alias_data, domain); |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 2144 | |
| 2145 | atomic_inc(&alias_data->bind); |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2146 | } |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2147 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2148 | if (dev_data->domain == NULL) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2149 | do_attach(dev_data, domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2150 | |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 2151 | atomic_inc(&dev_data->bind); |
| 2152 | |
Julia Lawall | 84fe6c1 | 2010-05-27 12:31:51 +0200 | [diff] [blame] | 2153 | ret = 0; |
| 2154 | |
| 2155 | out_unlock: |
| 2156 | |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2157 | /* ready */ |
| 2158 | spin_unlock(&domain->lock); |
Joerg Roedel | 21129f7 | 2009-09-01 11:59:42 +0200 | [diff] [blame] | 2159 | |
Julia Lawall | 84fe6c1 | 2010-05-27 12:31:51 +0200 | [diff] [blame] | 2160 | return ret; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2161 | } |
| 2162 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2163 | |
| 2164 | static void pdev_iommuv2_disable(struct pci_dev *pdev) |
| 2165 | { |
| 2166 | pci_disable_ats(pdev); |
| 2167 | pci_disable_pri(pdev); |
| 2168 | pci_disable_pasid(pdev); |
| 2169 | } |
| 2170 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2171 | /* FIXME: Change generic reset-function to do the same */ |
| 2172 | static int pri_reset_while_enabled(struct pci_dev *pdev) |
| 2173 | { |
| 2174 | u16 control; |
| 2175 | int pos; |
| 2176 | |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 2177 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2178 | if (!pos) |
| 2179 | return -EINVAL; |
| 2180 | |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 2181 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
| 2182 | control |= PCI_PRI_CTRL_RESET; |
| 2183 | pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2184 | |
| 2185 | return 0; |
| 2186 | } |
| 2187 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2188 | static int pdev_iommuv2_enable(struct pci_dev *pdev) |
| 2189 | { |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2190 | bool reset_enable; |
| 2191 | int reqs, ret; |
| 2192 | |
| 2193 | /* FIXME: Hardcode number of outstanding requests for now */ |
| 2194 | reqs = 32; |
| 2195 | if (pdev_pri_erratum(pdev, AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE)) |
| 2196 | reqs = 1; |
| 2197 | reset_enable = pdev_pri_erratum(pdev, AMD_PRI_DEV_ERRATUM_ENABLE_RESET); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2198 | |
| 2199 | /* Only allow access to user-accessible pages */ |
| 2200 | ret = pci_enable_pasid(pdev, 0); |
| 2201 | if (ret) |
| 2202 | goto out_err; |
| 2203 | |
| 2204 | /* First reset the PRI state of the device */ |
| 2205 | ret = pci_reset_pri(pdev); |
| 2206 | if (ret) |
| 2207 | goto out_err; |
| 2208 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2209 | /* Enable PRI */ |
| 2210 | ret = pci_enable_pri(pdev, reqs); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2211 | if (ret) |
| 2212 | goto out_err; |
| 2213 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2214 | if (reset_enable) { |
| 2215 | ret = pri_reset_while_enabled(pdev); |
| 2216 | if (ret) |
| 2217 | goto out_err; |
| 2218 | } |
| 2219 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2220 | ret = pci_enable_ats(pdev, PAGE_SHIFT); |
| 2221 | if (ret) |
| 2222 | goto out_err; |
| 2223 | |
| 2224 | return 0; |
| 2225 | |
| 2226 | out_err: |
| 2227 | pci_disable_pri(pdev); |
| 2228 | pci_disable_pasid(pdev); |
| 2229 | |
| 2230 | return ret; |
| 2231 | } |
| 2232 | |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2233 | /* FIXME: Move this to PCI code */ |
Joerg Roedel | a3b9312 | 2012-04-12 12:49:26 +0200 | [diff] [blame] | 2234 | #define PCI_PRI_TLP_OFF (1 << 15) |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2235 | |
Joerg Roedel | 98f1ad2 | 2012-07-06 13:28:37 +0200 | [diff] [blame] | 2236 | static bool pci_pri_tlp_required(struct pci_dev *pdev) |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2237 | { |
Joerg Roedel | a3b9312 | 2012-04-12 12:49:26 +0200 | [diff] [blame] | 2238 | u16 status; |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2239 | int pos; |
| 2240 | |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 2241 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2242 | if (!pos) |
| 2243 | return false; |
| 2244 | |
Joerg Roedel | a3b9312 | 2012-04-12 12:49:26 +0200 | [diff] [blame] | 2245 | pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2246 | |
Joerg Roedel | a3b9312 | 2012-04-12 12:49:26 +0200 | [diff] [blame] | 2247 | return (status & PCI_PRI_TLP_OFF) ? true : false; |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2248 | } |
| 2249 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2250 | /* |
Frank Arnold | df805ab | 2012-08-27 19:21:04 +0200 | [diff] [blame] | 2251 | * If a device is not yet associated with a domain, this function |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2252 | * assigns it visible for the hardware |
| 2253 | */ |
| 2254 | static int attach_device(struct device *dev, |
| 2255 | struct protection_domain *domain) |
| 2256 | { |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2257 | struct pci_dev *pdev = to_pci_dev(dev); |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2258 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2259 | unsigned long flags; |
| 2260 | int ret; |
| 2261 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2262 | dev_data = get_dev_data(dev); |
| 2263 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2264 | if (domain->flags & PD_IOMMUV2_MASK) { |
| 2265 | if (!dev_data->iommu_v2 || !dev_data->passthrough) |
| 2266 | return -EINVAL; |
| 2267 | |
| 2268 | if (pdev_iommuv2_enable(pdev) != 0) |
| 2269 | return -EINVAL; |
| 2270 | |
| 2271 | dev_data->ats.enabled = true; |
| 2272 | dev_data->ats.qdep = pci_ats_queue_depth(pdev); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2273 | dev_data->pri_tlp = pci_pri_tlp_required(pdev); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2274 | } else if (amd_iommu_iotlb_sup && |
| 2275 | pci_enable_ats(pdev, PAGE_SHIFT) == 0) { |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2276 | dev_data->ats.enabled = true; |
| 2277 | dev_data->ats.qdep = pci_ats_queue_depth(pdev); |
| 2278 | } |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2279 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2280 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2281 | ret = __attach_device(dev_data, domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2282 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 2283 | |
| 2284 | /* |
| 2285 | * We might boot into a crash-kernel here. The crashed kernel |
| 2286 | * left the caches in the IOMMU dirty. So we have to flush |
| 2287 | * here to evict all dirty stuff. |
| 2288 | */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2289 | domain_flush_tlb_pde(domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2290 | |
| 2291 | return ret; |
| 2292 | } |
| 2293 | |
| 2294 | /* |
| 2295 | * Removes a device from a protection domain (unlocked) |
| 2296 | */ |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2297 | static void __detach_device(struct iommu_dev_data *dev_data) |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2298 | { |
Joerg Roedel | 2ca7627 | 2010-01-22 16:45:31 +0100 | [diff] [blame] | 2299 | struct protection_domain *domain; |
Joerg Roedel | 7c392cb | 2009-11-26 11:13:32 +0100 | [diff] [blame] | 2300 | unsigned long flags; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2301 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2302 | BUG_ON(!dev_data->domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2303 | |
Joerg Roedel | 2ca7627 | 2010-01-22 16:45:31 +0100 | [diff] [blame] | 2304 | domain = dev_data->domain; |
| 2305 | |
| 2306 | spin_lock_irqsave(&domain->lock, flags); |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 2307 | |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 2308 | if (dev_data->alias_data != NULL) { |
| 2309 | struct iommu_dev_data *alias_data = dev_data->alias_data; |
| 2310 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2311 | if (atomic_dec_and_test(&alias_data->bind)) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2312 | do_detach(alias_data); |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 2313 | } |
| 2314 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2315 | if (atomic_dec_and_test(&dev_data->bind)) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2316 | do_detach(dev_data); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2317 | |
Joerg Roedel | 2ca7627 | 2010-01-22 16:45:31 +0100 | [diff] [blame] | 2318 | spin_unlock_irqrestore(&domain->lock, flags); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2319 | |
Joerg Roedel | 21129f7 | 2009-09-01 11:59:42 +0200 | [diff] [blame] | 2320 | /* |
| 2321 | * If we run in passthrough mode the device must be assigned to the |
Joerg Roedel | d3ad937 | 2010-01-22 17:55:27 +0100 | [diff] [blame] | 2322 | * passthrough domain if it is detached from any other domain. |
| 2323 | * Make sure we can deassign from the pt_domain itself. |
Joerg Roedel | 21129f7 | 2009-09-01 11:59:42 +0200 | [diff] [blame] | 2324 | */ |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2325 | if (dev_data->passthrough && |
Joerg Roedel | d3ad937 | 2010-01-22 17:55:27 +0100 | [diff] [blame] | 2326 | (dev_data->domain == NULL && domain != pt_domain)) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2327 | __attach_device(dev_data, pt_domain); |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2328 | } |
| 2329 | |
| 2330 | /* |
| 2331 | * Removes a device from a protection domain (with devtable_lock held) |
| 2332 | */ |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2333 | static void detach_device(struct device *dev) |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2334 | { |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2335 | struct protection_domain *domain; |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2336 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2337 | unsigned long flags; |
| 2338 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2339 | dev_data = get_dev_data(dev); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2340 | domain = dev_data->domain; |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2341 | |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2342 | /* lock device table */ |
| 2343 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2344 | __detach_device(dev_data); |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2345 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2346 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2347 | if (domain->flags & PD_IOMMUV2_MASK) |
| 2348 | pdev_iommuv2_disable(to_pci_dev(dev)); |
| 2349 | else if (dev_data->ats.enabled) |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2350 | pci_disable_ats(to_pci_dev(dev)); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2351 | |
| 2352 | dev_data->ats.enabled = false; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2353 | } |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2354 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2355 | /* |
| 2356 | * Find out the protection domain structure for a given PCI device. This |
| 2357 | * will give us the pointer to the page table root for example. |
| 2358 | */ |
| 2359 | static struct protection_domain *domain_for_device(struct device *dev) |
| 2360 | { |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 2361 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 2362 | struct protection_domain *dom = NULL; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2363 | unsigned long flags; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2364 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2365 | dev_data = get_dev_data(dev); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2366 | |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 2367 | if (dev_data->domain) |
| 2368 | return dev_data->domain; |
| 2369 | |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 2370 | if (dev_data->alias_data != NULL) { |
| 2371 | struct iommu_dev_data *alias_data = dev_data->alias_data; |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 2372 | |
| 2373 | read_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 2374 | if (alias_data->domain != NULL) { |
| 2375 | __attach_device(dev_data, alias_data->domain); |
| 2376 | dom = alias_data->domain; |
| 2377 | } |
| 2378 | read_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2379 | } |
| 2380 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2381 | return dom; |
| 2382 | } |
| 2383 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2384 | static int device_change_notifier(struct notifier_block *nb, |
| 2385 | unsigned long action, void *data) |
| 2386 | { |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2387 | struct dma_ops_domain *dma_domain; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2388 | struct protection_domain *domain; |
| 2389 | struct iommu_dev_data *dev_data; |
| 2390 | struct device *dev = data; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2391 | struct amd_iommu *iommu; |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 2392 | unsigned long flags; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2393 | u16 devid; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2394 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 2395 | if (!check_device(dev)) |
| 2396 | return 0; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2397 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2398 | devid = get_device_id(dev); |
| 2399 | iommu = amd_iommu_rlookup_table[devid]; |
| 2400 | dev_data = get_dev_data(dev); |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2401 | |
| 2402 | switch (action) { |
Chris Wright | c1eee67 | 2009-05-21 00:56:58 -0700 | [diff] [blame] | 2403 | case BUS_NOTIFY_UNBOUND_DRIVER: |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2404 | |
| 2405 | domain = domain_for_device(dev); |
| 2406 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2407 | if (!domain) |
| 2408 | goto out; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2409 | if (dev_data->passthrough) |
Joerg Roedel | a1ca331 | 2009-09-01 12:22:22 +0200 | [diff] [blame] | 2410 | break; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2411 | detach_device(dev); |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2412 | break; |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 2413 | case BUS_NOTIFY_ADD_DEVICE: |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2414 | |
| 2415 | iommu_init_device(dev); |
Alex Williamson | 25b11ce | 2014-09-19 10:03:13 -0600 | [diff] [blame] | 2416 | init_iommu_group(dev); |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2417 | |
Joerg Roedel | 2c9195e | 2012-07-19 13:42:54 +0200 | [diff] [blame] | 2418 | /* |
| 2419 | * dev_data is still NULL and |
| 2420 | * got initialized in iommu_init_device |
| 2421 | */ |
| 2422 | dev_data = get_dev_data(dev); |
| 2423 | |
| 2424 | if (iommu_pass_through || dev_data->iommu_v2) { |
| 2425 | dev_data->passthrough = true; |
| 2426 | attach_device(dev, pt_domain); |
| 2427 | break; |
| 2428 | } |
| 2429 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2430 | domain = domain_for_device(dev); |
| 2431 | |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 2432 | /* allocate a protection domain if a device is added */ |
| 2433 | dma_domain = find_protection_domain(devid); |
Joerg Roedel | c2a2876 | 2013-03-26 22:48:23 +0100 | [diff] [blame] | 2434 | if (!dma_domain) { |
| 2435 | dma_domain = dma_ops_domain_alloc(); |
| 2436 | if (!dma_domain) |
| 2437 | goto out; |
| 2438 | dma_domain->target_dev = devid; |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 2439 | |
Joerg Roedel | c2a2876 | 2013-03-26 22:48:23 +0100 | [diff] [blame] | 2440 | spin_lock_irqsave(&iommu_pd_list_lock, flags); |
| 2441 | list_add_tail(&dma_domain->list, &iommu_pd_list); |
| 2442 | spin_unlock_irqrestore(&iommu_pd_list_lock, flags); |
| 2443 | } |
Joerg Roedel | ac1534a | 2012-06-21 14:52:40 +0200 | [diff] [blame] | 2444 | |
Joerg Roedel | 2c9195e | 2012-07-19 13:42:54 +0200 | [diff] [blame] | 2445 | dev->archdata.dma_ops = &amd_iommu_dma_ops; |
Joerg Roedel | ac1534a | 2012-06-21 14:52:40 +0200 | [diff] [blame] | 2446 | |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 2447 | break; |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2448 | case BUS_NOTIFY_DEL_DEVICE: |
| 2449 | |
| 2450 | iommu_uninit_device(dev); |
| 2451 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2452 | default: |
| 2453 | goto out; |
| 2454 | } |
| 2455 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2456 | iommu_completion_wait(iommu); |
| 2457 | |
| 2458 | out: |
| 2459 | return 0; |
| 2460 | } |
| 2461 | |
Jaswinder Singh Rajput | b25ae67 | 2009-07-01 19:53:14 +0530 | [diff] [blame] | 2462 | static struct notifier_block device_nb = { |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2463 | .notifier_call = device_change_notifier, |
| 2464 | }; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2465 | |
Joerg Roedel | 8638c49 | 2009-12-10 11:12:25 +0100 | [diff] [blame] | 2466 | void amd_iommu_init_notifier(void) |
| 2467 | { |
| 2468 | bus_register_notifier(&pci_bus_type, &device_nb); |
| 2469 | } |
| 2470 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2471 | /***************************************************************************** |
| 2472 | * |
| 2473 | * The next functions belong to the dma_ops mapping/unmapping code. |
| 2474 | * |
| 2475 | *****************************************************************************/ |
| 2476 | |
| 2477 | /* |
| 2478 | * In the dma_ops path we only have the struct device. This function |
| 2479 | * finds the corresponding IOMMU, the protection domain and the |
| 2480 | * requestor id for a given device. |
| 2481 | * If the device is not yet associated with a domain this is also done |
| 2482 | * in this function. |
| 2483 | */ |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2484 | static struct protection_domain *get_domain(struct device *dev) |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2485 | { |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2486 | struct protection_domain *domain; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2487 | struct dma_ops_domain *dma_dom; |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2488 | u16 devid = get_device_id(dev); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2489 | |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2490 | if (!check_device(dev)) |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2491 | return ERR_PTR(-EINVAL); |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 2492 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2493 | domain = domain_for_device(dev); |
| 2494 | if (domain != NULL && !dma_ops_domain(domain)) |
| 2495 | return ERR_PTR(-EBUSY); |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2496 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2497 | if (domain != NULL) |
| 2498 | return domain; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2499 | |
Frank Arnold | df805ab | 2012-08-27 19:21:04 +0200 | [diff] [blame] | 2500 | /* Device not bound yet - bind it */ |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2501 | dma_dom = find_protection_domain(devid); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2502 | if (!dma_dom) |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2503 | dma_dom = amd_iommu_rlookup_table[devid]->default_dom; |
| 2504 | attach_device(dev, &dma_dom->domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2505 | DUMP_printk("Using protection domain %d for device %s\n", |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2506 | dma_dom->domain.id, dev_name(dev)); |
Joerg Roedel | f91ba19 | 2008-11-25 12:56:12 +0100 | [diff] [blame] | 2507 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2508 | return &dma_dom->domain; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2509 | } |
| 2510 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2511 | static void update_device_table(struct protection_domain *domain) |
| 2512 | { |
Joerg Roedel | 492667d | 2009-11-27 13:25:47 +0100 | [diff] [blame] | 2513 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2514 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2515 | list_for_each_entry(dev_data, &domain->dev_list, list) |
| 2516 | set_dte_entry(dev_data->devid, domain, dev_data->ats.enabled); |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2517 | } |
| 2518 | |
| 2519 | static void update_domain(struct protection_domain *domain) |
| 2520 | { |
| 2521 | if (!domain->updated) |
| 2522 | return; |
| 2523 | |
| 2524 | update_device_table(domain); |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2525 | |
| 2526 | domain_flush_devices(domain); |
| 2527 | domain_flush_tlb_pde(domain); |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2528 | |
| 2529 | domain->updated = false; |
| 2530 | } |
| 2531 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2532 | /* |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2533 | * This function fetches the PTE for a given address in the aperture |
| 2534 | */ |
| 2535 | static u64* dma_ops_get_pte(struct dma_ops_domain *dom, |
| 2536 | unsigned long address) |
| 2537 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2538 | struct aperture_range *aperture; |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2539 | u64 *pte, *pte_page; |
| 2540 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2541 | aperture = dom->aperture[APERTURE_RANGE_INDEX(address)]; |
| 2542 | if (!aperture) |
| 2543 | return NULL; |
| 2544 | |
| 2545 | pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)]; |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2546 | if (!pte) { |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 2547 | pte = alloc_pte(&dom->domain, address, PAGE_SIZE, &pte_page, |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 2548 | GFP_ATOMIC); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2549 | aperture->pte_pages[APERTURE_PAGE_INDEX(address)] = pte_page; |
| 2550 | } else |
Joerg Roedel | 8c8c143 | 2009-09-02 17:30:00 +0200 | [diff] [blame] | 2551 | pte += PM_LEVEL_INDEX(0, address); |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2552 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2553 | update_domain(&dom->domain); |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2554 | |
| 2555 | return pte; |
| 2556 | } |
| 2557 | |
| 2558 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2559 | * This is the generic map function. It maps one 4kb page at paddr to |
| 2560 | * the given address in the DMA address space for the domain. |
| 2561 | */ |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2562 | static dma_addr_t dma_ops_domain_map(struct dma_ops_domain *dom, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2563 | unsigned long address, |
| 2564 | phys_addr_t paddr, |
| 2565 | int direction) |
| 2566 | { |
| 2567 | u64 *pte, __pte; |
| 2568 | |
| 2569 | WARN_ON(address > dom->aperture_size); |
| 2570 | |
| 2571 | paddr &= PAGE_MASK; |
| 2572 | |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2573 | pte = dma_ops_get_pte(dom, address); |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2574 | if (!pte) |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2575 | return DMA_ERROR_CODE; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2576 | |
| 2577 | __pte = paddr | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 2578 | |
| 2579 | if (direction == DMA_TO_DEVICE) |
| 2580 | __pte |= IOMMU_PTE_IR; |
| 2581 | else if (direction == DMA_FROM_DEVICE) |
| 2582 | __pte |= IOMMU_PTE_IW; |
| 2583 | else if (direction == DMA_BIDIRECTIONAL) |
| 2584 | __pte |= IOMMU_PTE_IR | IOMMU_PTE_IW; |
| 2585 | |
| 2586 | WARN_ON(*pte); |
| 2587 | |
| 2588 | *pte = __pte; |
| 2589 | |
| 2590 | return (dma_addr_t)address; |
| 2591 | } |
| 2592 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2593 | /* |
| 2594 | * The generic unmapping function for on page in the DMA address space. |
| 2595 | */ |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2596 | static void dma_ops_domain_unmap(struct dma_ops_domain *dom, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2597 | unsigned long address) |
| 2598 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2599 | struct aperture_range *aperture; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2600 | u64 *pte; |
| 2601 | |
| 2602 | if (address >= dom->aperture_size) |
| 2603 | return; |
| 2604 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2605 | aperture = dom->aperture[APERTURE_RANGE_INDEX(address)]; |
| 2606 | if (!aperture) |
| 2607 | return; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2608 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2609 | pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)]; |
| 2610 | if (!pte) |
| 2611 | return; |
| 2612 | |
Joerg Roedel | 8c8c143 | 2009-09-02 17:30:00 +0200 | [diff] [blame] | 2613 | pte += PM_LEVEL_INDEX(0, address); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2614 | |
| 2615 | WARN_ON(!*pte); |
| 2616 | |
| 2617 | *pte = 0ULL; |
| 2618 | } |
| 2619 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2620 | /* |
| 2621 | * This function contains common code for mapping of a physically |
Joerg Roedel | 24f8116 | 2008-12-08 14:25:39 +0100 | [diff] [blame] | 2622 | * contiguous memory region into DMA address space. It is used by all |
| 2623 | * mapping functions provided with this IOMMU driver. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2624 | * Must be called with the domain lock held. |
| 2625 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2626 | static dma_addr_t __map_single(struct device *dev, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2627 | struct dma_ops_domain *dma_dom, |
| 2628 | phys_addr_t paddr, |
| 2629 | size_t size, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 2630 | int dir, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2631 | bool align, |
| 2632 | u64 dma_mask) |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2633 | { |
| 2634 | dma_addr_t offset = paddr & ~PAGE_MASK; |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2635 | dma_addr_t address, start, ret; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2636 | unsigned int pages; |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 2637 | unsigned long align_mask = 0; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2638 | int i; |
| 2639 | |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 2640 | pages = iommu_num_pages(paddr, size, PAGE_SIZE); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2641 | paddr &= PAGE_MASK; |
| 2642 | |
Joerg Roedel | 8ecaf8f | 2008-12-12 16:13:04 +0100 | [diff] [blame] | 2643 | INC_STATS_COUNTER(total_map_requests); |
| 2644 | |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 2645 | if (pages > 1) |
| 2646 | INC_STATS_COUNTER(cross_page); |
| 2647 | |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 2648 | if (align) |
| 2649 | align_mask = (1UL << get_order(size)) - 1; |
| 2650 | |
Joerg Roedel | 11b8388 | 2009-05-19 10:23:15 +0200 | [diff] [blame] | 2651 | retry: |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2652 | address = dma_ops_alloc_addresses(dev, dma_dom, pages, align_mask, |
| 2653 | dma_mask); |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2654 | if (unlikely(address == DMA_ERROR_CODE)) { |
Joerg Roedel | 11b8388 | 2009-05-19 10:23:15 +0200 | [diff] [blame] | 2655 | /* |
| 2656 | * setting next_address here will let the address |
| 2657 | * allocator only scan the new allocated range in the |
| 2658 | * first run. This is a small optimization. |
| 2659 | */ |
| 2660 | dma_dom->next_address = dma_dom->aperture_size; |
| 2661 | |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 2662 | if (alloc_new_range(dma_dom, false, GFP_ATOMIC)) |
Joerg Roedel | 11b8388 | 2009-05-19 10:23:15 +0200 | [diff] [blame] | 2663 | goto out; |
| 2664 | |
| 2665 | /* |
André Goddard Rosa | af901ca | 2009-11-14 13:09:05 -0200 | [diff] [blame] | 2666 | * aperture was successfully enlarged by 128 MB, try |
Joerg Roedel | 11b8388 | 2009-05-19 10:23:15 +0200 | [diff] [blame] | 2667 | * allocation again |
| 2668 | */ |
| 2669 | goto retry; |
| 2670 | } |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2671 | |
| 2672 | start = address; |
| 2673 | for (i = 0; i < pages; ++i) { |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2674 | ret = dma_ops_domain_map(dma_dom, start, paddr, dir); |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2675 | if (ret == DMA_ERROR_CODE) |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2676 | goto out_unmap; |
| 2677 | |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2678 | paddr += PAGE_SIZE; |
| 2679 | start += PAGE_SIZE; |
| 2680 | } |
| 2681 | address += offset; |
| 2682 | |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 2683 | ADD_STATS_COUNTER(alloced_io_mem, size); |
| 2684 | |
FUJITA Tomonori | afa9fdc | 2008-09-20 01:23:30 +0900 | [diff] [blame] | 2685 | if (unlikely(dma_dom->need_flush && !amd_iommu_unmap_flush)) { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2686 | domain_flush_tlb(&dma_dom->domain); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 2687 | dma_dom->need_flush = false; |
Joerg Roedel | 318afd4 | 2009-11-23 18:32:38 +0100 | [diff] [blame] | 2688 | } else if (unlikely(amd_iommu_np_cache)) |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2689 | domain_flush_pages(&dma_dom->domain, address, size); |
Joerg Roedel | 270cab24 | 2008-09-04 15:49:46 +0200 | [diff] [blame] | 2690 | |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2691 | out: |
| 2692 | return address; |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2693 | |
| 2694 | out_unmap: |
| 2695 | |
| 2696 | for (--i; i >= 0; --i) { |
| 2697 | start -= PAGE_SIZE; |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2698 | dma_ops_domain_unmap(dma_dom, start); |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2699 | } |
| 2700 | |
| 2701 | dma_ops_free_addresses(dma_dom, address, pages); |
| 2702 | |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2703 | return DMA_ERROR_CODE; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2704 | } |
| 2705 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2706 | /* |
| 2707 | * Does the reverse of the __map_single function. Must be called with |
| 2708 | * the domain lock held too |
| 2709 | */ |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2710 | static void __unmap_single(struct dma_ops_domain *dma_dom, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2711 | dma_addr_t dma_addr, |
| 2712 | size_t size, |
| 2713 | int dir) |
| 2714 | { |
Joerg Roedel | 04e0463 | 2010-09-23 16:12:48 +0200 | [diff] [blame] | 2715 | dma_addr_t flush_addr; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2716 | dma_addr_t i, start; |
| 2717 | unsigned int pages; |
| 2718 | |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2719 | if ((dma_addr == DMA_ERROR_CODE) || |
Joerg Roedel | b8d9905 | 2008-12-08 14:40:26 +0100 | [diff] [blame] | 2720 | (dma_addr + size > dma_dom->aperture_size)) |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2721 | return; |
| 2722 | |
Joerg Roedel | 04e0463 | 2010-09-23 16:12:48 +0200 | [diff] [blame] | 2723 | flush_addr = dma_addr; |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 2724 | pages = iommu_num_pages(dma_addr, size, PAGE_SIZE); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2725 | dma_addr &= PAGE_MASK; |
| 2726 | start = dma_addr; |
| 2727 | |
| 2728 | for (i = 0; i < pages; ++i) { |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2729 | dma_ops_domain_unmap(dma_dom, start); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2730 | start += PAGE_SIZE; |
| 2731 | } |
| 2732 | |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 2733 | SUB_STATS_COUNTER(alloced_io_mem, size); |
| 2734 | |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2735 | dma_ops_free_addresses(dma_dom, dma_addr, pages); |
Joerg Roedel | 270cab24 | 2008-09-04 15:49:46 +0200 | [diff] [blame] | 2736 | |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 2737 | if (amd_iommu_unmap_flush || dma_dom->need_flush) { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2738 | domain_flush_pages(&dma_dom->domain, flush_addr, size); |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 2739 | dma_dom->need_flush = false; |
| 2740 | } |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2741 | } |
| 2742 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2743 | /* |
| 2744 | * The exported map_single function for dma_ops. |
| 2745 | */ |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 2746 | static dma_addr_t map_page(struct device *dev, struct page *page, |
| 2747 | unsigned long offset, size_t size, |
| 2748 | enum dma_data_direction dir, |
| 2749 | struct dma_attrs *attrs) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2750 | { |
| 2751 | unsigned long flags; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2752 | struct protection_domain *domain; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2753 | dma_addr_t addr; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2754 | u64 dma_mask; |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 2755 | phys_addr_t paddr = page_to_phys(page) + offset; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2756 | |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 2757 | INC_STATS_COUNTER(cnt_map_single); |
| 2758 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2759 | domain = get_domain(dev); |
| 2760 | if (PTR_ERR(domain) == -EINVAL) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2761 | return (dma_addr_t)paddr; |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2762 | else if (IS_ERR(domain)) |
| 2763 | return DMA_ERROR_CODE; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2764 | |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2765 | dma_mask = *dev->dma_mask; |
| 2766 | |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2767 | spin_lock_irqsave(&domain->lock, flags); |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2768 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2769 | addr = __map_single(dev, domain->priv, paddr, size, dir, false, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2770 | dma_mask); |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2771 | if (addr == DMA_ERROR_CODE) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2772 | goto out; |
| 2773 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2774 | domain_flush_complete(domain); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2775 | |
| 2776 | out: |
| 2777 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2778 | |
| 2779 | return addr; |
| 2780 | } |
| 2781 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2782 | /* |
| 2783 | * The exported unmap_single function for dma_ops. |
| 2784 | */ |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 2785 | static void unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size, |
| 2786 | enum dma_data_direction dir, struct dma_attrs *attrs) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2787 | { |
| 2788 | unsigned long flags; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2789 | struct protection_domain *domain; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2790 | |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 2791 | INC_STATS_COUNTER(cnt_unmap_single); |
| 2792 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2793 | domain = get_domain(dev); |
| 2794 | if (IS_ERR(domain)) |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2795 | return; |
| 2796 | |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2797 | spin_lock_irqsave(&domain->lock, flags); |
| 2798 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2799 | __unmap_single(domain->priv, dma_addr, size, dir); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2800 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2801 | domain_flush_complete(domain); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2802 | |
| 2803 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2804 | } |
| 2805 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2806 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2807 | * The exported map_sg function for dma_ops (handles scatter-gather |
| 2808 | * lists). |
| 2809 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2810 | static int map_sg(struct device *dev, struct scatterlist *sglist, |
FUJITA Tomonori | 160c1d8 | 2009-01-05 23:59:02 +0900 | [diff] [blame] | 2811 | int nelems, enum dma_data_direction dir, |
| 2812 | struct dma_attrs *attrs) |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2813 | { |
| 2814 | unsigned long flags; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2815 | struct protection_domain *domain; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2816 | int i; |
| 2817 | struct scatterlist *s; |
| 2818 | phys_addr_t paddr; |
| 2819 | int mapped_elems = 0; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2820 | u64 dma_mask; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2821 | |
Joerg Roedel | d03f067a | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 2822 | INC_STATS_COUNTER(cnt_map_sg); |
| 2823 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2824 | domain = get_domain(dev); |
Joerg Roedel | a0e191b | 2013-04-09 15:04:36 +0200 | [diff] [blame] | 2825 | if (IS_ERR(domain)) |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2826 | return 0; |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 2827 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2828 | dma_mask = *dev->dma_mask; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2829 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2830 | spin_lock_irqsave(&domain->lock, flags); |
| 2831 | |
| 2832 | for_each_sg(sglist, s, nelems, i) { |
| 2833 | paddr = sg_phys(s); |
| 2834 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2835 | s->dma_address = __map_single(dev, domain->priv, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2836 | paddr, s->length, dir, false, |
| 2837 | dma_mask); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2838 | |
| 2839 | if (s->dma_address) { |
| 2840 | s->dma_length = s->length; |
| 2841 | mapped_elems++; |
| 2842 | } else |
| 2843 | goto unmap; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2844 | } |
| 2845 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2846 | domain_flush_complete(domain); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2847 | |
| 2848 | out: |
| 2849 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2850 | |
| 2851 | return mapped_elems; |
| 2852 | unmap: |
| 2853 | for_each_sg(sglist, s, mapped_elems, i) { |
| 2854 | if (s->dma_address) |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2855 | __unmap_single(domain->priv, s->dma_address, |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2856 | s->dma_length, dir); |
| 2857 | s->dma_address = s->dma_length = 0; |
| 2858 | } |
| 2859 | |
| 2860 | mapped_elems = 0; |
| 2861 | |
| 2862 | goto out; |
| 2863 | } |
| 2864 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2865 | /* |
| 2866 | * The exported map_sg function for dma_ops (handles scatter-gather |
| 2867 | * lists). |
| 2868 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2869 | static void unmap_sg(struct device *dev, struct scatterlist *sglist, |
FUJITA Tomonori | 160c1d8 | 2009-01-05 23:59:02 +0900 | [diff] [blame] | 2870 | int nelems, enum dma_data_direction dir, |
| 2871 | struct dma_attrs *attrs) |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2872 | { |
| 2873 | unsigned long flags; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2874 | struct protection_domain *domain; |
| 2875 | struct scatterlist *s; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2876 | int i; |
| 2877 | |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 2878 | INC_STATS_COUNTER(cnt_unmap_sg); |
| 2879 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2880 | domain = get_domain(dev); |
| 2881 | if (IS_ERR(domain)) |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2882 | return; |
| 2883 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2884 | spin_lock_irqsave(&domain->lock, flags); |
| 2885 | |
| 2886 | for_each_sg(sglist, s, nelems, i) { |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2887 | __unmap_single(domain->priv, s->dma_address, |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2888 | s->dma_length, dir); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2889 | s->dma_address = s->dma_length = 0; |
| 2890 | } |
| 2891 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2892 | domain_flush_complete(domain); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2893 | |
| 2894 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2895 | } |
| 2896 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2897 | /* |
| 2898 | * The exported alloc_coherent function for dma_ops. |
| 2899 | */ |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2900 | static void *alloc_coherent(struct device *dev, size_t size, |
Andrzej Pietrasiewicz | baa676f | 2012-03-27 14:28:18 +0200 | [diff] [blame] | 2901 | dma_addr_t *dma_addr, gfp_t flag, |
| 2902 | struct dma_attrs *attrs) |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2903 | { |
| 2904 | unsigned long flags; |
| 2905 | void *virt_addr; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2906 | struct protection_domain *domain; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2907 | phys_addr_t paddr; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2908 | u64 dma_mask = dev->coherent_dma_mask; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2909 | |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 2910 | INC_STATS_COUNTER(cnt_alloc_coherent); |
| 2911 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2912 | domain = get_domain(dev); |
| 2913 | if (PTR_ERR(domain) == -EINVAL) { |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2914 | virt_addr = (void *)__get_free_pages(flag, get_order(size)); |
| 2915 | *dma_addr = __pa(virt_addr); |
| 2916 | return virt_addr; |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2917 | } else if (IS_ERR(domain)) |
| 2918 | return NULL; |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 2919 | |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2920 | dma_mask = dev->coherent_dma_mask; |
| 2921 | flag &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32); |
| 2922 | flag |= __GFP_ZERO; |
FUJITA Tomonori | 13d9fea | 2008-09-10 20:19:40 +0900 | [diff] [blame] | 2923 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2924 | virt_addr = (void *)__get_free_pages(flag, get_order(size)); |
| 2925 | if (!virt_addr) |
Jaswinder Singh Rajput | b25ae67 | 2009-07-01 19:53:14 +0530 | [diff] [blame] | 2926 | return NULL; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2927 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2928 | paddr = virt_to_phys(virt_addr); |
| 2929 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2930 | if (!dma_mask) |
| 2931 | dma_mask = *dev->dma_mask; |
| 2932 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2933 | spin_lock_irqsave(&domain->lock, flags); |
| 2934 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2935 | *dma_addr = __map_single(dev, domain->priv, paddr, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2936 | size, DMA_BIDIRECTIONAL, true, dma_mask); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2937 | |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2938 | if (*dma_addr == DMA_ERROR_CODE) { |
Jiri Slaby | 367d04c | 2009-05-28 09:54:48 +0200 | [diff] [blame] | 2939 | spin_unlock_irqrestore(&domain->lock, flags); |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2940 | goto out_free; |
Jiri Slaby | 367d04c | 2009-05-28 09:54:48 +0200 | [diff] [blame] | 2941 | } |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2942 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2943 | domain_flush_complete(domain); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2944 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2945 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2946 | |
| 2947 | return virt_addr; |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2948 | |
| 2949 | out_free: |
| 2950 | |
| 2951 | free_pages((unsigned long)virt_addr, get_order(size)); |
| 2952 | |
| 2953 | return NULL; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2954 | } |
| 2955 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2956 | /* |
| 2957 | * The exported free_coherent function for dma_ops. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2958 | */ |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2959 | static void free_coherent(struct device *dev, size_t size, |
Andrzej Pietrasiewicz | baa676f | 2012-03-27 14:28:18 +0200 | [diff] [blame] | 2960 | void *virt_addr, dma_addr_t dma_addr, |
| 2961 | struct dma_attrs *attrs) |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2962 | { |
| 2963 | unsigned long flags; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2964 | struct protection_domain *domain; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2965 | |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 2966 | INC_STATS_COUNTER(cnt_free_coherent); |
| 2967 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2968 | domain = get_domain(dev); |
| 2969 | if (IS_ERR(domain)) |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2970 | goto free_mem; |
| 2971 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2972 | spin_lock_irqsave(&domain->lock, flags); |
| 2973 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2974 | __unmap_single(domain->priv, dma_addr, size, DMA_BIDIRECTIONAL); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2975 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2976 | domain_flush_complete(domain); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2977 | |
| 2978 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2979 | |
| 2980 | free_mem: |
| 2981 | free_pages((unsigned long)virt_addr, get_order(size)); |
| 2982 | } |
| 2983 | |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 2984 | /* |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 2985 | * This function is called by the DMA layer to find out if we can handle a |
| 2986 | * particular device. It is part of the dma_ops. |
| 2987 | */ |
| 2988 | static int amd_iommu_dma_supported(struct device *dev, u64 mask) |
| 2989 | { |
Joerg Roedel | 420aef8 | 2009-11-23 16:14:57 +0100 | [diff] [blame] | 2990 | return check_device(dev); |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 2991 | } |
| 2992 | |
| 2993 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2994 | * The function for pre-allocating protection domains. |
| 2995 | * |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 2996 | * If the driver core informs the DMA layer if a driver grabs a device |
| 2997 | * we don't need to preallocate the protection domains anymore. |
| 2998 | * For now we have to. |
| 2999 | */ |
Steffen Persvold | 943bc7e | 2012-03-15 12:16:28 +0100 | [diff] [blame] | 3000 | static void __init prealloc_protection_domains(void) |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3001 | { |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3002 | struct iommu_dev_data *dev_data; |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3003 | struct dma_ops_domain *dma_dom; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3004 | struct pci_dev *dev = NULL; |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3005 | u16 devid; |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3006 | |
Chris Wright | d18c69d | 2010-04-02 18:27:55 -0700 | [diff] [blame] | 3007 | for_each_pci_dev(dev) { |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3008 | |
| 3009 | /* Do we handle this device? */ |
| 3010 | if (!check_device(&dev->dev)) |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3011 | continue; |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3012 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3013 | dev_data = get_dev_data(&dev->dev); |
| 3014 | if (!amd_iommu_force_isolation && dev_data->iommu_v2) { |
| 3015 | /* Make sure passthrough domain is allocated */ |
| 3016 | alloc_passthrough_domain(); |
| 3017 | dev_data->passthrough = true; |
| 3018 | attach_device(&dev->dev, pt_domain); |
Frank Arnold | df805ab | 2012-08-27 19:21:04 +0200 | [diff] [blame] | 3019 | pr_info("AMD-Vi: Using passthrough domain for device %s\n", |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3020 | dev_name(&dev->dev)); |
| 3021 | } |
| 3022 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3023 | /* Is there already any domain for it? */ |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3024 | if (domain_for_device(&dev->dev)) |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3025 | continue; |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3026 | |
| 3027 | devid = get_device_id(&dev->dev); |
| 3028 | |
Joerg Roedel | 87a64d5 | 2009-11-24 17:26:43 +0100 | [diff] [blame] | 3029 | dma_dom = dma_ops_domain_alloc(); |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3030 | if (!dma_dom) |
| 3031 | continue; |
| 3032 | init_unity_mappings_for_device(dma_dom, devid); |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 3033 | dma_dom->target_dev = devid; |
| 3034 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3035 | attach_device(&dev->dev, &dma_dom->domain); |
Joerg Roedel | be83129 | 2009-11-23 12:50:00 +0100 | [diff] [blame] | 3036 | |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 3037 | list_add_tail(&dma_dom->list, &iommu_pd_list); |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3038 | } |
| 3039 | } |
| 3040 | |
FUJITA Tomonori | 160c1d8 | 2009-01-05 23:59:02 +0900 | [diff] [blame] | 3041 | static struct dma_map_ops amd_iommu_dma_ops = { |
Andrzej Pietrasiewicz | baa676f | 2012-03-27 14:28:18 +0200 | [diff] [blame] | 3042 | .alloc = alloc_coherent, |
| 3043 | .free = free_coherent, |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 3044 | .map_page = map_page, |
| 3045 | .unmap_page = unmap_page, |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3046 | .map_sg = map_sg, |
| 3047 | .unmap_sg = unmap_sg, |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 3048 | .dma_supported = amd_iommu_dma_supported, |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3049 | }; |
| 3050 | |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 3051 | static unsigned device_dma_ops_init(void) |
| 3052 | { |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3053 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 3054 | struct pci_dev *pdev = NULL; |
| 3055 | unsigned unhandled = 0; |
| 3056 | |
| 3057 | for_each_pci_dev(pdev) { |
| 3058 | if (!check_device(&pdev->dev)) { |
Joerg Roedel | af1be04 | 2012-01-18 14:03:11 +0100 | [diff] [blame] | 3059 | |
| 3060 | iommu_ignore_device(&pdev->dev); |
| 3061 | |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 3062 | unhandled += 1; |
| 3063 | continue; |
| 3064 | } |
| 3065 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3066 | dev_data = get_dev_data(&pdev->dev); |
| 3067 | |
| 3068 | if (!dev_data->passthrough) |
| 3069 | pdev->dev.archdata.dma_ops = &amd_iommu_dma_ops; |
| 3070 | else |
| 3071 | pdev->dev.archdata.dma_ops = &nommu_dma_ops; |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 3072 | } |
| 3073 | |
| 3074 | return unhandled; |
| 3075 | } |
| 3076 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 3077 | /* |
| 3078 | * The function which clues the AMD IOMMU driver into dma_ops. |
| 3079 | */ |
Joerg Roedel | f532509 | 2010-01-22 17:44:35 +0100 | [diff] [blame] | 3080 | |
| 3081 | void __init amd_iommu_init_api(void) |
| 3082 | { |
Joerg Roedel | 2cc21c4 | 2011-09-06 17:56:07 +0200 | [diff] [blame] | 3083 | bus_set_iommu(&pci_bus_type, &amd_iommu_ops); |
Joerg Roedel | f532509 | 2010-01-22 17:44:35 +0100 | [diff] [blame] | 3084 | } |
| 3085 | |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3086 | int __init amd_iommu_init_dma_ops(void) |
| 3087 | { |
| 3088 | struct amd_iommu *iommu; |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 3089 | int ret, unhandled; |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3090 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 3091 | /* |
| 3092 | * first allocate a default protection domain for every IOMMU we |
| 3093 | * found in the system. Devices not assigned to any other |
| 3094 | * protection domain will be assigned to the default one. |
| 3095 | */ |
Joerg Roedel | 3bd2217 | 2009-05-04 15:06:20 +0200 | [diff] [blame] | 3096 | for_each_iommu(iommu) { |
Joerg Roedel | 87a64d5 | 2009-11-24 17:26:43 +0100 | [diff] [blame] | 3097 | iommu->default_dom = dma_ops_domain_alloc(); |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3098 | if (iommu->default_dom == NULL) |
| 3099 | return -ENOMEM; |
Joerg Roedel | e2dc14a | 2008-12-10 18:48:59 +0100 | [diff] [blame] | 3100 | iommu->default_dom->domain.flags |= PD_DEFAULT_MASK; |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3101 | ret = iommu_init_unity_mappings(iommu); |
| 3102 | if (ret) |
| 3103 | goto free_domains; |
| 3104 | } |
| 3105 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 3106 | /* |
Joerg Roedel | 8793abe | 2009-11-27 11:40:33 +0100 | [diff] [blame] | 3107 | * Pre-allocate the protection domains for each device. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 3108 | */ |
Joerg Roedel | 8793abe | 2009-11-27 11:40:33 +0100 | [diff] [blame] | 3109 | prealloc_protection_domains(); |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3110 | |
| 3111 | iommu_detected = 1; |
FUJITA Tomonori | 75f1cdf | 2009-11-10 19:46:20 +0900 | [diff] [blame] | 3112 | swiotlb = 0; |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3113 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 3114 | /* Make the driver finally visible to the drivers */ |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 3115 | unhandled = device_dma_ops_init(); |
| 3116 | if (unhandled && max_pfn > MAX_DMA32_PFN) { |
| 3117 | /* There are unhandled devices - initialize swiotlb for them */ |
| 3118 | swiotlb = 1; |
| 3119 | } |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3120 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 3121 | amd_iommu_stats_init(); |
| 3122 | |
Joerg Roedel | 62410ee | 2012-06-12 16:42:43 +0200 | [diff] [blame] | 3123 | if (amd_iommu_unmap_flush) |
| 3124 | pr_info("AMD-Vi: IO/TLB flush on unmap enabled\n"); |
| 3125 | else |
| 3126 | pr_info("AMD-Vi: Lazy IO/TLB flushing enabled\n"); |
| 3127 | |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3128 | return 0; |
| 3129 | |
| 3130 | free_domains: |
| 3131 | |
Joerg Roedel | 3bd2217 | 2009-05-04 15:06:20 +0200 | [diff] [blame] | 3132 | for_each_iommu(iommu) { |
Cyril Roelandt | 91457df | 2013-02-12 05:01:50 +0100 | [diff] [blame] | 3133 | dma_ops_domain_free(iommu->default_dom); |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3134 | } |
| 3135 | |
| 3136 | return ret; |
| 3137 | } |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 3138 | |
| 3139 | /***************************************************************************** |
| 3140 | * |
| 3141 | * The following functions belong to the exported interface of AMD IOMMU |
| 3142 | * |
| 3143 | * This interface allows access to lower level functions of the IOMMU |
| 3144 | * like protection domain handling and assignement of devices to domains |
| 3145 | * which is not possible with the dma_ops interface. |
| 3146 | * |
| 3147 | *****************************************************************************/ |
| 3148 | |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 3149 | static void cleanup_domain(struct protection_domain *domain) |
| 3150 | { |
Joerg Roedel | 9b29d3c | 2014-08-05 17:50:15 +0200 | [diff] [blame] | 3151 | struct iommu_dev_data *entry; |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 3152 | unsigned long flags; |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 3153 | |
| 3154 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 3155 | |
Joerg Roedel | 9b29d3c | 2014-08-05 17:50:15 +0200 | [diff] [blame] | 3156 | while (!list_empty(&domain->dev_list)) { |
| 3157 | entry = list_first_entry(&domain->dev_list, |
| 3158 | struct iommu_dev_data, list); |
| 3159 | __detach_device(entry); |
| 3160 | atomic_set(&entry->bind, 0); |
Joerg Roedel | 492667d | 2009-11-27 13:25:47 +0100 | [diff] [blame] | 3161 | } |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 3162 | |
| 3163 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 3164 | } |
| 3165 | |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3166 | static void protection_domain_free(struct protection_domain *domain) |
| 3167 | { |
| 3168 | if (!domain) |
| 3169 | return; |
| 3170 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 3171 | del_domain_from_list(domain); |
| 3172 | |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3173 | if (domain->id) |
| 3174 | domain_id_free(domain->id); |
| 3175 | |
| 3176 | kfree(domain); |
| 3177 | } |
| 3178 | |
| 3179 | static struct protection_domain *protection_domain_alloc(void) |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3180 | { |
| 3181 | struct protection_domain *domain; |
| 3182 | |
| 3183 | domain = kzalloc(sizeof(*domain), GFP_KERNEL); |
| 3184 | if (!domain) |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3185 | return NULL; |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3186 | |
| 3187 | spin_lock_init(&domain->lock); |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3188 | mutex_init(&domain->api_lock); |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3189 | domain->id = domain_id_alloc(); |
| 3190 | if (!domain->id) |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3191 | goto out_err; |
Joerg Roedel | 7c392cb | 2009-11-26 11:13:32 +0100 | [diff] [blame] | 3192 | INIT_LIST_HEAD(&domain->dev_list); |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3193 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 3194 | add_domain_to_list(domain); |
| 3195 | |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3196 | return domain; |
| 3197 | |
| 3198 | out_err: |
| 3199 | kfree(domain); |
| 3200 | |
| 3201 | return NULL; |
| 3202 | } |
| 3203 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3204 | static int __init alloc_passthrough_domain(void) |
| 3205 | { |
| 3206 | if (pt_domain != NULL) |
| 3207 | return 0; |
| 3208 | |
| 3209 | /* allocate passthrough domain */ |
| 3210 | pt_domain = protection_domain_alloc(); |
| 3211 | if (!pt_domain) |
| 3212 | return -ENOMEM; |
| 3213 | |
| 3214 | pt_domain->mode = PAGE_MODE_NONE; |
| 3215 | |
| 3216 | return 0; |
| 3217 | } |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3218 | static int amd_iommu_domain_init(struct iommu_domain *dom) |
| 3219 | { |
| 3220 | struct protection_domain *domain; |
| 3221 | |
| 3222 | domain = protection_domain_alloc(); |
| 3223 | if (!domain) |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3224 | goto out_free; |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3225 | |
| 3226 | domain->mode = PAGE_MODE_3_LEVEL; |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3227 | domain->pt_root = (void *)get_zeroed_page(GFP_KERNEL); |
| 3228 | if (!domain->pt_root) |
| 3229 | goto out_free; |
| 3230 | |
Joerg Roedel | f3572db | 2011-11-23 12:36:25 +0100 | [diff] [blame] | 3231 | domain->iommu_domain = dom; |
| 3232 | |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3233 | dom->priv = domain; |
| 3234 | |
Joerg Roedel | 0ff64f8 | 2012-01-26 19:40:53 +0100 | [diff] [blame] | 3235 | dom->geometry.aperture_start = 0; |
| 3236 | dom->geometry.aperture_end = ~0ULL; |
| 3237 | dom->geometry.force_aperture = true; |
| 3238 | |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3239 | return 0; |
| 3240 | |
| 3241 | out_free: |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3242 | protection_domain_free(domain); |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3243 | |
| 3244 | return -ENOMEM; |
| 3245 | } |
| 3246 | |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 3247 | static void amd_iommu_domain_destroy(struct iommu_domain *dom) |
| 3248 | { |
| 3249 | struct protection_domain *domain = dom->priv; |
| 3250 | |
| 3251 | if (!domain) |
| 3252 | return; |
| 3253 | |
| 3254 | if (domain->dev_cnt > 0) |
| 3255 | cleanup_domain(domain); |
| 3256 | |
| 3257 | BUG_ON(domain->dev_cnt != 0); |
| 3258 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3259 | if (domain->mode != PAGE_MODE_NONE) |
| 3260 | free_pagetable(domain); |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 3261 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 3262 | if (domain->flags & PD_IOMMUV2_MASK) |
| 3263 | free_gcr3_table(domain); |
| 3264 | |
Joerg Roedel | 8b408fe | 2010-03-08 14:20:07 +0100 | [diff] [blame] | 3265 | protection_domain_free(domain); |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 3266 | |
| 3267 | dom->priv = NULL; |
| 3268 | } |
| 3269 | |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3270 | static void amd_iommu_detach_device(struct iommu_domain *dom, |
| 3271 | struct device *dev) |
| 3272 | { |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3273 | struct iommu_dev_data *dev_data = dev->archdata.iommu; |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3274 | struct amd_iommu *iommu; |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3275 | u16 devid; |
| 3276 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3277 | if (!check_device(dev)) |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3278 | return; |
| 3279 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3280 | devid = get_device_id(dev); |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3281 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3282 | if (dev_data->domain != NULL) |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3283 | detach_device(dev); |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3284 | |
| 3285 | iommu = amd_iommu_rlookup_table[devid]; |
| 3286 | if (!iommu) |
| 3287 | return; |
| 3288 | |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3289 | iommu_completion_wait(iommu); |
| 3290 | } |
| 3291 | |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3292 | static int amd_iommu_attach_device(struct iommu_domain *dom, |
| 3293 | struct device *dev) |
| 3294 | { |
| 3295 | struct protection_domain *domain = dom->priv; |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3296 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3297 | struct amd_iommu *iommu; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3298 | int ret; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3299 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3300 | if (!check_device(dev)) |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3301 | return -EINVAL; |
| 3302 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3303 | dev_data = dev->archdata.iommu; |
| 3304 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 3305 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3306 | if (!iommu) |
| 3307 | return -EINVAL; |
| 3308 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3309 | if (dev_data->domain) |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3310 | detach_device(dev); |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3311 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3312 | ret = attach_device(dev, domain); |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3313 | |
| 3314 | iommu_completion_wait(iommu); |
| 3315 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3316 | return ret; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3317 | } |
| 3318 | |
Joerg Roedel | 468e236 | 2010-01-21 16:37:36 +0100 | [diff] [blame] | 3319 | static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova, |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3320 | phys_addr_t paddr, size_t page_size, int iommu_prot) |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3321 | { |
| 3322 | struct protection_domain *domain = dom->priv; |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3323 | int prot = 0; |
| 3324 | int ret; |
| 3325 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3326 | if (domain->mode == PAGE_MODE_NONE) |
| 3327 | return -EINVAL; |
| 3328 | |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3329 | if (iommu_prot & IOMMU_READ) |
| 3330 | prot |= IOMMU_PROT_IR; |
| 3331 | if (iommu_prot & IOMMU_WRITE) |
| 3332 | prot |= IOMMU_PROT_IW; |
| 3333 | |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3334 | mutex_lock(&domain->api_lock); |
Joerg Roedel | 795e74f | 2010-05-11 17:40:57 +0200 | [diff] [blame] | 3335 | ret = iommu_map_page(domain, iova, paddr, prot, page_size); |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3336 | mutex_unlock(&domain->api_lock); |
| 3337 | |
Joerg Roedel | 795e74f | 2010-05-11 17:40:57 +0200 | [diff] [blame] | 3338 | return ret; |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3339 | } |
| 3340 | |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3341 | static size_t amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova, |
| 3342 | size_t page_size) |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3343 | { |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3344 | struct protection_domain *domain = dom->priv; |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3345 | size_t unmap_size; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3346 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3347 | if (domain->mode == PAGE_MODE_NONE) |
| 3348 | return -EINVAL; |
| 3349 | |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3350 | mutex_lock(&domain->api_lock); |
Joerg Roedel | 468e236 | 2010-01-21 16:37:36 +0100 | [diff] [blame] | 3351 | unmap_size = iommu_unmap_page(domain, iova, page_size); |
Joerg Roedel | 795e74f | 2010-05-11 17:40:57 +0200 | [diff] [blame] | 3352 | mutex_unlock(&domain->api_lock); |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3353 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 3354 | domain_flush_tlb_pde(domain); |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3355 | |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3356 | return unmap_size; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3357 | } |
| 3358 | |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3359 | static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, |
Varun Sethi | bb5547ac | 2013-03-29 01:23:58 +0530 | [diff] [blame] | 3360 | dma_addr_t iova) |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3361 | { |
| 3362 | struct protection_domain *domain = dom->priv; |
Joerg Roedel | f03152b | 2010-01-21 16:15:24 +0100 | [diff] [blame] | 3363 | unsigned long offset_mask; |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3364 | phys_addr_t paddr; |
Joerg Roedel | f03152b | 2010-01-21 16:15:24 +0100 | [diff] [blame] | 3365 | u64 *pte, __pte; |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3366 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3367 | if (domain->mode == PAGE_MODE_NONE) |
| 3368 | return iova; |
| 3369 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 3370 | pte = fetch_pte(domain, iova); |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3371 | |
Joerg Roedel | a6d41a4 | 2009-09-02 17:08:55 +0200 | [diff] [blame] | 3372 | if (!pte || !IOMMU_PTE_PRESENT(*pte)) |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3373 | return 0; |
| 3374 | |
Joerg Roedel | f03152b | 2010-01-21 16:15:24 +0100 | [diff] [blame] | 3375 | if (PM_PTE_LEVEL(*pte) == 0) |
| 3376 | offset_mask = PAGE_SIZE - 1; |
| 3377 | else |
| 3378 | offset_mask = PTE_PAGE_SIZE(*pte) - 1; |
| 3379 | |
| 3380 | __pte = *pte & PM_ADDR_MASK; |
| 3381 | paddr = (__pte & ~offset_mask) | (iova & offset_mask); |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3382 | |
| 3383 | return paddr; |
| 3384 | } |
| 3385 | |
Joerg Roedel | ab63648 | 2014-09-05 10:48:21 +0200 | [diff] [blame] | 3386 | static bool amd_iommu_capable(enum iommu_cap cap) |
Sheng Yang | dbb9fd8 | 2009-03-18 15:33:06 +0800 | [diff] [blame] | 3387 | { |
Joerg Roedel | 80a506b | 2010-07-27 17:14:24 +0200 | [diff] [blame] | 3388 | switch (cap) { |
| 3389 | case IOMMU_CAP_CACHE_COHERENCY: |
Joerg Roedel | ab63648 | 2014-09-05 10:48:21 +0200 | [diff] [blame] | 3390 | return true; |
Joerg Roedel | bdddadc | 2012-07-02 18:38:13 +0200 | [diff] [blame] | 3391 | case IOMMU_CAP_INTR_REMAP: |
Joerg Roedel | ab63648 | 2014-09-05 10:48:21 +0200 | [diff] [blame] | 3392 | return (irq_remapping_enabled == 1); |
Joerg Roedel | 80a506b | 2010-07-27 17:14:24 +0200 | [diff] [blame] | 3393 | } |
| 3394 | |
Joerg Roedel | ab63648 | 2014-09-05 10:48:21 +0200 | [diff] [blame] | 3395 | return false; |
Sheng Yang | dbb9fd8 | 2009-03-18 15:33:06 +0800 | [diff] [blame] | 3396 | } |
| 3397 | |
Thierry Reding | b22f643 | 2014-06-27 09:03:12 +0200 | [diff] [blame] | 3398 | static const struct iommu_ops amd_iommu_ops = { |
Joerg Roedel | ab63648 | 2014-09-05 10:48:21 +0200 | [diff] [blame] | 3399 | .capable = amd_iommu_capable, |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 3400 | .domain_init = amd_iommu_domain_init, |
| 3401 | .domain_destroy = amd_iommu_domain_destroy, |
| 3402 | .attach_dev = amd_iommu_attach_device, |
| 3403 | .detach_dev = amd_iommu_detach_device, |
Joerg Roedel | 468e236 | 2010-01-21 16:37:36 +0100 | [diff] [blame] | 3404 | .map = amd_iommu_map, |
| 3405 | .unmap = amd_iommu_unmap, |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 3406 | .iova_to_phys = amd_iommu_iova_to_phys, |
Ohad Ben-Cohen | aa3de9c | 2011-11-10 11:32:29 +0200 | [diff] [blame] | 3407 | .pgsize_bitmap = AMD_IOMMU_PGSIZES, |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 3408 | }; |
| 3409 | |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3410 | /***************************************************************************** |
| 3411 | * |
| 3412 | * The next functions do a basic initialization of IOMMU for pass through |
| 3413 | * mode |
| 3414 | * |
| 3415 | * In passthrough mode the IOMMU is initialized and enabled but not used for |
| 3416 | * DMA-API translation. |
| 3417 | * |
| 3418 | *****************************************************************************/ |
| 3419 | |
| 3420 | int __init amd_iommu_init_passthrough(void) |
| 3421 | { |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3422 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3423 | struct pci_dev *dev = NULL; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3424 | int ret; |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3425 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3426 | ret = alloc_passthrough_domain(); |
| 3427 | if (ret) |
| 3428 | return ret; |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3429 | |
Kulikov Vasiliy | 6c54aab | 2010-07-03 12:03:51 -0400 | [diff] [blame] | 3430 | for_each_pci_dev(dev) { |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3431 | if (!check_device(&dev->dev)) |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3432 | continue; |
| 3433 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3434 | dev_data = get_dev_data(&dev->dev); |
| 3435 | dev_data->passthrough = true; |
| 3436 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3437 | attach_device(&dev->dev, pt_domain); |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3438 | } |
| 3439 | |
Joerg Roedel | 2655d7a | 2011-12-22 12:35:38 +0100 | [diff] [blame] | 3440 | amd_iommu_stats_init(); |
| 3441 | |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3442 | pr_info("AMD-Vi: Initialized for Passthrough Mode\n"); |
| 3443 | |
| 3444 | return 0; |
| 3445 | } |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 3446 | |
| 3447 | /* IOMMUv2 specific functions */ |
| 3448 | int amd_iommu_register_ppr_notifier(struct notifier_block *nb) |
| 3449 | { |
| 3450 | return atomic_notifier_chain_register(&ppr_notifier, nb); |
| 3451 | } |
| 3452 | EXPORT_SYMBOL(amd_iommu_register_ppr_notifier); |
| 3453 | |
| 3454 | int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb) |
| 3455 | { |
| 3456 | return atomic_notifier_chain_unregister(&ppr_notifier, nb); |
| 3457 | } |
| 3458 | EXPORT_SYMBOL(amd_iommu_unregister_ppr_notifier); |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3459 | |
| 3460 | void amd_iommu_domain_direct_map(struct iommu_domain *dom) |
| 3461 | { |
| 3462 | struct protection_domain *domain = dom->priv; |
| 3463 | unsigned long flags; |
| 3464 | |
| 3465 | spin_lock_irqsave(&domain->lock, flags); |
| 3466 | |
| 3467 | /* Update data structure */ |
| 3468 | domain->mode = PAGE_MODE_NONE; |
| 3469 | domain->updated = true; |
| 3470 | |
| 3471 | /* Make changes visible to IOMMUs */ |
| 3472 | update_domain(domain); |
| 3473 | |
| 3474 | /* Page-table is not visible to IOMMU anymore, so free it */ |
| 3475 | free_pagetable(domain); |
| 3476 | |
| 3477 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3478 | } |
| 3479 | EXPORT_SYMBOL(amd_iommu_domain_direct_map); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 3480 | |
| 3481 | int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids) |
| 3482 | { |
| 3483 | struct protection_domain *domain = dom->priv; |
| 3484 | unsigned long flags; |
| 3485 | int levels, ret; |
| 3486 | |
| 3487 | if (pasids <= 0 || pasids > (PASID_MASK + 1)) |
| 3488 | return -EINVAL; |
| 3489 | |
| 3490 | /* Number of GCR3 table levels required */ |
| 3491 | for (levels = 0; (pasids - 1) & ~0x1ff; pasids >>= 9) |
| 3492 | levels += 1; |
| 3493 | |
| 3494 | if (levels > amd_iommu_max_glx_val) |
| 3495 | return -EINVAL; |
| 3496 | |
| 3497 | spin_lock_irqsave(&domain->lock, flags); |
| 3498 | |
| 3499 | /* |
| 3500 | * Save us all sanity checks whether devices already in the |
| 3501 | * domain support IOMMUv2. Just force that the domain has no |
| 3502 | * devices attached when it is switched into IOMMUv2 mode. |
| 3503 | */ |
| 3504 | ret = -EBUSY; |
| 3505 | if (domain->dev_cnt > 0 || domain->flags & PD_IOMMUV2_MASK) |
| 3506 | goto out; |
| 3507 | |
| 3508 | ret = -ENOMEM; |
| 3509 | domain->gcr3_tbl = (void *)get_zeroed_page(GFP_ATOMIC); |
| 3510 | if (domain->gcr3_tbl == NULL) |
| 3511 | goto out; |
| 3512 | |
| 3513 | domain->glx = levels; |
| 3514 | domain->flags |= PD_IOMMUV2_MASK; |
| 3515 | domain->updated = true; |
| 3516 | |
| 3517 | update_domain(domain); |
| 3518 | |
| 3519 | ret = 0; |
| 3520 | |
| 3521 | out: |
| 3522 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3523 | |
| 3524 | return ret; |
| 3525 | } |
| 3526 | EXPORT_SYMBOL(amd_iommu_domain_enable_v2); |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3527 | |
| 3528 | static int __flush_pasid(struct protection_domain *domain, int pasid, |
| 3529 | u64 address, bool size) |
| 3530 | { |
| 3531 | struct iommu_dev_data *dev_data; |
| 3532 | struct iommu_cmd cmd; |
| 3533 | int i, ret; |
| 3534 | |
| 3535 | if (!(domain->flags & PD_IOMMUV2_MASK)) |
| 3536 | return -EINVAL; |
| 3537 | |
| 3538 | build_inv_iommu_pasid(&cmd, domain->id, pasid, address, size); |
| 3539 | |
| 3540 | /* |
| 3541 | * IOMMU TLB needs to be flushed before Device TLB to |
| 3542 | * prevent device TLB refill from IOMMU TLB |
| 3543 | */ |
| 3544 | for (i = 0; i < amd_iommus_present; ++i) { |
| 3545 | if (domain->dev_iommu[i] == 0) |
| 3546 | continue; |
| 3547 | |
| 3548 | ret = iommu_queue_command(amd_iommus[i], &cmd); |
| 3549 | if (ret != 0) |
| 3550 | goto out; |
| 3551 | } |
| 3552 | |
| 3553 | /* Wait until IOMMU TLB flushes are complete */ |
| 3554 | domain_flush_complete(domain); |
| 3555 | |
| 3556 | /* Now flush device TLBs */ |
| 3557 | list_for_each_entry(dev_data, &domain->dev_list, list) { |
| 3558 | struct amd_iommu *iommu; |
| 3559 | int qdep; |
| 3560 | |
| 3561 | BUG_ON(!dev_data->ats.enabled); |
| 3562 | |
| 3563 | qdep = dev_data->ats.qdep; |
| 3564 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 3565 | |
| 3566 | build_inv_iotlb_pasid(&cmd, dev_data->devid, pasid, |
| 3567 | qdep, address, size); |
| 3568 | |
| 3569 | ret = iommu_queue_command(iommu, &cmd); |
| 3570 | if (ret != 0) |
| 3571 | goto out; |
| 3572 | } |
| 3573 | |
| 3574 | /* Wait until all device TLBs are flushed */ |
| 3575 | domain_flush_complete(domain); |
| 3576 | |
| 3577 | ret = 0; |
| 3578 | |
| 3579 | out: |
| 3580 | |
| 3581 | return ret; |
| 3582 | } |
| 3583 | |
| 3584 | static int __amd_iommu_flush_page(struct protection_domain *domain, int pasid, |
| 3585 | u64 address) |
| 3586 | { |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 3587 | INC_STATS_COUNTER(invalidate_iotlb); |
| 3588 | |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3589 | return __flush_pasid(domain, pasid, address, false); |
| 3590 | } |
| 3591 | |
| 3592 | int amd_iommu_flush_page(struct iommu_domain *dom, int pasid, |
| 3593 | u64 address) |
| 3594 | { |
| 3595 | struct protection_domain *domain = dom->priv; |
| 3596 | unsigned long flags; |
| 3597 | int ret; |
| 3598 | |
| 3599 | spin_lock_irqsave(&domain->lock, flags); |
| 3600 | ret = __amd_iommu_flush_page(domain, pasid, address); |
| 3601 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3602 | |
| 3603 | return ret; |
| 3604 | } |
| 3605 | EXPORT_SYMBOL(amd_iommu_flush_page); |
| 3606 | |
| 3607 | static int __amd_iommu_flush_tlb(struct protection_domain *domain, int pasid) |
| 3608 | { |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 3609 | INC_STATS_COUNTER(invalidate_iotlb_all); |
| 3610 | |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3611 | return __flush_pasid(domain, pasid, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, |
| 3612 | true); |
| 3613 | } |
| 3614 | |
| 3615 | int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid) |
| 3616 | { |
| 3617 | struct protection_domain *domain = dom->priv; |
| 3618 | unsigned long flags; |
| 3619 | int ret; |
| 3620 | |
| 3621 | spin_lock_irqsave(&domain->lock, flags); |
| 3622 | ret = __amd_iommu_flush_tlb(domain, pasid); |
| 3623 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3624 | |
| 3625 | return ret; |
| 3626 | } |
| 3627 | EXPORT_SYMBOL(amd_iommu_flush_tlb); |
| 3628 | |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 3629 | static u64 *__get_gcr3_pte(u64 *root, int level, int pasid, bool alloc) |
| 3630 | { |
| 3631 | int index; |
| 3632 | u64 *pte; |
| 3633 | |
| 3634 | while (true) { |
| 3635 | |
| 3636 | index = (pasid >> (9 * level)) & 0x1ff; |
| 3637 | pte = &root[index]; |
| 3638 | |
| 3639 | if (level == 0) |
| 3640 | break; |
| 3641 | |
| 3642 | if (!(*pte & GCR3_VALID)) { |
| 3643 | if (!alloc) |
| 3644 | return NULL; |
| 3645 | |
| 3646 | root = (void *)get_zeroed_page(GFP_ATOMIC); |
| 3647 | if (root == NULL) |
| 3648 | return NULL; |
| 3649 | |
| 3650 | *pte = __pa(root) | GCR3_VALID; |
| 3651 | } |
| 3652 | |
| 3653 | root = __va(*pte & PAGE_MASK); |
| 3654 | |
| 3655 | level -= 1; |
| 3656 | } |
| 3657 | |
| 3658 | return pte; |
| 3659 | } |
| 3660 | |
| 3661 | static int __set_gcr3(struct protection_domain *domain, int pasid, |
| 3662 | unsigned long cr3) |
| 3663 | { |
| 3664 | u64 *pte; |
| 3665 | |
| 3666 | if (domain->mode != PAGE_MODE_NONE) |
| 3667 | return -EINVAL; |
| 3668 | |
| 3669 | pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, true); |
| 3670 | if (pte == NULL) |
| 3671 | return -ENOMEM; |
| 3672 | |
| 3673 | *pte = (cr3 & PAGE_MASK) | GCR3_VALID; |
| 3674 | |
| 3675 | return __amd_iommu_flush_tlb(domain, pasid); |
| 3676 | } |
| 3677 | |
| 3678 | static int __clear_gcr3(struct protection_domain *domain, int pasid) |
| 3679 | { |
| 3680 | u64 *pte; |
| 3681 | |
| 3682 | if (domain->mode != PAGE_MODE_NONE) |
| 3683 | return -EINVAL; |
| 3684 | |
| 3685 | pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, false); |
| 3686 | if (pte == NULL) |
| 3687 | return 0; |
| 3688 | |
| 3689 | *pte = 0; |
| 3690 | |
| 3691 | return __amd_iommu_flush_tlb(domain, pasid); |
| 3692 | } |
| 3693 | |
| 3694 | int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid, |
| 3695 | unsigned long cr3) |
| 3696 | { |
| 3697 | struct protection_domain *domain = dom->priv; |
| 3698 | unsigned long flags; |
| 3699 | int ret; |
| 3700 | |
| 3701 | spin_lock_irqsave(&domain->lock, flags); |
| 3702 | ret = __set_gcr3(domain, pasid, cr3); |
| 3703 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3704 | |
| 3705 | return ret; |
| 3706 | } |
| 3707 | EXPORT_SYMBOL(amd_iommu_domain_set_gcr3); |
| 3708 | |
| 3709 | int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid) |
| 3710 | { |
| 3711 | struct protection_domain *domain = dom->priv; |
| 3712 | unsigned long flags; |
| 3713 | int ret; |
| 3714 | |
| 3715 | spin_lock_irqsave(&domain->lock, flags); |
| 3716 | ret = __clear_gcr3(domain, pasid); |
| 3717 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3718 | |
| 3719 | return ret; |
| 3720 | } |
| 3721 | EXPORT_SYMBOL(amd_iommu_domain_clear_gcr3); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 3722 | |
| 3723 | int amd_iommu_complete_ppr(struct pci_dev *pdev, int pasid, |
| 3724 | int status, int tag) |
| 3725 | { |
| 3726 | struct iommu_dev_data *dev_data; |
| 3727 | struct amd_iommu *iommu; |
| 3728 | struct iommu_cmd cmd; |
| 3729 | |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 3730 | INC_STATS_COUNTER(complete_ppr); |
| 3731 | |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 3732 | dev_data = get_dev_data(&pdev->dev); |
| 3733 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 3734 | |
| 3735 | build_complete_ppr(&cmd, dev_data->devid, pasid, status, |
| 3736 | tag, dev_data->pri_tlp); |
| 3737 | |
| 3738 | return iommu_queue_command(iommu, &cmd); |
| 3739 | } |
| 3740 | EXPORT_SYMBOL(amd_iommu_complete_ppr); |
Joerg Roedel | f3572db | 2011-11-23 12:36:25 +0100 | [diff] [blame] | 3741 | |
| 3742 | struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev) |
| 3743 | { |
| 3744 | struct protection_domain *domain; |
| 3745 | |
| 3746 | domain = get_domain(&pdev->dev); |
| 3747 | if (IS_ERR(domain)) |
| 3748 | return NULL; |
| 3749 | |
| 3750 | /* Only return IOMMUv2 domains */ |
| 3751 | if (!(domain->flags & PD_IOMMUV2_MASK)) |
| 3752 | return NULL; |
| 3753 | |
| 3754 | return domain->iommu_domain; |
| 3755 | } |
| 3756 | EXPORT_SYMBOL(amd_iommu_get_v2_domain); |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 3757 | |
| 3758 | void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum) |
| 3759 | { |
| 3760 | struct iommu_dev_data *dev_data; |
| 3761 | |
| 3762 | if (!amd_iommu_v2_supported()) |
| 3763 | return; |
| 3764 | |
| 3765 | dev_data = get_dev_data(&pdev->dev); |
| 3766 | dev_data->errata |= (1 << erratum); |
| 3767 | } |
| 3768 | EXPORT_SYMBOL(amd_iommu_enable_device_erratum); |
Joerg Roedel | 52efdb8 | 2011-12-07 12:01:36 +0100 | [diff] [blame] | 3769 | |
| 3770 | int amd_iommu_device_info(struct pci_dev *pdev, |
| 3771 | struct amd_iommu_device_info *info) |
| 3772 | { |
| 3773 | int max_pasids; |
| 3774 | int pos; |
| 3775 | |
| 3776 | if (pdev == NULL || info == NULL) |
| 3777 | return -EINVAL; |
| 3778 | |
| 3779 | if (!amd_iommu_v2_supported()) |
| 3780 | return -EINVAL; |
| 3781 | |
| 3782 | memset(info, 0, sizeof(*info)); |
| 3783 | |
| 3784 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ATS); |
| 3785 | if (pos) |
| 3786 | info->flags |= AMD_IOMMU_DEVICE_FLAG_ATS_SUP; |
| 3787 | |
| 3788 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
| 3789 | if (pos) |
| 3790 | info->flags |= AMD_IOMMU_DEVICE_FLAG_PRI_SUP; |
| 3791 | |
| 3792 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID); |
| 3793 | if (pos) { |
| 3794 | int features; |
| 3795 | |
| 3796 | max_pasids = 1 << (9 * (amd_iommu_max_glx_val + 1)); |
| 3797 | max_pasids = min(max_pasids, (1 << 20)); |
| 3798 | |
| 3799 | info->flags |= AMD_IOMMU_DEVICE_FLAG_PASID_SUP; |
| 3800 | info->max_pasids = min(pci_max_pasids(pdev), max_pasids); |
| 3801 | |
| 3802 | features = pci_pasid_features(pdev); |
| 3803 | if (features & PCI_PASID_CAP_EXEC) |
| 3804 | info->flags |= AMD_IOMMU_DEVICE_FLAG_EXEC_SUP; |
| 3805 | if (features & PCI_PASID_CAP_PRIV) |
| 3806 | info->flags |= AMD_IOMMU_DEVICE_FLAG_PRIV_SUP; |
| 3807 | } |
| 3808 | |
| 3809 | return 0; |
| 3810 | } |
| 3811 | EXPORT_SYMBOL(amd_iommu_device_info); |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3812 | |
| 3813 | #ifdef CONFIG_IRQ_REMAP |
| 3814 | |
| 3815 | /***************************************************************************** |
| 3816 | * |
| 3817 | * Interrupt Remapping Implementation |
| 3818 | * |
| 3819 | *****************************************************************************/ |
| 3820 | |
| 3821 | union irte { |
| 3822 | u32 val; |
| 3823 | struct { |
| 3824 | u32 valid : 1, |
| 3825 | no_fault : 1, |
| 3826 | int_type : 3, |
| 3827 | rq_eoi : 1, |
| 3828 | dm : 1, |
| 3829 | rsvd_1 : 1, |
| 3830 | destination : 8, |
| 3831 | vector : 8, |
| 3832 | rsvd_2 : 8; |
| 3833 | } fields; |
| 3834 | }; |
| 3835 | |
| 3836 | #define DTE_IRQ_PHYS_ADDR_MASK (((1ULL << 45)-1) << 6) |
| 3837 | #define DTE_IRQ_REMAP_INTCTL (2ULL << 60) |
| 3838 | #define DTE_IRQ_TABLE_LEN (8ULL << 1) |
| 3839 | #define DTE_IRQ_REMAP_ENABLE 1ULL |
| 3840 | |
| 3841 | static void set_dte_irq_entry(u16 devid, struct irq_remap_table *table) |
| 3842 | { |
| 3843 | u64 dte; |
| 3844 | |
| 3845 | dte = amd_iommu_dev_table[devid].data[2]; |
| 3846 | dte &= ~DTE_IRQ_PHYS_ADDR_MASK; |
| 3847 | dte |= virt_to_phys(table->table); |
| 3848 | dte |= DTE_IRQ_REMAP_INTCTL; |
| 3849 | dte |= DTE_IRQ_TABLE_LEN; |
| 3850 | dte |= DTE_IRQ_REMAP_ENABLE; |
| 3851 | |
| 3852 | amd_iommu_dev_table[devid].data[2] = dte; |
| 3853 | } |
| 3854 | |
| 3855 | #define IRTE_ALLOCATED (~1U) |
| 3856 | |
| 3857 | static struct irq_remap_table *get_irq_table(u16 devid, bool ioapic) |
| 3858 | { |
| 3859 | struct irq_remap_table *table = NULL; |
| 3860 | struct amd_iommu *iommu; |
| 3861 | unsigned long flags; |
| 3862 | u16 alias; |
| 3863 | |
| 3864 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 3865 | |
| 3866 | iommu = amd_iommu_rlookup_table[devid]; |
| 3867 | if (!iommu) |
| 3868 | goto out_unlock; |
| 3869 | |
| 3870 | table = irq_lookup_table[devid]; |
| 3871 | if (table) |
| 3872 | goto out; |
| 3873 | |
| 3874 | alias = amd_iommu_alias_table[devid]; |
| 3875 | table = irq_lookup_table[alias]; |
| 3876 | if (table) { |
| 3877 | irq_lookup_table[devid] = table; |
| 3878 | set_dte_irq_entry(devid, table); |
| 3879 | iommu_flush_dte(iommu, devid); |
| 3880 | goto out; |
| 3881 | } |
| 3882 | |
| 3883 | /* Nothing there yet, allocate new irq remapping table */ |
| 3884 | table = kzalloc(sizeof(*table), GFP_ATOMIC); |
| 3885 | if (!table) |
| 3886 | goto out; |
| 3887 | |
Joerg Roedel | 197887f | 2013-04-09 21:14:08 +0200 | [diff] [blame] | 3888 | /* Initialize table spin-lock */ |
| 3889 | spin_lock_init(&table->lock); |
| 3890 | |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3891 | if (ioapic) |
| 3892 | /* Keep the first 32 indexes free for IOAPIC interrupts */ |
| 3893 | table->min_index = 32; |
| 3894 | |
| 3895 | table->table = kmem_cache_alloc(amd_iommu_irq_cache, GFP_ATOMIC); |
| 3896 | if (!table->table) { |
| 3897 | kfree(table); |
Dan Carpenter | 821f0f6 | 2012-10-02 11:34:40 +0300 | [diff] [blame] | 3898 | table = NULL; |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3899 | goto out; |
| 3900 | } |
| 3901 | |
| 3902 | memset(table->table, 0, MAX_IRQS_PER_TABLE * sizeof(u32)); |
| 3903 | |
| 3904 | if (ioapic) { |
| 3905 | int i; |
| 3906 | |
| 3907 | for (i = 0; i < 32; ++i) |
| 3908 | table->table[i] = IRTE_ALLOCATED; |
| 3909 | } |
| 3910 | |
| 3911 | irq_lookup_table[devid] = table; |
| 3912 | set_dte_irq_entry(devid, table); |
| 3913 | iommu_flush_dte(iommu, devid); |
| 3914 | if (devid != alias) { |
| 3915 | irq_lookup_table[alias] = table; |
Alex Williamson | e028a9e | 2014-04-22 10:08:40 -0600 | [diff] [blame] | 3916 | set_dte_irq_entry(alias, table); |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3917 | iommu_flush_dte(iommu, alias); |
| 3918 | } |
| 3919 | |
| 3920 | out: |
| 3921 | iommu_completion_wait(iommu); |
| 3922 | |
| 3923 | out_unlock: |
| 3924 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 3925 | |
| 3926 | return table; |
| 3927 | } |
| 3928 | |
| 3929 | static int alloc_irq_index(struct irq_cfg *cfg, u16 devid, int count) |
| 3930 | { |
| 3931 | struct irq_remap_table *table; |
| 3932 | unsigned long flags; |
| 3933 | int index, c; |
| 3934 | |
| 3935 | table = get_irq_table(devid, false); |
| 3936 | if (!table) |
| 3937 | return -ENODEV; |
| 3938 | |
| 3939 | spin_lock_irqsave(&table->lock, flags); |
| 3940 | |
| 3941 | /* Scan table for free entries */ |
| 3942 | for (c = 0, index = table->min_index; |
| 3943 | index < MAX_IRQS_PER_TABLE; |
| 3944 | ++index) { |
| 3945 | if (table->table[index] == 0) |
| 3946 | c += 1; |
| 3947 | else |
| 3948 | c = 0; |
| 3949 | |
| 3950 | if (c == count) { |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 3951 | struct irq_2_irte *irte_info; |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3952 | |
| 3953 | for (; c != 0; --c) |
| 3954 | table->table[index - c + 1] = IRTE_ALLOCATED; |
| 3955 | |
| 3956 | index -= count - 1; |
| 3957 | |
Joerg Roedel | 9b1b0e4 | 2012-09-26 12:44:45 +0200 | [diff] [blame] | 3958 | cfg->remapped = 1; |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 3959 | irte_info = &cfg->irq_2_irte; |
| 3960 | irte_info->devid = devid; |
| 3961 | irte_info->index = index; |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3962 | |
| 3963 | goto out; |
| 3964 | } |
| 3965 | } |
| 3966 | |
| 3967 | index = -ENOSPC; |
| 3968 | |
| 3969 | out: |
| 3970 | spin_unlock_irqrestore(&table->lock, flags); |
| 3971 | |
| 3972 | return index; |
| 3973 | } |
| 3974 | |
| 3975 | static int get_irte(u16 devid, int index, union irte *irte) |
| 3976 | { |
| 3977 | struct irq_remap_table *table; |
| 3978 | unsigned long flags; |
| 3979 | |
| 3980 | table = get_irq_table(devid, false); |
| 3981 | if (!table) |
| 3982 | return -ENOMEM; |
| 3983 | |
| 3984 | spin_lock_irqsave(&table->lock, flags); |
| 3985 | irte->val = table->table[index]; |
| 3986 | spin_unlock_irqrestore(&table->lock, flags); |
| 3987 | |
| 3988 | return 0; |
| 3989 | } |
| 3990 | |
| 3991 | static int modify_irte(u16 devid, int index, union irte irte) |
| 3992 | { |
| 3993 | struct irq_remap_table *table; |
| 3994 | struct amd_iommu *iommu; |
| 3995 | unsigned long flags; |
| 3996 | |
| 3997 | iommu = amd_iommu_rlookup_table[devid]; |
| 3998 | if (iommu == NULL) |
| 3999 | return -EINVAL; |
| 4000 | |
| 4001 | table = get_irq_table(devid, false); |
| 4002 | if (!table) |
| 4003 | return -ENOMEM; |
| 4004 | |
| 4005 | spin_lock_irqsave(&table->lock, flags); |
| 4006 | table->table[index] = irte.val; |
| 4007 | spin_unlock_irqrestore(&table->lock, flags); |
| 4008 | |
| 4009 | iommu_flush_irt(iommu, devid); |
| 4010 | iommu_completion_wait(iommu); |
| 4011 | |
| 4012 | return 0; |
| 4013 | } |
| 4014 | |
| 4015 | static void free_irte(u16 devid, int index) |
| 4016 | { |
| 4017 | struct irq_remap_table *table; |
| 4018 | struct amd_iommu *iommu; |
| 4019 | unsigned long flags; |
| 4020 | |
| 4021 | iommu = amd_iommu_rlookup_table[devid]; |
| 4022 | if (iommu == NULL) |
| 4023 | return; |
| 4024 | |
| 4025 | table = get_irq_table(devid, false); |
| 4026 | if (!table) |
| 4027 | return; |
| 4028 | |
| 4029 | spin_lock_irqsave(&table->lock, flags); |
| 4030 | table->table[index] = 0; |
| 4031 | spin_unlock_irqrestore(&table->lock, flags); |
| 4032 | |
| 4033 | iommu_flush_irt(iommu, devid); |
| 4034 | iommu_completion_wait(iommu); |
| 4035 | } |
| 4036 | |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4037 | static int setup_ioapic_entry(int irq, struct IO_APIC_route_entry *entry, |
| 4038 | unsigned int destination, int vector, |
| 4039 | struct io_apic_irq_attr *attr) |
| 4040 | { |
| 4041 | struct irq_remap_table *table; |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4042 | struct irq_2_irte *irte_info; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4043 | struct irq_cfg *cfg; |
| 4044 | union irte irte; |
| 4045 | int ioapic_id; |
| 4046 | int index; |
| 4047 | int devid; |
| 4048 | int ret; |
| 4049 | |
| 4050 | cfg = irq_get_chip_data(irq); |
| 4051 | if (!cfg) |
| 4052 | return -EINVAL; |
| 4053 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4054 | irte_info = &cfg->irq_2_irte; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4055 | ioapic_id = mpc_ioapic_id(attr->ioapic); |
| 4056 | devid = get_ioapic_devid(ioapic_id); |
| 4057 | |
| 4058 | if (devid < 0) |
| 4059 | return devid; |
| 4060 | |
| 4061 | table = get_irq_table(devid, true); |
| 4062 | if (table == NULL) |
| 4063 | return -ENOMEM; |
| 4064 | |
| 4065 | index = attr->ioapic_pin; |
| 4066 | |
| 4067 | /* Setup IRQ remapping info */ |
Joerg Roedel | 9b1b0e4 | 2012-09-26 12:44:45 +0200 | [diff] [blame] | 4068 | cfg->remapped = 1; |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4069 | irte_info->devid = devid; |
| 4070 | irte_info->index = index; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4071 | |
| 4072 | /* Setup IRTE for IOMMU */ |
| 4073 | irte.val = 0; |
| 4074 | irte.fields.vector = vector; |
| 4075 | irte.fields.int_type = apic->irq_delivery_mode; |
| 4076 | irte.fields.destination = destination; |
| 4077 | irte.fields.dm = apic->irq_dest_mode; |
| 4078 | irte.fields.valid = 1; |
| 4079 | |
| 4080 | ret = modify_irte(devid, index, irte); |
| 4081 | if (ret) |
| 4082 | return ret; |
| 4083 | |
| 4084 | /* Setup IOAPIC entry */ |
| 4085 | memset(entry, 0, sizeof(*entry)); |
| 4086 | |
| 4087 | entry->vector = index; |
| 4088 | entry->mask = 0; |
| 4089 | entry->trigger = attr->trigger; |
| 4090 | entry->polarity = attr->polarity; |
| 4091 | |
| 4092 | /* |
| 4093 | * Mask level triggered irqs. |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4094 | */ |
| 4095 | if (attr->trigger) |
| 4096 | entry->mask = 1; |
| 4097 | |
| 4098 | return 0; |
| 4099 | } |
| 4100 | |
| 4101 | static int set_affinity(struct irq_data *data, const struct cpumask *mask, |
| 4102 | bool force) |
| 4103 | { |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4104 | struct irq_2_irte *irte_info; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4105 | unsigned int dest, irq; |
| 4106 | struct irq_cfg *cfg; |
| 4107 | union irte irte; |
| 4108 | int err; |
| 4109 | |
| 4110 | if (!config_enabled(CONFIG_SMP)) |
| 4111 | return -1; |
| 4112 | |
| 4113 | cfg = data->chip_data; |
| 4114 | irq = data->irq; |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4115 | irte_info = &cfg->irq_2_irte; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4116 | |
| 4117 | if (!cpumask_intersects(mask, cpu_online_mask)) |
| 4118 | return -EINVAL; |
| 4119 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4120 | if (get_irte(irte_info->devid, irte_info->index, &irte)) |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4121 | return -EBUSY; |
| 4122 | |
| 4123 | if (assign_irq_vector(irq, cfg, mask)) |
| 4124 | return -EBUSY; |
| 4125 | |
| 4126 | err = apic->cpu_mask_to_apicid_and(cfg->domain, mask, &dest); |
| 4127 | if (err) { |
| 4128 | if (assign_irq_vector(irq, cfg, data->affinity)) |
| 4129 | pr_err("AMD-Vi: Failed to recover vector for irq %d\n", irq); |
| 4130 | return err; |
| 4131 | } |
| 4132 | |
| 4133 | irte.fields.vector = cfg->vector; |
| 4134 | irte.fields.destination = dest; |
| 4135 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4136 | modify_irte(irte_info->devid, irte_info->index, irte); |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4137 | |
| 4138 | if (cfg->move_in_progress) |
| 4139 | send_cleanup_vector(cfg); |
| 4140 | |
| 4141 | cpumask_copy(data->affinity, mask); |
| 4142 | |
| 4143 | return 0; |
| 4144 | } |
| 4145 | |
| 4146 | static int free_irq(int irq) |
| 4147 | { |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4148 | struct irq_2_irte *irte_info; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4149 | struct irq_cfg *cfg; |
| 4150 | |
| 4151 | cfg = irq_get_chip_data(irq); |
| 4152 | if (!cfg) |
| 4153 | return -EINVAL; |
| 4154 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4155 | irte_info = &cfg->irq_2_irte; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4156 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4157 | free_irte(irte_info->devid, irte_info->index); |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4158 | |
| 4159 | return 0; |
| 4160 | } |
| 4161 | |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4162 | static void compose_msi_msg(struct pci_dev *pdev, |
| 4163 | unsigned int irq, unsigned int dest, |
| 4164 | struct msi_msg *msg, u8 hpet_id) |
| 4165 | { |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4166 | struct irq_2_irte *irte_info; |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4167 | struct irq_cfg *cfg; |
| 4168 | union irte irte; |
| 4169 | |
| 4170 | cfg = irq_get_chip_data(irq); |
| 4171 | if (!cfg) |
| 4172 | return; |
| 4173 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4174 | irte_info = &cfg->irq_2_irte; |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4175 | |
| 4176 | irte.val = 0; |
| 4177 | irte.fields.vector = cfg->vector; |
| 4178 | irte.fields.int_type = apic->irq_delivery_mode; |
| 4179 | irte.fields.destination = dest; |
| 4180 | irte.fields.dm = apic->irq_dest_mode; |
| 4181 | irte.fields.valid = 1; |
| 4182 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4183 | modify_irte(irte_info->devid, irte_info->index, irte); |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4184 | |
| 4185 | msg->address_hi = MSI_ADDR_BASE_HI; |
| 4186 | msg->address_lo = MSI_ADDR_BASE_LO; |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4187 | msg->data = irte_info->index; |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4188 | } |
| 4189 | |
| 4190 | static int msi_alloc_irq(struct pci_dev *pdev, int irq, int nvec) |
| 4191 | { |
| 4192 | struct irq_cfg *cfg; |
| 4193 | int index; |
| 4194 | u16 devid; |
| 4195 | |
| 4196 | if (!pdev) |
| 4197 | return -EINVAL; |
| 4198 | |
| 4199 | cfg = irq_get_chip_data(irq); |
| 4200 | if (!cfg) |
| 4201 | return -EINVAL; |
| 4202 | |
| 4203 | devid = get_device_id(&pdev->dev); |
| 4204 | index = alloc_irq_index(cfg, devid, nvec); |
| 4205 | |
| 4206 | return index < 0 ? MAX_IRQS_PER_TABLE : index; |
| 4207 | } |
| 4208 | |
| 4209 | static int msi_setup_irq(struct pci_dev *pdev, unsigned int irq, |
| 4210 | int index, int offset) |
| 4211 | { |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4212 | struct irq_2_irte *irte_info; |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4213 | struct irq_cfg *cfg; |
| 4214 | u16 devid; |
| 4215 | |
| 4216 | if (!pdev) |
| 4217 | return -EINVAL; |
| 4218 | |
| 4219 | cfg = irq_get_chip_data(irq); |
| 4220 | if (!cfg) |
| 4221 | return -EINVAL; |
| 4222 | |
| 4223 | if (index >= MAX_IRQS_PER_TABLE) |
| 4224 | return 0; |
| 4225 | |
| 4226 | devid = get_device_id(&pdev->dev); |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4227 | irte_info = &cfg->irq_2_irte; |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4228 | |
Joerg Roedel | 9b1b0e4 | 2012-09-26 12:44:45 +0200 | [diff] [blame] | 4229 | cfg->remapped = 1; |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4230 | irte_info->devid = devid; |
| 4231 | irte_info->index = index + offset; |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4232 | |
| 4233 | return 0; |
| 4234 | } |
| 4235 | |
Yijing Wang | 5fc24d8 | 2014-09-17 17:32:19 +0800 | [diff] [blame^] | 4236 | static int alloc_hpet_msi(unsigned int irq, unsigned int id) |
Joerg Roedel | d976195 | 2012-06-26 16:00:08 +0200 | [diff] [blame] | 4237 | { |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4238 | struct irq_2_irte *irte_info; |
Joerg Roedel | d976195 | 2012-06-26 16:00:08 +0200 | [diff] [blame] | 4239 | struct irq_cfg *cfg; |
| 4240 | int index, devid; |
| 4241 | |
| 4242 | cfg = irq_get_chip_data(irq); |
| 4243 | if (!cfg) |
| 4244 | return -EINVAL; |
| 4245 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4246 | irte_info = &cfg->irq_2_irte; |
Joerg Roedel | d976195 | 2012-06-26 16:00:08 +0200 | [diff] [blame] | 4247 | devid = get_hpet_devid(id); |
| 4248 | if (devid < 0) |
| 4249 | return devid; |
| 4250 | |
| 4251 | index = alloc_irq_index(cfg, devid, 1); |
| 4252 | if (index < 0) |
| 4253 | return index; |
| 4254 | |
Joerg Roedel | 9b1b0e4 | 2012-09-26 12:44:45 +0200 | [diff] [blame] | 4255 | cfg->remapped = 1; |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4256 | irte_info->devid = devid; |
| 4257 | irte_info->index = index; |
Joerg Roedel | d976195 | 2012-06-26 16:00:08 +0200 | [diff] [blame] | 4258 | |
| 4259 | return 0; |
| 4260 | } |
| 4261 | |
Joerg Roedel | 6b474b8 | 2012-06-26 16:46:04 +0200 | [diff] [blame] | 4262 | struct irq_remap_ops amd_iommu_irq_ops = { |
| 4263 | .supported = amd_iommu_supported, |
| 4264 | .prepare = amd_iommu_prepare, |
| 4265 | .enable = amd_iommu_enable, |
| 4266 | .disable = amd_iommu_disable, |
| 4267 | .reenable = amd_iommu_reenable, |
| 4268 | .enable_faulting = amd_iommu_enable_faulting, |
| 4269 | .setup_ioapic_entry = setup_ioapic_entry, |
| 4270 | .set_affinity = set_affinity, |
| 4271 | .free_irq = free_irq, |
| 4272 | .compose_msi_msg = compose_msi_msg, |
| 4273 | .msi_alloc_irq = msi_alloc_irq, |
| 4274 | .msi_setup_irq = msi_setup_irq, |
Yijing Wang | 5fc24d8 | 2014-09-17 17:32:19 +0800 | [diff] [blame^] | 4275 | .alloc_hpet_msi = alloc_hpet_msi, |
Joerg Roedel | 6b474b8 | 2012-06-26 16:46:04 +0200 | [diff] [blame] | 4276 | }; |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 4277 | #endif |