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Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001/*
2 * Renesas SuperH DMA Engine support
3 *
4 * base is drivers/dma/flsdma.c
5 *
6 * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
7 * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
8 * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
9 *
10 * This is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * - DMA of SuperH does not have Hardware DMA chain mode.
16 * - MAX DMA size is 16MB.
17 *
18 */
19
20#include <linux/init.h>
21#include <linux/module.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090022#include <linux/slab.h>
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000023#include <linux/interrupt.h>
24#include <linux/dmaengine.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000027#include <linux/platform_device.h>
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +000028#include <linux/pm_runtime.h>
Magnus Dammb2623a62010-03-19 04:47:10 +000029#include <linux/sh_dma.h>
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +000030
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000031#include "shdma.h"
32
33/* DMA descriptor control */
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -070034enum sh_dmae_desc_status {
35 DESC_IDLE,
36 DESC_PREPARED,
37 DESC_SUBMITTED,
38 DESC_COMPLETED, /* completed, have to call callback */
39 DESC_WAITING, /* callback called, waiting for ack / re-submit */
40};
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000041
42#define NR_DESCS_PER_CHANNEL 32
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +000043/* Default MEMCPY transfer size = 2^2 = 4 bytes */
44#define LOG2_DEFAULT_XFER_SIZE 2
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000045
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +000046/* A bitmask with bits enough for enum sh_dmae_slave_chan_id */
Magnus Damm02ca5082010-03-19 04:46:47 +000047static unsigned long sh_dmae_slave_used[BITS_TO_LONGS(SH_DMA_SLAVE_NUMBER)];
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +000048
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -070049static void sh_dmae_chan_ld_cleanup(struct sh_dmae_chan *sh_chan, bool all);
50
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000051static void sh_dmae_writel(struct sh_dmae_chan *sh_dc, u32 data, u32 reg)
52{
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +000053 __raw_writel(data, sh_dc->base + reg / sizeof(u32));
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000054}
55
56static u32 sh_dmae_readl(struct sh_dmae_chan *sh_dc, u32 reg)
57{
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +000058 return __raw_readl(sh_dc->base + reg / sizeof(u32));
59}
60
61static u16 dmaor_read(struct sh_dmae_device *shdev)
62{
63 return __raw_readw(shdev->chan_reg + DMAOR / sizeof(u32));
64}
65
66static void dmaor_write(struct sh_dmae_device *shdev, u16 data)
67{
68 __raw_writew(data, shdev->chan_reg + DMAOR / sizeof(u32));
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000069}
70
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000071/*
72 * Reset DMA controller
73 *
74 * SH7780 has two DMAOR register
75 */
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +000076static void sh_dmae_ctl_stop(struct sh_dmae_device *shdev)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000077{
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +000078 unsigned short dmaor = dmaor_read(shdev);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000079
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +000080 dmaor_write(shdev, dmaor & ~(DMAOR_NMIF | DMAOR_AE | DMAOR_DME));
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000081}
82
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +000083static int sh_dmae_rst(struct sh_dmae_device *shdev)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000084{
85 unsigned short dmaor;
86
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +000087 sh_dmae_ctl_stop(shdev);
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +000088 dmaor = dmaor_read(shdev) | shdev->pdata->dmaor_init;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000089
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +000090 dmaor_write(shdev, dmaor);
91 if (dmaor_read(shdev) & (DMAOR_AE | DMAOR_NMIF)) {
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +000092 pr_warning("dma-sh: Can't initialize DMAOR.\n");
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000093 return -EINVAL;
94 }
95 return 0;
96}
97
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +000098static bool dmae_is_busy(struct sh_dmae_chan *sh_chan)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000099{
100 u32 chcr = sh_dmae_readl(sh_chan, CHCR);
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000101
102 if ((chcr & (CHCR_DE | CHCR_TE)) == CHCR_DE)
103 return true; /* working */
104
105 return false; /* waiting */
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000106}
107
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000108static unsigned int calc_xmit_shift(struct sh_dmae_chan *sh_chan, u32 chcr)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000109{
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000110 struct sh_dmae_device *shdev = container_of(sh_chan->common.device,
111 struct sh_dmae_device, common);
112 struct sh_dmae_pdata *pdata = shdev->pdata;
113 int cnt = ((chcr & pdata->ts_low_mask) >> pdata->ts_low_shift) |
114 ((chcr & pdata->ts_high_mask) >> pdata->ts_high_shift);
Guennadi Liakhovetski623b4ac2010-02-03 14:44:12 +0000115
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000116 if (cnt >= pdata->ts_shift_num)
117 cnt = 0;
118
119 return pdata->ts_shift[cnt];
120}
121
122static u32 log2size_to_chcr(struct sh_dmae_chan *sh_chan, int l2size)
123{
124 struct sh_dmae_device *shdev = container_of(sh_chan->common.device,
125 struct sh_dmae_device, common);
126 struct sh_dmae_pdata *pdata = shdev->pdata;
127 int i;
128
129 for (i = 0; i < pdata->ts_shift_num; i++)
130 if (pdata->ts_shift[i] == l2size)
131 break;
132
133 if (i == pdata->ts_shift_num)
134 i = 0;
135
136 return ((i << pdata->ts_low_shift) & pdata->ts_low_mask) |
137 ((i << pdata->ts_high_shift) & pdata->ts_high_mask);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000138}
139
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700140static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs *hw)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000141{
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700142 sh_dmae_writel(sh_chan, hw->sar, SAR);
143 sh_dmae_writel(sh_chan, hw->dar, DAR);
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000144 sh_dmae_writel(sh_chan, hw->tcr >> sh_chan->xmit_shift, TCR);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000145}
146
147static void dmae_start(struct sh_dmae_chan *sh_chan)
148{
149 u32 chcr = sh_dmae_readl(sh_chan, CHCR);
150
Guennadi Liakhovetski86d61b32009-12-10 18:35:07 +0100151 chcr |= CHCR_DE | CHCR_IE;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000152 sh_dmae_writel(sh_chan, chcr & ~CHCR_TE, CHCR);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000153}
154
155static void dmae_halt(struct sh_dmae_chan *sh_chan)
156{
157 u32 chcr = sh_dmae_readl(sh_chan, CHCR);
158
159 chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE);
160 sh_dmae_writel(sh_chan, chcr, CHCR);
161}
162
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000163static void dmae_init(struct sh_dmae_chan *sh_chan)
164{
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000165 /*
166 * Default configuration for dual address memory-memory transfer.
167 * 0x400 represents auto-request.
168 */
169 u32 chcr = DM_INC | SM_INC | 0x400 | log2size_to_chcr(sh_chan,
170 LOG2_DEFAULT_XFER_SIZE);
171 sh_chan->xmit_shift = calc_xmit_shift(sh_chan, chcr);
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000172 sh_dmae_writel(sh_chan, chcr, CHCR);
173}
174
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000175static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val)
176{
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000177 /* When DMA was working, can not set data to CHCR */
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000178 if (dmae_is_busy(sh_chan))
179 return -EBUSY;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000180
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000181 sh_chan->xmit_shift = calc_xmit_shift(sh_chan, val);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000182 sh_dmae_writel(sh_chan, val, CHCR);
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000183
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000184 return 0;
185}
186
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000187static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val)
188{
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000189 struct sh_dmae_device *shdev = container_of(sh_chan->common.device,
190 struct sh_dmae_device, common);
191 struct sh_dmae_pdata *pdata = shdev->pdata;
Guennadi Liakhovetski5bac9422010-04-21 15:36:49 +0000192 const struct sh_dmae_channel *chan_pdata = &pdata->channel[sh_chan->id];
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000193 u16 __iomem *addr = shdev->dmars + chan_pdata->dmars / sizeof(u16);
194 int shift = chan_pdata->dmars_bit;
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000195
196 if (dmae_is_busy(sh_chan))
197 return -EBUSY;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000198
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000199 __raw_writew((__raw_readw(addr) & (0xff00 >> shift)) | (val << shift),
200 addr);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000201
202 return 0;
203}
204
205static dma_cookie_t sh_dmae_tx_submit(struct dma_async_tx_descriptor *tx)
206{
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700207 struct sh_desc *desc = tx_to_sh_desc(tx), *chunk, *last = desc, *c;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000208 struct sh_dmae_chan *sh_chan = to_sh_chan(tx->chan);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700209 dma_async_tx_callback callback = tx->callback;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000210 dma_cookie_t cookie;
211
212 spin_lock_bh(&sh_chan->desc_lock);
213
214 cookie = sh_chan->common.cookie;
215 cookie++;
216 if (cookie < 0)
217 cookie = 1;
218
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700219 sh_chan->common.cookie = cookie;
220 tx->cookie = cookie;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000221
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700222 /* Mark all chunks of this descriptor as submitted, move to the queue */
223 list_for_each_entry_safe(chunk, c, desc->node.prev, node) {
224 /*
225 * All chunks are on the global ld_free, so, we have to find
226 * the end of the chain ourselves
227 */
228 if (chunk != desc && (chunk->mark == DESC_IDLE ||
229 chunk->async_tx.cookie > 0 ||
230 chunk->async_tx.cookie == -EBUSY ||
231 &chunk->node == &sh_chan->ld_free))
232 break;
233 chunk->mark = DESC_SUBMITTED;
234 /* Callback goes to the last chunk */
235 chunk->async_tx.callback = NULL;
236 chunk->cookie = cookie;
237 list_move_tail(&chunk->node, &sh_chan->ld_queue);
238 last = chunk;
239 }
240
241 last->async_tx.callback = callback;
242 last->async_tx.callback_param = tx->callback_param;
243
244 dev_dbg(sh_chan->dev, "submit #%d@%p on %d: %x[%d] -> %x\n",
245 tx->cookie, &last->async_tx, sh_chan->id,
246 desc->hw.sar, desc->hw.tcr, desc->hw.dar);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000247
248 spin_unlock_bh(&sh_chan->desc_lock);
249
250 return cookie;
251}
252
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700253/* Called with desc_lock held */
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000254static struct sh_desc *sh_dmae_get_desc(struct sh_dmae_chan *sh_chan)
255{
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700256 struct sh_desc *desc;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000257
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700258 list_for_each_entry(desc, &sh_chan->ld_free, node)
259 if (desc->mark != DESC_PREPARED) {
260 BUG_ON(desc->mark != DESC_IDLE);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000261 list_del(&desc->node);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700262 return desc;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000263 }
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000264
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700265 return NULL;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000266}
267
Guennadi Liakhovetski5bac9422010-04-21 15:36:49 +0000268static const struct sh_dmae_slave_config *sh_dmae_find_slave(
Magnus Damm4bab9d42010-03-19 04:46:38 +0000269 struct sh_dmae_chan *sh_chan, struct sh_dmae_slave *param)
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000270{
271 struct dma_device *dma_dev = sh_chan->common.device;
272 struct sh_dmae_device *shdev = container_of(dma_dev,
273 struct sh_dmae_device, common);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000274 struct sh_dmae_pdata *pdata = shdev->pdata;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000275 int i;
276
Magnus Damm02ca5082010-03-19 04:46:47 +0000277 if (param->slave_id >= SH_DMA_SLAVE_NUMBER)
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000278 return NULL;
279
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000280 for (i = 0; i < pdata->slave_num; i++)
Magnus Damm4bab9d42010-03-19 04:46:38 +0000281 if (pdata->slave[i].slave_id == param->slave_id)
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000282 return pdata->slave + i;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000283
284 return NULL;
285}
286
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000287static int sh_dmae_alloc_chan_resources(struct dma_chan *chan)
288{
289 struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
290 struct sh_desc *desc;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000291 struct sh_dmae_slave *param = chan->private;
Guennadi Liakhovetski83515bc2010-04-19 08:39:39 +0000292 int ret;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000293
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +0000294 pm_runtime_get_sync(sh_chan->dev);
295
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000296 /*
297 * This relies on the guarantee from dmaengine that alloc_chan_resources
298 * never runs concurrently with itself or free_chan_resources.
299 */
300 if (param) {
Guennadi Liakhovetski5bac9422010-04-21 15:36:49 +0000301 const struct sh_dmae_slave_config *cfg;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000302
Magnus Damm4bab9d42010-03-19 04:46:38 +0000303 cfg = sh_dmae_find_slave(sh_chan, param);
Guennadi Liakhovetski83515bc2010-04-19 08:39:39 +0000304 if (!cfg) {
305 ret = -EINVAL;
306 goto efindslave;
307 }
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000308
Guennadi Liakhovetski83515bc2010-04-19 08:39:39 +0000309 if (test_and_set_bit(param->slave_id, sh_dmae_slave_used)) {
310 ret = -EBUSY;
311 goto etestused;
312 }
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000313
314 param->config = cfg;
315
316 dmae_set_dmars(sh_chan, cfg->mid_rid);
317 dmae_set_chcr(sh_chan, cfg->chcr);
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000318 } else if ((sh_dmae_readl(sh_chan, CHCR) & 0xf00) != 0x400) {
319 dmae_init(sh_chan);
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000320 }
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000321
322 spin_lock_bh(&sh_chan->desc_lock);
323 while (sh_chan->descs_allocated < NR_DESCS_PER_CHANNEL) {
324 spin_unlock_bh(&sh_chan->desc_lock);
325 desc = kzalloc(sizeof(struct sh_desc), GFP_KERNEL);
326 if (!desc) {
327 spin_lock_bh(&sh_chan->desc_lock);
328 break;
329 }
330 dma_async_tx_descriptor_init(&desc->async_tx,
331 &sh_chan->common);
332 desc->async_tx.tx_submit = sh_dmae_tx_submit;
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700333 desc->mark = DESC_IDLE;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000334
335 spin_lock_bh(&sh_chan->desc_lock);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700336 list_add(&desc->node, &sh_chan->ld_free);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000337 sh_chan->descs_allocated++;
338 }
339 spin_unlock_bh(&sh_chan->desc_lock);
340
Guennadi Liakhovetski83515bc2010-04-19 08:39:39 +0000341 if (!sh_chan->descs_allocated) {
342 ret = -ENOMEM;
343 goto edescalloc;
344 }
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +0000345
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000346 return sh_chan->descs_allocated;
Guennadi Liakhovetski83515bc2010-04-19 08:39:39 +0000347
348edescalloc:
349 if (param)
350 clear_bit(param->slave_id, sh_dmae_slave_used);
351etestused:
352efindslave:
353 pm_runtime_put(sh_chan->dev);
354 return ret;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000355}
356
357/*
358 * sh_dma_free_chan_resources - Free all resources of the channel.
359 */
360static void sh_dmae_free_chan_resources(struct dma_chan *chan)
361{
362 struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
363 struct sh_desc *desc, *_desc;
364 LIST_HEAD(list);
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +0000365 int descs = sh_chan->descs_allocated;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000366
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000367 dmae_halt(sh_chan);
368
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700369 /* Prepared and not submitted descriptors can still be on the queue */
370 if (!list_empty(&sh_chan->ld_queue))
371 sh_dmae_chan_ld_cleanup(sh_chan, true);
372
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000373 if (chan->private) {
374 /* The caller is holding dma_list_mutex */
375 struct sh_dmae_slave *param = chan->private;
376 clear_bit(param->slave_id, sh_dmae_slave_used);
377 }
378
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000379 spin_lock_bh(&sh_chan->desc_lock);
380
381 list_splice_init(&sh_chan->ld_free, &list);
382 sh_chan->descs_allocated = 0;
383
384 spin_unlock_bh(&sh_chan->desc_lock);
385
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +0000386 if (descs > 0)
387 pm_runtime_put(sh_chan->dev);
388
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000389 list_for_each_entry_safe(desc, _desc, &list, node)
390 kfree(desc);
391}
392
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000393/**
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000394 * sh_dmae_add_desc - get, set up and return one transfer descriptor
395 * @sh_chan: DMA channel
396 * @flags: DMA transfer flags
397 * @dest: destination DMA address, incremented when direction equals
398 * DMA_FROM_DEVICE or DMA_BIDIRECTIONAL
399 * @src: source DMA address, incremented when direction equals
400 * DMA_TO_DEVICE or DMA_BIDIRECTIONAL
401 * @len: DMA transfer length
402 * @first: if NULL, set to the current descriptor and cookie set to -EBUSY
403 * @direction: needed for slave DMA to decide which address to keep constant,
404 * equals DMA_BIDIRECTIONAL for MEMCPY
405 * Returns 0 or an error
406 * Locks: called with desc_lock held
407 */
408static struct sh_desc *sh_dmae_add_desc(struct sh_dmae_chan *sh_chan,
409 unsigned long flags, dma_addr_t *dest, dma_addr_t *src, size_t *len,
410 struct sh_desc **first, enum dma_data_direction direction)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000411{
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000412 struct sh_desc *new;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000413 size_t copy_size;
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000414
415 if (!*len)
416 return NULL;
417
418 /* Allocate the link descriptor from the free list */
419 new = sh_dmae_get_desc(sh_chan);
420 if (!new) {
421 dev_err(sh_chan->dev, "No free link descriptor available\n");
422 return NULL;
423 }
424
425 copy_size = min(*len, (size_t)SH_DMA_TCR_MAX + 1);
426
427 new->hw.sar = *src;
428 new->hw.dar = *dest;
429 new->hw.tcr = copy_size;
430
431 if (!*first) {
432 /* First desc */
433 new->async_tx.cookie = -EBUSY;
434 *first = new;
435 } else {
436 /* Other desc - invisible to the user */
437 new->async_tx.cookie = -EINVAL;
438 }
439
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000440 dev_dbg(sh_chan->dev,
441 "chaining (%u/%u)@%x -> %x with %p, cookie %d, shift %d\n",
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000442 copy_size, *len, *src, *dest, &new->async_tx,
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000443 new->async_tx.cookie, sh_chan->xmit_shift);
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000444
445 new->mark = DESC_PREPARED;
446 new->async_tx.flags = flags;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000447 new->direction = direction;
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000448
449 *len -= copy_size;
450 if (direction == DMA_BIDIRECTIONAL || direction == DMA_TO_DEVICE)
451 *src += copy_size;
452 if (direction == DMA_BIDIRECTIONAL || direction == DMA_FROM_DEVICE)
453 *dest += copy_size;
454
455 return new;
456}
457
458/*
459 * sh_dmae_prep_sg - prepare transfer descriptors from an SG list
460 *
461 * Common routine for public (MEMCPY) and slave DMA. The MEMCPY case is also
462 * converted to scatter-gather to guarantee consistent locking and a correct
463 * list manipulation. For slave DMA direction carries the usual meaning, and,
464 * logically, the SG list is RAM and the addr variable contains slave address,
465 * e.g., the FIFO I/O register. For MEMCPY direction equals DMA_BIDIRECTIONAL
466 * and the SG list contains only one element and points at the source buffer.
467 */
468static struct dma_async_tx_descriptor *sh_dmae_prep_sg(struct sh_dmae_chan *sh_chan,
469 struct scatterlist *sgl, unsigned int sg_len, dma_addr_t *addr,
470 enum dma_data_direction direction, unsigned long flags)
471{
472 struct scatterlist *sg;
473 struct sh_desc *first = NULL, *new = NULL /* compiler... */;
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700474 LIST_HEAD(tx_list);
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000475 int chunks = 0;
476 int i;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000477
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000478 if (!sg_len)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000479 return NULL;
480
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000481 for_each_sg(sgl, sg, sg_len, i)
482 chunks += (sg_dma_len(sg) + SH_DMA_TCR_MAX) /
483 (SH_DMA_TCR_MAX + 1);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000484
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700485 /* Have to lock the whole loop to protect against concurrent release */
486 spin_lock_bh(&sh_chan->desc_lock);
487
488 /*
489 * Chaining:
490 * first descriptor is what user is dealing with in all API calls, its
491 * cookie is at first set to -EBUSY, at tx-submit to a positive
492 * number
493 * if more than one chunk is needed further chunks have cookie = -EINVAL
494 * the last chunk, if not equal to the first, has cookie = -ENOSPC
495 * all chunks are linked onto the tx_list head with their .node heads
496 * only during this function, then they are immediately spliced
497 * back onto the free list in form of a chain
498 */
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000499 for_each_sg(sgl, sg, sg_len, i) {
500 dma_addr_t sg_addr = sg_dma_address(sg);
501 size_t len = sg_dma_len(sg);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000502
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000503 if (!len)
504 goto err_get_desc;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000505
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000506 do {
507 dev_dbg(sh_chan->dev, "Add SG #%d@%p[%d], dma %llx\n",
508 i, sg, len, (unsigned long long)sg_addr);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000509
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000510 if (direction == DMA_FROM_DEVICE)
511 new = sh_dmae_add_desc(sh_chan, flags,
512 &sg_addr, addr, &len, &first,
513 direction);
514 else
515 new = sh_dmae_add_desc(sh_chan, flags,
516 addr, &sg_addr, &len, &first,
517 direction);
518 if (!new)
519 goto err_get_desc;
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700520
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000521 new->chunks = chunks--;
522 list_add_tail(&new->node, &tx_list);
523 } while (len);
524 }
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000525
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700526 if (new != first)
527 new->async_tx.cookie = -ENOSPC;
528
529 /* Put them back on the free list, so, they don't get lost */
530 list_splice_tail(&tx_list, &sh_chan->ld_free);
531
532 spin_unlock_bh(&sh_chan->desc_lock);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000533
534 return &first->async_tx;
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000535
536err_get_desc:
537 list_for_each_entry(new, &tx_list, node)
538 new->mark = DESC_IDLE;
539 list_splice(&tx_list, &sh_chan->ld_free);
540
541 spin_unlock_bh(&sh_chan->desc_lock);
542
543 return NULL;
544}
545
546static struct dma_async_tx_descriptor *sh_dmae_prep_memcpy(
547 struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t dma_src,
548 size_t len, unsigned long flags)
549{
550 struct sh_dmae_chan *sh_chan;
551 struct scatterlist sg;
552
553 if (!chan || !len)
554 return NULL;
555
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000556 chan->private = NULL;
557
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000558 sh_chan = to_sh_chan(chan);
559
560 sg_init_table(&sg, 1);
561 sg_set_page(&sg, pfn_to_page(PFN_DOWN(dma_src)), len,
562 offset_in_page(dma_src));
563 sg_dma_address(&sg) = dma_src;
564 sg_dma_len(&sg) = len;
565
566 return sh_dmae_prep_sg(sh_chan, &sg, 1, &dma_dest, DMA_BIDIRECTIONAL,
567 flags);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700568}
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000569
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000570static struct dma_async_tx_descriptor *sh_dmae_prep_slave_sg(
571 struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
572 enum dma_data_direction direction, unsigned long flags)
573{
574 struct sh_dmae_slave *param;
575 struct sh_dmae_chan *sh_chan;
Guennadi Liakhovetski5bac9422010-04-21 15:36:49 +0000576 dma_addr_t slave_addr;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000577
578 if (!chan)
579 return NULL;
580
581 sh_chan = to_sh_chan(chan);
582 param = chan->private;
Guennadi Liakhovetski5bac9422010-04-21 15:36:49 +0000583 slave_addr = param->config->addr;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000584
585 /* Someone calling slave DMA on a public channel? */
586 if (!param || !sg_len) {
587 dev_warn(sh_chan->dev, "%s: bad parameter: %p, %d, %d\n",
588 __func__, param, sg_len, param ? param->slave_id : -1);
589 return NULL;
590 }
591
592 /*
593 * if (param != NULL), this is a successfully requested slave channel,
594 * therefore param->config != NULL too.
595 */
Guennadi Liakhovetski5bac9422010-04-21 15:36:49 +0000596 return sh_dmae_prep_sg(sh_chan, sgl, sg_len, &slave_addr,
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000597 direction, flags);
598}
599
Linus Walleij05827632010-05-17 16:30:42 -0700600static int sh_dmae_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
601 unsigned long arg)
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000602{
603 struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
604
Linus Walleijc3635c72010-03-26 16:44:01 -0700605 /* Only supports DMA_TERMINATE_ALL */
606 if (cmd != DMA_TERMINATE_ALL)
607 return -ENXIO;
608
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000609 if (!chan)
Linus Walleijc3635c72010-03-26 16:44:01 -0700610 return -EINVAL;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000611
Guennadi Liakhovetskic0149062010-02-18 16:30:02 +0000612 dmae_halt(sh_chan);
613
614 spin_lock_bh(&sh_chan->desc_lock);
615 if (!list_empty(&sh_chan->ld_queue)) {
616 /* Record partial transfer */
617 struct sh_desc *desc = list_entry(sh_chan->ld_queue.next,
618 struct sh_desc, node);
619 desc->partial = (desc->hw.tcr - sh_dmae_readl(sh_chan, TCR)) <<
620 sh_chan->xmit_shift;
621
622 }
623 spin_unlock_bh(&sh_chan->desc_lock);
624
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000625 sh_dmae_chan_ld_cleanup(sh_chan, true);
Linus Walleijc3635c72010-03-26 16:44:01 -0700626
627 return 0;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000628}
629
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700630static dma_async_tx_callback __ld_cleanup(struct sh_dmae_chan *sh_chan, bool all)
631{
632 struct sh_desc *desc, *_desc;
633 /* Is the "exposed" head of a chain acked? */
634 bool head_acked = false;
635 dma_cookie_t cookie = 0;
636 dma_async_tx_callback callback = NULL;
637 void *param = NULL;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000638
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700639 spin_lock_bh(&sh_chan->desc_lock);
640 list_for_each_entry_safe(desc, _desc, &sh_chan->ld_queue, node) {
641 struct dma_async_tx_descriptor *tx = &desc->async_tx;
642
643 BUG_ON(tx->cookie > 0 && tx->cookie != desc->cookie);
644 BUG_ON(desc->mark != DESC_SUBMITTED &&
645 desc->mark != DESC_COMPLETED &&
646 desc->mark != DESC_WAITING);
647
648 /*
649 * queue is ordered, and we use this loop to (1) clean up all
650 * completed descriptors, and to (2) update descriptor flags of
651 * any chunks in a (partially) completed chain
652 */
653 if (!all && desc->mark == DESC_SUBMITTED &&
654 desc->cookie != cookie)
655 break;
656
657 if (tx->cookie > 0)
658 cookie = tx->cookie;
659
660 if (desc->mark == DESC_COMPLETED && desc->chunks == 1) {
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000661 if (sh_chan->completed_cookie != desc->cookie - 1)
662 dev_dbg(sh_chan->dev,
663 "Completing cookie %d, expected %d\n",
664 desc->cookie,
665 sh_chan->completed_cookie + 1);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700666 sh_chan->completed_cookie = desc->cookie;
667 }
668
669 /* Call callback on the last chunk */
670 if (desc->mark == DESC_COMPLETED && tx->callback) {
671 desc->mark = DESC_WAITING;
672 callback = tx->callback;
673 param = tx->callback_param;
674 dev_dbg(sh_chan->dev, "descriptor #%d@%p on %d callback\n",
675 tx->cookie, tx, sh_chan->id);
676 BUG_ON(desc->chunks != 1);
677 break;
678 }
679
680 if (tx->cookie > 0 || tx->cookie == -EBUSY) {
681 if (desc->mark == DESC_COMPLETED) {
682 BUG_ON(tx->cookie < 0);
683 desc->mark = DESC_WAITING;
684 }
685 head_acked = async_tx_test_ack(tx);
686 } else {
687 switch (desc->mark) {
688 case DESC_COMPLETED:
689 desc->mark = DESC_WAITING;
690 /* Fall through */
691 case DESC_WAITING:
692 if (head_acked)
693 async_tx_ack(&desc->async_tx);
694 }
695 }
696
697 dev_dbg(sh_chan->dev, "descriptor %p #%d completed.\n",
698 tx, tx->cookie);
699
700 if (((desc->mark == DESC_COMPLETED ||
701 desc->mark == DESC_WAITING) &&
702 async_tx_test_ack(&desc->async_tx)) || all) {
703 /* Remove from ld_queue list */
704 desc->mark = DESC_IDLE;
705 list_move(&desc->node, &sh_chan->ld_free);
706 }
707 }
708 spin_unlock_bh(&sh_chan->desc_lock);
709
710 if (callback)
711 callback(param);
712
713 return callback;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000714}
715
716/*
717 * sh_chan_ld_cleanup - Clean up link descriptors
718 *
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700719 * This function cleans up the ld_queue of DMA channel.
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000720 */
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700721static void sh_dmae_chan_ld_cleanup(struct sh_dmae_chan *sh_chan, bool all)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000722{
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700723 while (__ld_cleanup(sh_chan, all))
724 ;
Guennadi Liakhovetski9255f1d2010-05-21 15:30:12 +0000725
726 if (all)
727 /* Terminating - forgive uncompleted cookies */
728 sh_chan->completed_cookie = sh_chan->common.cookie;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000729}
730
731static void sh_chan_xfer_ld_queue(struct sh_dmae_chan *sh_chan)
732{
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000733 struct sh_desc *desc;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000734
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700735 spin_lock_bh(&sh_chan->desc_lock);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000736 /* DMA work check */
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700737 if (dmae_is_busy(sh_chan)) {
738 spin_unlock_bh(&sh_chan->desc_lock);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000739 return;
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700740 }
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000741
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000742 /* Find the first not transferred desciptor */
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000743 list_for_each_entry(desc, &sh_chan->ld_queue, node)
744 if (desc->mark == DESC_SUBMITTED) {
Guennadi Liakhovetskic0149062010-02-18 16:30:02 +0000745 dev_dbg(sh_chan->dev, "Queue #%d to %d: %u@%x -> %x\n",
746 desc->async_tx.cookie, sh_chan->id,
747 desc->hw.tcr, desc->hw.sar, desc->hw.dar);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700748 /* Get the ld start address from ld_queue */
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000749 dmae_set_reg(sh_chan, &desc->hw);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700750 dmae_start(sh_chan);
751 break;
752 }
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000753
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700754 spin_unlock_bh(&sh_chan->desc_lock);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000755}
756
757static void sh_dmae_memcpy_issue_pending(struct dma_chan *chan)
758{
759 struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
760 sh_chan_xfer_ld_queue(sh_chan);
761}
762
Linus Walleij07934482010-03-26 16:50:49 -0700763static enum dma_status sh_dmae_tx_status(struct dma_chan *chan,
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000764 dma_cookie_t cookie,
Linus Walleij07934482010-03-26 16:50:49 -0700765 struct dma_tx_state *txstate)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000766{
767 struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
768 dma_cookie_t last_used;
769 dma_cookie_t last_complete;
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000770 enum dma_status status;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000771
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700772 sh_dmae_chan_ld_cleanup(sh_chan, false);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000773
774 last_used = chan->cookie;
775 last_complete = sh_chan->completed_cookie;
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700776 BUG_ON(last_complete < 0);
Dan Williamsbca34692010-03-26 16:52:10 -0700777 dma_set_tx_state(txstate, last_complete, last_used, 0);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000778
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000779 spin_lock_bh(&sh_chan->desc_lock);
780
781 status = dma_async_is_complete(cookie, last_complete, last_used);
782
783 /*
784 * If we don't find cookie on the queue, it has been aborted and we have
785 * to report error
786 */
787 if (status != DMA_SUCCESS) {
788 struct sh_desc *desc;
789 status = DMA_ERROR;
790 list_for_each_entry(desc, &sh_chan->ld_queue, node)
791 if (desc->cookie == cookie) {
792 status = DMA_IN_PROGRESS;
793 break;
794 }
795 }
796
797 spin_unlock_bh(&sh_chan->desc_lock);
798
799 return status;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000800}
801
802static irqreturn_t sh_dmae_interrupt(int irq, void *data)
803{
804 irqreturn_t ret = IRQ_NONE;
805 struct sh_dmae_chan *sh_chan = (struct sh_dmae_chan *)data;
806 u32 chcr = sh_dmae_readl(sh_chan, CHCR);
807
808 if (chcr & CHCR_TE) {
809 /* DMA stop */
810 dmae_halt(sh_chan);
811
812 ret = IRQ_HANDLED;
813 tasklet_schedule(&sh_chan->tasklet);
814 }
815
816 return ret;
817}
818
819#if defined(CONFIG_CPU_SH4)
820static irqreturn_t sh_dmae_err(int irq, void *data)
821{
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000822 struct sh_dmae_device *shdev = (struct sh_dmae_device *)data;
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000823 int i;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000824
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000825 /* halt the dma controller */
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000826 sh_dmae_ctl_stop(shdev);
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000827
828 /* We cannot detect, which channel caused the error, have to reset all */
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000829 for (i = 0; i < SH_DMAC_MAX_CHANNELS; i++) {
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000830 struct sh_dmae_chan *sh_chan = shdev->chan[i];
831 if (sh_chan) {
832 struct sh_desc *desc;
833 /* Stop the channel */
834 dmae_halt(sh_chan);
835 /* Complete all */
836 list_for_each_entry(desc, &sh_chan->ld_queue, node) {
837 struct dma_async_tx_descriptor *tx = &desc->async_tx;
838 desc->mark = DESC_IDLE;
839 if (tx->callback)
840 tx->callback(tx->callback_param);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000841 }
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000842 list_splice_init(&sh_chan->ld_queue, &sh_chan->ld_free);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000843 }
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000844 }
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000845 sh_dmae_rst(shdev);
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000846
847 return IRQ_HANDLED;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000848}
849#endif
850
851static void dmae_do_tasklet(unsigned long data)
852{
853 struct sh_dmae_chan *sh_chan = (struct sh_dmae_chan *)data;
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700854 struct sh_desc *desc;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000855 u32 sar_buf = sh_dmae_readl(sh_chan, SAR);
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000856 u32 dar_buf = sh_dmae_readl(sh_chan, DAR);
Guennadi Liakhovetski86d61b32009-12-10 18:35:07 +0100857
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700858 spin_lock(&sh_chan->desc_lock);
859 list_for_each_entry(desc, &sh_chan->ld_queue, node) {
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000860 if (desc->mark == DESC_SUBMITTED &&
861 ((desc->direction == DMA_FROM_DEVICE &&
862 (desc->hw.dar + desc->hw.tcr) == dar_buf) ||
863 (desc->hw.sar + desc->hw.tcr) == sar_buf)) {
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700864 dev_dbg(sh_chan->dev, "done #%d@%p dst %u\n",
865 desc->async_tx.cookie, &desc->async_tx,
866 desc->hw.dar);
867 desc->mark = DESC_COMPLETED;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000868 break;
869 }
870 }
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700871 spin_unlock(&sh_chan->desc_lock);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000872
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000873 /* Next desc */
874 sh_chan_xfer_ld_queue(sh_chan);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700875 sh_dmae_chan_ld_cleanup(sh_chan, false);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000876}
877
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000878static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id,
879 int irq, unsigned long flags)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000880{
881 int err;
Guennadi Liakhovetski5bac9422010-04-21 15:36:49 +0000882 const struct sh_dmae_channel *chan_pdata = &shdev->pdata->channel[id];
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000883 struct platform_device *pdev = to_platform_device(shdev->common.dev);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000884 struct sh_dmae_chan *new_sh_chan;
885
886 /* alloc channel */
887 new_sh_chan = kzalloc(sizeof(struct sh_dmae_chan), GFP_KERNEL);
888 if (!new_sh_chan) {
Guennadi Liakhovetski86d61b32009-12-10 18:35:07 +0100889 dev_err(shdev->common.dev,
890 "No free memory for allocating dma channels!\n");
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000891 return -ENOMEM;
892 }
893
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000894 /* copy struct dma_device */
895 new_sh_chan->common.device = &shdev->common;
896
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000897 new_sh_chan->dev = shdev->common.dev;
898 new_sh_chan->id = id;
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000899 new_sh_chan->irq = irq;
900 new_sh_chan->base = shdev->chan_reg + chan_pdata->offset / sizeof(u32);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000901
902 /* Init DMA tasklet */
903 tasklet_init(&new_sh_chan->tasklet, dmae_do_tasklet,
904 (unsigned long)new_sh_chan);
905
906 /* Init the channel */
907 dmae_init(new_sh_chan);
908
909 spin_lock_init(&new_sh_chan->desc_lock);
910
911 /* Init descripter manage list */
912 INIT_LIST_HEAD(&new_sh_chan->ld_queue);
913 INIT_LIST_HEAD(&new_sh_chan->ld_free);
914
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000915 /* Add the channel to DMA device channel list */
916 list_add_tail(&new_sh_chan->common.device_node,
917 &shdev->common.channels);
918 shdev->common.chancnt++;
919
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000920 if (pdev->id >= 0)
921 snprintf(new_sh_chan->dev_id, sizeof(new_sh_chan->dev_id),
922 "sh-dmae%d.%d", pdev->id, new_sh_chan->id);
923 else
924 snprintf(new_sh_chan->dev_id, sizeof(new_sh_chan->dev_id),
925 "sh-dma%d", new_sh_chan->id);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000926
927 /* set up channel irq */
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000928 err = request_irq(irq, &sh_dmae_interrupt, flags,
Guennadi Liakhovetski86d61b32009-12-10 18:35:07 +0100929 new_sh_chan->dev_id, new_sh_chan);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000930 if (err) {
931 dev_err(shdev->common.dev, "DMA channel %d request_irq error "
932 "with return %d\n", id, err);
933 goto err_no_irq;
934 }
935
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000936 shdev->chan[id] = new_sh_chan;
937 return 0;
938
939err_no_irq:
940 /* remove from dmaengine device node */
941 list_del(&new_sh_chan->common.device_node);
942 kfree(new_sh_chan);
943 return err;
944}
945
946static void sh_dmae_chan_remove(struct sh_dmae_device *shdev)
947{
948 int i;
949
950 for (i = shdev->common.chancnt - 1 ; i >= 0 ; i--) {
951 if (shdev->chan[i]) {
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000952 struct sh_dmae_chan *sh_chan = shdev->chan[i];
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000953
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000954 free_irq(sh_chan->irq, sh_chan);
955
956 list_del(&sh_chan->common.device_node);
957 kfree(sh_chan);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000958 shdev->chan[i] = NULL;
959 }
960 }
961 shdev->common.chancnt = 0;
962}
963
964static int __init sh_dmae_probe(struct platform_device *pdev)
965{
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000966 struct sh_dmae_pdata *pdata = pdev->dev.platform_data;
967 unsigned long irqflags = IRQF_DISABLED,
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000968 chan_flag[SH_DMAC_MAX_CHANNELS] = {};
969 int errirq, chan_irq[SH_DMAC_MAX_CHANNELS];
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000970 int err, i, irq_cnt = 0, irqres = 0;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000971 struct sh_dmae_device *shdev;
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000972 struct resource *chan, *dmars, *errirq_res, *chanirq_res;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000973
Dan Williams56adf7e2009-11-22 12:10:10 -0700974 /* get platform data */
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000975 if (!pdata || !pdata->channel_num)
Dan Williams56adf7e2009-11-22 12:10:10 -0700976 return -ENODEV;
977
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000978 chan = platform_get_resource(pdev, IORESOURCE_MEM, 0);
979 /* DMARS area is optional, if absent, this controller cannot do slave DMA */
980 dmars = platform_get_resource(pdev, IORESOURCE_MEM, 1);
981 /*
982 * IRQ resources:
983 * 1. there always must be at least one IRQ IO-resource. On SH4 it is
984 * the error IRQ, in which case it is the only IRQ in this resource:
985 * start == end. If it is the only IRQ resource, all channels also
986 * use the same IRQ.
987 * 2. DMA channel IRQ resources can be specified one per resource or in
988 * ranges (start != end)
989 * 3. iff all events (channels and, optionally, error) on this
990 * controller use the same IRQ, only one IRQ resource can be
991 * specified, otherwise there must be one IRQ per channel, even if
992 * some of them are equal
993 * 4. if all IRQs on this controller are equal or if some specific IRQs
994 * specify IORESOURCE_IRQ_SHAREABLE in their resources, they will be
995 * requested with the IRQF_SHARED flag
996 */
997 errirq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
998 if (!chan || !errirq_res)
999 return -ENODEV;
1000
1001 if (!request_mem_region(chan->start, resource_size(chan), pdev->name)) {
1002 dev_err(&pdev->dev, "DMAC register region already claimed\n");
1003 return -EBUSY;
1004 }
1005
1006 if (dmars && !request_mem_region(dmars->start, resource_size(dmars), pdev->name)) {
1007 dev_err(&pdev->dev, "DMAC DMARS region already claimed\n");
1008 err = -EBUSY;
1009 goto ermrdmars;
1010 }
1011
1012 err = -ENOMEM;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001013 shdev = kzalloc(sizeof(struct sh_dmae_device), GFP_KERNEL);
1014 if (!shdev) {
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001015 dev_err(&pdev->dev, "Not enough memory\n");
1016 goto ealloc;
1017 }
1018
1019 shdev->chan_reg = ioremap(chan->start, resource_size(chan));
1020 if (!shdev->chan_reg)
1021 goto emapchan;
1022 if (dmars) {
1023 shdev->dmars = ioremap(dmars->start, resource_size(dmars));
1024 if (!shdev->dmars)
1025 goto emapdmars;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001026 }
1027
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001028 /* platform data */
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001029 shdev->pdata = pdata;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001030
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +00001031 pm_runtime_enable(&pdev->dev);
1032 pm_runtime_get_sync(&pdev->dev);
1033
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001034 /* reset dma controller */
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001035 err = sh_dmae_rst(shdev);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001036 if (err)
1037 goto rst_err;
1038
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001039 INIT_LIST_HEAD(&shdev->common.channels);
1040
1041 dma_cap_set(DMA_MEMCPY, shdev->common.cap_mask);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001042 if (dmars)
1043 dma_cap_set(DMA_SLAVE, shdev->common.cap_mask);
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +00001044
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001045 shdev->common.device_alloc_chan_resources
1046 = sh_dmae_alloc_chan_resources;
1047 shdev->common.device_free_chan_resources = sh_dmae_free_chan_resources;
1048 shdev->common.device_prep_dma_memcpy = sh_dmae_prep_memcpy;
Linus Walleij07934482010-03-26 16:50:49 -07001049 shdev->common.device_tx_status = sh_dmae_tx_status;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001050 shdev->common.device_issue_pending = sh_dmae_memcpy_issue_pending;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +00001051
1052 /* Compulsory for DMA_SLAVE fields */
1053 shdev->common.device_prep_slave_sg = sh_dmae_prep_slave_sg;
Linus Walleijc3635c72010-03-26 16:44:01 -07001054 shdev->common.device_control = sh_dmae_control;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +00001055
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001056 shdev->common.dev = &pdev->dev;
Guennadi Liakhovetskiddb4f0f2009-12-04 19:44:41 +01001057 /* Default transfer size of 32 bytes requires 32-byte alignment */
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +00001058 shdev->common.copy_align = LOG2_DEFAULT_XFER_SIZE;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001059
1060#if defined(CONFIG_CPU_SH4)
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001061 chanirq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
1062
1063 if (!chanirq_res)
1064 chanirq_res = errirq_res;
1065 else
1066 irqres++;
1067
1068 if (chanirq_res == errirq_res ||
1069 (errirq_res->flags & IORESOURCE_BITS) == IORESOURCE_IRQ_SHAREABLE)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001070 irqflags = IRQF_SHARED;
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001071
1072 errirq = errirq_res->start;
1073
1074 err = request_irq(errirq, sh_dmae_err, irqflags,
1075 "DMAC Address Error", shdev);
1076 if (err) {
1077 dev_err(&pdev->dev,
1078 "DMA failed requesting irq #%d, error %d\n",
1079 errirq, err);
1080 goto eirq_err;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001081 }
1082
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001083#else
1084 chanirq_res = errirq_res;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001085#endif /* CONFIG_CPU_SH4 */
1086
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001087 if (chanirq_res->start == chanirq_res->end &&
1088 !platform_get_resource(pdev, IORESOURCE_IRQ, 1)) {
1089 /* Special case - all multiplexed */
1090 for (; irq_cnt < pdata->channel_num; irq_cnt++) {
1091 chan_irq[irq_cnt] = chanirq_res->start;
1092 chan_flag[irq_cnt] = IRQF_SHARED;
1093 }
1094 } else {
1095 do {
1096 for (i = chanirq_res->start; i <= chanirq_res->end; i++) {
1097 if ((errirq_res->flags & IORESOURCE_BITS) ==
1098 IORESOURCE_IRQ_SHAREABLE)
1099 chan_flag[irq_cnt] = IRQF_SHARED;
1100 else
1101 chan_flag[irq_cnt] = IRQF_DISABLED;
1102 dev_dbg(&pdev->dev,
1103 "Found IRQ %d for channel %d\n",
1104 i, irq_cnt);
1105 chan_irq[irq_cnt++] = i;
1106 }
1107 chanirq_res = platform_get_resource(pdev,
1108 IORESOURCE_IRQ, ++irqres);
1109 } while (irq_cnt < pdata->channel_num && chanirq_res);
1110 }
1111
1112 if (irq_cnt < pdata->channel_num)
1113 goto eirqres;
1114
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001115 /* Create DMA Channel */
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001116 for (i = 0; i < pdata->channel_num; i++) {
1117 err = sh_dmae_chan_probe(shdev, i, chan_irq[i], chan_flag[i]);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001118 if (err)
1119 goto chan_probe_err;
1120 }
1121
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +00001122 pm_runtime_put(&pdev->dev);
1123
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001124 platform_set_drvdata(pdev, shdev);
1125 dma_async_device_register(&shdev->common);
1126
1127 return err;
1128
1129chan_probe_err:
1130 sh_dmae_chan_remove(shdev);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001131eirqres:
1132#if defined(CONFIG_CPU_SH4)
1133 free_irq(errirq, shdev);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001134eirq_err:
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001135#endif
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001136rst_err:
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +00001137 pm_runtime_put(&pdev->dev);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001138 if (dmars)
1139 iounmap(shdev->dmars);
1140emapdmars:
1141 iounmap(shdev->chan_reg);
1142emapchan:
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001143 kfree(shdev);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001144ealloc:
1145 if (dmars)
1146 release_mem_region(dmars->start, resource_size(dmars));
1147ermrdmars:
1148 release_mem_region(chan->start, resource_size(chan));
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001149
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001150 return err;
1151}
1152
1153static int __exit sh_dmae_remove(struct platform_device *pdev)
1154{
1155 struct sh_dmae_device *shdev = platform_get_drvdata(pdev);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001156 struct resource *res;
1157 int errirq = platform_get_irq(pdev, 0);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001158
1159 dma_async_device_unregister(&shdev->common);
1160
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001161 if (errirq > 0)
1162 free_irq(errirq, shdev);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001163
1164 /* channel data remove */
1165 sh_dmae_chan_remove(shdev);
1166
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +00001167 pm_runtime_disable(&pdev->dev);
1168
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001169 if (shdev->dmars)
1170 iounmap(shdev->dmars);
1171 iounmap(shdev->chan_reg);
1172
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001173 kfree(shdev);
1174
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001175 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1176 if (res)
1177 release_mem_region(res->start, resource_size(res));
1178 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1179 if (res)
1180 release_mem_region(res->start, resource_size(res));
1181
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001182 return 0;
1183}
1184
1185static void sh_dmae_shutdown(struct platform_device *pdev)
1186{
1187 struct sh_dmae_device *shdev = platform_get_drvdata(pdev);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001188 sh_dmae_ctl_stop(shdev);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001189}
1190
1191static struct platform_driver sh_dmae_driver = {
1192 .remove = __exit_p(sh_dmae_remove),
1193 .shutdown = sh_dmae_shutdown,
1194 .driver = {
Guennadi Liakhovetski7a5c1062010-05-21 15:28:51 +00001195 .owner = THIS_MODULE,
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001196 .name = "sh-dma-engine",
1197 },
1198};
1199
1200static int __init sh_dmae_init(void)
1201{
1202 return platform_driver_probe(&sh_dmae_driver, sh_dmae_probe);
1203}
1204module_init(sh_dmae_init);
1205
1206static void __exit sh_dmae_exit(void)
1207{
1208 platform_driver_unregister(&sh_dmae_driver);
1209}
1210module_exit(sh_dmae_exit);
1211
1212MODULE_AUTHOR("Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>");
1213MODULE_DESCRIPTION("Renesas SH DMA Engine driver");
1214MODULE_LICENSE("GPL");