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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * File Name:
3 * defxx.c
4 *
5 * Copyright Information:
6 * Copyright Digital Equipment Corporation 1996.
7 *
8 * This software may be used and distributed according to the terms of
9 * the GNU General Public License, incorporated herein by reference.
10 *
11 * Abstract:
12 * A Linux device driver supporting the Digital Equipment Corporation
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -080013 * FDDI TURBOchannel, EISA and PCI controller families. Supported
14 * adapters include:
Linus Torvalds1da177e2005-04-16 15:20:36 -070015 *
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -080016 * DEC FDDIcontroller/TURBOchannel (DEFTA)
17 * DEC FDDIcontroller/EISA (DEFEA)
18 * DEC FDDIcontroller/PCI (DEFPA)
Linus Torvalds1da177e2005-04-16 15:20:36 -070019 *
20 * The original author:
21 * LVS Lawrence V. Stefani <lstefani@yahoo.com>
22 *
23 * Maintainers:
24 * macro Maciej W. Rozycki <macro@linux-mips.org>
25 *
26 * Credits:
27 * I'd like to thank Patricia Cross for helping me get started with
28 * Linux, David Davies for a lot of help upgrading and configuring
29 * my development system and for answering many OS and driver
30 * development questions, and Alan Cox for recommendations and
31 * integration help on getting FDDI support into Linux. LVS
32 *
33 * Driver Architecture:
34 * The driver architecture is largely based on previous driver work
35 * for other operating systems. The upper edge interface and
36 * functions were largely taken from existing Linux device drivers
37 * such as David Davies' DE4X5.C driver and Donald Becker's TULIP.C
38 * driver.
39 *
40 * Adapter Probe -
41 * The driver scans for supported EISA adapters by reading the
42 * SLOT ID register for each EISA slot and making a match
43 * against the expected value.
44 *
45 * Bus-Specific Initialization -
46 * This driver currently supports both EISA and PCI controller
47 * families. While the custom DMA chip and FDDI logic is similar
48 * or identical, the bus logic is very different. After
49 * initialization, the only bus-specific differences is in how the
50 * driver enables and disables interrupts. Other than that, the
51 * run-time critical code behaves the same on both families.
52 * It's important to note that both adapter families are configured
53 * to I/O map, rather than memory map, the adapter registers.
54 *
55 * Driver Open/Close -
56 * In the driver open routine, the driver ISR (interrupt service
57 * routine) is registered and the adapter is brought to an
58 * operational state. In the driver close routine, the opposite
59 * occurs; the driver ISR is deregistered and the adapter is
60 * brought to a safe, but closed state. Users may use consecutive
61 * commands to bring the adapter up and down as in the following
62 * example:
63 * ifconfig fddi0 up
64 * ifconfig fddi0 down
65 * ifconfig fddi0 up
66 *
67 * Driver Shutdown -
68 * Apparently, there is no shutdown or halt routine support under
69 * Linux. This routine would be called during "reboot" or
70 * "shutdown" to allow the driver to place the adapter in a safe
71 * state before a warm reboot occurs. To be really safe, the user
72 * should close the adapter before shutdown (eg. ifconfig fddi0 down)
73 * to ensure that the adapter DMA engine is taken off-line. However,
74 * the current driver code anticipates this problem and always issues
75 * a soft reset of the adapter at the beginning of driver initialization.
76 * A future driver enhancement in this area may occur in 2.1.X where
77 * Alan indicated that a shutdown handler may be implemented.
78 *
79 * Interrupt Service Routine -
80 * The driver supports shared interrupts, so the ISR is registered for
81 * each board with the appropriate flag and the pointer to that board's
82 * device structure. This provides the context during interrupt
83 * processing to support shared interrupts and multiple boards.
84 *
85 * Interrupt enabling/disabling can occur at many levels. At the host
86 * end, you can disable system interrupts, or disable interrupts at the
87 * PIC (on Intel systems). Across the bus, both EISA and PCI adapters
88 * have a bus-logic chip interrupt enable/disable as well as a DMA
89 * controller interrupt enable/disable.
90 *
91 * The driver currently enables and disables adapter interrupts at the
92 * bus-logic chip and assumes that Linux will take care of clearing or
93 * acknowledging any host-based interrupt chips.
94 *
95 * Control Functions -
96 * Control functions are those used to support functions such as adding
97 * or deleting multicast addresses, enabling or disabling packet
98 * reception filters, or other custom/proprietary commands. Presently,
99 * the driver supports the "get statistics", "set multicast list", and
100 * "set mac address" functions defined by Linux. A list of possible
101 * enhancements include:
102 *
103 * - Custom ioctl interface for executing port interface commands
104 * - Custom ioctl interface for adding unicast addresses to
105 * adapter CAM (to support bridge functions).
106 * - Custom ioctl interface for supporting firmware upgrades.
107 *
108 * Hardware (port interface) Support Routines -
109 * The driver function names that start with "dfx_hw_" represent
110 * low-level port interface routines that are called frequently. They
111 * include issuing a DMA or port control command to the adapter,
112 * resetting the adapter, or reading the adapter state. Since the
113 * driver initialization and run-time code must make calls into the
114 * port interface, these routines were written to be as generic and
115 * usable as possible.
116 *
117 * Receive Path -
118 * The adapter DMA engine supports a 256 entry receive descriptor block
119 * of which up to 255 entries can be used at any given time. The
120 * architecture is a standard producer, consumer, completion model in
121 * which the driver "produces" receive buffers to the adapter, the
122 * adapter "consumes" the receive buffers by DMAing incoming packet data,
123 * and the driver "completes" the receive buffers by servicing the
124 * incoming packet, then "produces" a new buffer and starts the cycle
125 * again. Receive buffers can be fragmented in up to 16 fragments
126 * (descriptor entries). For simplicity, this driver posts
127 * single-fragment receive buffers of 4608 bytes, then allocates a
128 * sk_buff, copies the data, then reposts the buffer. To reduce CPU
129 * utilization, a better approach would be to pass up the receive
130 * buffer (no extra copy) then allocate and post a replacement buffer.
131 * This is a performance enhancement that should be looked into at
132 * some point.
133 *
134 * Transmit Path -
135 * Like the receive path, the adapter DMA engine supports a 256 entry
136 * transmit descriptor block of which up to 255 entries can be used at
137 * any given time. Transmit buffers can be fragmented in up to 255
138 * fragments (descriptor entries). This driver always posts one
139 * fragment per transmit packet request.
140 *
141 * The fragment contains the entire packet from FC to end of data.
142 * Before posting the buffer to the adapter, the driver sets a three-byte
143 * packet request header (PRH) which is required by the Motorola MAC chip
144 * used on the adapters. The PRH tells the MAC the type of token to
145 * receive/send, whether or not to generate and append the CRC, whether
146 * synchronous or asynchronous framing is used, etc. Since the PRH
147 * definition is not necessarily consistent across all FDDI chipsets,
148 * the driver, rather than the common FDDI packet handler routines,
149 * sets these bytes.
150 *
151 * To reduce the amount of descriptor fetches needed per transmit request,
152 * the driver takes advantage of the fact that there are at least three
153 * bytes available before the skb->data field on the outgoing transmit
154 * request. This is guaranteed by having fddi_setup() in net_init.c set
155 * dev->hard_header_len to 24 bytes. 21 bytes accounts for the largest
156 * header in an 802.2 SNAP frame. The other 3 bytes are the extra "pad"
157 * bytes which we'll use to store the PRH.
158 *
159 * There's a subtle advantage to adding these pad bytes to the
160 * hard_header_len, it ensures that the data portion of the packet for
161 * an 802.2 SNAP frame is longword aligned. Other FDDI driver
162 * implementations may not need the extra padding and can start copying
163 * or DMAing directly from the FC byte which starts at skb->data. Should
164 * another driver implementation need ADDITIONAL padding, the net_init.c
165 * module should be updated and dev->hard_header_len should be increased.
166 * NOTE: To maintain the alignment on the data portion of the packet,
167 * dev->hard_header_len should always be evenly divisible by 4 and at
168 * least 24 bytes in size.
169 *
170 * Modification History:
171 * Date Name Description
172 * 16-Aug-96 LVS Created.
173 * 20-Aug-96 LVS Updated dfx_probe so that version information
174 * string is only displayed if 1 or more cards are
175 * found. Changed dfx_rcv_queue_process to copy
176 * 3 NULL bytes before FC to ensure that data is
177 * longword aligned in receive buffer.
178 * 09-Sep-96 LVS Updated dfx_ctl_set_multicast_list to enable
179 * LLC group promiscuous mode if multicast list
180 * is too large. LLC individual/group promiscuous
181 * mode is now disabled if IFF_PROMISC flag not set.
182 * dfx_xmt_queue_pkt no longer checks for NULL skb
183 * on Alan Cox recommendation. Added node address
184 * override support.
185 * 12-Sep-96 LVS Reset current address to factory address during
186 * device open. Updated transmit path to post a
187 * single fragment which includes PRH->end of data.
188 * Mar 2000 AC Did various cleanups for 2.3.x
189 * Jun 2000 jgarzik PCI and resource alloc cleanups
190 * Jul 2000 tjeerd Much cleanup and some bug fixes
191 * Sep 2000 tjeerd Fix leak on unload, cosmetic code cleanup
192 * Feb 2001 Skb allocation fixes
193 * Feb 2001 davej PCI enable cleanups.
194 * 04 Aug 2003 macro Converted to the DMA API.
195 * 14 Aug 2004 macro Fix device names reported.
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -0700196 * 14 Jun 2005 macro Use irqreturn_t.
Maciej W. Rozyckib2e68aa2006-10-23 13:53:17 +0100197 * 23 Oct 2006 macro Big-endian host support.
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800198 * 14 Dec 2006 macro TURBOchannel support.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700199 */
200
201/* Include files */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700202#include <linux/bitops.h>
Maciej W. Rozyckifcdff132007-07-20 13:14:07 +0100203#include <linux/compiler.h>
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800204#include <linux/delay.h>
205#include <linux/dma-mapping.h>
206#include <linux/eisa.h>
207#include <linux/errno.h>
208#include <linux/fddidevice.h>
209#include <linux/init.h>
210#include <linux/interrupt.h>
211#include <linux/ioport.h>
212#include <linux/kernel.h>
213#include <linux/module.h>
214#include <linux/netdevice.h>
215#include <linux/pci.h>
216#include <linux/skbuff.h>
217#include <linux/slab.h>
218#include <linux/string.h>
219#include <linux/tc.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220
221#include <asm/byteorder.h>
222#include <asm/io.h>
223
224#include "defxx.h"
225
226/* Version information string should be updated prior to each new release! */
227#define DRV_NAME "defxx"
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800228#define DRV_VERSION "v1.10"
229#define DRV_RELDATE "2006/12/14"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230
231static char version[] __devinitdata =
232 DRV_NAME ": " DRV_VERSION " " DRV_RELDATE
233 " Lawrence V. Stefani and others\n";
234
235#define DYNAMIC_BUFFERS 1
236
237#define SKBUFF_RX_COPYBREAK 200
238/*
239 * NEW_SKB_SIZE = PI_RCV_DATA_K_SIZE_MAX+128 to allow 128 byte
240 * alignment for compatibility with old EISA boards.
241 */
242#define NEW_SKB_SIZE (PI_RCV_DATA_K_SIZE_MAX+128)
243
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800244#ifdef CONFIG_PCI
245#define DFX_BUS_PCI(dev) (dev->bus == &pci_bus_type)
246#else
247#define DFX_BUS_PCI(dev) 0
248#endif
249
250#ifdef CONFIG_EISA
251#define DFX_BUS_EISA(dev) (dev->bus == &eisa_bus_type)
252#else
253#define DFX_BUS_EISA(dev) 0
254#endif
255
256#ifdef CONFIG_TC
257#define DFX_BUS_TC(dev) (dev->bus == &tc_bus_type)
258#else
259#define DFX_BUS_TC(dev) 0
260#endif
261
262#ifdef CONFIG_DEFXX_MMIO
263#define DFX_MMIO 1
264#else
265#define DFX_MMIO 0
266#endif
267
Linus Torvalds1da177e2005-04-16 15:20:36 -0700268/* Define module-wide (static) routines */
269
270static void dfx_bus_init(struct net_device *dev);
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800271static void dfx_bus_uninit(struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272static void dfx_bus_config_check(DFX_board_t *bp);
273
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800274static int dfx_driver_init(struct net_device *dev,
275 const char *print_name,
276 resource_size_t bar_start);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700277static int dfx_adap_init(DFX_board_t *bp, int get_buffers);
278
279static int dfx_open(struct net_device *dev);
280static int dfx_close(struct net_device *dev);
281
282static void dfx_int_pr_halt_id(DFX_board_t *bp);
283static void dfx_int_type_0_process(DFX_board_t *bp);
284static void dfx_int_common(struct net_device *dev);
David Howells7d12e782006-10-05 14:55:46 +0100285static irqreturn_t dfx_interrupt(int irq, void *dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700286
287static struct net_device_stats *dfx_ctl_get_stats(struct net_device *dev);
288static void dfx_ctl_set_multicast_list(struct net_device *dev);
289static int dfx_ctl_set_mac_address(struct net_device *dev, void *addr);
290static int dfx_ctl_update_cam(DFX_board_t *bp);
291static int dfx_ctl_update_filters(DFX_board_t *bp);
292
293static int dfx_hw_dma_cmd_req(DFX_board_t *bp);
294static int dfx_hw_port_ctrl_req(DFX_board_t *bp, PI_UINT32 command, PI_UINT32 data_a, PI_UINT32 data_b, PI_UINT32 *host_data);
295static void dfx_hw_adap_reset(DFX_board_t *bp, PI_UINT32 type);
296static int dfx_hw_adap_state_rd(DFX_board_t *bp);
297static int dfx_hw_dma_uninit(DFX_board_t *bp, PI_UINT32 type);
298
299static int dfx_rcv_init(DFX_board_t *bp, int get_buffers);
300static void dfx_rcv_queue_process(DFX_board_t *bp);
301static void dfx_rcv_flush(DFX_board_t *bp);
302
Stephen Hemminger613573252009-08-31 19:50:58 +0000303static netdev_tx_t dfx_xmt_queue_pkt(struct sk_buff *skb,
304 struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700305static int dfx_xmt_done(DFX_board_t *bp);
306static void dfx_xmt_flush(DFX_board_t *bp);
307
308/* Define module-wide (static) variables */
309
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800310static struct pci_driver dfx_pci_driver;
311static struct eisa_driver dfx_eisa_driver;
312static struct tc_driver dfx_tc_driver;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700313
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400314
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315/*
316 * =======================
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317 * = dfx_port_write_long =
318 * = dfx_port_read_long =
319 * =======================
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400320 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321 * Overview:
322 * Routines for reading and writing values from/to adapter
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400323 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324 * Returns:
325 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400326 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327 * Arguments:
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800328 * bp - pointer to board information
329 * offset - register offset from base I/O address
330 * data - for dfx_port_write_long, this is a value to write;
331 * for dfx_port_read_long, this is a pointer to store
332 * the read value
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333 *
334 * Functional Description:
335 * These routines perform the correct operation to read or write
336 * the adapter register.
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400337 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338 * EISA port block base addresses are based on the slot number in which the
339 * controller is installed. For example, if the EISA controller is installed
340 * in slot 4, the port block base address is 0x4000. If the controller is
341 * installed in slot 2, the port block base address is 0x2000, and so on.
342 * This port block can be used to access PDQ, ESIC, and DEFEA on-board
343 * registers using the register offsets defined in DEFXX.H.
344 *
345 * PCI port block base addresses are assigned by the PCI BIOS or system
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800346 * firmware. There is one 128 byte port block which can be accessed. It
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347 * allows for I/O mapping of both PDQ and PFI registers using the register
348 * offsets defined in DEFXX.H.
349 *
350 * Return Codes:
351 * None
352 *
353 * Assumptions:
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800354 * bp->base is a valid base I/O address for this adapter.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700355 * offset is a valid register offset for this adapter.
356 *
357 * Side Effects:
358 * Rather than produce macros for these functions, these routines
359 * are defined using "inline" to ensure that the compiler will
360 * generate inline code and not waste a procedure call and return.
361 * This provides all the benefits of macros, but with the
362 * advantage of strict data type checking.
363 */
364
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800365static inline void dfx_writel(DFX_board_t *bp, int offset, u32 data)
366{
367 writel(data, bp->base.mem + offset);
368 mb();
369}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700370
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800371static inline void dfx_outl(DFX_board_t *bp, int offset, u32 data)
372{
373 outl(data, bp->base.port + offset);
374}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800376static void dfx_port_write_long(DFX_board_t *bp, int offset, u32 data)
377{
Maciej W. Rozyckifcdff132007-07-20 13:14:07 +0100378 struct device __maybe_unused *bdev = bp->bus_dev;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800379 int dfx_bus_tc = DFX_BUS_TC(bdev);
380 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700381
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800382 if (dfx_use_mmio)
383 dfx_writel(bp, offset, data);
384 else
385 dfx_outl(bp, offset, data);
386}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700387
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800389static inline void dfx_readl(DFX_board_t *bp, int offset, u32 *data)
390{
391 mb();
392 *data = readl(bp->base.mem + offset);
393}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700394
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800395static inline void dfx_inl(DFX_board_t *bp, int offset, u32 *data)
396{
397 *data = inl(bp->base.port + offset);
398}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700399
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800400static void dfx_port_read_long(DFX_board_t *bp, int offset, u32 *data)
401{
Maciej W. Rozyckifcdff132007-07-20 13:14:07 +0100402 struct device __maybe_unused *bdev = bp->bus_dev;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800403 int dfx_bus_tc = DFX_BUS_TC(bdev);
404 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700405
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800406 if (dfx_use_mmio)
407 dfx_readl(bp, offset, data);
408 else
409 dfx_inl(bp, offset, data);
410}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400412
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413/*
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800414 * ================
415 * = dfx_get_bars =
416 * ================
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400417 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700418 * Overview:
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800419 * Retrieves the address range used to access control and status
420 * registers.
421 *
422 * Returns:
423 * None
424 *
425 * Arguments:
426 * bdev - pointer to device information
427 * bar_start - pointer to store the start address
428 * bar_len - pointer to store the length of the area
429 *
430 * Assumptions:
431 * I am sure there are some.
432 *
433 * Side Effects:
434 * None
435 */
436static void dfx_get_bars(struct device *bdev,
437 resource_size_t *bar_start, resource_size_t *bar_len)
438{
439 int dfx_bus_pci = DFX_BUS_PCI(bdev);
440 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
441 int dfx_bus_tc = DFX_BUS_TC(bdev);
442 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
443
444 if (dfx_bus_pci) {
445 int num = dfx_use_mmio ? 0 : 1;
446
447 *bar_start = pci_resource_start(to_pci_dev(bdev), num);
448 *bar_len = pci_resource_len(to_pci_dev(bdev), num);
449 }
450 if (dfx_bus_eisa) {
451 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
452 resource_size_t bar;
453
454 if (dfx_use_mmio) {
455 bar = inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_2);
456 bar <<= 8;
457 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_1);
458 bar <<= 8;
459 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_0);
460 bar <<= 16;
461 *bar_start = bar;
462 bar = inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_2);
463 bar <<= 8;
464 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_1);
465 bar <<= 8;
466 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_0);
467 bar <<= 16;
468 *bar_len = (bar | PI_MEM_ADD_MASK_M) + 1;
469 } else {
470 *bar_start = base_addr;
471 *bar_len = PI_ESIC_K_CSR_IO_LEN;
472 }
473 }
474 if (dfx_bus_tc) {
475 *bar_start = to_tc_dev(bdev)->resource.start +
476 PI_TC_K_CSR_OFFSET;
477 *bar_len = PI_TC_K_CSR_LEN;
478 }
479}
480
Stephen Hemmingerfd8f4992008-11-20 20:31:40 -0800481static const struct net_device_ops dfx_netdev_ops = {
482 .ndo_open = dfx_open,
483 .ndo_stop = dfx_close,
484 .ndo_start_xmit = dfx_xmt_queue_pkt,
485 .ndo_get_stats = dfx_ctl_get_stats,
486 .ndo_set_multicast_list = dfx_ctl_set_multicast_list,
487 .ndo_set_mac_address = dfx_ctl_set_mac_address,
488};
489
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800490/*
491 * ================
492 * = dfx_register =
493 * ================
494 *
495 * Overview:
496 * Initializes a supported FDDI controller
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400497 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700498 * Returns:
499 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400500 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700501 * Arguments:
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800502 * bdev - pointer to device information
Linus Torvalds1da177e2005-04-16 15:20:36 -0700503 *
504 * Functional Description:
505 *
506 * Return Codes:
507 * 0 - This device (fddi0, fddi1, etc) configured successfully
508 * -EBUSY - Failed to get resources, or dfx_driver_init failed.
509 *
510 * Assumptions:
511 * It compiles so it should work :-( (PCI cards do :-)
512 *
513 * Side Effects:
514 * Device structures for FDDI adapters (fddi0, fddi1, etc) are
515 * initialized and the board resources are read and stored in
516 * the device structure.
517 */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800518static int __devinit dfx_register(struct device *bdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700519{
520 static int version_disp;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800521 int dfx_bus_pci = DFX_BUS_PCI(bdev);
522 int dfx_bus_tc = DFX_BUS_TC(bdev);
523 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
Kay Sieversfb28ad32008-11-10 13:55:14 -0800524 const char *print_name = dev_name(bdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525 struct net_device *dev;
526 DFX_board_t *bp; /* board pointer */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800527 resource_size_t bar_start = 0; /* pointer to port */
528 resource_size_t bar_len = 0; /* resource length */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700529 int alloc_size; /* total buffer size used */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800530 struct resource *region;
531 int err = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700532
533 if (!version_disp) { /* display version info if adapter is found */
534 version_disp = 1; /* set display flag to TRUE so that */
535 printk(version); /* we only display this string ONCE */
536 }
537
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538 dev = alloc_fddidev(sizeof(*bp));
539 if (!dev) {
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800540 printk(KERN_ERR "%s: Unable to allocate fddidev, aborting\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541 print_name);
542 return -ENOMEM;
543 }
544
545 /* Enable PCI device. */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800546 if (dfx_bus_pci && pci_enable_device(to_pci_dev(bdev))) {
547 printk(KERN_ERR "%s: Cannot enable PCI device, aborting\n",
548 print_name);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549 goto err_out;
550 }
551
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800552 SET_NETDEV_DEV(dev, bdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700553
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800554 bp = netdev_priv(dev);
555 bp->bus_dev = bdev;
556 dev_set_drvdata(bdev, dev);
557
558 dfx_get_bars(bdev, &bar_start, &bar_len);
559
560 if (dfx_use_mmio)
561 region = request_mem_region(bar_start, bar_len, print_name);
562 else
563 region = request_region(bar_start, bar_len, print_name);
564 if (!region) {
565 printk(KERN_ERR "%s: Cannot reserve I/O resource "
566 "0x%lx @ 0x%lx, aborting\n",
567 print_name, (long)bar_len, (long)bar_start);
568 err = -EBUSY;
569 goto err_out_disable;
570 }
571
572 /* Set up I/O base address. */
573 if (dfx_use_mmio) {
574 bp->base.mem = ioremap_nocache(bar_start, bar_len);
575 if (!bp->base.mem) {
576 printk(KERN_ERR "%s: Cannot map MMIO\n", print_name);
Maciej W. Rozycki8a323522007-05-29 16:12:22 +0100577 err = -ENOMEM;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800578 goto err_out_region;
579 }
580 } else {
581 bp->base.port = bar_start;
582 dev->base_addr = bar_start;
583 }
584
585 /* Initialize new device structure */
Stephen Hemmingerfd8f4992008-11-20 20:31:40 -0800586 dev->netdev_ops = &dfx_netdev_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800588 if (dfx_bus_pci)
589 pci_set_master(to_pci_dev(bdev));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700590
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800591 if (dfx_driver_init(dev, print_name, bar_start) != DFX_K_SUCCESS) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700592 err = -ENODEV;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800593 goto err_out_unmap;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700594 }
595
596 err = register_netdev(dev);
597 if (err)
598 goto err_out_kfree;
599
600 printk("%s: registered as %s\n", print_name, dev->name);
601 return 0;
602
603err_out_kfree:
604 alloc_size = sizeof(PI_DESCR_BLOCK) +
605 PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
606#ifndef DYNAMIC_BUFFERS
607 (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
608#endif
609 sizeof(PI_CONSUMER_BLOCK) +
610 (PI_ALIGN_K_DESC_BLK - 1);
611 if (bp->kmalloced)
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800612 dma_free_coherent(bdev, alloc_size,
613 bp->kmalloced, bp->kmalloced_dma);
614
615err_out_unmap:
616 if (dfx_use_mmio)
617 iounmap(bp->base.mem);
618
Linus Torvalds1da177e2005-04-16 15:20:36 -0700619err_out_region:
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800620 if (dfx_use_mmio)
621 release_mem_region(bar_start, bar_len);
622 else
623 release_region(bar_start, bar_len);
624
625err_out_disable:
626 if (dfx_bus_pci)
627 pci_disable_device(to_pci_dev(bdev));
628
Linus Torvalds1da177e2005-04-16 15:20:36 -0700629err_out:
630 free_netdev(dev);
631 return err;
632}
633
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400634
Linus Torvalds1da177e2005-04-16 15:20:36 -0700635/*
636 * ================
637 * = dfx_bus_init =
638 * ================
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400639 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640 * Overview:
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800641 * Initializes the bus-specific controller logic.
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400642 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700643 * Returns:
644 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400645 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700646 * Arguments:
647 * dev - pointer to device information
648 *
649 * Functional Description:
650 * Determine and save adapter IRQ in device table,
651 * then perform bus-specific logic initialization.
652 *
653 * Return Codes:
654 * None
655 *
656 * Assumptions:
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800657 * bp->base has already been set with the proper
Linus Torvalds1da177e2005-04-16 15:20:36 -0700658 * base I/O address for this device.
659 *
660 * Side Effects:
661 * Interrupts are enabled at the adapter bus-specific logic.
662 * Note: Interrupts at the DMA engine (PDQ chip) are not
663 * enabled yet.
664 */
665
666static void __devinit dfx_bus_init(struct net_device *dev)
667{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800668 DFX_board_t *bp = netdev_priv(dev);
669 struct device *bdev = bp->bus_dev;
670 int dfx_bus_pci = DFX_BUS_PCI(bdev);
671 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
672 int dfx_bus_tc = DFX_BUS_TC(bdev);
673 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
674 u8 val;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700675
676 DBG_printk("In dfx_bus_init...\n");
677
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800678 /* Initialize a pointer back to the net_device struct */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700679 bp->dev = dev;
680
681 /* Initialize adapter based on bus type */
682
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800683 if (dfx_bus_tc)
684 dev->irq = to_tc_dev(bdev)->interrupt;
685 if (dfx_bus_eisa) {
686 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700687
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800688 /* Get the interrupt level from the ESIC chip. */
689 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
690 val &= PI_CONFIG_STAT_0_M_IRQ;
691 val >>= PI_CONFIG_STAT_0_V_IRQ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700692
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800693 switch (val) {
694 case PI_CONFIG_STAT_0_IRQ_K_9:
695 dev->irq = 9;
696 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700697
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800698 case PI_CONFIG_STAT_0_IRQ_K_10:
699 dev->irq = 10;
700 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700701
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800702 case PI_CONFIG_STAT_0_IRQ_K_11:
703 dev->irq = 11;
704 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700705
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800706 case PI_CONFIG_STAT_0_IRQ_K_15:
707 dev->irq = 15;
708 break;
709 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700710
711 /*
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800712 * Enable memory decoding (MEMCS0) and/or port decoding
713 * (IOCS1/IOCS0) as appropriate in Function Control
714 * Register. One of the port chip selects seems to be
715 * used for the Burst Holdoff register, but this bit of
716 * documentation is missing and as yet it has not been
717 * determined which of the two. This is also the reason
718 * the size of the decoded port range is twice as large
719 * as one required by the PDQ.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700720 */
721
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800722 /* Set the decode range of the board. */
723 val = ((bp->base.port >> 12) << PI_IO_CMP_V_SLOT);
724 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_0_1, val);
725 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_0_0, 0);
726 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_1_1, val);
727 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_1_0, 0);
728 val = PI_ESIC_K_CSR_IO_LEN - 1;
729 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_0_1, (val >> 8) & 0xff);
730 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_0_0, val & 0xff);
731 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_1_1, (val >> 8) & 0xff);
732 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_1_0, val & 0xff);
733
734 /* Enable the decoders. */
735 val = PI_FUNCTION_CNTRL_M_IOCS1 | PI_FUNCTION_CNTRL_M_IOCS0;
736 if (dfx_use_mmio)
737 val |= PI_FUNCTION_CNTRL_M_MEMCS0;
738 outb(base_addr + PI_ESIC_K_FUNCTION_CNTRL, val);
739
740 /*
741 * Enable access to the rest of the module
742 * (including PDQ and packet memory).
743 */
744 val = PI_SLOT_CNTRL_M_ENB;
745 outb(base_addr + PI_ESIC_K_SLOT_CNTRL, val);
746
747 /*
748 * Map PDQ registers into memory or port space. This is
749 * done with a bit in the Burst Holdoff register.
750 */
751 val = inb(base_addr + PI_DEFEA_K_BURST_HOLDOFF);
752 if (dfx_use_mmio)
753 val |= PI_BURST_HOLDOFF_V_MEM_MAP;
754 else
755 val &= ~PI_BURST_HOLDOFF_V_MEM_MAP;
756 outb(base_addr + PI_DEFEA_K_BURST_HOLDOFF, val);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700757
758 /* Enable interrupts at EISA bus interface chip (ESIC) */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800759 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
760 val |= PI_CONFIG_STAT_0_M_INT_ENB;
761 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, val);
762 }
763 if (dfx_bus_pci) {
764 struct pci_dev *pdev = to_pci_dev(bdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700765
766 /* Get the interrupt level from the PCI Configuration Table */
767
768 dev->irq = pdev->irq;
769
770 /* Check Latency Timer and set if less than minimal */
771
772 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &val);
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800773 if (val < PFI_K_LAT_TIMER_MIN) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700774 val = PFI_K_LAT_TIMER_DEF;
775 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, val);
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800776 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700777
778 /* Enable interrupts at PCI bus interface chip (PFI) */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800779 val = PFI_MODE_M_PDQ_INT_ENB | PFI_MODE_M_DMA_ENB;
780 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, val);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700781 }
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800782}
783
784/*
785 * ==================
786 * = dfx_bus_uninit =
787 * ==================
788 *
789 * Overview:
790 * Uninitializes the bus-specific controller logic.
791 *
792 * Returns:
793 * None
794 *
795 * Arguments:
796 * dev - pointer to device information
797 *
798 * Functional Description:
799 * Perform bus-specific logic uninitialization.
800 *
801 * Return Codes:
802 * None
803 *
804 * Assumptions:
805 * bp->base has already been set with the proper
806 * base I/O address for this device.
807 *
808 * Side Effects:
809 * Interrupts are disabled at the adapter bus-specific logic.
810 */
811
Maciej W. Rozycki79d10502007-10-22 18:13:24 +0100812static void __devexit dfx_bus_uninit(struct net_device *dev)
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800813{
814 DFX_board_t *bp = netdev_priv(dev);
815 struct device *bdev = bp->bus_dev;
816 int dfx_bus_pci = DFX_BUS_PCI(bdev);
817 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
818 u8 val;
819
820 DBG_printk("In dfx_bus_uninit...\n");
821
822 /* Uninitialize adapter based on bus type */
823
824 if (dfx_bus_eisa) {
825 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
826
827 /* Disable interrupts at EISA bus interface chip (ESIC) */
828 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
829 val &= ~PI_CONFIG_STAT_0_M_INT_ENB;
830 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, val);
831 }
832 if (dfx_bus_pci) {
833 /* Disable interrupts at PCI bus interface chip (PFI) */
834 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, 0);
835 }
836}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700837
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400838
Linus Torvalds1da177e2005-04-16 15:20:36 -0700839/*
840 * ========================
841 * = dfx_bus_config_check =
842 * ========================
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400843 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700844 * Overview:
845 * Checks the configuration (burst size, full-duplex, etc.) If any parameters
846 * are illegal, then this routine will set new defaults.
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400847 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700848 * Returns:
849 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400850 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700851 * Arguments:
852 * bp - pointer to board information
853 *
854 * Functional Description:
855 * For Revision 1 FDDI EISA, Revision 2 or later FDDI EISA with rev E or later
856 * PDQ, and all FDDI PCI controllers, all values are legal.
857 *
858 * Return Codes:
859 * None
860 *
861 * Assumptions:
862 * dfx_adap_init has NOT been called yet so burst size and other items have
863 * not been set.
864 *
865 * Side Effects:
866 * None
867 */
868
869static void __devinit dfx_bus_config_check(DFX_board_t *bp)
870{
Maciej W. Rozyckifcdff132007-07-20 13:14:07 +0100871 struct device __maybe_unused *bdev = bp->bus_dev;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800872 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700873 int status; /* return code from adapter port control call */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700874 u32 host_data; /* LW data returned from port control call */
875
876 DBG_printk("In dfx_bus_config_check...\n");
877
878 /* Configuration check only valid for EISA adapter */
879
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800880 if (dfx_bus_eisa) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700881 /*
882 * First check if revision 2 EISA controller. Rev. 1 cards used
883 * PDQ revision B, so no workaround needed in this case. Rev. 3
884 * cards used PDQ revision E, so no workaround needed in this
885 * case, either. Only Rev. 2 cards used either Rev. D or E
886 * chips, so we must verify the chip revision on Rev. 2 cards.
887 */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800888 if (to_eisa_device(bdev)->id.driver_data == DEFEA_PROD_ID_2) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700889 /*
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800890 * Revision 2 FDDI EISA controller found,
891 * so let's check PDQ revision of adapter.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700892 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700893 status = dfx_hw_port_ctrl_req(bp,
894 PI_PCTRL_M_SUB_CMD,
895 PI_SUB_CMD_K_PDQ_REV_GET,
896 0,
897 &host_data);
898 if ((status != DFX_K_SUCCESS) || (host_data == 2))
899 {
900 /*
901 * Either we couldn't determine the PDQ revision, or
902 * we determined that it is at revision D. In either case,
903 * we need to implement the workaround.
904 */
905
906 /* Ensure that the burst size is set to 8 longwords or less */
907
908 switch (bp->burst_size)
909 {
910 case PI_PDATA_B_DMA_BURST_SIZE_32:
911 case PI_PDATA_B_DMA_BURST_SIZE_16:
912 bp->burst_size = PI_PDATA_B_DMA_BURST_SIZE_8;
913 break;
914
915 default:
916 break;
917 }
918
919 /* Ensure that full-duplex mode is not enabled */
920
921 bp->full_duplex_enb = PI_SNMP_K_FALSE;
922 }
923 }
924 }
925 }
926
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400927
Linus Torvalds1da177e2005-04-16 15:20:36 -0700928/*
929 * ===================
930 * = dfx_driver_init =
931 * ===================
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400932 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700933 * Overview:
934 * Initializes remaining adapter board structure information
935 * and makes sure adapter is in a safe state prior to dfx_open().
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400936 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700937 * Returns:
938 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400939 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700940 * Arguments:
941 * dev - pointer to device information
942 * print_name - printable device name
943 *
944 * Functional Description:
945 * This function allocates additional resources such as the host memory
946 * blocks needed by the adapter (eg. descriptor and consumer blocks).
947 * Remaining bus initialization steps are also completed. The adapter
948 * is also reset so that it is in the DMA_UNAVAILABLE state. The OS
949 * must call dfx_open() to open the adapter and bring it on-line.
950 *
951 * Return Codes:
952 * DFX_K_SUCCESS - initialization succeeded
953 * DFX_K_FAILURE - initialization failed - could not allocate memory
954 * or read adapter MAC address
955 *
956 * Assumptions:
957 * Memory allocated from pci_alloc_consistent() call is physically
958 * contiguous, locked memory.
959 *
960 * Side Effects:
961 * Adapter is reset and should be in DMA_UNAVAILABLE state before
962 * returning from this routine.
963 */
964
965static int __devinit dfx_driver_init(struct net_device *dev,
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800966 const char *print_name,
967 resource_size_t bar_start)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700968{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800969 DFX_board_t *bp = netdev_priv(dev);
970 struct device *bdev = bp->bus_dev;
971 int dfx_bus_pci = DFX_BUS_PCI(bdev);
972 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
973 int dfx_bus_tc = DFX_BUS_TC(bdev);
974 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
975 int alloc_size; /* total buffer size needed */
976 char *top_v, *curr_v; /* virtual addrs into memory block */
977 dma_addr_t top_p, curr_p; /* physical addrs into memory block */
Al Viroeca1ad82008-03-16 22:21:54 +0000978 u32 data; /* host data register value */
979 __le32 le32;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800980 char *board_name = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700981
982 DBG_printk("In dfx_driver_init...\n");
983
984 /* Initialize bus-specific hardware registers */
985
986 dfx_bus_init(dev);
987
988 /*
989 * Initialize default values for configurable parameters
990 *
991 * Note: All of these parameters are ones that a user may
992 * want to customize. It'd be nice to break these
993 * out into Space.c or someplace else that's more
994 * accessible/understandable than this file.
995 */
996
997 bp->full_duplex_enb = PI_SNMP_K_FALSE;
998 bp->req_ttrt = 8 * 12500; /* 8ms in 80 nanosec units */
999 bp->burst_size = PI_PDATA_B_DMA_BURST_SIZE_DEF;
1000 bp->rcv_bufs_to_post = RCV_BUFS_DEF;
1001
1002 /*
1003 * Ensure that HW configuration is OK
1004 *
1005 * Note: Depending on the hardware revision, we may need to modify
1006 * some of the configurable parameters to workaround hardware
1007 * limitations. We'll perform this configuration check AFTER
1008 * setting the parameters to their default values.
1009 */
1010
1011 dfx_bus_config_check(bp);
1012
1013 /* Disable PDQ interrupts first */
1014
1015 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1016
1017 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1018
1019 (void) dfx_hw_dma_uninit(bp, PI_PDATA_A_RESET_M_SKIP_ST);
1020
1021 /* Read the factory MAC address from the adapter then save it */
1022
1023 if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_LO, 0,
1024 &data) != DFX_K_SUCCESS) {
1025 printk("%s: Could not read adapter factory MAC address!\n",
1026 print_name);
1027 return(DFX_K_FAILURE);
1028 }
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001029 le32 = cpu_to_le32(data);
1030 memcpy(&bp->factory_mac_addr[0], &le32, sizeof(u32));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001031
1032 if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_HI, 0,
1033 &data) != DFX_K_SUCCESS) {
1034 printk("%s: Could not read adapter factory MAC address!\n",
1035 print_name);
1036 return(DFX_K_FAILURE);
1037 }
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001038 le32 = cpu_to_le32(data);
1039 memcpy(&bp->factory_mac_addr[4], &le32, sizeof(u16));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001040
1041 /*
1042 * Set current address to factory address
1043 *
1044 * Note: Node address override support is handled through
1045 * dfx_ctl_set_mac_address.
1046 */
1047
1048 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001049 if (dfx_bus_tc)
1050 board_name = "DEFTA";
1051 if (dfx_bus_eisa)
1052 board_name = "DEFEA";
1053 if (dfx_bus_pci)
1054 board_name = "DEFPA";
1055 pr_info("%s: %s at %saddr = 0x%llx, IRQ = %d, "
1056 "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
1057 print_name, board_name, dfx_use_mmio ? "" : "I/O ",
1058 (long long)bar_start, dev->irq,
1059 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1060 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001061
1062 /*
1063 * Get memory for descriptor block, consumer block, and other buffers
1064 * that need to be DMA read or written to by the adapter.
1065 */
1066
1067 alloc_size = sizeof(PI_DESCR_BLOCK) +
1068 PI_CMD_REQ_K_SIZE_MAX +
1069 PI_CMD_RSP_K_SIZE_MAX +
1070#ifndef DYNAMIC_BUFFERS
1071 (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
1072#endif
1073 sizeof(PI_CONSUMER_BLOCK) +
1074 (PI_ALIGN_K_DESC_BLK - 1);
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001075 bp->kmalloced = top_v = dma_alloc_coherent(bp->bus_dev, alloc_size,
1076 &bp->kmalloced_dma,
1077 GFP_ATOMIC);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001078 if (top_v == NULL) {
1079 printk("%s: Could not allocate memory for host buffers "
1080 "and structures!\n", print_name);
1081 return(DFX_K_FAILURE);
1082 }
1083 memset(top_v, 0, alloc_size); /* zero out memory before continuing */
1084 top_p = bp->kmalloced_dma; /* get physical address of buffer */
1085
1086 /*
1087 * To guarantee the 8K alignment required for the descriptor block, 8K - 1
1088 * plus the amount of memory needed was allocated. The physical address
1089 * is now 8K aligned. By carving up the memory in a specific order,
1090 * we'll guarantee the alignment requirements for all other structures.
1091 *
1092 * Note: If the assumptions change regarding the non-paged, non-cached,
1093 * physically contiguous nature of the memory block or the address
1094 * alignments, then we'll need to implement a different algorithm
1095 * for allocating the needed memory.
1096 */
1097
1098 curr_p = ALIGN(top_p, PI_ALIGN_K_DESC_BLK);
1099 curr_v = top_v + (curr_p - top_p);
1100
1101 /* Reserve space for descriptor block */
1102
1103 bp->descr_block_virt = (PI_DESCR_BLOCK *) curr_v;
1104 bp->descr_block_phys = curr_p;
1105 curr_v += sizeof(PI_DESCR_BLOCK);
1106 curr_p += sizeof(PI_DESCR_BLOCK);
1107
1108 /* Reserve space for command request buffer */
1109
1110 bp->cmd_req_virt = (PI_DMA_CMD_REQ *) curr_v;
1111 bp->cmd_req_phys = curr_p;
1112 curr_v += PI_CMD_REQ_K_SIZE_MAX;
1113 curr_p += PI_CMD_REQ_K_SIZE_MAX;
1114
1115 /* Reserve space for command response buffer */
1116
1117 bp->cmd_rsp_virt = (PI_DMA_CMD_RSP *) curr_v;
1118 bp->cmd_rsp_phys = curr_p;
1119 curr_v += PI_CMD_RSP_K_SIZE_MAX;
1120 curr_p += PI_CMD_RSP_K_SIZE_MAX;
1121
1122 /* Reserve space for the LLC host receive queue buffers */
1123
1124 bp->rcv_block_virt = curr_v;
1125 bp->rcv_block_phys = curr_p;
1126
1127#ifndef DYNAMIC_BUFFERS
1128 curr_v += (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX);
1129 curr_p += (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX);
1130#endif
1131
1132 /* Reserve space for the consumer block */
1133
1134 bp->cons_block_virt = (PI_CONSUMER_BLOCK *) curr_v;
1135 bp->cons_block_phys = curr_p;
1136
1137 /* Display virtual and physical addresses if debug driver */
1138
1139 DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n",
1140 print_name,
1141 (long)bp->descr_block_virt, bp->descr_block_phys);
1142 DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n",
1143 print_name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
1144 DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n",
1145 print_name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
1146 DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n",
1147 print_name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
1148 DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n",
1149 print_name, (long)bp->cons_block_virt, bp->cons_block_phys);
1150
1151 return(DFX_K_SUCCESS);
1152}
1153
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001154
Linus Torvalds1da177e2005-04-16 15:20:36 -07001155/*
1156 * =================
1157 * = dfx_adap_init =
1158 * =================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001159 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001160 * Overview:
1161 * Brings the adapter to the link avail/link unavailable state.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001162 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001163 * Returns:
1164 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001165 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001166 * Arguments:
1167 * bp - pointer to board information
1168 * get_buffers - non-zero if buffers to be allocated
1169 *
1170 * Functional Description:
1171 * Issues the low-level firmware/hardware calls necessary to bring
1172 * the adapter up, or to properly reset and restore adapter during
1173 * run-time.
1174 *
1175 * Return Codes:
1176 * DFX_K_SUCCESS - Adapter brought up successfully
1177 * DFX_K_FAILURE - Adapter initialization failed
1178 *
1179 * Assumptions:
1180 * bp->reset_type should be set to a valid reset type value before
1181 * calling this routine.
1182 *
1183 * Side Effects:
1184 * Adapter should be in LINK_AVAILABLE or LINK_UNAVAILABLE state
1185 * upon a successful return of this routine.
1186 */
1187
1188static int dfx_adap_init(DFX_board_t *bp, int get_buffers)
1189 {
1190 DBG_printk("In dfx_adap_init...\n");
1191
1192 /* Disable PDQ interrupts first */
1193
1194 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1195
1196 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1197
1198 if (dfx_hw_dma_uninit(bp, bp->reset_type) != DFX_K_SUCCESS)
1199 {
1200 printk("%s: Could not uninitialize/reset adapter!\n", bp->dev->name);
1201 return(DFX_K_FAILURE);
1202 }
1203
1204 /*
1205 * When the PDQ is reset, some false Type 0 interrupts may be pending,
1206 * so we'll acknowledge all Type 0 interrupts now before continuing.
1207 */
1208
1209 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, PI_HOST_INT_K_ACK_ALL_TYPE_0);
1210
1211 /*
1212 * Clear Type 1 and Type 2 registers before going to DMA_AVAILABLE state
1213 *
1214 * Note: We only need to clear host copies of these registers. The PDQ reset
1215 * takes care of the on-board register values.
1216 */
1217
1218 bp->cmd_req_reg.lword = 0;
1219 bp->cmd_rsp_reg.lword = 0;
1220 bp->rcv_xmt_reg.lword = 0;
1221
1222 /* Clear consumer block before going to DMA_AVAILABLE state */
1223
1224 memset(bp->cons_block_virt, 0, sizeof(PI_CONSUMER_BLOCK));
1225
1226 /* Initialize the DMA Burst Size */
1227
1228 if (dfx_hw_port_ctrl_req(bp,
1229 PI_PCTRL_M_SUB_CMD,
1230 PI_SUB_CMD_K_BURST_SIZE_SET,
1231 bp->burst_size,
1232 NULL) != DFX_K_SUCCESS)
1233 {
1234 printk("%s: Could not set adapter burst size!\n", bp->dev->name);
1235 return(DFX_K_FAILURE);
1236 }
1237
1238 /*
1239 * Set base address of Consumer Block
1240 *
1241 * Assumption: 32-bit physical address of consumer block is 64 byte
1242 * aligned. That is, bits 0-5 of the address must be zero.
1243 */
1244
1245 if (dfx_hw_port_ctrl_req(bp,
1246 PI_PCTRL_M_CONS_BLOCK,
1247 bp->cons_block_phys,
1248 0,
1249 NULL) != DFX_K_SUCCESS)
1250 {
1251 printk("%s: Could not set consumer block address!\n", bp->dev->name);
1252 return(DFX_K_FAILURE);
1253 }
1254
1255 /*
Maciej W. Rozyckib2e68aa2006-10-23 13:53:17 +01001256 * Set the base address of Descriptor Block and bring adapter
1257 * to DMA_AVAILABLE state.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001258 *
Maciej W. Rozyckib2e68aa2006-10-23 13:53:17 +01001259 * Note: We also set the literal and data swapping requirements
1260 * in this command.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001261 *
Maciej W. Rozyckib2e68aa2006-10-23 13:53:17 +01001262 * Assumption: 32-bit physical address of descriptor block
1263 * is 8Kbyte aligned.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001264 */
Maciej W. Rozyckib2e68aa2006-10-23 13:53:17 +01001265 if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_INIT,
1266 (u32)(bp->descr_block_phys |
1267 PI_PDATA_A_INIT_M_BSWAP_INIT),
1268 0, NULL) != DFX_K_SUCCESS) {
1269 printk("%s: Could not set descriptor block address!\n",
1270 bp->dev->name);
1271 return DFX_K_FAILURE;
1272 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001273
1274 /* Set transmit flush timeout value */
1275
1276 bp->cmd_req_virt->cmd_type = PI_CMD_K_CHARS_SET;
1277 bp->cmd_req_virt->char_set.item[0].item_code = PI_ITEM_K_FLUSH_TIME;
1278 bp->cmd_req_virt->char_set.item[0].value = 3; /* 3 seconds */
1279 bp->cmd_req_virt->char_set.item[0].item_index = 0;
1280 bp->cmd_req_virt->char_set.item[1].item_code = PI_ITEM_K_EOL;
1281 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
1282 {
1283 printk("%s: DMA command request failed!\n", bp->dev->name);
1284 return(DFX_K_FAILURE);
1285 }
1286
1287 /* Set the initial values for eFDXEnable and MACTReq MIB objects */
1288
1289 bp->cmd_req_virt->cmd_type = PI_CMD_K_SNMP_SET;
1290 bp->cmd_req_virt->snmp_set.item[0].item_code = PI_ITEM_K_FDX_ENB_DIS;
1291 bp->cmd_req_virt->snmp_set.item[0].value = bp->full_duplex_enb;
1292 bp->cmd_req_virt->snmp_set.item[0].item_index = 0;
1293 bp->cmd_req_virt->snmp_set.item[1].item_code = PI_ITEM_K_MAC_T_REQ;
1294 bp->cmd_req_virt->snmp_set.item[1].value = bp->req_ttrt;
1295 bp->cmd_req_virt->snmp_set.item[1].item_index = 0;
1296 bp->cmd_req_virt->snmp_set.item[2].item_code = PI_ITEM_K_EOL;
1297 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
1298 {
1299 printk("%s: DMA command request failed!\n", bp->dev->name);
1300 return(DFX_K_FAILURE);
1301 }
1302
1303 /* Initialize adapter CAM */
1304
1305 if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS)
1306 {
1307 printk("%s: Adapter CAM update failed!\n", bp->dev->name);
1308 return(DFX_K_FAILURE);
1309 }
1310
1311 /* Initialize adapter filters */
1312
1313 if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS)
1314 {
1315 printk("%s: Adapter filters update failed!\n", bp->dev->name);
1316 return(DFX_K_FAILURE);
1317 }
1318
1319 /*
1320 * Remove any existing dynamic buffers (i.e. if the adapter is being
1321 * reinitialized)
1322 */
1323
1324 if (get_buffers)
1325 dfx_rcv_flush(bp);
1326
1327 /* Initialize receive descriptor block and produce buffers */
1328
1329 if (dfx_rcv_init(bp, get_buffers))
1330 {
1331 printk("%s: Receive buffer allocation failed\n", bp->dev->name);
1332 if (get_buffers)
1333 dfx_rcv_flush(bp);
1334 return(DFX_K_FAILURE);
1335 }
1336
1337 /* Issue START command and bring adapter to LINK_(UN)AVAILABLE state */
1338
1339 bp->cmd_req_virt->cmd_type = PI_CMD_K_START;
1340 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
1341 {
1342 printk("%s: Start command failed\n", bp->dev->name);
1343 if (get_buffers)
1344 dfx_rcv_flush(bp);
1345 return(DFX_K_FAILURE);
1346 }
1347
1348 /* Initialization succeeded, reenable PDQ interrupts */
1349
1350 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_ENABLE_DEF_INTS);
1351 return(DFX_K_SUCCESS);
1352 }
1353
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001354
Linus Torvalds1da177e2005-04-16 15:20:36 -07001355/*
1356 * ============
1357 * = dfx_open =
1358 * ============
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001359 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001360 * Overview:
1361 * Opens the adapter
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001362 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001363 * Returns:
1364 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001365 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001366 * Arguments:
1367 * dev - pointer to device information
1368 *
1369 * Functional Description:
1370 * This function brings the adapter to an operational state.
1371 *
1372 * Return Codes:
1373 * 0 - Adapter was successfully opened
1374 * -EAGAIN - Could not register IRQ or adapter initialization failed
1375 *
1376 * Assumptions:
1377 * This routine should only be called for a device that was
1378 * initialized successfully.
1379 *
1380 * Side Effects:
1381 * Adapter should be in LINK_AVAILABLE or LINK_UNAVAILABLE state
1382 * if the open is successful.
1383 */
1384
1385static int dfx_open(struct net_device *dev)
1386{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001387 DFX_board_t *bp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001388 int ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001389
1390 DBG_printk("In dfx_open...\n");
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001391
Linus Torvalds1da177e2005-04-16 15:20:36 -07001392 /* Register IRQ - support shared interrupts by passing device ptr */
1393
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001394 ret = request_irq(dev->irq, dfx_interrupt, IRQF_SHARED, dev->name,
1395 dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001396 if (ret) {
1397 printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq);
1398 return ret;
1399 }
1400
1401 /*
1402 * Set current address to factory MAC address
1403 *
1404 * Note: We've already done this step in dfx_driver_init.
1405 * However, it's possible that a user has set a node
1406 * address override, then closed and reopened the
1407 * adapter. Unless we reset the device address field
1408 * now, we'll continue to use the existing modified
1409 * address.
1410 */
1411
1412 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
1413
1414 /* Clear local unicast/multicast address tables and counts */
1415
1416 memset(bp->uc_table, 0, sizeof(bp->uc_table));
1417 memset(bp->mc_table, 0, sizeof(bp->mc_table));
1418 bp->uc_count = 0;
1419 bp->mc_count = 0;
1420
1421 /* Disable promiscuous filter settings */
1422
1423 bp->ind_group_prom = PI_FSTATE_K_BLOCK;
1424 bp->group_prom = PI_FSTATE_K_BLOCK;
1425
1426 spin_lock_init(&bp->lock);
1427
1428 /* Reset and initialize adapter */
1429
1430 bp->reset_type = PI_PDATA_A_RESET_M_SKIP_ST; /* skip self-test */
1431 if (dfx_adap_init(bp, 1) != DFX_K_SUCCESS)
1432 {
1433 printk(KERN_ERR "%s: Adapter open failed!\n", dev->name);
1434 free_irq(dev->irq, dev);
1435 return -EAGAIN;
1436 }
1437
1438 /* Set device structure info */
1439 netif_start_queue(dev);
1440 return(0);
1441}
1442
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001443
Linus Torvalds1da177e2005-04-16 15:20:36 -07001444/*
1445 * =============
1446 * = dfx_close =
1447 * =============
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001448 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001449 * Overview:
1450 * Closes the device/module.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001451 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001452 * Returns:
1453 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001454 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001455 * Arguments:
1456 * dev - pointer to device information
1457 *
1458 * Functional Description:
1459 * This routine closes the adapter and brings it to a safe state.
1460 * The interrupt service routine is deregistered with the OS.
1461 * The adapter can be opened again with another call to dfx_open().
1462 *
1463 * Return Codes:
1464 * Always return 0.
1465 *
1466 * Assumptions:
1467 * No further requests for this adapter are made after this routine is
1468 * called. dfx_open() can be called to reset and reinitialize the
1469 * adapter.
1470 *
1471 * Side Effects:
1472 * Adapter should be in DMA_UNAVAILABLE state upon completion of this
1473 * routine.
1474 */
1475
1476static int dfx_close(struct net_device *dev)
1477{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001478 DFX_board_t *bp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001479
1480 DBG_printk("In dfx_close...\n");
1481
1482 /* Disable PDQ interrupts first */
1483
1484 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1485
1486 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1487
1488 (void) dfx_hw_dma_uninit(bp, PI_PDATA_A_RESET_M_SKIP_ST);
1489
1490 /*
1491 * Flush any pending transmit buffers
1492 *
1493 * Note: It's important that we flush the transmit buffers
1494 * BEFORE we clear our copy of the Type 2 register.
1495 * Otherwise, we'll have no idea how many buffers
1496 * we need to free.
1497 */
1498
1499 dfx_xmt_flush(bp);
1500
1501 /*
1502 * Clear Type 1 and Type 2 registers after adapter reset
1503 *
1504 * Note: Even though we're closing the adapter, it's
1505 * possible that an interrupt will occur after
1506 * dfx_close is called. Without some assurance to
1507 * the contrary we want to make sure that we don't
1508 * process receive and transmit LLC frames and update
1509 * the Type 2 register with bad information.
1510 */
1511
1512 bp->cmd_req_reg.lword = 0;
1513 bp->cmd_rsp_reg.lword = 0;
1514 bp->rcv_xmt_reg.lword = 0;
1515
1516 /* Clear consumer block for the same reason given above */
1517
1518 memset(bp->cons_block_virt, 0, sizeof(PI_CONSUMER_BLOCK));
1519
1520 /* Release all dynamically allocate skb in the receive ring. */
1521
1522 dfx_rcv_flush(bp);
1523
1524 /* Clear device structure flags */
1525
1526 netif_stop_queue(dev);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001527
Linus Torvalds1da177e2005-04-16 15:20:36 -07001528 /* Deregister (free) IRQ */
1529
1530 free_irq(dev->irq, dev);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001531
Linus Torvalds1da177e2005-04-16 15:20:36 -07001532 return(0);
1533}
1534
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001535
Linus Torvalds1da177e2005-04-16 15:20:36 -07001536/*
1537 * ======================
1538 * = dfx_int_pr_halt_id =
1539 * ======================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001540 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001541 * Overview:
1542 * Displays halt id's in string form.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001543 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001544 * Returns:
1545 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001546 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001547 * Arguments:
1548 * bp - pointer to board information
1549 *
1550 * Functional Description:
1551 * Determine current halt id and display appropriate string.
1552 *
1553 * Return Codes:
1554 * None
1555 *
1556 * Assumptions:
1557 * None
1558 *
1559 * Side Effects:
1560 * None
1561 */
1562
1563static void dfx_int_pr_halt_id(DFX_board_t *bp)
1564 {
1565 PI_UINT32 port_status; /* PDQ port status register value */
1566 PI_UINT32 halt_id; /* PDQ port status halt ID */
1567
1568 /* Read the latest port status */
1569
1570 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status);
1571
1572 /* Display halt state transition information */
1573
1574 halt_id = (port_status & PI_PSTATUS_M_HALT_ID) >> PI_PSTATUS_V_HALT_ID;
1575 switch (halt_id)
1576 {
1577 case PI_HALT_ID_K_SELFTEST_TIMEOUT:
1578 printk("%s: Halt ID: Selftest Timeout\n", bp->dev->name);
1579 break;
1580
1581 case PI_HALT_ID_K_PARITY_ERROR:
1582 printk("%s: Halt ID: Host Bus Parity Error\n", bp->dev->name);
1583 break;
1584
1585 case PI_HALT_ID_K_HOST_DIR_HALT:
1586 printk("%s: Halt ID: Host-Directed Halt\n", bp->dev->name);
1587 break;
1588
1589 case PI_HALT_ID_K_SW_FAULT:
1590 printk("%s: Halt ID: Adapter Software Fault\n", bp->dev->name);
1591 break;
1592
1593 case PI_HALT_ID_K_HW_FAULT:
1594 printk("%s: Halt ID: Adapter Hardware Fault\n", bp->dev->name);
1595 break;
1596
1597 case PI_HALT_ID_K_PC_TRACE:
1598 printk("%s: Halt ID: FDDI Network PC Trace Path Test\n", bp->dev->name);
1599 break;
1600
1601 case PI_HALT_ID_K_DMA_ERROR:
1602 printk("%s: Halt ID: Adapter DMA Error\n", bp->dev->name);
1603 break;
1604
1605 case PI_HALT_ID_K_IMAGE_CRC_ERROR:
1606 printk("%s: Halt ID: Firmware Image CRC Error\n", bp->dev->name);
1607 break;
1608
1609 case PI_HALT_ID_K_BUS_EXCEPTION:
1610 printk("%s: Halt ID: 68000 Bus Exception\n", bp->dev->name);
1611 break;
1612
1613 default:
1614 printk("%s: Halt ID: Unknown (code = %X)\n", bp->dev->name, halt_id);
1615 break;
1616 }
1617 }
1618
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001619
Linus Torvalds1da177e2005-04-16 15:20:36 -07001620/*
1621 * ==========================
1622 * = dfx_int_type_0_process =
1623 * ==========================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001624 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001625 * Overview:
1626 * Processes Type 0 interrupts.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001627 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001628 * Returns:
1629 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001630 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001631 * Arguments:
1632 * bp - pointer to board information
1633 *
1634 * Functional Description:
1635 * Processes all enabled Type 0 interrupts. If the reason for the interrupt
1636 * is a serious fault on the adapter, then an error message is displayed
1637 * and the adapter is reset.
1638 *
1639 * One tricky potential timing window is the rapid succession of "link avail"
1640 * "link unavail" state change interrupts. The acknowledgement of the Type 0
1641 * interrupt must be done before reading the state from the Port Status
1642 * register. This is true because a state change could occur after reading
1643 * the data, but before acknowledging the interrupt. If this state change
1644 * does happen, it would be lost because the driver is using the old state,
1645 * and it will never know about the new state because it subsequently
1646 * acknowledges the state change interrupt.
1647 *
1648 * INCORRECT CORRECT
1649 * read type 0 int reasons read type 0 int reasons
1650 * read adapter state ack type 0 interrupts
1651 * ack type 0 interrupts read adapter state
1652 * ... process interrupt ... ... process interrupt ...
1653 *
1654 * Return Codes:
1655 * None
1656 *
1657 * Assumptions:
1658 * None
1659 *
1660 * Side Effects:
1661 * An adapter reset may occur if the adapter has any Type 0 error interrupts
1662 * or if the port status indicates that the adapter is halted. The driver
1663 * is responsible for reinitializing the adapter with the current CAM
1664 * contents and adapter filter settings.
1665 */
1666
1667static void dfx_int_type_0_process(DFX_board_t *bp)
1668
1669 {
1670 PI_UINT32 type_0_status; /* Host Interrupt Type 0 register */
1671 PI_UINT32 state; /* current adap state (from port status) */
1672
1673 /*
1674 * Read host interrupt Type 0 register to determine which Type 0
1675 * interrupts are pending. Immediately write it back out to clear
1676 * those interrupts.
1677 */
1678
1679 dfx_port_read_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, &type_0_status);
1680 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, type_0_status);
1681
1682 /* Check for Type 0 error interrupts */
1683
1684 if (type_0_status & (PI_TYPE_0_STAT_M_NXM |
1685 PI_TYPE_0_STAT_M_PM_PAR_ERR |
1686 PI_TYPE_0_STAT_M_BUS_PAR_ERR))
1687 {
1688 /* Check for Non-Existent Memory error */
1689
1690 if (type_0_status & PI_TYPE_0_STAT_M_NXM)
1691 printk("%s: Non-Existent Memory Access Error\n", bp->dev->name);
1692
1693 /* Check for Packet Memory Parity error */
1694
1695 if (type_0_status & PI_TYPE_0_STAT_M_PM_PAR_ERR)
1696 printk("%s: Packet Memory Parity Error\n", bp->dev->name);
1697
1698 /* Check for Host Bus Parity error */
1699
1700 if (type_0_status & PI_TYPE_0_STAT_M_BUS_PAR_ERR)
1701 printk("%s: Host Bus Parity Error\n", bp->dev->name);
1702
1703 /* Reset adapter and bring it back on-line */
1704
1705 bp->link_available = PI_K_FALSE; /* link is no longer available */
1706 bp->reset_type = 0; /* rerun on-board diagnostics */
1707 printk("%s: Resetting adapter...\n", bp->dev->name);
1708 if (dfx_adap_init(bp, 0) != DFX_K_SUCCESS)
1709 {
1710 printk("%s: Adapter reset failed! Disabling adapter interrupts.\n", bp->dev->name);
1711 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1712 return;
1713 }
1714 printk("%s: Adapter reset successful!\n", bp->dev->name);
1715 return;
1716 }
1717
1718 /* Check for transmit flush interrupt */
1719
1720 if (type_0_status & PI_TYPE_0_STAT_M_XMT_FLUSH)
1721 {
1722 /* Flush any pending xmt's and acknowledge the flush interrupt */
1723
1724 bp->link_available = PI_K_FALSE; /* link is no longer available */
1725 dfx_xmt_flush(bp); /* flush any outstanding packets */
1726 (void) dfx_hw_port_ctrl_req(bp,
1727 PI_PCTRL_M_XMT_DATA_FLUSH_DONE,
1728 0,
1729 0,
1730 NULL);
1731 }
1732
1733 /* Check for adapter state change */
1734
1735 if (type_0_status & PI_TYPE_0_STAT_M_STATE_CHANGE)
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001736 {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001737 /* Get latest adapter state */
1738
1739 state = dfx_hw_adap_state_rd(bp); /* get adapter state */
1740 if (state == PI_STATE_K_HALTED)
1741 {
1742 /*
1743 * Adapter has transitioned to HALTED state, try to reset
1744 * adapter to bring it back on-line. If reset fails,
1745 * leave the adapter in the broken state.
1746 */
1747
1748 printk("%s: Controller has transitioned to HALTED state!\n", bp->dev->name);
1749 dfx_int_pr_halt_id(bp); /* display halt id as string */
1750
1751 /* Reset adapter and bring it back on-line */
1752
1753 bp->link_available = PI_K_FALSE; /* link is no longer available */
1754 bp->reset_type = 0; /* rerun on-board diagnostics */
1755 printk("%s: Resetting adapter...\n", bp->dev->name);
1756 if (dfx_adap_init(bp, 0) != DFX_K_SUCCESS)
1757 {
1758 printk("%s: Adapter reset failed! Disabling adapter interrupts.\n", bp->dev->name);
1759 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1760 return;
1761 }
1762 printk("%s: Adapter reset successful!\n", bp->dev->name);
1763 }
1764 else if (state == PI_STATE_K_LINK_AVAIL)
1765 {
1766 bp->link_available = PI_K_TRUE; /* set link available flag */
1767 }
1768 }
1769 }
1770
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001771
Linus Torvalds1da177e2005-04-16 15:20:36 -07001772/*
1773 * ==================
1774 * = dfx_int_common =
1775 * ==================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001776 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001777 * Overview:
1778 * Interrupt service routine (ISR)
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001779 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001780 * Returns:
1781 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001782 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001783 * Arguments:
1784 * bp - pointer to board information
1785 *
1786 * Functional Description:
1787 * This is the ISR which processes incoming adapter interrupts.
1788 *
1789 * Return Codes:
1790 * None
1791 *
1792 * Assumptions:
1793 * This routine assumes PDQ interrupts have not been disabled.
1794 * When interrupts are disabled at the PDQ, the Port Status register
1795 * is automatically cleared. This routine uses the Port Status
1796 * register value to determine whether a Type 0 interrupt occurred,
1797 * so it's important that adapter interrupts are not normally
1798 * enabled/disabled at the PDQ.
1799 *
1800 * It's vital that this routine is NOT reentered for the
1801 * same board and that the OS is not in another section of
1802 * code (eg. dfx_xmt_queue_pkt) for the same board on a
1803 * different thread.
1804 *
1805 * Side Effects:
1806 * Pending interrupts are serviced. Depending on the type of
1807 * interrupt, acknowledging and clearing the interrupt at the
1808 * PDQ involves writing a register to clear the interrupt bit
1809 * or updating completion indices.
1810 */
1811
1812static void dfx_int_common(struct net_device *dev)
1813{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001814 DFX_board_t *bp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001815 PI_UINT32 port_status; /* Port Status register */
1816
1817 /* Process xmt interrupts - frequent case, so always call this routine */
1818
1819 if(dfx_xmt_done(bp)) /* free consumed xmt packets */
1820 netif_wake_queue(dev);
1821
1822 /* Process rcv interrupts - frequent case, so always call this routine */
1823
1824 dfx_rcv_queue_process(bp); /* service received LLC frames */
1825
1826 /*
1827 * Transmit and receive producer and completion indices are updated on the
1828 * adapter by writing to the Type 2 Producer register. Since the frequent
1829 * case is that we'll be processing either LLC transmit or receive buffers,
1830 * we'll optimize I/O writes by doing a single register write here.
1831 */
1832
1833 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword);
1834
1835 /* Read PDQ Port Status register to find out which interrupts need processing */
1836
1837 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status);
1838
1839 /* Process Type 0 interrupts (if any) - infrequent, so only call when needed */
1840
1841 if (port_status & PI_PSTATUS_M_TYPE_0_PENDING)
1842 dfx_int_type_0_process(bp); /* process Type 0 interrupts */
1843 }
1844
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001845
Linus Torvalds1da177e2005-04-16 15:20:36 -07001846/*
1847 * =================
1848 * = dfx_interrupt =
1849 * =================
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001850 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001851 * Overview:
1852 * Interrupt processing routine
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001853 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001854 * Returns:
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001855 * Whether a valid interrupt was seen.
1856 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001857 * Arguments:
1858 * irq - interrupt vector
1859 * dev_id - pointer to device information
Linus Torvalds1da177e2005-04-16 15:20:36 -07001860 *
1861 * Functional Description:
1862 * This routine calls the interrupt processing routine for this adapter. It
1863 * disables and reenables adapter interrupts, as appropriate. We can support
1864 * shared interrupts since the incoming dev_id pointer provides our device
1865 * structure context.
1866 *
1867 * Return Codes:
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001868 * IRQ_HANDLED - an IRQ was handled.
1869 * IRQ_NONE - no IRQ was handled.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001870 *
1871 * Assumptions:
1872 * The interrupt acknowledgement at the hardware level (eg. ACKing the PIC
1873 * on Intel-based systems) is done by the operating system outside this
1874 * routine.
1875 *
1876 * System interrupts are enabled through this call.
1877 *
1878 * Side Effects:
1879 * Interrupts are disabled, then reenabled at the adapter.
1880 */
1881
David Howells7d12e782006-10-05 14:55:46 +01001882static irqreturn_t dfx_interrupt(int irq, void *dev_id)
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001883{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001884 struct net_device *dev = dev_id;
1885 DFX_board_t *bp = netdev_priv(dev);
1886 struct device *bdev = bp->bus_dev;
1887 int dfx_bus_pci = DFX_BUS_PCI(bdev);
1888 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
1889 int dfx_bus_tc = DFX_BUS_TC(bdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001890
1891 /* Service adapter interrupts */
1892
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001893 if (dfx_bus_pci) {
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001894 u32 status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001895
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001896 dfx_port_read_long(bp, PFI_K_REG_STATUS, &status);
1897 if (!(status & PFI_STATUS_M_PDQ_INT))
1898 return IRQ_NONE;
1899
1900 spin_lock(&bp->lock);
1901
1902 /* Disable PDQ-PFI interrupts at PFI */
1903 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL,
1904 PFI_MODE_M_DMA_ENB);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001905
1906 /* Call interrupt service routine for this adapter */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001907 dfx_int_common(dev);
1908
1909 /* Clear PDQ interrupt status bit and reenable interrupts */
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001910 dfx_port_write_long(bp, PFI_K_REG_STATUS,
1911 PFI_STATUS_M_PDQ_INT);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001912 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL,
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001913 (PFI_MODE_M_PDQ_INT_ENB |
1914 PFI_MODE_M_DMA_ENB));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001915
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001916 spin_unlock(&bp->lock);
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001917 }
1918 if (dfx_bus_eisa) {
1919 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001920 u8 status;
1921
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001922 status = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001923 if (!(status & PI_CONFIG_STAT_0_M_PEND))
1924 return IRQ_NONE;
1925
1926 spin_lock(&bp->lock);
1927
1928 /* Disable interrupts at the ESIC */
1929 status &= ~PI_CONFIG_STAT_0_M_INT_ENB;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001930 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, status);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001931
1932 /* Call interrupt service routine for this adapter */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001933 dfx_int_common(dev);
1934
1935 /* Reenable interrupts at the ESIC */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001936 status = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001937 status |= PI_CONFIG_STAT_0_M_INT_ENB;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001938 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, status);
1939
1940 spin_unlock(&bp->lock);
1941 }
1942 if (dfx_bus_tc) {
1943 u32 status;
1944
1945 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &status);
1946 if (!(status & (PI_PSTATUS_M_RCV_DATA_PENDING |
1947 PI_PSTATUS_M_XMT_DATA_PENDING |
1948 PI_PSTATUS_M_SMT_HOST_PENDING |
1949 PI_PSTATUS_M_UNSOL_PENDING |
1950 PI_PSTATUS_M_CMD_RSP_PENDING |
1951 PI_PSTATUS_M_CMD_REQ_PENDING |
1952 PI_PSTATUS_M_TYPE_0_PENDING)))
1953 return IRQ_NONE;
1954
1955 spin_lock(&bp->lock);
1956
1957 /* Call interrupt service routine for this adapter */
1958 dfx_int_common(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001959
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001960 spin_unlock(&bp->lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001961 }
1962
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001963 return IRQ_HANDLED;
1964}
1965
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001966
Linus Torvalds1da177e2005-04-16 15:20:36 -07001967/*
1968 * =====================
1969 * = dfx_ctl_get_stats =
1970 * =====================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001971 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001972 * Overview:
1973 * Get statistics for FDDI adapter
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001974 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001975 * Returns:
1976 * Pointer to FDDI statistics structure
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001977 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001978 * Arguments:
1979 * dev - pointer to device information
1980 *
1981 * Functional Description:
1982 * Gets current MIB objects from adapter, then
1983 * returns FDDI statistics structure as defined
1984 * in if_fddi.h.
1985 *
1986 * Note: Since the FDDI statistics structure is
1987 * still new and the device structure doesn't
1988 * have an FDDI-specific get statistics handler,
1989 * we'll return the FDDI statistics structure as
1990 * a pointer to an Ethernet statistics structure.
1991 * That way, at least the first part of the statistics
1992 * structure can be decoded properly, and it allows
1993 * "smart" applications to perform a second cast to
1994 * decode the FDDI-specific statistics.
1995 *
1996 * We'll have to pay attention to this routine as the
1997 * device structure becomes more mature and LAN media
1998 * independent.
1999 *
2000 * Return Codes:
2001 * None
2002 *
2003 * Assumptions:
2004 * None
2005 *
2006 * Side Effects:
2007 * None
2008 */
2009
2010static struct net_device_stats *dfx_ctl_get_stats(struct net_device *dev)
2011 {
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08002012 DFX_board_t *bp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002013
2014 /* Fill the bp->stats structure with driver-maintained counters */
2015
2016 bp->stats.gen.rx_packets = bp->rcv_total_frames;
2017 bp->stats.gen.tx_packets = bp->xmt_total_frames;
2018 bp->stats.gen.rx_bytes = bp->rcv_total_bytes;
2019 bp->stats.gen.tx_bytes = bp->xmt_total_bytes;
2020 bp->stats.gen.rx_errors = bp->rcv_crc_errors +
2021 bp->rcv_frame_status_errors +
2022 bp->rcv_length_errors;
2023 bp->stats.gen.tx_errors = bp->xmt_length_errors;
2024 bp->stats.gen.rx_dropped = bp->rcv_discards;
2025 bp->stats.gen.tx_dropped = bp->xmt_discards;
2026 bp->stats.gen.multicast = bp->rcv_multicast_frames;
2027 bp->stats.gen.collisions = 0; /* always zero (0) for FDDI */
2028
2029 /* Get FDDI SMT MIB objects */
2030
2031 bp->cmd_req_virt->cmd_type = PI_CMD_K_SMT_MIB_GET;
2032 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2033 return((struct net_device_stats *) &bp->stats);
2034
2035 /* Fill the bp->stats structure with the SMT MIB object values */
2036
2037 memcpy(bp->stats.smt_station_id, &bp->cmd_rsp_virt->smt_mib_get.smt_station_id, sizeof(bp->cmd_rsp_virt->smt_mib_get.smt_station_id));
2038 bp->stats.smt_op_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_op_version_id;
2039 bp->stats.smt_hi_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_hi_version_id;
2040 bp->stats.smt_lo_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_lo_version_id;
2041 memcpy(bp->stats.smt_user_data, &bp->cmd_rsp_virt->smt_mib_get.smt_user_data, sizeof(bp->cmd_rsp_virt->smt_mib_get.smt_user_data));
2042 bp->stats.smt_mib_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_mib_version_id;
2043 bp->stats.smt_mac_cts = bp->cmd_rsp_virt->smt_mib_get.smt_mac_ct;
2044 bp->stats.smt_non_master_cts = bp->cmd_rsp_virt->smt_mib_get.smt_non_master_ct;
2045 bp->stats.smt_master_cts = bp->cmd_rsp_virt->smt_mib_get.smt_master_ct;
2046 bp->stats.smt_available_paths = bp->cmd_rsp_virt->smt_mib_get.smt_available_paths;
2047 bp->stats.smt_config_capabilities = bp->cmd_rsp_virt->smt_mib_get.smt_config_capabilities;
2048 bp->stats.smt_config_policy = bp->cmd_rsp_virt->smt_mib_get.smt_config_policy;
2049 bp->stats.smt_connection_policy = bp->cmd_rsp_virt->smt_mib_get.smt_connection_policy;
2050 bp->stats.smt_t_notify = bp->cmd_rsp_virt->smt_mib_get.smt_t_notify;
2051 bp->stats.smt_stat_rpt_policy = bp->cmd_rsp_virt->smt_mib_get.smt_stat_rpt_policy;
2052 bp->stats.smt_trace_max_expiration = bp->cmd_rsp_virt->smt_mib_get.smt_trace_max_expiration;
2053 bp->stats.smt_bypass_present = bp->cmd_rsp_virt->smt_mib_get.smt_bypass_present;
2054 bp->stats.smt_ecm_state = bp->cmd_rsp_virt->smt_mib_get.smt_ecm_state;
2055 bp->stats.smt_cf_state = bp->cmd_rsp_virt->smt_mib_get.smt_cf_state;
2056 bp->stats.smt_remote_disconnect_flag = bp->cmd_rsp_virt->smt_mib_get.smt_remote_disconnect_flag;
2057 bp->stats.smt_station_status = bp->cmd_rsp_virt->smt_mib_get.smt_station_status;
2058 bp->stats.smt_peer_wrap_flag = bp->cmd_rsp_virt->smt_mib_get.smt_peer_wrap_flag;
2059 bp->stats.smt_time_stamp = bp->cmd_rsp_virt->smt_mib_get.smt_msg_time_stamp.ls;
2060 bp->stats.smt_transition_time_stamp = bp->cmd_rsp_virt->smt_mib_get.smt_transition_time_stamp.ls;
2061 bp->stats.mac_frame_status_functions = bp->cmd_rsp_virt->smt_mib_get.mac_frame_status_functions;
2062 bp->stats.mac_t_max_capability = bp->cmd_rsp_virt->smt_mib_get.mac_t_max_capability;
2063 bp->stats.mac_tvx_capability = bp->cmd_rsp_virt->smt_mib_get.mac_tvx_capability;
2064 bp->stats.mac_available_paths = bp->cmd_rsp_virt->smt_mib_get.mac_available_paths;
2065 bp->stats.mac_current_path = bp->cmd_rsp_virt->smt_mib_get.mac_current_path;
2066 memcpy(bp->stats.mac_upstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_upstream_nbr, FDDI_K_ALEN);
2067 memcpy(bp->stats.mac_downstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_downstream_nbr, FDDI_K_ALEN);
2068 memcpy(bp->stats.mac_old_upstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_old_upstream_nbr, FDDI_K_ALEN);
2069 memcpy(bp->stats.mac_old_downstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_old_downstream_nbr, FDDI_K_ALEN);
2070 bp->stats.mac_dup_address_test = bp->cmd_rsp_virt->smt_mib_get.mac_dup_address_test;
2071 bp->stats.mac_requested_paths = bp->cmd_rsp_virt->smt_mib_get.mac_requested_paths;
2072 bp->stats.mac_downstream_port_type = bp->cmd_rsp_virt->smt_mib_get.mac_downstream_port_type;
2073 memcpy(bp->stats.mac_smt_address, &bp->cmd_rsp_virt->smt_mib_get.mac_smt_address, FDDI_K_ALEN);
2074 bp->stats.mac_t_req = bp->cmd_rsp_virt->smt_mib_get.mac_t_req;
2075 bp->stats.mac_t_neg = bp->cmd_rsp_virt->smt_mib_get.mac_t_neg;
2076 bp->stats.mac_t_max = bp->cmd_rsp_virt->smt_mib_get.mac_t_max;
2077 bp->stats.mac_tvx_value = bp->cmd_rsp_virt->smt_mib_get.mac_tvx_value;
2078 bp->stats.mac_frame_error_threshold = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_threshold;
2079 bp->stats.mac_frame_error_ratio = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_ratio;
2080 bp->stats.mac_rmt_state = bp->cmd_rsp_virt->smt_mib_get.mac_rmt_state;
2081 bp->stats.mac_da_flag = bp->cmd_rsp_virt->smt_mib_get.mac_da_flag;
2082 bp->stats.mac_una_da_flag = bp->cmd_rsp_virt->smt_mib_get.mac_unda_flag;
2083 bp->stats.mac_frame_error_flag = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_flag;
2084 bp->stats.mac_ma_unitdata_available = bp->cmd_rsp_virt->smt_mib_get.mac_ma_unitdata_available;
2085 bp->stats.mac_hardware_present = bp->cmd_rsp_virt->smt_mib_get.mac_hardware_present;
2086 bp->stats.mac_ma_unitdata_enable = bp->cmd_rsp_virt->smt_mib_get.mac_ma_unitdata_enable;
2087 bp->stats.path_tvx_lower_bound = bp->cmd_rsp_virt->smt_mib_get.path_tvx_lower_bound;
2088 bp->stats.path_t_max_lower_bound = bp->cmd_rsp_virt->smt_mib_get.path_t_max_lower_bound;
2089 bp->stats.path_max_t_req = bp->cmd_rsp_virt->smt_mib_get.path_max_t_req;
2090 memcpy(bp->stats.path_configuration, &bp->cmd_rsp_virt->smt_mib_get.path_configuration, sizeof(bp->cmd_rsp_virt->smt_mib_get.path_configuration));
2091 bp->stats.port_my_type[0] = bp->cmd_rsp_virt->smt_mib_get.port_my_type[0];
2092 bp->stats.port_my_type[1] = bp->cmd_rsp_virt->smt_mib_get.port_my_type[1];
2093 bp->stats.port_neighbor_type[0] = bp->cmd_rsp_virt->smt_mib_get.port_neighbor_type[0];
2094 bp->stats.port_neighbor_type[1] = bp->cmd_rsp_virt->smt_mib_get.port_neighbor_type[1];
2095 bp->stats.port_connection_policies[0] = bp->cmd_rsp_virt->smt_mib_get.port_connection_policies[0];
2096 bp->stats.port_connection_policies[1] = bp->cmd_rsp_virt->smt_mib_get.port_connection_policies[1];
2097 bp->stats.port_mac_indicated[0] = bp->cmd_rsp_virt->smt_mib_get.port_mac_indicated[0];
2098 bp->stats.port_mac_indicated[1] = bp->cmd_rsp_virt->smt_mib_get.port_mac_indicated[1];
2099 bp->stats.port_current_path[0] = bp->cmd_rsp_virt->smt_mib_get.port_current_path[0];
2100 bp->stats.port_current_path[1] = bp->cmd_rsp_virt->smt_mib_get.port_current_path[1];
2101 memcpy(&bp->stats.port_requested_paths[0*3], &bp->cmd_rsp_virt->smt_mib_get.port_requested_paths[0], 3);
2102 memcpy(&bp->stats.port_requested_paths[1*3], &bp->cmd_rsp_virt->smt_mib_get.port_requested_paths[1], 3);
2103 bp->stats.port_mac_placement[0] = bp->cmd_rsp_virt->smt_mib_get.port_mac_placement[0];
2104 bp->stats.port_mac_placement[1] = bp->cmd_rsp_virt->smt_mib_get.port_mac_placement[1];
2105 bp->stats.port_available_paths[0] = bp->cmd_rsp_virt->smt_mib_get.port_available_paths[0];
2106 bp->stats.port_available_paths[1] = bp->cmd_rsp_virt->smt_mib_get.port_available_paths[1];
2107 bp->stats.port_pmd_class[0] = bp->cmd_rsp_virt->smt_mib_get.port_pmd_class[0];
2108 bp->stats.port_pmd_class[1] = bp->cmd_rsp_virt->smt_mib_get.port_pmd_class[1];
2109 bp->stats.port_connection_capabilities[0] = bp->cmd_rsp_virt->smt_mib_get.port_connection_capabilities[0];
2110 bp->stats.port_connection_capabilities[1] = bp->cmd_rsp_virt->smt_mib_get.port_connection_capabilities[1];
2111 bp->stats.port_bs_flag[0] = bp->cmd_rsp_virt->smt_mib_get.port_bs_flag[0];
2112 bp->stats.port_bs_flag[1] = bp->cmd_rsp_virt->smt_mib_get.port_bs_flag[1];
2113 bp->stats.port_ler_estimate[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_estimate[0];
2114 bp->stats.port_ler_estimate[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_estimate[1];
2115 bp->stats.port_ler_cutoff[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_cutoff[0];
2116 bp->stats.port_ler_cutoff[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_cutoff[1];
2117 bp->stats.port_ler_alarm[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_alarm[0];
2118 bp->stats.port_ler_alarm[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_alarm[1];
2119 bp->stats.port_connect_state[0] = bp->cmd_rsp_virt->smt_mib_get.port_connect_state[0];
2120 bp->stats.port_connect_state[1] = bp->cmd_rsp_virt->smt_mib_get.port_connect_state[1];
2121 bp->stats.port_pcm_state[0] = bp->cmd_rsp_virt->smt_mib_get.port_pcm_state[0];
2122 bp->stats.port_pcm_state[1] = bp->cmd_rsp_virt->smt_mib_get.port_pcm_state[1];
2123 bp->stats.port_pc_withhold[0] = bp->cmd_rsp_virt->smt_mib_get.port_pc_withhold[0];
2124 bp->stats.port_pc_withhold[1] = bp->cmd_rsp_virt->smt_mib_get.port_pc_withhold[1];
2125 bp->stats.port_ler_flag[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_flag[0];
2126 bp->stats.port_ler_flag[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_flag[1];
2127 bp->stats.port_hardware_present[0] = bp->cmd_rsp_virt->smt_mib_get.port_hardware_present[0];
2128 bp->stats.port_hardware_present[1] = bp->cmd_rsp_virt->smt_mib_get.port_hardware_present[1];
2129
2130 /* Get FDDI counters */
2131
2132 bp->cmd_req_virt->cmd_type = PI_CMD_K_CNTRS_GET;
2133 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2134 return((struct net_device_stats *) &bp->stats);
2135
2136 /* Fill the bp->stats structure with the FDDI counter values */
2137
2138 bp->stats.mac_frame_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.frame_cnt.ls;
2139 bp->stats.mac_copied_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.copied_cnt.ls;
2140 bp->stats.mac_transmit_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.transmit_cnt.ls;
2141 bp->stats.mac_error_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.error_cnt.ls;
2142 bp->stats.mac_lost_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.lost_cnt.ls;
2143 bp->stats.port_lct_fail_cts[0] = bp->cmd_rsp_virt->cntrs_get.cntrs.lct_rejects[0].ls;
2144 bp->stats.port_lct_fail_cts[1] = bp->cmd_rsp_virt->cntrs_get.cntrs.lct_rejects[1].ls;
2145 bp->stats.port_lem_reject_cts[0] = bp->cmd_rsp_virt->cntrs_get.cntrs.lem_rejects[0].ls;
2146 bp->stats.port_lem_reject_cts[1] = bp->cmd_rsp_virt->cntrs_get.cntrs.lem_rejects[1].ls;
2147 bp->stats.port_lem_cts[0] = bp->cmd_rsp_virt->cntrs_get.cntrs.link_errors[0].ls;
2148 bp->stats.port_lem_cts[1] = bp->cmd_rsp_virt->cntrs_get.cntrs.link_errors[1].ls;
2149
2150 return((struct net_device_stats *) &bp->stats);
2151 }
2152
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002153
Linus Torvalds1da177e2005-04-16 15:20:36 -07002154/*
2155 * ==============================
2156 * = dfx_ctl_set_multicast_list =
2157 * ==============================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002158 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002159 * Overview:
2160 * Enable/Disable LLC frame promiscuous mode reception
2161 * on the adapter and/or update multicast address table.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002162 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002163 * Returns:
2164 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002165 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002166 * Arguments:
2167 * dev - pointer to device information
2168 *
2169 * Functional Description:
2170 * This routine follows a fairly simple algorithm for setting the
2171 * adapter filters and CAM:
2172 *
2173 * if IFF_PROMISC flag is set
2174 * enable LLC individual/group promiscuous mode
2175 * else
2176 * disable LLC individual/group promiscuous mode
2177 * if number of incoming multicast addresses >
2178 * (CAM max size - number of unicast addresses in CAM)
2179 * enable LLC group promiscuous mode
2180 * set driver-maintained multicast address count to zero
2181 * else
2182 * disable LLC group promiscuous mode
2183 * set driver-maintained multicast address count to incoming count
2184 * update adapter CAM
2185 * update adapter filters
2186 *
2187 * Return Codes:
2188 * None
2189 *
2190 * Assumptions:
2191 * Multicast addresses are presented in canonical (LSB) format.
2192 *
2193 * Side Effects:
2194 * On-board adapter CAM and filters are updated.
2195 */
2196
2197static void dfx_ctl_set_multicast_list(struct net_device *dev)
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08002198{
2199 DFX_board_t *bp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002200 int i; /* used as index in for loop */
2201 struct dev_mc_list *dmi; /* ptr to multicast addr entry */
2202
2203 /* Enable LLC frame promiscuous mode, if necessary */
2204
2205 if (dev->flags & IFF_PROMISC)
2206 bp->ind_group_prom = PI_FSTATE_K_PASS; /* Enable LLC ind/group prom mode */
2207
2208 /* Else, update multicast address table */
2209
2210 else
2211 {
2212 bp->ind_group_prom = PI_FSTATE_K_BLOCK; /* Disable LLC ind/group prom mode */
2213 /*
2214 * Check whether incoming multicast address count exceeds table size
2215 *
2216 * Note: The adapters utilize an on-board 64 entry CAM for
2217 * supporting perfect filtering of multicast packets
2218 * and bridge functions when adding unicast addresses.
2219 * There is no hash function available. To support
2220 * additional multicast addresses, the all multicast
2221 * filter (LLC group promiscuous mode) must be enabled.
2222 *
2223 * The firmware reserves two CAM entries for SMT-related
2224 * multicast addresses, which leaves 62 entries available.
2225 * The following code ensures that we're not being asked
2226 * to add more than 62 addresses to the CAM. If we are,
2227 * the driver will enable the all multicast filter.
2228 * Should the number of multicast addresses drop below
2229 * the high water mark, the filter will be disabled and
2230 * perfect filtering will be used.
2231 */
2232
2233 if (dev->mc_count > (PI_CMD_ADDR_FILTER_K_SIZE - bp->uc_count))
2234 {
2235 bp->group_prom = PI_FSTATE_K_PASS; /* Enable LLC group prom mode */
2236 bp->mc_count = 0; /* Don't add mc addrs to CAM */
2237 }
2238 else
2239 {
2240 bp->group_prom = PI_FSTATE_K_BLOCK; /* Disable LLC group prom mode */
2241 bp->mc_count = dev->mc_count; /* Add mc addrs to CAM */
2242 }
2243
2244 /* Copy addresses to multicast address table, then update adapter CAM */
2245
2246 dmi = dev->mc_list; /* point to first multicast addr */
2247 for (i=0; i < bp->mc_count; i++)
2248 {
2249 memcpy(&bp->mc_table[i*FDDI_K_ALEN], dmi->dmi_addr, FDDI_K_ALEN);
2250 dmi = dmi->next; /* point to next multicast addr */
2251 }
2252 if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS)
2253 {
2254 DBG_printk("%s: Could not update multicast address table!\n", dev->name);
2255 }
2256 else
2257 {
2258 DBG_printk("%s: Multicast address table updated! Added %d addresses.\n", dev->name, bp->mc_count);
2259 }
2260 }
2261
2262 /* Update adapter filters */
2263
2264 if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS)
2265 {
2266 DBG_printk("%s: Could not update adapter filters!\n", dev->name);
2267 }
2268 else
2269 {
2270 DBG_printk("%s: Adapter filters updated!\n", dev->name);
2271 }
2272 }
2273
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002274
Linus Torvalds1da177e2005-04-16 15:20:36 -07002275/*
2276 * ===========================
2277 * = dfx_ctl_set_mac_address =
2278 * ===========================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002279 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002280 * Overview:
2281 * Add node address override (unicast address) to adapter
2282 * CAM and update dev_addr field in device table.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002283 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002284 * Returns:
2285 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002286 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002287 * Arguments:
2288 * dev - pointer to device information
2289 * addr - pointer to sockaddr structure containing unicast address to add
2290 *
2291 * Functional Description:
2292 * The adapter supports node address overrides by adding one or more
2293 * unicast addresses to the adapter CAM. This is similar to adding
2294 * multicast addresses. In this routine we'll update the driver and
2295 * device structures with the new address, then update the adapter CAM
2296 * to ensure that the adapter will copy and strip frames destined and
2297 * sourced by that address.
2298 *
2299 * Return Codes:
2300 * Always returns zero.
2301 *
2302 * Assumptions:
2303 * The address pointed to by addr->sa_data is a valid unicast
2304 * address and is presented in canonical (LSB) format.
2305 *
2306 * Side Effects:
2307 * On-board adapter CAM is updated. On-board adapter filters
2308 * may be updated.
2309 */
2310
2311static int dfx_ctl_set_mac_address(struct net_device *dev, void *addr)
2312 {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002313 struct sockaddr *p_sockaddr = (struct sockaddr *)addr;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08002314 DFX_board_t *bp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002315
2316 /* Copy unicast address to driver-maintained structs and update count */
2317
2318 memcpy(dev->dev_addr, p_sockaddr->sa_data, FDDI_K_ALEN); /* update device struct */
2319 memcpy(&bp->uc_table[0], p_sockaddr->sa_data, FDDI_K_ALEN); /* update driver struct */
2320 bp->uc_count = 1;
2321
2322 /*
2323 * Verify we're not exceeding the CAM size by adding unicast address
2324 *
2325 * Note: It's possible that before entering this routine we've
2326 * already filled the CAM with 62 multicast addresses.
2327 * Since we need to place the node address override into
2328 * the CAM, we have to check to see that we're not
2329 * exceeding the CAM size. If we are, we have to enable
2330 * the LLC group (multicast) promiscuous mode filter as
2331 * in dfx_ctl_set_multicast_list.
2332 */
2333
2334 if ((bp->uc_count + bp->mc_count) > PI_CMD_ADDR_FILTER_K_SIZE)
2335 {
2336 bp->group_prom = PI_FSTATE_K_PASS; /* Enable LLC group prom mode */
2337 bp->mc_count = 0; /* Don't add mc addrs to CAM */
2338
2339 /* Update adapter filters */
2340
2341 if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS)
2342 {
2343 DBG_printk("%s: Could not update adapter filters!\n", dev->name);
2344 }
2345 else
2346 {
2347 DBG_printk("%s: Adapter filters updated!\n", dev->name);
2348 }
2349 }
2350
2351 /* Update adapter CAM with new unicast address */
2352
2353 if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS)
2354 {
2355 DBG_printk("%s: Could not set new MAC address!\n", dev->name);
2356 }
2357 else
2358 {
2359 DBG_printk("%s: Adapter CAM updated with new MAC address\n", dev->name);
2360 }
2361 return(0); /* always return zero */
2362 }
2363
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002364
Linus Torvalds1da177e2005-04-16 15:20:36 -07002365/*
2366 * ======================
2367 * = dfx_ctl_update_cam =
2368 * ======================
2369 *
2370 * Overview:
2371 * Procedure to update adapter CAM (Content Addressable Memory)
2372 * with desired unicast and multicast address entries.
2373 *
2374 * Returns:
2375 * Condition code
2376 *
2377 * Arguments:
2378 * bp - pointer to board information
2379 *
2380 * Functional Description:
2381 * Updates adapter CAM with current contents of board structure
2382 * unicast and multicast address tables. Since there are only 62
2383 * free entries in CAM, this routine ensures that the command
2384 * request buffer is not overrun.
2385 *
2386 * Return Codes:
2387 * DFX_K_SUCCESS - Request succeeded
2388 * DFX_K_FAILURE - Request failed
2389 *
2390 * Assumptions:
2391 * All addresses being added (unicast and multicast) are in canonical
2392 * order.
2393 *
2394 * Side Effects:
2395 * On-board adapter CAM is updated.
2396 */
2397
2398static int dfx_ctl_update_cam(DFX_board_t *bp)
2399 {
2400 int i; /* used as index */
2401 PI_LAN_ADDR *p_addr; /* pointer to CAM entry */
2402
2403 /*
2404 * Fill in command request information
2405 *
2406 * Note: Even though both the unicast and multicast address
2407 * table entries are stored as contiguous 6 byte entries,
2408 * the firmware address filter set command expects each
2409 * entry to be two longwords (8 bytes total). We must be
2410 * careful to only copy the six bytes of each unicast and
2411 * multicast table entry into each command entry. This
2412 * is also why we must first clear the entire command
2413 * request buffer.
2414 */
2415
2416 memset(bp->cmd_req_virt, 0, PI_CMD_REQ_K_SIZE_MAX); /* first clear buffer */
2417 bp->cmd_req_virt->cmd_type = PI_CMD_K_ADDR_FILTER_SET;
2418 p_addr = &bp->cmd_req_virt->addr_filter_set.entry[0];
2419
2420 /* Now add unicast addresses to command request buffer, if any */
2421
2422 for (i=0; i < (int)bp->uc_count; i++)
2423 {
2424 if (i < PI_CMD_ADDR_FILTER_K_SIZE)
2425 {
2426 memcpy(p_addr, &bp->uc_table[i*FDDI_K_ALEN], FDDI_K_ALEN);
2427 p_addr++; /* point to next command entry */
2428 }
2429 }
2430
2431 /* Now add multicast addresses to command request buffer, if any */
2432
2433 for (i=0; i < (int)bp->mc_count; i++)
2434 {
2435 if ((i + bp->uc_count) < PI_CMD_ADDR_FILTER_K_SIZE)
2436 {
2437 memcpy(p_addr, &bp->mc_table[i*FDDI_K_ALEN], FDDI_K_ALEN);
2438 p_addr++; /* point to next command entry */
2439 }
2440 }
2441
2442 /* Issue command to update adapter CAM, then return */
2443
2444 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2445 return(DFX_K_FAILURE);
2446 return(DFX_K_SUCCESS);
2447 }
2448
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002449
Linus Torvalds1da177e2005-04-16 15:20:36 -07002450/*
2451 * ==========================
2452 * = dfx_ctl_update_filters =
2453 * ==========================
2454 *
2455 * Overview:
2456 * Procedure to update adapter filters with desired
2457 * filter settings.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002458 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002459 * Returns:
2460 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002461 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002462 * Arguments:
2463 * bp - pointer to board information
2464 *
2465 * Functional Description:
2466 * Enables or disables filter using current filter settings.
2467 *
2468 * Return Codes:
2469 * DFX_K_SUCCESS - Request succeeded.
2470 * DFX_K_FAILURE - Request failed.
2471 *
2472 * Assumptions:
2473 * We must always pass up packets destined to the broadcast
2474 * address (FF-FF-FF-FF-FF-FF), so we'll always keep the
2475 * broadcast filter enabled.
2476 *
2477 * Side Effects:
2478 * On-board adapter filters are updated.
2479 */
2480
2481static int dfx_ctl_update_filters(DFX_board_t *bp)
2482 {
2483 int i = 0; /* used as index */
2484
2485 /* Fill in command request information */
2486
2487 bp->cmd_req_virt->cmd_type = PI_CMD_K_FILTERS_SET;
2488
2489 /* Initialize Broadcast filter - * ALWAYS ENABLED * */
2490
2491 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_BROADCAST;
2492 bp->cmd_req_virt->filter_set.item[i++].value = PI_FSTATE_K_PASS;
2493
2494 /* Initialize LLC Individual/Group Promiscuous filter */
2495
2496 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_IND_GROUP_PROM;
2497 bp->cmd_req_virt->filter_set.item[i++].value = bp->ind_group_prom;
2498
2499 /* Initialize LLC Group Promiscuous filter */
2500
2501 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_GROUP_PROM;
2502 bp->cmd_req_virt->filter_set.item[i++].value = bp->group_prom;
2503
2504 /* Terminate the item code list */
2505
2506 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_EOL;
2507
2508 /* Issue command to update adapter filters, then return */
2509
2510 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2511 return(DFX_K_FAILURE);
2512 return(DFX_K_SUCCESS);
2513 }
2514
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002515
Linus Torvalds1da177e2005-04-16 15:20:36 -07002516/*
2517 * ======================
2518 * = dfx_hw_dma_cmd_req =
2519 * ======================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002520 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002521 * Overview:
2522 * Sends PDQ DMA command to adapter firmware
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002523 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002524 * Returns:
2525 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002526 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002527 * Arguments:
2528 * bp - pointer to board information
2529 *
2530 * Functional Description:
2531 * The command request and response buffers are posted to the adapter in the manner
2532 * described in the PDQ Port Specification:
2533 *
2534 * 1. Command Response Buffer is posted to adapter.
2535 * 2. Command Request Buffer is posted to adapter.
2536 * 3. Command Request consumer index is polled until it indicates that request
2537 * buffer has been DMA'd to adapter.
2538 * 4. Command Response consumer index is polled until it indicates that response
2539 * buffer has been DMA'd from adapter.
2540 *
2541 * This ordering ensures that a response buffer is already available for the firmware
2542 * to use once it's done processing the request buffer.
2543 *
2544 * Return Codes:
2545 * DFX_K_SUCCESS - DMA command succeeded
2546 * DFX_K_OUTSTATE - Adapter is NOT in proper state
2547 * DFX_K_HW_TIMEOUT - DMA command timed out
2548 *
2549 * Assumptions:
2550 * Command request buffer has already been filled with desired DMA command.
2551 *
2552 * Side Effects:
2553 * None
2554 */
2555
2556static int dfx_hw_dma_cmd_req(DFX_board_t *bp)
2557 {
2558 int status; /* adapter status */
2559 int timeout_cnt; /* used in for loops */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002560
Linus Torvalds1da177e2005-04-16 15:20:36 -07002561 /* Make sure the adapter is in a state that we can issue the DMA command in */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002562
Linus Torvalds1da177e2005-04-16 15:20:36 -07002563 status = dfx_hw_adap_state_rd(bp);
2564 if ((status == PI_STATE_K_RESET) ||
2565 (status == PI_STATE_K_HALTED) ||
2566 (status == PI_STATE_K_DMA_UNAVAIL) ||
2567 (status == PI_STATE_K_UPGRADE))
2568 return(DFX_K_OUTSTATE);
2569
2570 /* Put response buffer on the command response queue */
2571
2572 bp->descr_block_virt->cmd_rsp[bp->cmd_rsp_reg.index.prod].long_0 = (u32) (PI_RCV_DESCR_M_SOP |
2573 ((PI_CMD_RSP_K_SIZE_MAX / PI_ALIGN_K_CMD_RSP_BUFF) << PI_RCV_DESCR_V_SEG_LEN));
2574 bp->descr_block_virt->cmd_rsp[bp->cmd_rsp_reg.index.prod].long_1 = bp->cmd_rsp_phys;
2575
2576 /* Bump (and wrap) the producer index and write out to register */
2577
2578 bp->cmd_rsp_reg.index.prod += 1;
2579 bp->cmd_rsp_reg.index.prod &= PI_CMD_RSP_K_NUM_ENTRIES-1;
2580 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_RSP_PROD, bp->cmd_rsp_reg.lword);
2581
2582 /* Put request buffer on the command request queue */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002583
Linus Torvalds1da177e2005-04-16 15:20:36 -07002584 bp->descr_block_virt->cmd_req[bp->cmd_req_reg.index.prod].long_0 = (u32) (PI_XMT_DESCR_M_SOP |
2585 PI_XMT_DESCR_M_EOP | (PI_CMD_REQ_K_SIZE_MAX << PI_XMT_DESCR_V_SEG_LEN));
2586 bp->descr_block_virt->cmd_req[bp->cmd_req_reg.index.prod].long_1 = bp->cmd_req_phys;
2587
2588 /* Bump (and wrap) the producer index and write out to register */
2589
2590 bp->cmd_req_reg.index.prod += 1;
2591 bp->cmd_req_reg.index.prod &= PI_CMD_REQ_K_NUM_ENTRIES-1;
2592 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_REQ_PROD, bp->cmd_req_reg.lword);
2593
2594 /*
2595 * Here we wait for the command request consumer index to be equal
2596 * to the producer, indicating that the adapter has DMAed the request.
2597 */
2598
2599 for (timeout_cnt = 20000; timeout_cnt > 0; timeout_cnt--)
2600 {
2601 if (bp->cmd_req_reg.index.prod == (u8)(bp->cons_block_virt->cmd_req))
2602 break;
2603 udelay(100); /* wait for 100 microseconds */
2604 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002605 if (timeout_cnt == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002606 return(DFX_K_HW_TIMEOUT);
2607
2608 /* Bump (and wrap) the completion index and write out to register */
2609
2610 bp->cmd_req_reg.index.comp += 1;
2611 bp->cmd_req_reg.index.comp &= PI_CMD_REQ_K_NUM_ENTRIES-1;
2612 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_REQ_PROD, bp->cmd_req_reg.lword);
2613
2614 /*
2615 * Here we wait for the command response consumer index to be equal
2616 * to the producer, indicating that the adapter has DMAed the response.
2617 */
2618
2619 for (timeout_cnt = 20000; timeout_cnt > 0; timeout_cnt--)
2620 {
2621 if (bp->cmd_rsp_reg.index.prod == (u8)(bp->cons_block_virt->cmd_rsp))
2622 break;
2623 udelay(100); /* wait for 100 microseconds */
2624 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002625 if (timeout_cnt == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002626 return(DFX_K_HW_TIMEOUT);
2627
2628 /* Bump (and wrap) the completion index and write out to register */
2629
2630 bp->cmd_rsp_reg.index.comp += 1;
2631 bp->cmd_rsp_reg.index.comp &= PI_CMD_RSP_K_NUM_ENTRIES-1;
2632 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_RSP_PROD, bp->cmd_rsp_reg.lword);
2633 return(DFX_K_SUCCESS);
2634 }
2635
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002636
Linus Torvalds1da177e2005-04-16 15:20:36 -07002637/*
2638 * ========================
2639 * = dfx_hw_port_ctrl_req =
2640 * ========================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002641 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002642 * Overview:
2643 * Sends PDQ port control command to adapter firmware
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002644 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002645 * Returns:
2646 * Host data register value in host_data if ptr is not NULL
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002647 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002648 * Arguments:
2649 * bp - pointer to board information
2650 * command - port control command
2651 * data_a - port data A register value
2652 * data_b - port data B register value
2653 * host_data - ptr to host data register value
2654 *
2655 * Functional Description:
2656 * Send generic port control command to adapter by writing
2657 * to various PDQ port registers, then polling for completion.
2658 *
2659 * Return Codes:
2660 * DFX_K_SUCCESS - port control command succeeded
2661 * DFX_K_HW_TIMEOUT - port control command timed out
2662 *
2663 * Assumptions:
2664 * None
2665 *
2666 * Side Effects:
2667 * None
2668 */
2669
2670static int dfx_hw_port_ctrl_req(
2671 DFX_board_t *bp,
2672 PI_UINT32 command,
2673 PI_UINT32 data_a,
2674 PI_UINT32 data_b,
2675 PI_UINT32 *host_data
2676 )
2677
2678 {
2679 PI_UINT32 port_cmd; /* Port Control command register value */
2680 int timeout_cnt; /* used in for loops */
2681
2682 /* Set Command Error bit in command longword */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002683
Linus Torvalds1da177e2005-04-16 15:20:36 -07002684 port_cmd = (PI_UINT32) (command | PI_PCTRL_M_CMD_ERROR);
2685
2686 /* Issue port command to the adapter */
2687
2688 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_A, data_a);
2689 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_B, data_b);
2690 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_CTRL, port_cmd);
2691
2692 /* Now wait for command to complete */
2693
2694 if (command == PI_PCTRL_M_BLAST_FLASH)
2695 timeout_cnt = 600000; /* set command timeout count to 60 seconds */
2696 else
2697 timeout_cnt = 20000; /* set command timeout count to 2 seconds */
2698
2699 for (; timeout_cnt > 0; timeout_cnt--)
2700 {
2701 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_CTRL, &port_cmd);
2702 if (!(port_cmd & PI_PCTRL_M_CMD_ERROR))
2703 break;
2704 udelay(100); /* wait for 100 microseconds */
2705 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002706 if (timeout_cnt == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002707 return(DFX_K_HW_TIMEOUT);
2708
2709 /*
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002710 * If the address of host_data is non-zero, assume caller has supplied a
2711 * non NULL pointer, and return the contents of the HOST_DATA register in
Linus Torvalds1da177e2005-04-16 15:20:36 -07002712 * it.
2713 */
2714
2715 if (host_data != NULL)
2716 dfx_port_read_long(bp, PI_PDQ_K_REG_HOST_DATA, host_data);
2717 return(DFX_K_SUCCESS);
2718 }
2719
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002720
Linus Torvalds1da177e2005-04-16 15:20:36 -07002721/*
2722 * =====================
2723 * = dfx_hw_adap_reset =
2724 * =====================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002725 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002726 * Overview:
2727 * Resets adapter
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002728 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002729 * Returns:
2730 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002731 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002732 * Arguments:
2733 * bp - pointer to board information
2734 * type - type of reset to perform
2735 *
2736 * Functional Description:
2737 * Issue soft reset to adapter by writing to PDQ Port Reset
2738 * register. Use incoming reset type to tell adapter what
2739 * kind of reset operation to perform.
2740 *
2741 * Return Codes:
2742 * None
2743 *
2744 * Assumptions:
2745 * This routine merely issues a soft reset to the adapter.
2746 * It is expected that after this routine returns, the caller
2747 * will appropriately poll the Port Status register for the
2748 * adapter to enter the proper state.
2749 *
2750 * Side Effects:
2751 * Internal adapter registers are cleared.
2752 */
2753
2754static void dfx_hw_adap_reset(
2755 DFX_board_t *bp,
2756 PI_UINT32 type
2757 )
2758
2759 {
2760 /* Set Reset type and assert reset */
2761
2762 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_A, type); /* tell adapter type of reset */
2763 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_RESET, PI_RESET_M_ASSERT_RESET);
2764
2765 /* Wait for at least 1 Microsecond according to the spec. We wait 20 just to be safe */
2766
2767 udelay(20);
2768
2769 /* Deassert reset */
2770
2771 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_RESET, 0);
2772 }
2773
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002774
Linus Torvalds1da177e2005-04-16 15:20:36 -07002775/*
2776 * ========================
2777 * = dfx_hw_adap_state_rd =
2778 * ========================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002779 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002780 * Overview:
2781 * Returns current adapter state
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002782 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002783 * Returns:
2784 * Adapter state per PDQ Port Specification
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002785 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002786 * Arguments:
2787 * bp - pointer to board information
2788 *
2789 * Functional Description:
2790 * Reads PDQ Port Status register and returns adapter state.
2791 *
2792 * Return Codes:
2793 * None
2794 *
2795 * Assumptions:
2796 * None
2797 *
2798 * Side Effects:
2799 * None
2800 */
2801
2802static int dfx_hw_adap_state_rd(DFX_board_t *bp)
2803 {
2804 PI_UINT32 port_status; /* Port Status register value */
2805
2806 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status);
2807 return((port_status & PI_PSTATUS_M_STATE) >> PI_PSTATUS_V_STATE);
2808 }
2809
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002810
Linus Torvalds1da177e2005-04-16 15:20:36 -07002811/*
2812 * =====================
2813 * = dfx_hw_dma_uninit =
2814 * =====================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002815 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002816 * Overview:
2817 * Brings adapter to DMA_UNAVAILABLE state
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002818 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002819 * Returns:
2820 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002821 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002822 * Arguments:
2823 * bp - pointer to board information
2824 * type - type of reset to perform
2825 *
2826 * Functional Description:
2827 * Bring adapter to DMA_UNAVAILABLE state by performing the following:
2828 * 1. Set reset type bit in Port Data A Register then reset adapter.
2829 * 2. Check that adapter is in DMA_UNAVAILABLE state.
2830 *
2831 * Return Codes:
2832 * DFX_K_SUCCESS - adapter is in DMA_UNAVAILABLE state
2833 * DFX_K_HW_TIMEOUT - adapter did not reset properly
2834 *
2835 * Assumptions:
2836 * None
2837 *
2838 * Side Effects:
2839 * Internal adapter registers are cleared.
2840 */
2841
2842static int dfx_hw_dma_uninit(DFX_board_t *bp, PI_UINT32 type)
2843 {
2844 int timeout_cnt; /* used in for loops */
2845
2846 /* Set reset type bit and reset adapter */
2847
2848 dfx_hw_adap_reset(bp, type);
2849
2850 /* Now wait for adapter to enter DMA_UNAVAILABLE state */
2851
2852 for (timeout_cnt = 100000; timeout_cnt > 0; timeout_cnt--)
2853 {
2854 if (dfx_hw_adap_state_rd(bp) == PI_STATE_K_DMA_UNAVAIL)
2855 break;
2856 udelay(100); /* wait for 100 microseconds */
2857 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002858 if (timeout_cnt == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002859 return(DFX_K_HW_TIMEOUT);
2860 return(DFX_K_SUCCESS);
2861 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002862
Linus Torvalds1da177e2005-04-16 15:20:36 -07002863/*
2864 * Align an sk_buff to a boundary power of 2
2865 *
2866 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002867
Linus Torvalds1da177e2005-04-16 15:20:36 -07002868static void my_skb_align(struct sk_buff *skb, int n)
2869{
2870 unsigned long x = (unsigned long)skb->data;
2871 unsigned long v;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002872
Linus Torvalds1da177e2005-04-16 15:20:36 -07002873 v = ALIGN(x, n); /* Where we want to be */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002874
Linus Torvalds1da177e2005-04-16 15:20:36 -07002875 skb_reserve(skb, v - x);
2876}
2877
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002878
Linus Torvalds1da177e2005-04-16 15:20:36 -07002879/*
2880 * ================
2881 * = dfx_rcv_init =
2882 * ================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002883 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002884 * Overview:
2885 * Produces buffers to adapter LLC Host receive descriptor block
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002886 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002887 * Returns:
2888 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002889 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002890 * Arguments:
2891 * bp - pointer to board information
2892 * get_buffers - non-zero if buffers to be allocated
2893 *
2894 * Functional Description:
2895 * This routine can be called during dfx_adap_init() or during an adapter
2896 * reset. It initializes the descriptor block and produces all allocated
2897 * LLC Host queue receive buffers.
2898 *
2899 * Return Codes:
2900 * Return 0 on success or -ENOMEM if buffer allocation failed (when using
2901 * dynamic buffer allocation). If the buffer allocation failed, the
2902 * already allocated buffers will not be released and the caller should do
2903 * this.
2904 *
2905 * Assumptions:
2906 * The PDQ has been reset and the adapter and driver maintained Type 2
2907 * register indices are cleared.
2908 *
2909 * Side Effects:
2910 * Receive buffers are posted to the adapter LLC queue and the adapter
2911 * is notified.
2912 */
2913
2914static int dfx_rcv_init(DFX_board_t *bp, int get_buffers)
2915 {
2916 int i, j; /* used in for loop */
2917
2918 /*
2919 * Since each receive buffer is a single fragment of same length, initialize
2920 * first longword in each receive descriptor for entire LLC Host descriptor
2921 * block. Also initialize second longword in each receive descriptor with
2922 * physical address of receive buffer. We'll always allocate receive
2923 * buffers in powers of 2 so that we can easily fill the 256 entry descriptor
2924 * block and produce new receive buffers by simply updating the receive
2925 * producer index.
2926 *
2927 * Assumptions:
2928 * To support all shipping versions of PDQ, the receive buffer size
2929 * must be mod 128 in length and the physical address must be 128 byte
2930 * aligned. In other words, bits 0-6 of the length and address must
2931 * be zero for the following descriptor field entries to be correct on
2932 * all PDQ-based boards. We guaranteed both requirements during
2933 * driver initialization when we allocated memory for the receive buffers.
2934 */
2935
2936 if (get_buffers) {
2937#ifdef DYNAMIC_BUFFERS
2938 for (i = 0; i < (int)(bp->rcv_bufs_to_post); i++)
2939 for (j = 0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post)
2940 {
David S. Miller9034f772009-02-10 01:56:45 -08002941 struct sk_buff *newskb = __netdev_alloc_skb(bp->dev, NEW_SKB_SIZE, GFP_NOIO);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002942 if (!newskb)
2943 return -ENOMEM;
2944 bp->descr_block_virt->rcv_data[i+j].long_0 = (u32) (PI_RCV_DESCR_M_SOP |
2945 ((PI_RCV_DATA_K_SIZE_MAX / PI_ALIGN_K_RCV_DATA_BUFF) << PI_RCV_DESCR_V_SEG_LEN));
2946 /*
2947 * align to 128 bytes for compatibility with
2948 * the old EISA boards.
2949 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002950
Linus Torvalds1da177e2005-04-16 15:20:36 -07002951 my_skb_align(newskb, 128);
2952 bp->descr_block_virt->rcv_data[i + j].long_1 =
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08002953 (u32)dma_map_single(bp->bus_dev, newskb->data,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002954 NEW_SKB_SIZE,
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08002955 DMA_FROM_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002956 /*
2957 * p_rcv_buff_va is only used inside the
2958 * kernel so we put the skb pointer here.
2959 */
2960 bp->p_rcv_buff_va[i+j] = (char *) newskb;
2961 }
2962#else
2963 for (i=0; i < (int)(bp->rcv_bufs_to_post); i++)
2964 for (j=0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post)
2965 {
2966 bp->descr_block_virt->rcv_data[i+j].long_0 = (u32) (PI_RCV_DESCR_M_SOP |
2967 ((PI_RCV_DATA_K_SIZE_MAX / PI_ALIGN_K_RCV_DATA_BUFF) << PI_RCV_DESCR_V_SEG_LEN));
2968 bp->descr_block_virt->rcv_data[i+j].long_1 = (u32) (bp->rcv_block_phys + (i * PI_RCV_DATA_K_SIZE_MAX));
2969 bp->p_rcv_buff_va[i+j] = (char *) (bp->rcv_block_virt + (i * PI_RCV_DATA_K_SIZE_MAX));
2970 }
2971#endif
2972 }
2973
2974 /* Update receive producer and Type 2 register */
2975
2976 bp->rcv_xmt_reg.index.rcv_prod = bp->rcv_bufs_to_post;
2977 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword);
2978 return 0;
2979 }
2980
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002981
Linus Torvalds1da177e2005-04-16 15:20:36 -07002982/*
2983 * =========================
2984 * = dfx_rcv_queue_process =
2985 * =========================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002986 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002987 * Overview:
2988 * Process received LLC frames.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002989 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002990 * Returns:
2991 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002992 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002993 * Arguments:
2994 * bp - pointer to board information
2995 *
2996 * Functional Description:
2997 * Received LLC frames are processed until there are no more consumed frames.
2998 * Once all frames are processed, the receive buffers are returned to the
2999 * adapter. Note that this algorithm fixes the length of time that can be spent
3000 * in this routine, because there are a fixed number of receive buffers to
3001 * process and buffers are not produced until this routine exits and returns
3002 * to the ISR.
3003 *
3004 * Return Codes:
3005 * None
3006 *
3007 * Assumptions:
3008 * None
3009 *
3010 * Side Effects:
3011 * None
3012 */
3013
3014static void dfx_rcv_queue_process(
3015 DFX_board_t *bp
3016 )
3017
3018 {
3019 PI_TYPE_2_CONSUMER *p_type_2_cons; /* ptr to rcv/xmt consumer block register */
3020 char *p_buff; /* ptr to start of packet receive buffer (FMC descriptor) */
3021 u32 descr, pkt_len; /* FMC descriptor field and packet length */
3022 struct sk_buff *skb; /* pointer to a sk_buff to hold incoming packet data */
3023
3024 /* Service all consumed LLC receive frames */
3025
3026 p_type_2_cons = (PI_TYPE_2_CONSUMER *)(&bp->cons_block_virt->xmt_rcv_data);
3027 while (bp->rcv_xmt_reg.index.rcv_comp != p_type_2_cons->index.rcv_cons)
3028 {
3029 /* Process any errors */
3030
3031 int entry;
3032
3033 entry = bp->rcv_xmt_reg.index.rcv_comp;
3034#ifdef DYNAMIC_BUFFERS
3035 p_buff = (char *) (((struct sk_buff *)bp->p_rcv_buff_va[entry])->data);
3036#else
3037 p_buff = (char *) bp->p_rcv_buff_va[entry];
3038#endif
3039 memcpy(&descr, p_buff + RCV_BUFF_K_DESCR, sizeof(u32));
3040
3041 if (descr & PI_FMC_DESCR_M_RCC_FLUSH)
3042 {
3043 if (descr & PI_FMC_DESCR_M_RCC_CRC)
3044 bp->rcv_crc_errors++;
3045 else
3046 bp->rcv_frame_status_errors++;
3047 }
3048 else
3049 {
3050 int rx_in_place = 0;
3051
3052 /* The frame was received without errors - verify packet length */
3053
3054 pkt_len = (u32)((descr & PI_FMC_DESCR_M_LEN) >> PI_FMC_DESCR_V_LEN);
3055 pkt_len -= 4; /* subtract 4 byte CRC */
3056 if (!IN_RANGE(pkt_len, FDDI_K_LLC_ZLEN, FDDI_K_LLC_LEN))
3057 bp->rcv_length_errors++;
3058 else{
3059#ifdef DYNAMIC_BUFFERS
3060 if (pkt_len > SKBUFF_RX_COPYBREAK) {
3061 struct sk_buff *newskb;
3062
3063 newskb = dev_alloc_skb(NEW_SKB_SIZE);
3064 if (newskb){
3065 rx_in_place = 1;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003066
Linus Torvalds1da177e2005-04-16 15:20:36 -07003067 my_skb_align(newskb, 128);
3068 skb = (struct sk_buff *)bp->p_rcv_buff_va[entry];
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003069 dma_unmap_single(bp->bus_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003070 bp->descr_block_virt->rcv_data[entry].long_1,
3071 NEW_SKB_SIZE,
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003072 DMA_FROM_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003073 skb_reserve(skb, RCV_BUFF_K_PADDING);
3074 bp->p_rcv_buff_va[entry] = (char *)newskb;
3075 bp->descr_block_virt->rcv_data[entry].long_1 =
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003076 (u32)dma_map_single(bp->bus_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003077 newskb->data,
3078 NEW_SKB_SIZE,
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003079 DMA_FROM_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003080 } else
3081 skb = NULL;
3082 } else
3083#endif
3084 skb = dev_alloc_skb(pkt_len+3); /* alloc new buffer to pass up, add room for PRH */
3085 if (skb == NULL)
3086 {
3087 printk("%s: Could not allocate receive buffer. Dropping packet.\n", bp->dev->name);
3088 bp->rcv_discards++;
3089 break;
3090 }
3091 else {
3092#ifndef DYNAMIC_BUFFERS
3093 if (! rx_in_place)
3094#endif
3095 {
3096 /* Receive buffer allocated, pass receive packet up */
3097
Arnaldo Carvalho de Melo27d7ff42007-03-31 11:55:19 -03003098 skb_copy_to_linear_data(skb,
3099 p_buff + RCV_BUFF_K_PADDING,
3100 pkt_len + 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003101 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003102
Linus Torvalds1da177e2005-04-16 15:20:36 -07003103 skb_reserve(skb,3); /* adjust data field so that it points to FC byte */
3104 skb_put(skb, pkt_len); /* pass up packet length, NOT including CRC */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003105 skb->protocol = fddi_type_trans(skb, bp->dev);
3106 bp->rcv_total_bytes += skb->len;
3107 netif_rx(skb);
3108
3109 /* Update the rcv counters */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003110 bp->rcv_total_frames++;
3111 if (*(p_buff + RCV_BUFF_K_DA) & 0x01)
3112 bp->rcv_multicast_frames++;
3113 }
3114 }
3115 }
3116
3117 /*
3118 * Advance the producer (for recycling) and advance the completion
3119 * (for servicing received frames). Note that it is okay to
3120 * advance the producer without checking that it passes the
3121 * completion index because they are both advanced at the same
3122 * rate.
3123 */
3124
3125 bp->rcv_xmt_reg.index.rcv_prod += 1;
3126 bp->rcv_xmt_reg.index.rcv_comp += 1;
3127 }
3128 }
3129
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003130
Linus Torvalds1da177e2005-04-16 15:20:36 -07003131/*
3132 * =====================
3133 * = dfx_xmt_queue_pkt =
3134 * =====================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003135 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003136 * Overview:
3137 * Queues packets for transmission
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003138 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003139 * Returns:
3140 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003141 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003142 * Arguments:
3143 * skb - pointer to sk_buff to queue for transmission
3144 * dev - pointer to device information
3145 *
3146 * Functional Description:
3147 * Here we assume that an incoming skb transmit request
3148 * is contained in a single physically contiguous buffer
3149 * in which the virtual address of the start of packet
3150 * (skb->data) can be converted to a physical address
3151 * by using pci_map_single().
3152 *
3153 * Since the adapter architecture requires a three byte
3154 * packet request header to prepend the start of packet,
3155 * we'll write the three byte field immediately prior to
3156 * the FC byte. This assumption is valid because we've
3157 * ensured that dev->hard_header_len includes three pad
3158 * bytes. By posting a single fragment to the adapter,
3159 * we'll reduce the number of descriptor fetches and
3160 * bus traffic needed to send the request.
3161 *
3162 * Also, we can't free the skb until after it's been DMA'd
3163 * out by the adapter, so we'll queue it in the driver and
3164 * return it in dfx_xmt_done.
3165 *
3166 * Return Codes:
3167 * 0 - driver queued packet, link is unavailable, or skbuff was bad
3168 * 1 - caller should requeue the sk_buff for later transmission
3169 *
3170 * Assumptions:
3171 * First and foremost, we assume the incoming skb pointer
3172 * is NOT NULL and is pointing to a valid sk_buff structure.
3173 *
3174 * The outgoing packet is complete, starting with the
3175 * frame control byte including the last byte of data,
3176 * but NOT including the 4 byte CRC. We'll let the
3177 * adapter hardware generate and append the CRC.
3178 *
3179 * The entire packet is stored in one physically
3180 * contiguous buffer which is not cached and whose
3181 * 32-bit physical address can be determined.
3182 *
3183 * It's vital that this routine is NOT reentered for the
3184 * same board and that the OS is not in another section of
3185 * code (eg. dfx_int_common) for the same board on a
3186 * different thread.
3187 *
3188 * Side Effects:
3189 * None
3190 */
3191
Stephen Hemminger613573252009-08-31 19:50:58 +00003192static netdev_tx_t dfx_xmt_queue_pkt(struct sk_buff *skb,
3193 struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003194 {
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003195 DFX_board_t *bp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003196 u8 prod; /* local transmit producer index */
3197 PI_XMT_DESCR *p_xmt_descr; /* ptr to transmit descriptor block entry */
3198 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
3199 unsigned long flags;
3200
3201 netif_stop_queue(dev);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003202
Linus Torvalds1da177e2005-04-16 15:20:36 -07003203 /*
3204 * Verify that incoming transmit request is OK
3205 *
3206 * Note: The packet size check is consistent with other
3207 * Linux device drivers, although the correct packet
3208 * size should be verified before calling the
3209 * transmit routine.
3210 */
3211
3212 if (!IN_RANGE(skb->len, FDDI_K_LLC_ZLEN, FDDI_K_LLC_LEN))
3213 {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003214 printk("%s: Invalid packet length - %u bytes\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07003215 dev->name, skb->len);
3216 bp->xmt_length_errors++; /* bump error counter */
3217 netif_wake_queue(dev);
3218 dev_kfree_skb(skb);
Patrick McHardyec634fe2009-07-05 19:23:38 -07003219 return NETDEV_TX_OK; /* return "success" */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003220 }
3221 /*
3222 * See if adapter link is available, if not, free buffer
3223 *
3224 * Note: If the link isn't available, free buffer and return 0
3225 * rather than tell the upper layer to requeue the packet.
3226 * The methodology here is that by the time the link
3227 * becomes available, the packet to be sent will be
3228 * fairly stale. By simply dropping the packet, the
3229 * higher layer protocols will eventually time out
3230 * waiting for response packets which it won't receive.
3231 */
3232
3233 if (bp->link_available == PI_K_FALSE)
3234 {
3235 if (dfx_hw_adap_state_rd(bp) == PI_STATE_K_LINK_AVAIL) /* is link really available? */
3236 bp->link_available = PI_K_TRUE; /* if so, set flag and continue */
3237 else
3238 {
3239 bp->xmt_discards++; /* bump error counter */
3240 dev_kfree_skb(skb); /* free sk_buff now */
3241 netif_wake_queue(dev);
Patrick McHardyec634fe2009-07-05 19:23:38 -07003242 return NETDEV_TX_OK; /* return "success" */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003243 }
3244 }
3245
3246 spin_lock_irqsave(&bp->lock, flags);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003247
Linus Torvalds1da177e2005-04-16 15:20:36 -07003248 /* Get the current producer and the next free xmt data descriptor */
3249
3250 prod = bp->rcv_xmt_reg.index.xmt_prod;
3251 p_xmt_descr = &(bp->descr_block_virt->xmt_data[prod]);
3252
3253 /*
3254 * Get pointer to auxiliary queue entry to contain information
3255 * for this packet.
3256 *
3257 * Note: The current xmt producer index will become the
3258 * current xmt completion index when we complete this
3259 * packet later on. So, we'll get the pointer to the
3260 * next auxiliary queue entry now before we bump the
3261 * producer index.
3262 */
3263
3264 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[prod++]); /* also bump producer index */
3265
3266 /* Write the three PRH bytes immediately before the FC byte */
3267
3268 skb_push(skb,3);
3269 skb->data[0] = DFX_PRH0_BYTE; /* these byte values are defined */
3270 skb->data[1] = DFX_PRH1_BYTE; /* in the Motorola FDDI MAC chip */
3271 skb->data[2] = DFX_PRH2_BYTE; /* specification */
3272
3273 /*
3274 * Write the descriptor with buffer info and bump producer
3275 *
3276 * Note: Since we need to start DMA from the packet request
3277 * header, we'll add 3 bytes to the DMA buffer length,
3278 * and we'll determine the physical address of the
3279 * buffer from the PRH, not skb->data.
3280 *
3281 * Assumptions:
3282 * 1. Packet starts with the frame control (FC) byte
3283 * at skb->data.
3284 * 2. The 4-byte CRC is not appended to the buffer or
3285 * included in the length.
3286 * 3. Packet length (skb->len) is from FC to end of
3287 * data, inclusive.
3288 * 4. The packet length does not exceed the maximum
3289 * FDDI LLC frame length of 4491 bytes.
3290 * 5. The entire packet is contained in a physically
3291 * contiguous, non-cached, locked memory space
3292 * comprised of a single buffer pointed to by
3293 * skb->data.
3294 * 6. The physical address of the start of packet
3295 * can be determined from the virtual address
3296 * by using pci_map_single() and is only 32-bits
3297 * wide.
3298 */
3299
3300 p_xmt_descr->long_0 = (u32) (PI_XMT_DESCR_M_SOP | PI_XMT_DESCR_M_EOP | ((skb->len) << PI_XMT_DESCR_V_SEG_LEN));
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003301 p_xmt_descr->long_1 = (u32)dma_map_single(bp->bus_dev, skb->data,
3302 skb->len, DMA_TO_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003303
3304 /*
3305 * Verify that descriptor is actually available
3306 *
3307 * Note: If descriptor isn't available, return 1 which tells
3308 * the upper layer to requeue the packet for later
3309 * transmission.
3310 *
3311 * We need to ensure that the producer never reaches the
3312 * completion, except to indicate that the queue is empty.
3313 */
3314
3315 if (prod == bp->rcv_xmt_reg.index.xmt_comp)
3316 {
3317 skb_pull(skb,3);
3318 spin_unlock_irqrestore(&bp->lock, flags);
Patrick McHardy5b548142009-06-12 06:22:29 +00003319 return NETDEV_TX_BUSY; /* requeue packet for later */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003320 }
3321
3322 /*
3323 * Save info for this packet for xmt done indication routine
3324 *
3325 * Normally, we'd save the producer index in the p_xmt_drv_descr
3326 * structure so that we'd have it handy when we complete this
3327 * packet later (in dfx_xmt_done). However, since the current
3328 * transmit architecture guarantees a single fragment for the
3329 * entire packet, we can simply bump the completion index by
3330 * one (1) for each completed packet.
3331 *
3332 * Note: If this assumption changes and we're presented with
3333 * an inconsistent number of transmit fragments for packet
3334 * data, we'll need to modify this code to save the current
3335 * transmit producer index.
3336 */
3337
3338 p_xmt_drv_descr->p_skb = skb;
3339
3340 /* Update Type 2 register */
3341
3342 bp->rcv_xmt_reg.index.xmt_prod = prod;
3343 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword);
3344 spin_unlock_irqrestore(&bp->lock, flags);
3345 netif_wake_queue(dev);
Patrick McHardyec634fe2009-07-05 19:23:38 -07003346 return NETDEV_TX_OK; /* packet queued to adapter */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003347 }
3348
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003349
Linus Torvalds1da177e2005-04-16 15:20:36 -07003350/*
3351 * ================
3352 * = dfx_xmt_done =
3353 * ================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003354 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003355 * Overview:
3356 * Processes all frames that have been transmitted.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003357 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003358 * Returns:
3359 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003360 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003361 * Arguments:
3362 * bp - pointer to board information
3363 *
3364 * Functional Description:
3365 * For all consumed transmit descriptors that have not
3366 * yet been completed, we'll free the skb we were holding
3367 * onto using dev_kfree_skb and bump the appropriate
3368 * counters.
3369 *
3370 * Return Codes:
3371 * None
3372 *
3373 * Assumptions:
3374 * The Type 2 register is not updated in this routine. It is
3375 * assumed that it will be updated in the ISR when dfx_xmt_done
3376 * returns.
3377 *
3378 * Side Effects:
3379 * None
3380 */
3381
3382static int dfx_xmt_done(DFX_board_t *bp)
3383 {
3384 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
3385 PI_TYPE_2_CONSUMER *p_type_2_cons; /* ptr to rcv/xmt consumer block register */
3386 u8 comp; /* local transmit completion index */
3387 int freed = 0; /* buffers freed */
3388
3389 /* Service all consumed transmit frames */
3390
3391 p_type_2_cons = (PI_TYPE_2_CONSUMER *)(&bp->cons_block_virt->xmt_rcv_data);
3392 while (bp->rcv_xmt_reg.index.xmt_comp != p_type_2_cons->index.xmt_cons)
3393 {
3394 /* Get pointer to the transmit driver descriptor block information */
3395
3396 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]);
3397
3398 /* Increment transmit counters */
3399
3400 bp->xmt_total_frames++;
3401 bp->xmt_total_bytes += p_xmt_drv_descr->p_skb->len;
3402
3403 /* Return skb to operating system */
3404 comp = bp->rcv_xmt_reg.index.xmt_comp;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003405 dma_unmap_single(bp->bus_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003406 bp->descr_block_virt->xmt_data[comp].long_1,
3407 p_xmt_drv_descr->p_skb->len,
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003408 DMA_TO_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003409 dev_kfree_skb_irq(p_xmt_drv_descr->p_skb);
3410
3411 /*
3412 * Move to start of next packet by updating completion index
3413 *
3414 * Here we assume that a transmit packet request is always
3415 * serviced by posting one fragment. We can therefore
3416 * simplify the completion code by incrementing the
3417 * completion index by one. This code will need to be
3418 * modified if this assumption changes. See comments
3419 * in dfx_xmt_queue_pkt for more details.
3420 */
3421
3422 bp->rcv_xmt_reg.index.xmt_comp += 1;
3423 freed++;
3424 }
3425 return freed;
3426 }
3427
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003428
Linus Torvalds1da177e2005-04-16 15:20:36 -07003429/*
3430 * =================
3431 * = dfx_rcv_flush =
3432 * =================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003433 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003434 * Overview:
3435 * Remove all skb's in the receive ring.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003436 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003437 * Returns:
3438 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003439 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003440 * Arguments:
3441 * bp - pointer to board information
3442 *
3443 * Functional Description:
3444 * Free's all the dynamically allocated skb's that are
3445 * currently attached to the device receive ring. This
3446 * function is typically only used when the device is
3447 * initialized or reinitialized.
3448 *
3449 * Return Codes:
3450 * None
3451 *
3452 * Side Effects:
3453 * None
3454 */
3455#ifdef DYNAMIC_BUFFERS
3456static void dfx_rcv_flush( DFX_board_t *bp )
3457 {
3458 int i, j;
3459
3460 for (i = 0; i < (int)(bp->rcv_bufs_to_post); i++)
3461 for (j = 0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post)
3462 {
3463 struct sk_buff *skb;
3464 skb = (struct sk_buff *)bp->p_rcv_buff_va[i+j];
3465 if (skb)
3466 dev_kfree_skb(skb);
3467 bp->p_rcv_buff_va[i+j] = NULL;
3468 }
3469
3470 }
3471#else
3472static inline void dfx_rcv_flush( DFX_board_t *bp )
3473{
3474}
3475#endif /* DYNAMIC_BUFFERS */
3476
3477/*
3478 * =================
3479 * = dfx_xmt_flush =
3480 * =================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003481 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003482 * Overview:
3483 * Processes all frames whether they've been transmitted
3484 * or not.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003485 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003486 * Returns:
3487 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003488 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003489 * Arguments:
3490 * bp - pointer to board information
3491 *
3492 * Functional Description:
3493 * For all produced transmit descriptors that have not
3494 * yet been completed, we'll free the skb we were holding
3495 * onto using dev_kfree_skb and bump the appropriate
3496 * counters. Of course, it's possible that some of
3497 * these transmit requests actually did go out, but we
3498 * won't make that distinction here. Finally, we'll
3499 * update the consumer index to match the producer.
3500 *
3501 * Return Codes:
3502 * None
3503 *
3504 * Assumptions:
3505 * This routine does NOT update the Type 2 register. It
3506 * is assumed that this routine is being called during a
3507 * transmit flush interrupt, or a shutdown or close routine.
3508 *
3509 * Side Effects:
3510 * None
3511 */
3512
3513static void dfx_xmt_flush( DFX_board_t *bp )
3514 {
3515 u32 prod_cons; /* rcv/xmt consumer block longword */
3516 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
3517 u8 comp; /* local transmit completion index */
3518
3519 /* Flush all outstanding transmit frames */
3520
3521 while (bp->rcv_xmt_reg.index.xmt_comp != bp->rcv_xmt_reg.index.xmt_prod)
3522 {
3523 /* Get pointer to the transmit driver descriptor block information */
3524
3525 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]);
3526
3527 /* Return skb to operating system */
3528 comp = bp->rcv_xmt_reg.index.xmt_comp;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003529 dma_unmap_single(bp->bus_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003530 bp->descr_block_virt->xmt_data[comp].long_1,
3531 p_xmt_drv_descr->p_skb->len,
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003532 DMA_TO_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003533 dev_kfree_skb(p_xmt_drv_descr->p_skb);
3534
3535 /* Increment transmit error counter */
3536
3537 bp->xmt_discards++;
3538
3539 /*
3540 * Move to start of next packet by updating completion index
3541 *
3542 * Here we assume that a transmit packet request is always
3543 * serviced by posting one fragment. We can therefore
3544 * simplify the completion code by incrementing the
3545 * completion index by one. This code will need to be
3546 * modified if this assumption changes. See comments
3547 * in dfx_xmt_queue_pkt for more details.
3548 */
3549
3550 bp->rcv_xmt_reg.index.xmt_comp += 1;
3551 }
3552
3553 /* Update the transmit consumer index in the consumer block */
3554
3555 prod_cons = (u32)(bp->cons_block_virt->xmt_rcv_data & ~PI_CONS_M_XMT_INDEX);
3556 prod_cons |= (u32)(bp->rcv_xmt_reg.index.xmt_prod << PI_CONS_V_XMT_INDEX);
3557 bp->cons_block_virt->xmt_rcv_data = prod_cons;
3558 }
3559
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003560/*
3561 * ==================
3562 * = dfx_unregister =
3563 * ==================
3564 *
3565 * Overview:
3566 * Shuts down an FDDI controller
3567 *
3568 * Returns:
3569 * Condition code
3570 *
3571 * Arguments:
3572 * bdev - pointer to device information
3573 *
3574 * Functional Description:
3575 *
3576 * Return Codes:
3577 * None
3578 *
3579 * Assumptions:
3580 * It compiles so it should work :-( (PCI cards do :-)
3581 *
3582 * Side Effects:
3583 * Device structures for FDDI adapters (fddi0, fddi1, etc) are
3584 * freed.
3585 */
3586static void __devexit dfx_unregister(struct device *bdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003587{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003588 struct net_device *dev = dev_get_drvdata(bdev);
3589 DFX_board_t *bp = netdev_priv(dev);
3590 int dfx_bus_pci = DFX_BUS_PCI(bdev);
3591 int dfx_bus_tc = DFX_BUS_TC(bdev);
3592 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
3593 resource_size_t bar_start = 0; /* pointer to port */
3594 resource_size_t bar_len = 0; /* resource length */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003595 int alloc_size; /* total buffer size used */
3596
3597 unregister_netdev(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003598
3599 alloc_size = sizeof(PI_DESCR_BLOCK) +
3600 PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
3601#ifndef DYNAMIC_BUFFERS
3602 (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
3603#endif
3604 sizeof(PI_CONSUMER_BLOCK) +
3605 (PI_ALIGN_K_DESC_BLK - 1);
3606 if (bp->kmalloced)
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003607 dma_free_coherent(bdev, alloc_size,
3608 bp->kmalloced, bp->kmalloced_dma);
3609
3610 dfx_bus_uninit(dev);
3611
3612 dfx_get_bars(bdev, &bar_start, &bar_len);
3613 if (dfx_use_mmio) {
3614 iounmap(bp->base.mem);
3615 release_mem_region(bar_start, bar_len);
3616 } else
3617 release_region(bar_start, bar_len);
3618
3619 if (dfx_bus_pci)
3620 pci_disable_device(to_pci_dev(bdev));
3621
Linus Torvalds1da177e2005-04-16 15:20:36 -07003622 free_netdev(dev);
3623}
3624
Linus Torvalds1da177e2005-04-16 15:20:36 -07003625
Maciej W. Rozyckifcdff132007-07-20 13:14:07 +01003626static int __devinit __maybe_unused dfx_dev_register(struct device *);
3627static int __devexit __maybe_unused dfx_dev_unregister(struct device *);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003628
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003629#ifdef CONFIG_PCI
3630static int __devinit dfx_pci_register(struct pci_dev *,
3631 const struct pci_device_id *);
3632static void __devexit dfx_pci_unregister(struct pci_dev *);
3633
3634static struct pci_device_id dfx_pci_table[] = {
3635 { PCI_DEVICE(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_FDDI) },
3636 { }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003637};
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003638MODULE_DEVICE_TABLE(pci, dfx_pci_table);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003639
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003640static struct pci_driver dfx_pci_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003641 .name = "defxx",
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003642 .id_table = dfx_pci_table,
3643 .probe = dfx_pci_register,
3644 .remove = __devexit_p(dfx_pci_unregister),
Linus Torvalds1da177e2005-04-16 15:20:36 -07003645};
3646
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003647static __devinit int dfx_pci_register(struct pci_dev *pdev,
3648 const struct pci_device_id *ent)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003649{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003650 return dfx_register(&pdev->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003651}
3652
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003653static void __devexit dfx_pci_unregister(struct pci_dev *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003654{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003655 dfx_unregister(&pdev->dev);
3656}
3657#endif /* CONFIG_PCI */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003658
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003659#ifdef CONFIG_EISA
3660static struct eisa_device_id dfx_eisa_table[] = {
3661 { "DEC3001", DEFEA_PROD_ID_1 },
3662 { "DEC3002", DEFEA_PROD_ID_2 },
3663 { "DEC3003", DEFEA_PROD_ID_3 },
3664 { "DEC3004", DEFEA_PROD_ID_4 },
3665 { }
3666};
3667MODULE_DEVICE_TABLE(eisa, dfx_eisa_table);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003668
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003669static struct eisa_driver dfx_eisa_driver = {
3670 .id_table = dfx_eisa_table,
3671 .driver = {
3672 .name = "defxx",
3673 .bus = &eisa_bus_type,
3674 .probe = dfx_dev_register,
3675 .remove = __devexit_p(dfx_dev_unregister),
3676 },
3677};
3678#endif /* CONFIG_EISA */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003679
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003680#ifdef CONFIG_TC
3681static struct tc_device_id const dfx_tc_table[] = {
3682 { "DEC ", "PMAF-FA " },
3683 { "DEC ", "PMAF-FD " },
3684 { "DEC ", "PMAF-FS " },
3685 { "DEC ", "PMAF-FU " },
3686 { }
3687};
3688MODULE_DEVICE_TABLE(tc, dfx_tc_table);
3689
3690static struct tc_driver dfx_tc_driver = {
3691 .id_table = dfx_tc_table,
3692 .driver = {
3693 .name = "defxx",
3694 .bus = &tc_bus_type,
3695 .probe = dfx_dev_register,
3696 .remove = __devexit_p(dfx_dev_unregister),
3697 },
3698};
3699#endif /* CONFIG_TC */
3700
Maciej W. Rozyckifcdff132007-07-20 13:14:07 +01003701static int __devinit __maybe_unused dfx_dev_register(struct device *dev)
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003702{
3703 int status;
3704
3705 status = dfx_register(dev);
3706 if (!status)
3707 get_device(dev);
3708 return status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003709}
3710
Maciej W. Rozyckifcdff132007-07-20 13:14:07 +01003711static int __devexit __maybe_unused dfx_dev_unregister(struct device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003712{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003713 put_device(dev);
3714 dfx_unregister(dev);
3715 return 0;
3716}
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003717
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003718
3719static int __devinit dfx_init(void)
3720{
3721 int status;
3722
3723 status = pci_register_driver(&dfx_pci_driver);
3724 if (!status)
3725 status = eisa_driver_register(&dfx_eisa_driver);
3726 if (!status)
3727 status = tc_register_driver(&dfx_tc_driver);
3728 return status;
3729}
3730
3731static void __devexit dfx_cleanup(void)
3732{
3733 tc_unregister_driver(&dfx_tc_driver);
3734 eisa_driver_unregister(&dfx_eisa_driver);
3735 pci_unregister_driver(&dfx_pci_driver);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003736}
Linus Torvalds1da177e2005-04-16 15:20:36 -07003737
3738module_init(dfx_init);
3739module_exit(dfx_cleanup);
3740MODULE_AUTHOR("Lawrence V. Stefani");
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003741MODULE_DESCRIPTION("DEC FDDIcontroller TC/EISA/PCI (DEFTA/DEFEA/DEFPA) driver "
Linus Torvalds1da177e2005-04-16 15:20:36 -07003742 DRV_VERSION " " DRV_RELDATE);
3743MODULE_LICENSE("GPL");