blob: 2800b3e614a97864ee3874d8b7841ccd298b23c7 [file] [log] [blame]
Alan Cox0d88a102006-01-18 17:44:10 -08001/*
2 * Intel D82875P Memory Controller kernel module
3 * (C) 2003 Linux Networx (http://lnxi.com)
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
6 *
7 * Written by Thayne Harbaugh
8 * Contributors:
9 * Wang Zhenyu at intel.com
10 *
11 * $Id: edac_i82875p.c,v 1.5.2.11 2005/10/05 00:43:44 dsp_llnl Exp $
12 *
13 * Note: E7210 appears same as D82875P - zhenyu.z.wang at intel.com
14 */
15
Alan Cox0d88a102006-01-18 17:44:10 -080016#include <linux/module.h>
17#include <linux/init.h>
Alan Cox0d88a102006-01-18 17:44:10 -080018#include <linux/pci.h>
19#include <linux/pci_ids.h>
Alan Cox0d88a102006-01-18 17:44:10 -080020#include <linux/slab.h>
Alan Cox0d88a102006-01-18 17:44:10 -080021#include "edac_mc.h"
22
Doug Thompson929a40e2006-07-01 04:35:45 -070023#define I82875P_REVISION " Ver: 2.0.1 " __DATE__
24#define EDAC_MOD_STR "i82875p_edac"
Doug Thompson37f04582006-06-30 01:56:07 -070025
Dave Peterson537fba22006-03-26 01:38:40 -080026#define i82875p_printk(level, fmt, arg...) \
Dave Petersone7ecd892006-03-26 01:38:52 -080027 edac_printk(level, "i82875p", fmt, ##arg)
Dave Peterson537fba22006-03-26 01:38:40 -080028
29#define i82875p_mc_printk(mci, level, fmt, arg...) \
Dave Petersone7ecd892006-03-26 01:38:52 -080030 edac_mc_chipset_printk(mci, level, "i82875p", fmt, ##arg)
Dave Peterson537fba22006-03-26 01:38:40 -080031
Alan Cox0d88a102006-01-18 17:44:10 -080032#ifndef PCI_DEVICE_ID_INTEL_82875_0
33#define PCI_DEVICE_ID_INTEL_82875_0 0x2578
34#endif /* PCI_DEVICE_ID_INTEL_82875_0 */
35
36#ifndef PCI_DEVICE_ID_INTEL_82875_6
37#define PCI_DEVICE_ID_INTEL_82875_6 0x257e
38#endif /* PCI_DEVICE_ID_INTEL_82875_6 */
39
Alan Cox0d88a102006-01-18 17:44:10 -080040/* four csrows in dual channel, eight in single channel */
41#define I82875P_NR_CSROWS(nr_chans) (8/(nr_chans))
42
Alan Cox0d88a102006-01-18 17:44:10 -080043/* Intel 82875p register addresses - device 0 function 0 - DRAM Controller */
44#define I82875P_EAP 0x58 /* Error Address Pointer (32b)
45 *
46 * 31:12 block address
47 * 11:0 reserved
48 */
49
50#define I82875P_DERRSYN 0x5c /* DRAM Error Syndrome (8b)
51 *
52 * 7:0 DRAM ECC Syndrome
53 */
54
55#define I82875P_DES 0x5d /* DRAM Error Status (8b)
56 *
57 * 7:1 reserved
58 * 0 Error channel 0/1
59 */
60
61#define I82875P_ERRSTS 0xc8 /* Error Status Register (16b)
62 *
63 * 15:10 reserved
64 * 9 non-DRAM lock error (ndlock)
65 * 8 Sftwr Generated SMI
66 * 7 ECC UE
67 * 6 reserved
68 * 5 MCH detects unimplemented cycle
69 * 4 AGP access outside GA
70 * 3 Invalid AGP access
71 * 2 Invalid GA translation table
72 * 1 Unsupported AGP command
73 * 0 ECC CE
74 */
75
76#define I82875P_ERRCMD 0xca /* Error Command (16b)
77 *
78 * 15:10 reserved
79 * 9 SERR on non-DRAM lock
80 * 8 SERR on ECC UE
81 * 7 SERR on ECC CE
82 * 6 target abort on high exception
83 * 5 detect unimplemented cyc
84 * 4 AGP access outside of GA
85 * 3 SERR on invalid AGP access
86 * 2 invalid translation table
87 * 1 SERR on unsupported AGP command
88 * 0 reserved
89 */
90
Alan Cox0d88a102006-01-18 17:44:10 -080091/* Intel 82875p register addresses - device 6 function 0 - DRAM Controller */
92#define I82875P_PCICMD6 0x04 /* PCI Command Register (16b)
93 *
94 * 15:10 reserved
95 * 9 fast back-to-back - ro 0
96 * 8 SERR enable - ro 0
97 * 7 addr/data stepping - ro 0
98 * 6 parity err enable - ro 0
99 * 5 VGA palette snoop - ro 0
100 * 4 mem wr & invalidate - ro 0
101 * 3 special cycle - ro 0
102 * 2 bus master - ro 0
103 * 1 mem access dev6 - 0(dis),1(en)
104 * 0 IO access dev3 - 0(dis),1(en)
105 */
106
107#define I82875P_BAR6 0x10 /* Mem Delays Base ADDR Reg (32b)
108 *
109 * 31:12 mem base addr [31:12]
110 * 11:4 address mask - ro 0
111 * 3 prefetchable - ro 0(non),1(pre)
112 * 2:1 mem type - ro 0
113 * 0 mem space - ro 0
114 */
115
116/* Intel 82875p MMIO register space - device 0 function 0 - MMR space */
117
118#define I82875P_DRB_SHIFT 26 /* 64MiB grain */
119#define I82875P_DRB 0x00 /* DRAM Row Boundary (8b x 8)
120 *
121 * 7 reserved
122 * 6:0 64MiB row boundary addr
123 */
124
125#define I82875P_DRA 0x10 /* DRAM Row Attribute (4b x 8)
126 *
127 * 7 reserved
128 * 6:4 row attr row 1
129 * 3 reserved
130 * 2:0 row attr row 0
131 *
132 * 000 = 4KiB
133 * 001 = 8KiB
134 * 010 = 16KiB
135 * 011 = 32KiB
136 */
137
138#define I82875P_DRC 0x68 /* DRAM Controller Mode (32b)
139 *
140 * 31:30 reserved
141 * 29 init complete
142 * 28:23 reserved
143 * 22:21 nr chan 00=1,01=2
144 * 20 reserved
145 * 19:18 Data Integ Mode 00=none,01=ecc
146 * 17:11 reserved
147 * 10:8 refresh mode
148 * 7 reserved
149 * 6:4 mode select
150 * 3:2 reserved
151 * 1:0 DRAM type 01=DDR
152 */
153
Alan Cox0d88a102006-01-18 17:44:10 -0800154enum i82875p_chips {
155 I82875P = 0,
156};
157
Alan Cox0d88a102006-01-18 17:44:10 -0800158struct i82875p_pvt {
159 struct pci_dev *ovrfl_pdev;
Al Viro6d573482006-02-01 06:10:08 -0500160 void __iomem *ovrfl_window;
Alan Cox0d88a102006-01-18 17:44:10 -0800161};
162
Alan Cox0d88a102006-01-18 17:44:10 -0800163struct i82875p_dev_info {
164 const char *ctl_name;
165};
166
Alan Cox0d88a102006-01-18 17:44:10 -0800167struct i82875p_error_info {
168 u16 errsts;
169 u32 eap;
170 u8 des;
171 u8 derrsyn;
172 u16 errsts2;
173};
174
Alan Cox0d88a102006-01-18 17:44:10 -0800175static const struct i82875p_dev_info i82875p_devs[] = {
176 [I82875P] = {
Dave Petersone7ecd892006-03-26 01:38:52 -0800177 .ctl_name = "i82875p"
178 },
Alan Cox0d88a102006-01-18 17:44:10 -0800179};
180
Dave Petersone7ecd892006-03-26 01:38:52 -0800181static struct pci_dev *mci_pdev = NULL; /* init dev: in case that AGP code has
182 * already registered driver
183 */
184
Alan Cox0d88a102006-01-18 17:44:10 -0800185static int i82875p_registered = 1;
186
Dave Petersone7ecd892006-03-26 01:38:52 -0800187static void i82875p_get_error_info(struct mem_ctl_info *mci,
Alan Cox0d88a102006-01-18 17:44:10 -0800188 struct i82875p_error_info *info)
189{
Doug Thompson37f04582006-06-30 01:56:07 -0700190 struct pci_dev *pdev;
191
192 pdev = to_pci_dev(mci->dev);
193
Alan Cox0d88a102006-01-18 17:44:10 -0800194 /*
195 * This is a mess because there is no atomic way to read all the
196 * registers at once and the registers can transition from CE being
197 * overwritten by UE.
198 */
Doug Thompson37f04582006-06-30 01:56:07 -0700199 pci_read_config_word(pdev, I82875P_ERRSTS, &info->errsts);
200 pci_read_config_dword(pdev, I82875P_EAP, &info->eap);
201 pci_read_config_byte(pdev, I82875P_DES, &info->des);
202 pci_read_config_byte(pdev, I82875P_DERRSYN, &info->derrsyn);
203 pci_read_config_word(pdev, I82875P_ERRSTS, &info->errsts2);
Alan Cox0d88a102006-01-18 17:44:10 -0800204
Doug Thompson37f04582006-06-30 01:56:07 -0700205 pci_write_bits16(pdev, I82875P_ERRSTS, 0x0081, 0x0081);
Alan Cox0d88a102006-01-18 17:44:10 -0800206
207 /*
208 * If the error is the same then we can for both reads then
209 * the first set of reads is valid. If there is a change then
210 * there is a CE no info and the second set of reads is valid
211 * and should be UE info.
212 */
213 if (!(info->errsts2 & 0x0081))
214 return;
Dave Petersone7ecd892006-03-26 01:38:52 -0800215
Alan Cox0d88a102006-01-18 17:44:10 -0800216 if ((info->errsts ^ info->errsts2) & 0x0081) {
Doug Thompson37f04582006-06-30 01:56:07 -0700217 pci_read_config_dword(pdev, I82875P_EAP, &info->eap);
218 pci_read_config_byte(pdev, I82875P_DES, &info->des);
219 pci_read_config_byte(pdev, I82875P_DERRSYN,
Dave Petersone7ecd892006-03-26 01:38:52 -0800220 &info->derrsyn);
Alan Cox0d88a102006-01-18 17:44:10 -0800221 }
222}
223
Dave Petersone7ecd892006-03-26 01:38:52 -0800224static int i82875p_process_error_info(struct mem_ctl_info *mci,
Alan Cox0d88a102006-01-18 17:44:10 -0800225 struct i82875p_error_info *info, int handle_errors)
226{
227 int row, multi_chan;
228
229 multi_chan = mci->csrows[0].nr_channels - 1;
230
231 if (!(info->errsts2 & 0x0081))
232 return 0;
233
234 if (!handle_errors)
235 return 1;
236
237 if ((info->errsts ^ info->errsts2) & 0x0081) {
238 edac_mc_handle_ce_no_info(mci, "UE overwrote CE");
239 info->errsts = info->errsts2;
240 }
241
242 info->eap >>= PAGE_SHIFT;
243 row = edac_mc_find_csrow_by_page(mci, info->eap);
244
245 if (info->errsts & 0x0080)
246 edac_mc_handle_ue(mci, info->eap, 0, row, "i82875p UE");
247 else
248 edac_mc_handle_ce(mci, info->eap, 0, info->derrsyn, row,
Dave Petersone7ecd892006-03-26 01:38:52 -0800249 multi_chan ? (info->des & 0x1) : 0,
250 "i82875p CE");
Alan Cox0d88a102006-01-18 17:44:10 -0800251
252 return 1;
253}
254
Alan Cox0d88a102006-01-18 17:44:10 -0800255static void i82875p_check(struct mem_ctl_info *mci)
256{
257 struct i82875p_error_info info;
258
Dave Peterson537fba22006-03-26 01:38:40 -0800259 debugf1("MC%d: %s()\n", mci->mc_idx, __func__);
Alan Cox0d88a102006-01-18 17:44:10 -0800260 i82875p_get_error_info(mci, &info);
261 i82875p_process_error_info(mci, &info, 1);
262}
263
Doug Thompson13189522006-06-30 01:56:08 -0700264/* Return 0 on success or 1 on failure. */
265static int i82875p_setup_overfl_dev(struct pci_dev *pdev,
266 struct pci_dev **ovrfl_pdev, void __iomem **ovrfl_window)
Alan Cox0d88a102006-01-18 17:44:10 -0800267{
Doug Thompson13189522006-06-30 01:56:08 -0700268 struct pci_dev *dev;
269 void __iomem *window;
Alan Cox0d88a102006-01-18 17:44:10 -0800270
Doug Thompson13189522006-06-30 01:56:08 -0700271 *ovrfl_pdev = NULL;
272 *ovrfl_window = NULL;
273 dev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
Alan Cox0d88a102006-01-18 17:44:10 -0800274
Doug Thompson13189522006-06-30 01:56:08 -0700275 if (dev == NULL) {
276 /* Intel tells BIOS developers to hide device 6 which
Alan Cox0d88a102006-01-18 17:44:10 -0800277 * configures the overflow device access containing
278 * the DRBs - this is where we expose device 6.
279 * http://www.x86-secret.com/articles/tweak/pat/patsecrets-2.htm
280 */
281 pci_write_bits8(pdev, 0xf4, 0x2, 0x2);
Doug Thompson13189522006-06-30 01:56:08 -0700282 dev = pci_scan_single_device(pdev->bus, PCI_DEVFN(6, 0));
Dave Petersone7ecd892006-03-26 01:38:52 -0800283
Doug Thompson13189522006-06-30 01:56:08 -0700284 if (dev == NULL)
285 return 1;
John Feeney62456726d2007-05-08 00:28:12 -0700286
287 pci_bus_add_device(dev);
Alan Cox0d88a102006-01-18 17:44:10 -0800288 }
Dave Petersone7ecd892006-03-26 01:38:52 -0800289
Doug Thompson13189522006-06-30 01:56:08 -0700290 *ovrfl_pdev = dev;
291
Doug Thompson13189522006-06-30 01:56:08 -0700292 if (pci_enable_device(dev)) {
293 i82875p_printk(KERN_ERR, "%s(): Failed to enable overflow "
294 "device\n", __func__);
295 return 1;
Alan Cox0d88a102006-01-18 17:44:10 -0800296 }
297
Doug Thompson13189522006-06-30 01:56:08 -0700298 if (pci_request_regions(dev, pci_name(dev))) {
Alan Cox0d88a102006-01-18 17:44:10 -0800299#ifdef CORRECT_BIOS
Dave Peterson637beb62006-03-26 01:38:44 -0800300 goto fail0;
Alan Cox0d88a102006-01-18 17:44:10 -0800301#endif
302 }
Dave Petersone7ecd892006-03-26 01:38:52 -0800303
Alan Cox0d88a102006-01-18 17:44:10 -0800304 /* cache is irrelevant for PCI bus reads/writes */
Doug Thompson13189522006-06-30 01:56:08 -0700305 window = ioremap_nocache(pci_resource_start(dev, 0),
306 pci_resource_len(dev, 0));
Alan Cox0d88a102006-01-18 17:44:10 -0800307
Doug Thompson13189522006-06-30 01:56:08 -0700308 if (window == NULL) {
Dave Peterson537fba22006-03-26 01:38:40 -0800309 i82875p_printk(KERN_ERR, "%s(): Failed to ioremap bar6\n",
Doug Thompson13189522006-06-30 01:56:08 -0700310 __func__);
Dave Peterson637beb62006-03-26 01:38:44 -0800311 goto fail1;
Alan Cox0d88a102006-01-18 17:44:10 -0800312 }
313
Doug Thompson13189522006-06-30 01:56:08 -0700314 *ovrfl_window = window;
315 return 0;
316
317fail1:
318 pci_release_regions(dev);
319
320#ifdef CORRECT_BIOS
321fail0:
322 pci_disable_device(dev);
323#endif
324 /* NOTE: the ovrfl proc entry and pci_dev are intentionally left */
325 return 1;
326}
327
328
329/* Return 1 if dual channel mode is active. Else return 0. */
330static inline int dual_channel_active(u32 drc)
331{
332 return (drc >> 21) & 0x1;
333}
334
335
336static void i82875p_init_csrows(struct mem_ctl_info *mci,
337 struct pci_dev *pdev, void __iomem *ovrfl_window, u32 drc)
338{
339 struct csrow_info *csrow;
340 unsigned long last_cumul_size;
341 u8 value;
342 u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
343 u32 cumul_size;
344 int index;
Alan Cox0d88a102006-01-18 17:44:10 -0800345
Dave Petersone7ecd892006-03-26 01:38:52 -0800346 drc_ddim = (drc >> 18) & 0x1;
Doug Thompson13189522006-06-30 01:56:08 -0700347 last_cumul_size = 0;
348
349 /* The dram row boundary (DRB) reg values are boundary address
350 * for each DRAM row with a granularity of 32 or 64MB (single/dual
351 * channel operation). DRB regs are cumulative; therefore DRB7 will
352 * contain the total memory contained in all eight rows.
353 */
354
355 for (index = 0; index < mci->nr_csrows; index++) {
356 csrow = &mci->csrows[index];
357
358 value = readb(ovrfl_window + I82875P_DRB + index);
359 cumul_size = value << (I82875P_DRB_SHIFT - PAGE_SHIFT);
360 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
361 cumul_size);
362 if (cumul_size == last_cumul_size)
363 continue; /* not populated */
364
365 csrow->first_page = last_cumul_size;
366 csrow->last_page = cumul_size - 1;
367 csrow->nr_pages = cumul_size - last_cumul_size;
368 last_cumul_size = cumul_size;
369 csrow->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */
370 csrow->mtype = MEM_DDR;
371 csrow->dtype = DEV_UNKNOWN;
372 csrow->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE;
373 }
374}
375
376static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
377{
378 int rc = -ENODEV;
379 struct mem_ctl_info *mci;
380 struct i82875p_pvt *pvt;
381 struct pci_dev *ovrfl_pdev;
382 void __iomem *ovrfl_window;
383 u32 drc;
384 u32 nr_chans;
385 struct i82875p_error_info discard;
386
387 debugf0("%s()\n", __func__);
388 ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
389
390 if (i82875p_setup_overfl_dev(pdev, &ovrfl_pdev, &ovrfl_window))
391 return -ENODEV;
392 drc = readl(ovrfl_window + I82875P_DRC);
393 nr_chans = dual_channel_active(drc) + 1;
Alan Cox0d88a102006-01-18 17:44:10 -0800394 mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans),
Dave Petersone7ecd892006-03-26 01:38:52 -0800395 nr_chans);
Alan Cox0d88a102006-01-18 17:44:10 -0800396
397 if (!mci) {
398 rc = -ENOMEM;
Doug Thompson13189522006-06-30 01:56:08 -0700399 goto fail0;
Alan Cox0d88a102006-01-18 17:44:10 -0800400 }
401
Dave Peterson537fba22006-03-26 01:38:40 -0800402 debugf3("%s(): init mci\n", __func__);
Doug Thompson37f04582006-06-30 01:56:07 -0700403 mci->dev = &pdev->dev;
Alan Cox0d88a102006-01-18 17:44:10 -0800404 mci->mtype_cap = MEM_FLAG_DDR;
Alan Cox0d88a102006-01-18 17:44:10 -0800405 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
406 mci->edac_cap = EDAC_FLAG_UNKNOWN;
Dave Peterson680cbbb2006-03-26 01:38:41 -0800407 mci->mod_name = EDAC_MOD_STR;
Doug Thompson37f04582006-06-30 01:56:07 -0700408 mci->mod_ver = I82875P_REVISION;
Alan Cox0d88a102006-01-18 17:44:10 -0800409 mci->ctl_name = i82875p_devs[dev_idx].ctl_name;
410 mci->edac_check = i82875p_check;
411 mci->ctl_page_to_phys = NULL;
Dave Peterson537fba22006-03-26 01:38:40 -0800412 debugf3("%s(): init pvt\n", __func__);
Alan Cox0d88a102006-01-18 17:44:10 -0800413 pvt = (struct i82875p_pvt *) mci->pvt_info;
414 pvt->ovrfl_pdev = ovrfl_pdev;
415 pvt->ovrfl_window = ovrfl_window;
Doug Thompson13189522006-06-30 01:56:08 -0700416 i82875p_init_csrows(mci, pdev, ovrfl_window, drc);
Dave Peterson749ede52006-03-26 01:38:45 -0800417 i82875p_get_error_info(mci, &discard); /* clear counters */
Alan Cox0d88a102006-01-18 17:44:10 -0800418
Doug Thompson2d7bbb92006-06-30 01:56:08 -0700419 /* Here we assume that we will never see multiple instances of this
420 * type of memory controller. The ID is therefore hardcoded to 0.
421 */
422 if (edac_mc_add_mc(mci,0)) {
Dave Peterson537fba22006-03-26 01:38:40 -0800423 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
Doug Thompson13189522006-06-30 01:56:08 -0700424 goto fail1;
Alan Cox0d88a102006-01-18 17:44:10 -0800425 }
426
427 /* get this far and it's successful */
Dave Peterson537fba22006-03-26 01:38:40 -0800428 debugf3("%s(): success\n", __func__);
Alan Cox0d88a102006-01-18 17:44:10 -0800429 return 0;
430
Doug Thompson13189522006-06-30 01:56:08 -0700431fail1:
Dave Peterson637beb62006-03-26 01:38:44 -0800432 edac_mc_free(mci);
Alan Cox0d88a102006-01-18 17:44:10 -0800433
Doug Thompson13189522006-06-30 01:56:08 -0700434fail0:
Dave Peterson637beb62006-03-26 01:38:44 -0800435 iounmap(ovrfl_window);
Dave Peterson637beb62006-03-26 01:38:44 -0800436 pci_release_regions(ovrfl_pdev);
Alan Cox0d88a102006-01-18 17:44:10 -0800437
Dave Peterson637beb62006-03-26 01:38:44 -0800438 pci_disable_device(ovrfl_pdev);
Alan Cox0d88a102006-01-18 17:44:10 -0800439 /* NOTE: the ovrfl proc entry and pci_dev are intentionally left */
440 return rc;
441}
442
Alan Cox0d88a102006-01-18 17:44:10 -0800443/* returns count (>= 0), or negative on error */
444static int __devinit i82875p_init_one(struct pci_dev *pdev,
Dave Petersone7ecd892006-03-26 01:38:52 -0800445 const struct pci_device_id *ent)
Alan Cox0d88a102006-01-18 17:44:10 -0800446{
447 int rc;
448
Dave Peterson537fba22006-03-26 01:38:40 -0800449 debugf0("%s()\n", __func__);
Dave Peterson537fba22006-03-26 01:38:40 -0800450 i82875p_printk(KERN_INFO, "i82875p init one\n");
Dave Petersone7ecd892006-03-26 01:38:52 -0800451
452 if (pci_enable_device(pdev) < 0)
Alan Cox0d88a102006-01-18 17:44:10 -0800453 return -EIO;
Dave Petersone7ecd892006-03-26 01:38:52 -0800454
Alan Cox0d88a102006-01-18 17:44:10 -0800455 rc = i82875p_probe1(pdev, ent->driver_data);
Dave Petersone7ecd892006-03-26 01:38:52 -0800456
Alan Cox0d88a102006-01-18 17:44:10 -0800457 if (mci_pdev == NULL)
458 mci_pdev = pci_dev_get(pdev);
Dave Petersone7ecd892006-03-26 01:38:52 -0800459
Alan Cox0d88a102006-01-18 17:44:10 -0800460 return rc;
461}
462
Alan Cox0d88a102006-01-18 17:44:10 -0800463static void __devexit i82875p_remove_one(struct pci_dev *pdev)
464{
465 struct mem_ctl_info *mci;
466 struct i82875p_pvt *pvt = NULL;
467
Dave Peterson537fba22006-03-26 01:38:40 -0800468 debugf0("%s()\n", __func__);
Alan Cox0d88a102006-01-18 17:44:10 -0800469
Doug Thompson37f04582006-06-30 01:56:07 -0700470 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
Alan Cox0d88a102006-01-18 17:44:10 -0800471 return;
472
473 pvt = (struct i82875p_pvt *) mci->pvt_info;
Dave Petersone7ecd892006-03-26 01:38:52 -0800474
Alan Cox0d88a102006-01-18 17:44:10 -0800475 if (pvt->ovrfl_window)
476 iounmap(pvt->ovrfl_window);
477
478 if (pvt->ovrfl_pdev) {
479#ifdef CORRECT_BIOS
480 pci_release_regions(pvt->ovrfl_pdev);
481#endif /*CORRECT_BIOS */
482 pci_disable_device(pvt->ovrfl_pdev);
483 pci_dev_put(pvt->ovrfl_pdev);
484 }
485
Alan Cox0d88a102006-01-18 17:44:10 -0800486 edac_mc_free(mci);
487}
488
Alan Cox0d88a102006-01-18 17:44:10 -0800489static const struct pci_device_id i82875p_pci_tbl[] __devinitdata = {
Dave Petersone7ecd892006-03-26 01:38:52 -0800490 {
491 PCI_VEND_DEV(INTEL, 82875_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
492 I82875P
493 },
494 {
495 0,
496 } /* 0 terminated list. */
Alan Cox0d88a102006-01-18 17:44:10 -0800497};
498
499MODULE_DEVICE_TABLE(pci, i82875p_pci_tbl);
500
Alan Cox0d88a102006-01-18 17:44:10 -0800501static struct pci_driver i82875p_driver = {
Dave Peterson680cbbb2006-03-26 01:38:41 -0800502 .name = EDAC_MOD_STR,
Alan Cox0d88a102006-01-18 17:44:10 -0800503 .probe = i82875p_init_one,
504 .remove = __devexit_p(i82875p_remove_one),
505 .id_table = i82875p_pci_tbl,
506};
507
Alan Coxda9bb1d2006-01-18 17:44:13 -0800508static int __init i82875p_init(void)
Alan Cox0d88a102006-01-18 17:44:10 -0800509{
510 int pci_rc;
511
Dave Peterson537fba22006-03-26 01:38:40 -0800512 debugf3("%s()\n", __func__);
Alan Cox0d88a102006-01-18 17:44:10 -0800513 pci_rc = pci_register_driver(&i82875p_driver);
Dave Petersone7ecd892006-03-26 01:38:52 -0800514
Alan Cox0d88a102006-01-18 17:44:10 -0800515 if (pci_rc < 0)
Dave Peterson637beb62006-03-26 01:38:44 -0800516 goto fail0;
Dave Petersone7ecd892006-03-26 01:38:52 -0800517
Alan Cox0d88a102006-01-18 17:44:10 -0800518 if (mci_pdev == NULL) {
Dave Petersone7ecd892006-03-26 01:38:52 -0800519 mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
520 PCI_DEVICE_ID_INTEL_82875_0, NULL);
521
Alan Cox0d88a102006-01-18 17:44:10 -0800522 if (!mci_pdev) {
523 debugf0("875p pci_get_device fail\n");
Dave Peterson637beb62006-03-26 01:38:44 -0800524 pci_rc = -ENODEV;
525 goto fail1;
Alan Cox0d88a102006-01-18 17:44:10 -0800526 }
Dave Petersone7ecd892006-03-26 01:38:52 -0800527
Alan Cox0d88a102006-01-18 17:44:10 -0800528 pci_rc = i82875p_init_one(mci_pdev, i82875p_pci_tbl);
Dave Petersone7ecd892006-03-26 01:38:52 -0800529
Alan Cox0d88a102006-01-18 17:44:10 -0800530 if (pci_rc < 0) {
531 debugf0("875p init fail\n");
Dave Peterson637beb62006-03-26 01:38:44 -0800532 pci_rc = -ENODEV;
533 goto fail1;
Alan Cox0d88a102006-01-18 17:44:10 -0800534 }
535 }
Dave Petersone7ecd892006-03-26 01:38:52 -0800536
Alan Cox0d88a102006-01-18 17:44:10 -0800537 return 0;
Dave Peterson637beb62006-03-26 01:38:44 -0800538
539fail1:
540 pci_unregister_driver(&i82875p_driver);
541
542fail0:
543 if (mci_pdev != NULL)
544 pci_dev_put(mci_pdev);
545
546 return pci_rc;
Alan Cox0d88a102006-01-18 17:44:10 -0800547}
548
Alan Cox0d88a102006-01-18 17:44:10 -0800549static void __exit i82875p_exit(void)
550{
Dave Peterson537fba22006-03-26 01:38:40 -0800551 debugf3("%s()\n", __func__);
Alan Cox0d88a102006-01-18 17:44:10 -0800552
553 pci_unregister_driver(&i82875p_driver);
Dave Petersone7ecd892006-03-26 01:38:52 -0800554
Alan Cox0d88a102006-01-18 17:44:10 -0800555 if (!i82875p_registered) {
556 i82875p_remove_one(mci_pdev);
557 pci_dev_put(mci_pdev);
558 }
559}
560
Alan Cox0d88a102006-01-18 17:44:10 -0800561module_init(i82875p_init);
562module_exit(i82875p_exit);
563
Alan Cox0d88a102006-01-18 17:44:10 -0800564MODULE_LICENSE("GPL");
565MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh");
566MODULE_DESCRIPTION("MC support for Intel 82875 memory hub controllers");