blob: 55ec44a27e89e65e8d01c750ebca0f76bcf4e152 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * probe.c - PCI detection and setup code
3 */
4
5#include <linux/kernel.h>
6#include <linux/delay.h>
7#include <linux/init.h>
8#include <linux/pci.h>
9#include <linux/slab.h>
10#include <linux/module.h>
11#include <linux/cpumask.h>
Shaohua Li7d715a62008-02-25 09:46:41 +080012#include <linux/pci-aspm.h>
Greg KHbc56b9e2005-04-08 14:53:31 +090013#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070014
15#define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */
16#define CARDBUS_RESERVE_BUSNR 3
Linus Torvalds1da177e2005-04-16 15:20:36 -070017
18/* Ugh. Need to stop exporting this to modules. */
19LIST_HEAD(pci_root_buses);
20EXPORT_SYMBOL(pci_root_buses);
21
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080022
23static int find_anything(struct device *dev, void *data)
24{
25 return 1;
26}
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070028/*
29 * Some device drivers need know if pci is initiated.
30 * Basically, we think pci is not initiated when there
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080031 * is no device to be found on the pci_bus_type.
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070032 */
33int no_pci_devices(void)
34{
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080035 struct device *dev;
36 int no_devices;
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070037
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080038 dev = bus_find_device(&pci_bus_type, NULL, NULL, find_anything);
39 no_devices = (dev == NULL);
40 put_device(dev);
41 return no_devices;
42}
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070043EXPORT_SYMBOL(no_pci_devices);
44
Linus Torvalds1da177e2005-04-16 15:20:36 -070045/*
46 * PCI Bus Class Devices
47 */
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040048static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
Mike Travis39106dc2008-04-08 11:43:03 -070049 int type,
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040050 struct device_attribute *attr,
Alan Cox4327edf2005-09-10 00:25:49 -070051 char *buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -070052{
Linus Torvalds1da177e2005-04-16 15:20:36 -070053 int ret;
Mike Travis588235b2009-01-04 05:18:02 -080054 const struct cpumask *cpumask;
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
Mike Travis588235b2009-01-04 05:18:02 -080056 cpumask = cpumask_of_pcibus(to_pci_bus(dev));
Mike Travis39106dc2008-04-08 11:43:03 -070057 ret = type?
Mike Travis588235b2009-01-04 05:18:02 -080058 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
59 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
Mike Travis39106dc2008-04-08 11:43:03 -070060 buf[ret++] = '\n';
61 buf[ret] = '\0';
Linus Torvalds1da177e2005-04-16 15:20:36 -070062 return ret;
63}
Mike Travis39106dc2008-04-08 11:43:03 -070064
65static ssize_t inline pci_bus_show_cpumaskaffinity(struct device *dev,
66 struct device_attribute *attr,
67 char *buf)
68{
69 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
70}
71
72static ssize_t inline pci_bus_show_cpulistaffinity(struct device *dev,
73 struct device_attribute *attr,
74 char *buf)
75{
76 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
77}
78
79DEVICE_ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL);
80DEVICE_ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -070081
82/*
83 * PCI Bus Class
84 */
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040085static void release_pcibus_dev(struct device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -070086{
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040087 struct pci_bus *pci_bus = to_pci_bus(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -070088
89 if (pci_bus->bridge)
90 put_device(pci_bus->bridge);
91 kfree(pci_bus);
92}
93
94static struct class pcibus_class = {
95 .name = "pci_bus",
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040096 .dev_release = &release_pcibus_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -070097};
98
99static int __init pcibus_class_init(void)
100{
101 return class_register(&pcibus_class);
102}
103postcore_initcall(pcibus_class_init);
104
105/*
106 * Translate the low bits of the PCI base
107 * to the resource type
108 */
109static inline unsigned int pci_calc_resource_flags(unsigned int flags)
110{
111 if (flags & PCI_BASE_ADDRESS_SPACE_IO)
112 return IORESOURCE_IO;
113
114 if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH)
115 return IORESOURCE_MEM | IORESOURCE_PREFETCH;
116
117 return IORESOURCE_MEM;
118}
119
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400120static u64 pci_size(u64 base, u64 maxbase, u64 mask)
Yinghai Lu07eddf32006-11-29 13:53:10 -0800121{
122 u64 size = mask & maxbase; /* Find the significant bits */
123 if (!size)
124 return 0;
125
126 /* Get the lowest of them to find the decode size, and
127 from that the extent. */
128 size = (size & ~(size-1)) - 1;
129
130 /* base == maxbase can be valid only if the BAR has
131 already been programmed with all 1s. */
132 if (base == maxbase && ((base | size) & mask) != mask)
133 return 0;
134
135 return size;
136}
137
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400138static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar)
Yinghai Lu07eddf32006-11-29 13:53:10 -0800139{
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400140 if ((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
141 res->flags = bar & ~PCI_BASE_ADDRESS_IO_MASK;
142 return pci_bar_io;
143 }
144
145 res->flags = bar & ~PCI_BASE_ADDRESS_MEM_MASK;
146
Peter Chubbe3545972008-10-13 11:49:04 +1100147 if (res->flags & PCI_BASE_ADDRESS_MEM_TYPE_64)
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400148 return pci_bar_mem64;
149 return pci_bar_mem32;
150}
151
Yu Zhao0b400c72008-11-22 02:40:40 +0800152/**
153 * pci_read_base - read a PCI BAR
154 * @dev: the PCI device
155 * @type: type of the BAR
156 * @res: resource buffer to be filled in
157 * @pos: BAR position in the config space
158 *
159 * Returns 1 if the BAR is 64-bit, or 0 if 32-bit.
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400160 */
Yu Zhao0b400c72008-11-22 02:40:40 +0800161int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400162 struct resource *res, unsigned int pos)
163{
164 u32 l, sz, mask;
165
166 mask = type ? ~PCI_ROM_ADDRESS_ENABLE : ~0;
167
168 res->name = pci_name(dev);
169
170 pci_read_config_dword(dev, pos, &l);
171 pci_write_config_dword(dev, pos, mask);
172 pci_read_config_dword(dev, pos, &sz);
173 pci_write_config_dword(dev, pos, l);
174
175 /*
176 * All bits set in sz means the device isn't working properly.
177 * If the BAR isn't implemented, all bits must be 0. If it's a
178 * memory BAR or a ROM, bit 0 must be clear; if it's an io BAR, bit
179 * 1 must be clear.
180 */
181 if (!sz || sz == 0xffffffff)
182 goto fail;
183
184 /*
185 * I don't know how l can have all bits set. Copied from old code.
186 * Maybe it fixes a bug on some ancient platform.
187 */
188 if (l == 0xffffffff)
189 l = 0;
190
191 if (type == pci_bar_unknown) {
192 type = decode_bar(res, l);
193 res->flags |= pci_calc_resource_flags(l) | IORESOURCE_SIZEALIGN;
194 if (type == pci_bar_io) {
195 l &= PCI_BASE_ADDRESS_IO_MASK;
196 mask = PCI_BASE_ADDRESS_IO_MASK & 0xffff;
197 } else {
198 l &= PCI_BASE_ADDRESS_MEM_MASK;
199 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
200 }
201 } else {
202 res->flags |= (l & IORESOURCE_ROM_ENABLE);
203 l &= PCI_ROM_ADDRESS_MASK;
204 mask = (u32)PCI_ROM_ADDRESS_MASK;
205 }
206
207 if (type == pci_bar_mem64) {
208 u64 l64 = l;
209 u64 sz64 = sz;
210 u64 mask64 = mask | (u64)~0 << 32;
211
212 pci_read_config_dword(dev, pos + 4, &l);
213 pci_write_config_dword(dev, pos + 4, ~0);
214 pci_read_config_dword(dev, pos + 4, &sz);
215 pci_write_config_dword(dev, pos + 4, l);
216
217 l64 |= ((u64)l << 32);
218 sz64 |= ((u64)sz << 32);
219
220 sz64 = pci_size(l64, sz64, mask64);
221
222 if (!sz64)
223 goto fail;
224
Matthew Wilcoxcc5499c2008-07-28 13:39:00 -0400225 if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) {
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400226 dev_err(&dev->dev, "can't handle 64-bit BAR\n");
227 goto fail;
Matthew Wilcoxcc5499c2008-07-28 13:39:00 -0400228 } else if ((sizeof(resource_size_t) < 8) && l) {
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400229 /* Address above 32-bit boundary; disable the BAR */
230 pci_write_config_dword(dev, pos, 0);
231 pci_write_config_dword(dev, pos + 4, 0);
232 res->start = 0;
233 res->end = sz64;
234 } else {
235 res->start = l64;
236 res->end = l64 + sz64;
Vincent Legollf393d9b2008-10-12 12:26:12 +0200237 dev_printk(KERN_DEBUG, &dev->dev,
238 "reg %x 64bit mmio: %pR\n", pos, res);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400239 }
240 } else {
241 sz = pci_size(l, sz, mask);
242
243 if (!sz)
244 goto fail;
245
246 res->start = l;
247 res->end = l + sz;
Vincent Legollf393d9b2008-10-12 12:26:12 +0200248
249 dev_printk(KERN_DEBUG, &dev->dev, "reg %x %s: %pR\n", pos,
250 (res->flags & IORESOURCE_IO) ? "io port" : "32bit mmio",
251 res);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400252 }
253
254 out:
255 return (type == pci_bar_mem64) ? 1 : 0;
256 fail:
257 res->flags = 0;
258 goto out;
Yinghai Lu07eddf32006-11-29 13:53:10 -0800259}
260
Linus Torvalds1da177e2005-04-16 15:20:36 -0700261static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
262{
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400263 unsigned int pos, reg;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700264
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400265 for (pos = 0; pos < howmany; pos++) {
266 struct resource *res = &dev->resource[pos];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700267 reg = PCI_BASE_ADDRESS_0 + (pos << 2);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400268 pos += __pci_read_base(dev, pci_bar_unknown, res, reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269 }
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400270
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271 if (rom) {
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400272 struct resource *res = &dev->resource[PCI_ROM_RESOURCE];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700273 dev->rom_base_reg = rom;
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400274 res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH |
275 IORESOURCE_READONLY | IORESOURCE_CACHEABLE |
276 IORESOURCE_SIZEALIGN;
277 __pci_read_base(dev, pci_bar_mem32, res, rom);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278 }
279}
280
Sam Ravnborg0ab2b572008-02-17 10:45:28 +0100281void __devinit pci_read_bridge_bases(struct pci_bus *child)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282{
283 struct pci_dev *dev = child->self;
284 u8 io_base_lo, io_limit_lo;
285 u16 mem_base_lo, mem_limit_lo;
286 unsigned long base, limit;
287 struct resource *res;
288 int i;
289
290 if (!dev) /* It's a host bus, nothing to read */
291 return;
292
293 if (dev->transparent) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600294 dev_info(&dev->dev, "transparent bridge\n");
Ivan Kokshaysky90b54922005-06-07 04:07:02 +0400295 for(i = 3; i < PCI_BUS_NUM_RESOURCES; i++)
296 child->resource[i] = child->parent->resource[i - 3];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700297 }
298
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299 res = child->resource[0];
300 pci_read_config_byte(dev, PCI_IO_BASE, &io_base_lo);
301 pci_read_config_byte(dev, PCI_IO_LIMIT, &io_limit_lo);
302 base = (io_base_lo & PCI_IO_RANGE_MASK) << 8;
303 limit = (io_limit_lo & PCI_IO_RANGE_MASK) << 8;
304
305 if ((io_base_lo & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32) {
306 u16 io_base_hi, io_limit_hi;
307 pci_read_config_word(dev, PCI_IO_BASE_UPPER16, &io_base_hi);
308 pci_read_config_word(dev, PCI_IO_LIMIT_UPPER16, &io_limit_hi);
309 base |= (io_base_hi << 16);
310 limit |= (io_limit_hi << 16);
311 }
312
313 if (base <= limit) {
314 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
Daniel Yeisley9d265122005-12-05 07:06:43 -0500315 if (!res->start)
316 res->start = base;
317 if (!res->end)
318 res->end = limit + 0xfff;
Vincent Legollf393d9b2008-10-12 12:26:12 +0200319 dev_printk(KERN_DEBUG, &dev->dev, "bridge io port: %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320 }
321
322 res = child->resource[1];
323 pci_read_config_word(dev, PCI_MEMORY_BASE, &mem_base_lo);
324 pci_read_config_word(dev, PCI_MEMORY_LIMIT, &mem_limit_lo);
325 base = (mem_base_lo & PCI_MEMORY_RANGE_MASK) << 16;
326 limit = (mem_limit_lo & PCI_MEMORY_RANGE_MASK) << 16;
327 if (base <= limit) {
328 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
329 res->start = base;
330 res->end = limit + 0xfffff;
Vincent Legollf393d9b2008-10-12 12:26:12 +0200331 dev_printk(KERN_DEBUG, &dev->dev, "bridge 32bit mmio: %pR\n",
332 res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333 }
334
335 res = child->resource[2];
336 pci_read_config_word(dev, PCI_PREF_MEMORY_BASE, &mem_base_lo);
337 pci_read_config_word(dev, PCI_PREF_MEMORY_LIMIT, &mem_limit_lo);
338 base = (mem_base_lo & PCI_PREF_RANGE_MASK) << 16;
339 limit = (mem_limit_lo & PCI_PREF_RANGE_MASK) << 16;
340
341 if ((mem_base_lo & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64) {
342 u32 mem_base_hi, mem_limit_hi;
343 pci_read_config_dword(dev, PCI_PREF_BASE_UPPER32, &mem_base_hi);
344 pci_read_config_dword(dev, PCI_PREF_LIMIT_UPPER32, &mem_limit_hi);
345
346 /*
347 * Some bridges set the base > limit by default, and some
348 * (broken) BIOSes do not initialize them. If we find
349 * this, just assume they are not being used.
350 */
351 if (mem_base_hi <= mem_limit_hi) {
352#if BITS_PER_LONG == 64
353 base |= ((long) mem_base_hi) << 32;
354 limit |= ((long) mem_limit_hi) << 32;
355#else
356 if (mem_base_hi || mem_limit_hi) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600357 dev_err(&dev->dev, "can't handle 64-bit "
358 "address space for bridge\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700359 return;
360 }
361#endif
362 }
363 }
364 if (base <= limit) {
365 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM | IORESOURCE_PREFETCH;
366 res->start = base;
367 res->end = limit + 0xfffff;
Vincent Legollf393d9b2008-10-12 12:26:12 +0200368 dev_printk(KERN_DEBUG, &dev->dev, "bridge %sbit mmio pref: %pR\n",
369 (res->flags & PCI_PREF_RANGE_TYPE_64) ? "64" : "32",
370 res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371 }
372}
373
Sam Ravnborg96bde062007-03-26 21:53:30 -0800374static struct pci_bus * pci_alloc_bus(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375{
376 struct pci_bus *b;
377
Eric Sesterhennf5afe802006-02-28 15:34:49 +0100378 b = kzalloc(sizeof(*b), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700379 if (b) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700380 INIT_LIST_HEAD(&b->node);
381 INIT_LIST_HEAD(&b->children);
382 INIT_LIST_HEAD(&b->devices);
Alex Chiangf46753c2008-06-10 15:28:50 -0600383 INIT_LIST_HEAD(&b->slots);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384 }
385 return b;
386}
387
Adrian Bunkcbd4e052008-04-18 13:53:55 -0700388static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent,
389 struct pci_dev *bridge, int busnr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700390{
391 struct pci_bus *child;
392 int i;
393
394 /*
395 * Allocate a new bus, and inherit stuff from the parent..
396 */
397 child = pci_alloc_bus();
398 if (!child)
399 return NULL;
400
Linus Torvalds1da177e2005-04-16 15:20:36 -0700401 child->parent = parent;
402 child->ops = parent->ops;
403 child->sysdata = parent->sysdata;
Michael S. Tsirkin6e325a62006-02-14 18:52:22 +0200404 child->bus_flags = parent->bus_flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700405
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400406 /* initialize some portions of the bus device, but don't register it
407 * now as the parent is not properly set up yet. This device will get
408 * registered later in pci_bus_add_devices()
409 */
410 child->dev.class = &pcibus_class;
Kay Sievers1a927132008-10-30 02:17:49 +0100411 dev_set_name(&child->dev, "%04x:%02x", pci_domain_nr(child), busnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700412
413 /*
414 * Set up the primary, secondary and subordinate
415 * bus numbers.
416 */
417 child->number = child->secondary = busnr;
418 child->primary = parent->secondary;
419 child->subordinate = 0xff;
420
Yu Zhao3789fa82008-11-22 02:41:07 +0800421 if (!bridge)
422 return child;
423
424 child->self = bridge;
425 child->bridge = get_device(&bridge->dev);
426
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427 /* Set up default resource pointers and names.. */
Yu Zhaofde09c62008-11-22 02:39:32 +0800428 for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429 child->resource[i] = &bridge->resource[PCI_BRIDGE_RESOURCES+i];
430 child->resource[i]->name = child->name;
431 }
432 bridge->subordinate = child;
433
434 return child;
435}
436
Sam Ravnborg451124a2008-02-02 22:33:43 +0100437struct pci_bus *__ref pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438{
439 struct pci_bus *child;
440
441 child = pci_alloc_child_bus(parent, dev, busnr);
Rajesh Shahe4ea9bb2005-04-28 00:25:48 -0700442 if (child) {
Zhang Yanmind71374d2006-06-02 12:35:43 +0800443 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700444 list_add_tail(&child->node, &parent->children);
Zhang Yanmind71374d2006-06-02 12:35:43 +0800445 up_write(&pci_bus_sem);
Rajesh Shahe4ea9bb2005-04-28 00:25:48 -0700446 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700447 return child;
448}
449
Sam Ravnborg96bde062007-03-26 21:53:30 -0800450static void pci_fixup_parent_subordinate_busnr(struct pci_bus *child, int max)
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700451{
452 struct pci_bus *parent = child->parent;
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700453
454 /* Attempts to fix that up are really dangerous unless
455 we're going to re-assign all bus numbers. */
456 if (!pcibios_assign_all_busses())
457 return;
458
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700459 while (parent->parent && parent->subordinate < max) {
460 parent->subordinate = max;
461 pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS, max);
462 parent = parent->parent;
463 }
464}
465
Linus Torvalds1da177e2005-04-16 15:20:36 -0700466/*
467 * If it's a bridge, configure it and scan the bus behind it.
468 * For CardBus bridges, we don't scan behind as the devices will
469 * be handled by the bridge driver itself.
470 *
471 * We need to process bridges in two passes -- first we scan those
472 * already configured by the BIOS and after we are done with all of
473 * them, we proceed to assigning numbers to the remaining buses in
474 * order to avoid overlaps between old and new bus numbers.
475 */
Sam Ravnborg0ab2b572008-02-17 10:45:28 +0100476int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700477{
478 struct pci_bus *child;
479 int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
Dominik Brodowski49887942005-12-08 16:53:12 +0100480 u32 buses, i, j = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700481 u16 bctl;
Benjamin Herrenschmidta1c19892008-10-21 10:06:29 +1100482 int broken = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700483
484 pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
485
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600486 dev_dbg(&dev->dev, "scanning behind bridge, config %06x, pass %d\n",
487 buses & 0xffffff, pass);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700488
Benjamin Herrenschmidta1c19892008-10-21 10:06:29 +1100489 /* Check if setup is sensible at all */
490 if (!pass &&
491 ((buses & 0xff) != bus->number || ((buses >> 8) & 0xff) <= bus->number)) {
492 dev_dbg(&dev->dev, "bus configuration invalid, reconfiguring\n");
493 broken = 1;
494 }
495
Linus Torvalds1da177e2005-04-16 15:20:36 -0700496 /* Disable MasterAbortMode during probing to avoid reporting
497 of bus errors (in some architectures) */
498 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bctl);
499 pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
500 bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
501
Benjamin Herrenschmidta1c19892008-10-21 10:06:29 +1100502 if ((buses & 0xffff00) && !pcibios_assign_all_busses() && !is_cardbus && !broken) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700503 unsigned int cmax, busnr;
504 /*
505 * Bus already configured by firmware, process it in the first
506 * pass and just note the configuration.
507 */
508 if (pass)
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000509 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510 busnr = (buses >> 8) & 0xFF;
511
512 /*
513 * If we already got to this bus through a different bridge,
514 * ignore it. This can happen with the i450NX chipset.
515 */
516 if (pci_find_bus(pci_domain_nr(bus), busnr)) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600517 dev_info(&dev->dev, "bus %04x:%02x already known\n",
518 pci_domain_nr(bus), busnr);
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000519 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700520 }
521
Rajesh Shah6ef6f0e2005-04-28 00:25:49 -0700522 child = pci_add_new_bus(bus, dev, busnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700523 if (!child)
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000524 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525 child->primary = buses & 0xFF;
526 child->subordinate = (buses >> 16) & 0xFF;
Gary Hade11949252007-10-08 16:24:16 -0700527 child->bridge_ctl = bctl;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700528
529 cmax = pci_scan_child_bus(child);
530 if (cmax > max)
531 max = cmax;
532 if (child->subordinate > max)
533 max = child->subordinate;
534 } else {
535 /*
536 * We need to assign a number to this bus which we always
537 * do in the second pass.
538 */
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700539 if (!pass) {
Benjamin Herrenschmidta1c19892008-10-21 10:06:29 +1100540 if (pcibios_assign_all_busses() || broken)
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700541 /* Temporarily disable forwarding of the
542 configuration cycles on all bridges in
543 this bus segment to avoid possible
544 conflicts in the second pass between two
545 bridges programmed with overlapping
546 bus ranges. */
547 pci_write_config_dword(dev, PCI_PRIMARY_BUS,
548 buses & ~0xffffff);
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000549 goto out;
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700550 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551
552 /* Clear errors */
553 pci_write_config_word(dev, PCI_STATUS, 0xffff);
554
Rajesh Shahcc574502005-04-28 00:25:47 -0700555 /* Prevent assigning a bus number that already exists.
556 * This can happen when a bridge is hot-plugged */
557 if (pci_find_bus(pci_domain_nr(bus), max+1))
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000558 goto out;
Rajesh Shah6ef6f0e2005-04-28 00:25:49 -0700559 child = pci_add_new_bus(bus, dev, ++max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700560 buses = (buses & 0xff000000)
561 | ((unsigned int)(child->primary) << 0)
562 | ((unsigned int)(child->secondary) << 8)
563 | ((unsigned int)(child->subordinate) << 16);
564
565 /*
566 * yenta.c forces a secondary latency timer of 176.
567 * Copy that behaviour here.
568 */
569 if (is_cardbus) {
570 buses &= ~0xff000000;
571 buses |= CARDBUS_LATENCY_TIMER << 24;
572 }
573
574 /*
575 * We need to blast all three values with a single write.
576 */
577 pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses);
578
579 if (!is_cardbus) {
Gary Hade11949252007-10-08 16:24:16 -0700580 child->bridge_ctl = bctl;
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700581 /*
582 * Adjust subordinate busnr in parent buses.
583 * We do this before scanning for children because
584 * some devices may not be detected if the bios
585 * was lazy.
586 */
587 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588 /* Now we can scan all subordinate buses... */
589 max = pci_scan_child_bus(child);
Kristen Accardie3ac86d2006-01-17 16:57:01 -0800590 /*
591 * now fix it up again since we have found
592 * the real value of max.
593 */
594 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700595 } else {
596 /*
597 * For CardBus bridges, we leave 4 bus numbers
598 * as cards with a PCI-to-PCI bridge can be
599 * inserted later.
600 */
Dominik Brodowski49887942005-12-08 16:53:12 +0100601 for (i=0; i<CARDBUS_RESERVE_BUSNR; i++) {
602 struct pci_bus *parent = bus;
Rajesh Shahcc574502005-04-28 00:25:47 -0700603 if (pci_find_bus(pci_domain_nr(bus),
604 max+i+1))
605 break;
Dominik Brodowski49887942005-12-08 16:53:12 +0100606 while (parent->parent) {
607 if ((!pcibios_assign_all_busses()) &&
608 (parent->subordinate > max) &&
609 (parent->subordinate <= max+i)) {
610 j = 1;
611 }
612 parent = parent->parent;
613 }
614 if (j) {
615 /*
616 * Often, there are two cardbus bridges
617 * -- try to leave one valid bus number
618 * for each one.
619 */
620 i /= 2;
621 break;
622 }
623 }
Rajesh Shahcc574502005-04-28 00:25:47 -0700624 max += i;
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700625 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700626 }
627 /*
628 * Set the subordinate bus number to its real value.
629 */
630 child->subordinate = max;
631 pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
632 }
633
Gary Hadecb3576f2008-02-08 14:00:52 -0800634 sprintf(child->name,
635 (is_cardbus ? "PCI CardBus %04x:%02x" : "PCI Bus %04x:%02x"),
636 pci_domain_nr(bus), child->number);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637
Bernhard Kaindld55bef52007-07-30 20:35:13 +0200638 /* Has only triggered on CardBus, fixup is in yenta_socket */
Dominik Brodowski49887942005-12-08 16:53:12 +0100639 while (bus->parent) {
640 if ((child->subordinate > bus->subordinate) ||
641 (child->number > bus->subordinate) ||
642 (child->number < bus->number) ||
643 (child->subordinate < bus->number)) {
Joe Perchesa6f29a92007-11-19 17:48:29 -0800644 pr_debug("PCI: Bus #%02x (-#%02x) is %s "
Bernhard Kaindld55bef52007-07-30 20:35:13 +0200645 "hidden behind%s bridge #%02x (-#%02x)\n",
646 child->number, child->subordinate,
647 (bus->number > child->subordinate &&
648 bus->subordinate < child->number) ?
Joe Perchesa6f29a92007-11-19 17:48:29 -0800649 "wholly" : "partially",
650 bus->self->transparent ? " transparent" : "",
Bernhard Kaindld55bef52007-07-30 20:35:13 +0200651 bus->number, bus->subordinate);
Dominik Brodowski49887942005-12-08 16:53:12 +0100652 }
653 bus = bus->parent;
654 }
655
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000656out:
657 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl);
658
Linus Torvalds1da177e2005-04-16 15:20:36 -0700659 return max;
660}
661
662/*
663 * Read interrupt line and base address registers.
664 * The architecture-dependent code can tweak these, of course.
665 */
666static void pci_read_irq(struct pci_dev *dev)
667{
668 unsigned char irq;
669
670 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq);
Kristen Accardiffeff782005-11-02 16:24:32 -0800671 dev->pin = irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700672 if (irq)
673 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
674 dev->irq = irq;
675}
676
Bartlomiej Zolnierkiewicz01abc2a2007-04-23 23:19:36 +0200677#define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED)
Randy Dunlap76e6a1d2006-12-29 16:47:29 -0800678
Linus Torvalds1da177e2005-04-16 15:20:36 -0700679/**
680 * pci_setup_device - fill in class and map information of a device
681 * @dev: the device structure to fill
682 *
683 * Initialize the device structure with information about the device's
684 * vendor,class,memory and IO-space addresses,IRQ lines etc.
685 * Called at initialisation of the PCI subsystem and by CardBus services.
686 * Returns 0 on success and -1 if unknown type of device (not normal, bridge
687 * or CardBus).
688 */
689static int pci_setup_device(struct pci_dev * dev)
690{
691 u32 class;
692
Greg Kroah-Hartmaneebfcfb2008-07-02 13:24:49 -0700693 dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(dev->bus),
694 dev->bus->number, PCI_SLOT(dev->devfn),
695 PCI_FUNC(dev->devfn));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700696
697 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
Auke Kokb8a3a522007-06-08 15:46:30 -0700698 dev->revision = class & 0xff;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700699 class >>= 8; /* upper 3 bytes */
700 dev->class = class;
701 class >>= 8;
702
Bjorn Helgaas34a2e152008-08-25 15:45:20 -0600703 dev_dbg(&dev->dev, "found [%04x:%04x] class %06x header type %02x\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700704 dev->vendor, dev->device, class, dev->hdr_type);
705
706 /* "Unknown power state" */
Daniel Ritz3fe9d192005-08-17 15:32:19 -0700707 dev->current_state = PCI_UNKNOWN;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700708
709 /* Early fixups, before probing the BARs */
710 pci_fixup_device(pci_fixup_early, dev);
711 class = dev->class >> 8;
712
713 switch (dev->hdr_type) { /* header type */
714 case PCI_HEADER_TYPE_NORMAL: /* standard header */
715 if (class == PCI_CLASS_BRIDGE_PCI)
716 goto bad;
717 pci_read_irq(dev);
718 pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
719 pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
720 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
Alan Cox368c73d2006-10-04 00:41:26 +0100721
722 /*
723 * Do the ugly legacy mode stuff here rather than broken chip
724 * quirk code. Legacy mode ATA controllers have fixed
725 * addresses. These are not always echoed in BAR0-3, and
726 * BAR0-3 in a few cases contain junk!
727 */
728 if (class == PCI_CLASS_STORAGE_IDE) {
729 u8 progif;
730 pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
731 if ((progif & 1) == 0) {
Linus Torvaldsaf1bff42007-12-10 07:40:54 -0800732 dev->resource[0].start = 0x1F0;
733 dev->resource[0].end = 0x1F7;
734 dev->resource[0].flags = LEGACY_IO_RESOURCE;
735 dev->resource[1].start = 0x3F6;
736 dev->resource[1].end = 0x3F6;
737 dev->resource[1].flags = LEGACY_IO_RESOURCE;
Alan Cox368c73d2006-10-04 00:41:26 +0100738 }
739 if ((progif & 4) == 0) {
Linus Torvaldsaf1bff42007-12-10 07:40:54 -0800740 dev->resource[2].start = 0x170;
741 dev->resource[2].end = 0x177;
742 dev->resource[2].flags = LEGACY_IO_RESOURCE;
743 dev->resource[3].start = 0x376;
744 dev->resource[3].end = 0x376;
745 dev->resource[3].flags = LEGACY_IO_RESOURCE;
Alan Cox368c73d2006-10-04 00:41:26 +0100746 }
747 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700748 break;
749
750 case PCI_HEADER_TYPE_BRIDGE: /* bridge header */
751 if (class != PCI_CLASS_BRIDGE_PCI)
752 goto bad;
753 /* The PCI-to-PCI bridge spec requires that subtractive
754 decoding (i.e. transparent) bridge must have programming
755 interface code of 0x01. */
Kristen Accardi3efd2732005-11-02 16:55:49 -0800756 pci_read_irq(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700757 dev->transparent = ((dev->class & 0xff) == 1);
758 pci_read_bases(dev, 2, PCI_ROM_ADDRESS1);
759 break;
760
761 case PCI_HEADER_TYPE_CARDBUS: /* CardBus bridge header */
762 if (class != PCI_CLASS_BRIDGE_CARDBUS)
763 goto bad;
764 pci_read_irq(dev);
765 pci_read_bases(dev, 1, 0);
766 pci_read_config_word(dev, PCI_CB_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
767 pci_read_config_word(dev, PCI_CB_SUBSYSTEM_ID, &dev->subsystem_device);
768 break;
769
770 default: /* unknown header */
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600771 dev_err(&dev->dev, "unknown header type %02x, "
772 "ignoring device\n", dev->hdr_type);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700773 return -1;
774
775 bad:
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600776 dev_err(&dev->dev, "ignoring class %02x (doesn't match header "
777 "type %02x)\n", class, dev->hdr_type);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700778 dev->class = PCI_CLASS_NOT_DEFINED;
779 }
780
781 /* We found a fine healthy device, go go go... */
782 return 0;
783}
784
Zhao, Yu201de562008-10-13 19:49:55 +0800785static void pci_release_capabilities(struct pci_dev *dev)
786{
787 pci_vpd_release(dev);
788}
789
Linus Torvalds1da177e2005-04-16 15:20:36 -0700790/**
791 * pci_release_dev - free a pci device structure when all users of it are finished.
792 * @dev: device that's been disconnected
793 *
794 * Will be called only by the device core when all users of this pci device are
795 * done.
796 */
797static void pci_release_dev(struct device *dev)
798{
799 struct pci_dev *pci_dev;
800
801 pci_dev = to_pci_dev(dev);
Zhao, Yu201de562008-10-13 19:49:55 +0800802 pci_release_capabilities(pci_dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700803 kfree(pci_dev);
804}
805
Keshavamurthy, Anil S994a65e2007-10-21 16:41:46 -0700806static void set_pcie_port_type(struct pci_dev *pdev)
807{
808 int pos;
809 u16 reg16;
810
811 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
812 if (!pos)
813 return;
814 pdev->is_pcie = 1;
815 pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
816 pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
817}
818
Linus Torvalds1da177e2005-04-16 15:20:36 -0700819/**
820 * pci_cfg_space_size - get the configuration space size of the PCI device.
Randy Dunlap8f7020d2005-10-23 11:57:38 -0700821 * @dev: PCI device
Linus Torvalds1da177e2005-04-16 15:20:36 -0700822 *
823 * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices
824 * have 4096 bytes. Even if the device is capable, that doesn't mean we can
825 * access it. Maybe we don't have a way to generate extended config space
826 * accesses, or the device is behind a reverse Express bridge. So we try
827 * reading the dword at 0x100 which must either be 0 or a valid extended
828 * capability header.
829 */
Yinghai Lu70b9f7d2008-04-28 16:27:23 -0700830int pci_cfg_space_size_ext(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700831{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700832 u32 status;
Zhao, Yu557848c2008-10-13 19:18:07 +0800833 int pos = PCI_CFG_SPACE_SIZE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700834
Zhao, Yu557848c2008-10-13 19:18:07 +0800835 if (pci_read_config_dword(dev, pos, &status) != PCIBIOS_SUCCESSFUL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700836 goto fail;
837 if (status == 0xffffffff)
838 goto fail;
839
840 return PCI_CFG_SPACE_EXP_SIZE;
841
842 fail:
843 return PCI_CFG_SPACE_SIZE;
844}
845
Yinghai Lu57741a72008-02-15 01:32:50 -0800846int pci_cfg_space_size(struct pci_dev *dev)
847{
Yinghai Lu70b9f7d2008-04-28 16:27:23 -0700848 int pos;
849 u32 status;
850
851 pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
852 if (!pos) {
853 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
854 if (!pos)
855 goto fail;
856
857 pci_read_config_dword(dev, pos + PCI_X_STATUS, &status);
858 if (!(status & (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ)))
859 goto fail;
860 }
861
862 return pci_cfg_space_size_ext(dev);
863
864 fail:
865 return PCI_CFG_SPACE_SIZE;
Yinghai Lu57741a72008-02-15 01:32:50 -0800866}
867
Linus Torvalds1da177e2005-04-16 15:20:36 -0700868static void pci_release_bus_bridge_dev(struct device *dev)
869{
870 kfree(dev);
871}
872
Michael Ellerman65891212007-04-05 17:19:08 +1000873struct pci_dev *alloc_pci_dev(void)
874{
875 struct pci_dev *dev;
876
877 dev = kzalloc(sizeof(struct pci_dev), GFP_KERNEL);
878 if (!dev)
879 return NULL;
880
Michael Ellerman65891212007-04-05 17:19:08 +1000881 INIT_LIST_HEAD(&dev->bus_list);
882
883 return dev;
884}
885EXPORT_SYMBOL(alloc_pci_dev);
886
Linus Torvalds1da177e2005-04-16 15:20:36 -0700887/*
888 * Read the config data for a PCI device, sanity-check it
889 * and fill in the dev structure...
890 */
Adrian Bunk7f7b5de2008-04-18 13:53:55 -0700891static struct pci_dev *pci_scan_device(struct pci_bus *bus, int devfn)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700892{
893 struct pci_dev *dev;
Alex Chiangcef354d2008-09-02 09:40:51 -0600894 struct pci_slot *slot;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700895 u32 l;
896 u8 hdr_type;
897 int delay = 1;
898
899 if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l))
900 return NULL;
901
902 /* some broken boards return 0 or ~0 if a slot is empty: */
903 if (l == 0xffffffff || l == 0x00000000 ||
904 l == 0x0000ffff || l == 0xffff0000)
905 return NULL;
906
907 /* Configuration request Retry Status */
908 while (l == 0xffff0001) {
909 msleep(delay);
910 delay *= 2;
911 if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l))
912 return NULL;
913 /* Card hasn't responded in 60 seconds? Must be stuck. */
914 if (delay > 60 * 1000) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600915 printk(KERN_WARNING "pci %04x:%02x:%02x.%d: not "
Linus Torvalds1da177e2005-04-16 15:20:36 -0700916 "responding\n", pci_domain_nr(bus),
917 bus->number, PCI_SLOT(devfn),
918 PCI_FUNC(devfn));
919 return NULL;
920 }
921 }
922
923 if (pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type))
924 return NULL;
925
Michael Ellermanbab41e92007-04-05 17:19:09 +1000926 dev = alloc_pci_dev();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700927 if (!dev)
928 return NULL;
929
Linus Torvalds1da177e2005-04-16 15:20:36 -0700930 dev->bus = bus;
931 dev->sysdata = bus->sysdata;
932 dev->dev.parent = bus->bridge;
933 dev->dev.bus = &pci_bus_type;
934 dev->devfn = devfn;
935 dev->hdr_type = hdr_type & 0x7f;
936 dev->multifunction = !!(hdr_type & 0x80);
937 dev->vendor = l & 0xffff;
938 dev->device = (l >> 16) & 0xffff;
939 dev->cfg_size = pci_cfg_space_size(dev);
Linas Vepstas82081792006-07-10 04:44:46 -0700940 dev->error_state = pci_channel_io_normal;
Keshavamurthy, Anil S994a65e2007-10-21 16:41:46 -0700941 set_pcie_port_type(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700942
Alex Chiangcef354d2008-09-02 09:40:51 -0600943 list_for_each_entry(slot, &bus->slots, list)
944 if (PCI_SLOT(devfn) == slot->number)
945 dev->slot = slot;
946
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947 /* Assume 32-bit PCI; let 64-bit PCI cards (which are far rarer)
948 set this higher, assuming the system even supports it. */
949 dev->dma_mask = 0xffffffff;
950 if (pci_setup_device(dev) < 0) {
951 kfree(dev);
952 return NULL;
953 }
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +1000954
955 return dev;
956}
957
Zhao, Yu201de562008-10-13 19:49:55 +0800958static void pci_init_capabilities(struct pci_dev *dev)
959{
960 /* MSI/MSI-X list */
961 pci_msi_init_pci_dev(dev);
962
Rafael J. Wysocki63f48982008-12-07 22:02:58 +0100963 /* Buffers for saving PCIe and PCI-X capabilities */
964 pci_allocate_cap_save_buffers(dev);
965
Zhao, Yu201de562008-10-13 19:49:55 +0800966 /* Power Management */
967 pci_pm_init(dev);
Jesse Barneseb9c39d2008-12-17 12:10:05 -0800968 platform_pci_wakeup_init(dev);
Zhao, Yu201de562008-10-13 19:49:55 +0800969
970 /* Vital Product Data */
971 pci_vpd_pci22_init(dev);
Yu Zhao58c3a722008-10-14 14:02:53 +0800972
973 /* Alternative Routing-ID Forwarding */
974 pci_enable_ari(dev);
Zhao, Yu201de562008-10-13 19:49:55 +0800975}
976
Sam Ravnborg96bde062007-03-26 21:53:30 -0800977void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +1000978{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700979 device_initialize(&dev->dev);
980 dev->dev.release = pci_release_dev;
981 pci_dev_get(dev);
982
Linus Torvalds1da177e2005-04-16 15:20:36 -0700983 dev->dev.dma_mask = &dev->dma_mask;
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -0800984 dev->dev.dma_parms = &dev->dma_parms;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700985 dev->dev.coherent_dma_mask = 0xffffffffull;
986
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -0800987 pci_set_dma_max_seg_size(dev, 65536);
FUJITA Tomonori59fc67d2008-02-04 22:28:14 -0800988 pci_set_dma_seg_boundary(dev, 0xffffffff);
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -0800989
Linus Torvalds1da177e2005-04-16 15:20:36 -0700990 /* Fix up broken headers */
991 pci_fixup_device(pci_fixup_header, dev);
992
Zhao, Yu201de562008-10-13 19:49:55 +0800993 /* Initialize various capabilities */
994 pci_init_capabilities(dev);
Rafael J. Wysockieb9d0fe2008-07-07 03:34:48 +0200995
Linus Torvalds1da177e2005-04-16 15:20:36 -0700996 /*
997 * Add the device to our list of discovered devices
998 * and the bus list for fixup functions, etc.
999 */
Zhang Yanmind71374d2006-06-02 12:35:43 +08001000 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001001 list_add_tail(&dev->bus_list, &bus->devices);
Zhang Yanmind71374d2006-06-02 12:35:43 +08001002 up_write(&pci_bus_sem);
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001003}
1004
Sam Ravnborg451124a2008-02-02 22:33:43 +01001005struct pci_dev *__ref pci_scan_single_device(struct pci_bus *bus, int devfn)
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001006{
1007 struct pci_dev *dev;
1008
1009 dev = pci_scan_device(bus, devfn);
1010 if (!dev)
1011 return NULL;
1012
1013 pci_device_add(dev, bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001014
1015 return dev;
1016}
Adrian Bunkb73e9682007-11-21 15:07:11 -08001017EXPORT_SYMBOL(pci_scan_single_device);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001018
1019/**
1020 * pci_scan_slot - scan a PCI slot on a bus for devices.
1021 * @bus: PCI bus to scan
1022 * @devfn: slot number to scan (must have zero function.)
1023 *
1024 * Scan a PCI slot on the specified PCI bus for devices, adding
1025 * discovered devices to the @bus->devices list. New devices
Greg Kroah-Hartman8a1bc902008-02-14 14:56:56 -08001026 * will not have is_added set.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001027 */
Sam Ravnborg96bde062007-03-26 21:53:30 -08001028int pci_scan_slot(struct pci_bus *bus, int devfn)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001029{
1030 int func, nr = 0;
1031 int scan_all_fns;
1032
1033 scan_all_fns = pcibios_scan_all_fns(bus, devfn);
1034
1035 for (func = 0; func < 8; func++, devfn++) {
1036 struct pci_dev *dev;
1037
1038 dev = pci_scan_single_device(bus, devfn);
1039 if (dev) {
1040 nr++;
1041
1042 /*
1043 * If this is a single function device,
1044 * don't scan past the first function.
1045 */
1046 if (!dev->multifunction) {
1047 if (func > 0) {
1048 dev->multifunction = 1;
1049 } else {
1050 break;
1051 }
1052 }
1053 } else {
1054 if (func == 0 && !scan_all_fns)
1055 break;
1056 }
1057 }
Shaohua Li7d715a62008-02-25 09:46:41 +08001058
Shaohua Li149e1632008-07-23 10:32:31 +08001059 /* only one slot has pcie device */
1060 if (bus->self && nr)
Shaohua Li7d715a62008-02-25 09:46:41 +08001061 pcie_aspm_init_link_state(bus->self);
1062
Linus Torvalds1da177e2005-04-16 15:20:36 -07001063 return nr;
1064}
1065
Sam Ravnborg0ab2b572008-02-17 10:45:28 +01001066unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001067{
1068 unsigned int devfn, pass, max = bus->secondary;
1069 struct pci_dev *dev;
1070
1071 pr_debug("PCI: Scanning bus %04x:%02x\n", pci_domain_nr(bus), bus->number);
1072
1073 /* Go find them, Rover! */
1074 for (devfn = 0; devfn < 0x100; devfn += 8)
1075 pci_scan_slot(bus, devfn);
1076
1077 /*
1078 * After performing arch-dependent fixup of the bus, look behind
1079 * all PCI-to-PCI bridges on this bus.
1080 */
1081 pr_debug("PCI: Fixups for bus %04x:%02x\n", pci_domain_nr(bus), bus->number);
1082 pcibios_fixup_bus(bus);
1083 for (pass=0; pass < 2; pass++)
1084 list_for_each_entry(dev, &bus->devices, bus_list) {
1085 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
1086 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
1087 max = pci_scan_bridge(bus, dev, max, pass);
1088 }
1089
1090 /*
1091 * We've scanned the bus and so we know all about what's on
1092 * the other side of any bridges that may be on this bus plus
1093 * any devices.
1094 *
1095 * Return how far we've got finding sub-buses.
1096 */
1097 pr_debug("PCI: Bus scan for %04x:%02x returning with max=%02x\n",
1098 pci_domain_nr(bus), bus->number, max);
1099 return max;
1100}
1101
Yinghai Lu30a18d62008-02-19 03:21:20 -08001102void __attribute__((weak)) set_pci_bus_resources_arch_default(struct pci_bus *b)
1103{
1104}
1105
Sam Ravnborg96bde062007-03-26 21:53:30 -08001106struct pci_bus * pci_create_bus(struct device *parent,
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001107 int bus, struct pci_ops *ops, void *sysdata)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001108{
1109 int error;
1110 struct pci_bus *b;
1111 struct device *dev;
1112
1113 b = pci_alloc_bus();
1114 if (!b)
1115 return NULL;
1116
1117 dev = kmalloc(sizeof(*dev), GFP_KERNEL);
1118 if (!dev){
1119 kfree(b);
1120 return NULL;
1121 }
1122
1123 b->sysdata = sysdata;
1124 b->ops = ops;
1125
1126 if (pci_find_bus(pci_domain_nr(b), bus)) {
1127 /* If we already got to this bus through a different bridge, ignore it */
1128 pr_debug("PCI: Bus %04x:%02x already known\n", pci_domain_nr(b), bus);
1129 goto err_out;
1130 }
Zhang Yanmind71374d2006-06-02 12:35:43 +08001131
1132 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001133 list_add_tail(&b->node, &pci_root_buses);
Zhang Yanmind71374d2006-06-02 12:35:43 +08001134 up_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001135
1136 memset(dev, 0, sizeof(*dev));
1137 dev->parent = parent;
1138 dev->release = pci_release_bus_bridge_dev;
Kay Sievers1a927132008-10-30 02:17:49 +01001139 dev_set_name(dev, "pci%04x:%02x", pci_domain_nr(b), bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001140 error = device_register(dev);
1141 if (error)
1142 goto dev_reg_err;
1143 b->bridge = get_device(dev);
1144
Yinghai Lu0d358f22008-02-19 03:20:41 -08001145 if (!parent)
1146 set_dev_node(b->bridge, pcibus_to_node(b));
1147
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001148 b->dev.class = &pcibus_class;
1149 b->dev.parent = b->bridge;
Kay Sievers1a927132008-10-30 02:17:49 +01001150 dev_set_name(&b->dev, "%04x:%02x", pci_domain_nr(b), bus);
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001151 error = device_register(&b->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001152 if (error)
1153 goto class_dev_reg_err;
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001154 error = device_create_file(&b->dev, &dev_attr_cpuaffinity);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001155 if (error)
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001156 goto dev_create_file_err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001157
1158 /* Create legacy_io and legacy_mem files for this bus */
1159 pci_create_legacy_files(b);
1160
Linus Torvalds1da177e2005-04-16 15:20:36 -07001161 b->number = b->secondary = bus;
1162 b->resource[0] = &ioport_resource;
1163 b->resource[1] = &iomem_resource;
1164
Yinghai Lu30a18d62008-02-19 03:21:20 -08001165 set_pci_bus_resources_arch_default(b);
1166
Linus Torvalds1da177e2005-04-16 15:20:36 -07001167 return b;
1168
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001169dev_create_file_err:
1170 device_unregister(&b->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001171class_dev_reg_err:
1172 device_unregister(dev);
1173dev_reg_err:
Zhang Yanmind71374d2006-06-02 12:35:43 +08001174 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001175 list_del(&b->node);
Zhang Yanmind71374d2006-06-02 12:35:43 +08001176 up_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001177err_out:
1178 kfree(dev);
1179 kfree(b);
1180 return NULL;
1181}
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001182
Sam Ravnborg0ab2b572008-02-17 10:45:28 +01001183struct pci_bus * __devinit pci_scan_bus_parented(struct device *parent,
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001184 int bus, struct pci_ops *ops, void *sysdata)
1185{
1186 struct pci_bus *b;
1187
1188 b = pci_create_bus(parent, bus, ops, sysdata);
1189 if (b)
1190 b->subordinate = pci_scan_child_bus(b);
1191 return b;
1192}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001193EXPORT_SYMBOL(pci_scan_bus_parented);
1194
1195#ifdef CONFIG_HOTPLUG
1196EXPORT_SYMBOL(pci_add_new_bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001197EXPORT_SYMBOL(pci_scan_slot);
1198EXPORT_SYMBOL(pci_scan_bridge);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001199EXPORT_SYMBOL_GPL(pci_scan_child_bus);
1200#endif
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001201
Greg Kroah-Hartman99178b02008-08-26 11:00:57 -05001202static int __init pci_sort_bf_cmp(const struct device *d_a, const struct device *d_b)
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001203{
Greg Kroah-Hartman99178b02008-08-26 11:00:57 -05001204 const struct pci_dev *a = to_pci_dev(d_a);
1205 const struct pci_dev *b = to_pci_dev(d_b);
1206
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001207 if (pci_domain_nr(a->bus) < pci_domain_nr(b->bus)) return -1;
1208 else if (pci_domain_nr(a->bus) > pci_domain_nr(b->bus)) return 1;
1209
1210 if (a->bus->number < b->bus->number) return -1;
1211 else if (a->bus->number > b->bus->number) return 1;
1212
1213 if (a->devfn < b->devfn) return -1;
1214 else if (a->devfn > b->devfn) return 1;
1215
1216 return 0;
1217}
1218
Greg Kroah-Hartman5ff580c2008-02-14 14:56:56 -08001219void __init pci_sort_breadthfirst(void)
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001220{
Greg Kroah-Hartman99178b02008-08-26 11:00:57 -05001221 bus_sort_breadthfirst(&pci_bus_type, &pci_sort_bf_cmp);
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001222}