Juerg Haefliger | 9431996 | 2007-06-09 10:11:16 -0400 | [diff] [blame] | 1 | /* |
| 2 | * dme1737.c - driver for the SMSC DME1737 and Asus A8000 Super-I/O chips |
| 3 | * integrated hardware monitoring features. |
| 4 | * Copyright (c) 2007 Juerg Haefliger <juergh@gmail.com> |
| 5 | * |
| 6 | * This driver is based on the LM85 driver. The hardware monitoring |
| 7 | * capabilities of the DME1737 are very similar to the LM85 with some |
| 8 | * additional features. Even though the DME1737 is a Super-I/O chip, the |
| 9 | * hardware monitoring registers are only accessible via SMBus. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License as published by |
| 13 | * the Free Software Foundation; either version 2 of the License, or |
| 14 | * (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 24 | */ |
| 25 | |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/init.h> |
| 28 | #include <linux/slab.h> |
| 29 | #include <linux/jiffies.h> |
| 30 | #include <linux/i2c.h> |
| 31 | #include <linux/hwmon.h> |
| 32 | #include <linux/hwmon-sysfs.h> |
| 33 | #include <linux/hwmon-vid.h> |
| 34 | #include <linux/err.h> |
| 35 | #include <linux/mutex.h> |
| 36 | #include <asm/io.h> |
| 37 | |
| 38 | /* Module load parameters */ |
| 39 | static int force_start; |
| 40 | module_param(force_start, bool, 0); |
| 41 | MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs"); |
| 42 | |
| 43 | /* Addresses to scan */ |
| 44 | static unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END}; |
| 45 | |
| 46 | /* Insmod parameters */ |
| 47 | I2C_CLIENT_INSMOD_1(dme1737); |
| 48 | |
| 49 | /* --------------------------------------------------------------------- |
| 50 | * Registers |
| 51 | * |
| 52 | * The sensors are defined as follows: |
| 53 | * |
| 54 | * Voltages Temperatures |
| 55 | * -------- ------------ |
| 56 | * in0 +5VTR (+5V stdby) temp1 Remote diode 1 |
| 57 | * in1 Vccp (proc core) temp2 Internal temp |
| 58 | * in2 VCC (internal +3.3V) temp3 Remote diode 2 |
| 59 | * in3 +5V |
| 60 | * in4 +12V |
| 61 | * in5 VTR (+3.3V stby) |
| 62 | * in6 Vbat |
| 63 | * |
| 64 | * --------------------------------------------------------------------- */ |
| 65 | |
| 66 | /* Voltages (in) numbered 0-6 (ix) */ |
| 67 | #define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) \ |
| 68 | : 0x94 + (ix)) |
| 69 | #define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \ |
| 70 | : 0x91 + (ix) * 2) |
| 71 | #define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \ |
| 72 | : 0x92 + (ix) * 2) |
| 73 | |
| 74 | /* Temperatures (temp) numbered 0-2 (ix) */ |
| 75 | #define DME1737_REG_TEMP(ix) (0x25 + (ix)) |
| 76 | #define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2) |
| 77 | #define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2) |
| 78 | #define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \ |
| 79 | : 0x1c + (ix)) |
| 80 | |
| 81 | /* Voltage and temperature LSBs |
| 82 | * The LSBs (4 bits each) are stored in 5 registers with the following layouts: |
| 83 | * IN_TEMP_LSB(0) = [in5, in6] |
| 84 | * IN_TEMP_LSB(1) = [temp3, temp1] |
| 85 | * IN_TEMP_LSB(2) = [in4, temp2] |
| 86 | * IN_TEMP_LSB(3) = [in3, in0] |
| 87 | * IN_TEMP_LSB(4) = [in2, in1] */ |
| 88 | #define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix)) |
| 89 | static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0}; |
| 90 | static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4}; |
| 91 | static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1}; |
| 92 | static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0}; |
| 93 | |
| 94 | /* Fans numbered 0-5 (ix) */ |
| 95 | #define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \ |
| 96 | : 0xa1 + (ix) * 2) |
| 97 | #define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \ |
| 98 | : 0xa5 + (ix) * 2) |
| 99 | #define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \ |
| 100 | : 0xb2 + (ix)) |
| 101 | #define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */ |
| 102 | |
| 103 | /* PWMs numbered 0-2, 4-5 (ix) */ |
| 104 | #define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \ |
| 105 | : 0xa1 + (ix)) |
| 106 | #define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */ |
| 107 | #define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */ |
| 108 | #define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \ |
| 109 | : 0xa3 + (ix)) |
| 110 | /* The layout of the ramp rate registers is different from the other pwm |
| 111 | * registers. The bits for the 3 PWMs are stored in 2 registers: |
| 112 | * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0] |
| 113 | * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */ |
| 114 | #define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */ |
| 115 | |
| 116 | /* Thermal zones 0-2 */ |
| 117 | #define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix)) |
| 118 | #define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix)) |
| 119 | /* The layout of the hysteresis registers is different from the other zone |
| 120 | * registers. The bits for the 3 zones are stored in 2 registers: |
| 121 | * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] |
| 122 | * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */ |
| 123 | #define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix)) |
| 124 | |
| 125 | /* Alarm registers and bit mapping |
| 126 | * The 3 8-bit alarm registers will be concatenated to a single 32-bit |
| 127 | * alarm value [0, ALARM3, ALARM2, ALARM1]. */ |
| 128 | #define DME1737_REG_ALARM1 0x41 |
| 129 | #define DME1737_REG_ALARM2 0x42 |
| 130 | #define DME1737_REG_ALARM3 0x83 |
| 131 | static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17}; |
| 132 | static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6}; |
| 133 | static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23}; |
| 134 | |
| 135 | /* Miscellaneous registers */ |
| 136 | #define DME1737_REG_COMPANY 0x3e |
| 137 | #define DME1737_REG_VERSTEP 0x3f |
| 138 | #define DME1737_REG_CONFIG 0x40 |
| 139 | #define DME1737_REG_CONFIG2 0x7f |
| 140 | #define DME1737_REG_VID 0x43 |
| 141 | #define DME1737_REG_TACH_PWM 0x81 |
| 142 | |
| 143 | /* --------------------------------------------------------------------- |
| 144 | * Misc defines |
| 145 | * --------------------------------------------------------------------- */ |
| 146 | |
| 147 | /* Chip identification */ |
| 148 | #define DME1737_COMPANY_SMSC 0x5c |
| 149 | #define DME1737_VERSTEP 0x88 |
| 150 | #define DME1737_VERSTEP_MASK 0xf8 |
| 151 | |
| 152 | /* --------------------------------------------------------------------- |
| 153 | * Data structures and manipulation thereof |
| 154 | * --------------------------------------------------------------------- */ |
| 155 | |
| 156 | struct dme1737_data { |
| 157 | struct i2c_client client; |
Tony Jones | 1beeffe | 2007-08-20 13:46:20 -0700 | [diff] [blame] | 158 | struct device *hwmon_dev; |
Juerg Haefliger | 9431996 | 2007-06-09 10:11:16 -0400 | [diff] [blame] | 159 | |
| 160 | struct mutex update_lock; |
| 161 | int valid; /* !=0 if following fields are valid */ |
| 162 | unsigned long last_update; /* in jiffies */ |
| 163 | unsigned long last_vbat; /* in jiffies */ |
| 164 | |
| 165 | u8 vid; |
| 166 | u8 pwm_rr_en; |
| 167 | u8 has_pwm; |
| 168 | u8 has_fan; |
| 169 | |
| 170 | /* Register values */ |
| 171 | u16 in[7]; |
| 172 | u8 in_min[7]; |
| 173 | u8 in_max[7]; |
| 174 | s16 temp[3]; |
| 175 | s8 temp_min[3]; |
| 176 | s8 temp_max[3]; |
| 177 | s8 temp_offset[3]; |
| 178 | u8 config; |
| 179 | u8 config2; |
| 180 | u8 vrm; |
| 181 | u16 fan[6]; |
| 182 | u16 fan_min[6]; |
| 183 | u8 fan_max[2]; |
| 184 | u8 fan_opt[6]; |
| 185 | u8 pwm[6]; |
| 186 | u8 pwm_min[3]; |
| 187 | u8 pwm_config[3]; |
| 188 | u8 pwm_acz[3]; |
| 189 | u8 pwm_freq[6]; |
| 190 | u8 pwm_rr[2]; |
| 191 | u8 zone_low[3]; |
| 192 | u8 zone_abs[3]; |
| 193 | u8 zone_hyst[2]; |
| 194 | u32 alarms; |
| 195 | }; |
| 196 | |
| 197 | /* Nominal voltage values */ |
| 198 | static const int IN_NOMINAL[] = {5000, 2250, 3300, 5000, 12000, 3300, 3300}; |
| 199 | |
| 200 | /* Voltage input |
| 201 | * Voltage inputs have 16 bits resolution, limit values have 8 bits |
| 202 | * resolution. */ |
| 203 | static inline int IN_FROM_REG(int reg, int ix, int res) |
| 204 | { |
| 205 | return (reg * IN_NOMINAL[ix] + (3 << (res - 3))) / (3 << (res - 2)); |
| 206 | } |
| 207 | |
| 208 | static inline int IN_TO_REG(int val, int ix) |
| 209 | { |
| 210 | return SENSORS_LIMIT((val * 192 + IN_NOMINAL[ix] / 2) / |
| 211 | IN_NOMINAL[ix], 0, 255); |
| 212 | } |
| 213 | |
| 214 | /* Temperature input |
| 215 | * The register values represent temperatures in 2's complement notation from |
| 216 | * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit |
| 217 | * values have 8 bits resolution. */ |
| 218 | static inline int TEMP_FROM_REG(int reg, int res) |
| 219 | { |
| 220 | return (reg * 1000) >> (res - 8); |
| 221 | } |
| 222 | |
| 223 | static inline int TEMP_TO_REG(int val) |
| 224 | { |
| 225 | return SENSORS_LIMIT((val < 0 ? val - 500 : val + 500) / 1000, |
| 226 | -128, 127); |
| 227 | } |
| 228 | |
| 229 | /* Temperature range */ |
| 230 | static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000, |
| 231 | 10000, 13333, 16000, 20000, 26666, 32000, |
| 232 | 40000, 53333, 80000}; |
| 233 | |
| 234 | static inline int TEMP_RANGE_FROM_REG(int reg) |
| 235 | { |
| 236 | return TEMP_RANGE[(reg >> 4) & 0x0f]; |
| 237 | } |
| 238 | |
| 239 | static int TEMP_RANGE_TO_REG(int val, int reg) |
| 240 | { |
| 241 | int i; |
| 242 | |
| 243 | for (i = 15; i > 0; i--) { |
| 244 | if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2) { |
| 245 | break; |
| 246 | } |
| 247 | } |
| 248 | |
| 249 | return (reg & 0x0f) | (i << 4); |
| 250 | } |
| 251 | |
| 252 | /* Temperature hysteresis |
| 253 | * Register layout: |
| 254 | * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] |
| 255 | * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */ |
| 256 | static inline int TEMP_HYST_FROM_REG(int reg, int ix) |
| 257 | { |
| 258 | return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000; |
| 259 | } |
| 260 | |
| 261 | static inline int TEMP_HYST_TO_REG(int val, int ix, int reg) |
| 262 | { |
| 263 | int hyst = SENSORS_LIMIT((val + 500) / 1000, 0, 15); |
| 264 | |
| 265 | return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4); |
| 266 | } |
| 267 | |
| 268 | /* Fan input RPM */ |
| 269 | static inline int FAN_FROM_REG(int reg, int tpc) |
| 270 | { |
| 271 | return (reg == 0 || reg == 0xffff) ? 0 : |
| 272 | (tpc == 0) ? 90000 * 60 / reg : tpc * reg; |
| 273 | } |
| 274 | |
| 275 | static inline int FAN_TO_REG(int val, int tpc) |
| 276 | { |
| 277 | return SENSORS_LIMIT((tpc == 0) ? 90000 * 60 / val : val / tpc, |
| 278 | 0, 0xffff); |
| 279 | } |
| 280 | |
| 281 | /* Fan TPC (tach pulse count) |
| 282 | * Converts a register value to a TPC multiplier or returns 0 if the tachometer |
| 283 | * is configured in legacy (non-tpc) mode */ |
| 284 | static inline int FAN_TPC_FROM_REG(int reg) |
| 285 | { |
| 286 | return (reg & 0x20) ? 0 : 60 >> (reg & 0x03); |
| 287 | } |
| 288 | |
| 289 | /* Fan type |
| 290 | * The type of a fan is expressed in number of pulses-per-revolution that it |
| 291 | * emits */ |
| 292 | static inline int FAN_TYPE_FROM_REG(int reg) |
| 293 | { |
| 294 | int edge = (reg >> 1) & 0x03; |
| 295 | |
| 296 | return (edge > 0) ? 1 << (edge - 1) : 0; |
| 297 | } |
| 298 | |
| 299 | static inline int FAN_TYPE_TO_REG(int val, int reg) |
| 300 | { |
| 301 | int edge = (val == 4) ? 3 : val; |
| 302 | |
| 303 | return (reg & 0xf9) | (edge << 1); |
| 304 | } |
| 305 | |
| 306 | /* Fan max RPM */ |
| 307 | static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12, |
| 308 | 0x11, 0x0f, 0x0e}; |
| 309 | |
| 310 | static int FAN_MAX_FROM_REG(int reg) |
| 311 | { |
| 312 | int i; |
| 313 | |
| 314 | for (i = 10; i > 0; i--) { |
| 315 | if (reg == FAN_MAX[i]) { |
| 316 | break; |
| 317 | } |
| 318 | } |
| 319 | |
| 320 | return 1000 + i * 500; |
| 321 | } |
| 322 | |
| 323 | static int FAN_MAX_TO_REG(int val) |
| 324 | { |
| 325 | int i; |
| 326 | |
| 327 | for (i = 10; i > 0; i--) { |
| 328 | if (val > (1000 + (i - 1) * 500)) { |
| 329 | break; |
| 330 | } |
| 331 | } |
| 332 | |
| 333 | return FAN_MAX[i]; |
| 334 | } |
| 335 | |
| 336 | /* PWM enable |
| 337 | * Register to enable mapping: |
| 338 | * 000: 2 fan on zone 1 auto |
| 339 | * 001: 2 fan on zone 2 auto |
| 340 | * 010: 2 fan on zone 3 auto |
| 341 | * 011: 0 fan full on |
| 342 | * 100: -1 fan disabled |
| 343 | * 101: 2 fan on hottest of zones 2,3 auto |
| 344 | * 110: 2 fan on hottest of zones 1,2,3 auto |
| 345 | * 111: 1 fan in manual mode */ |
| 346 | static inline int PWM_EN_FROM_REG(int reg) |
| 347 | { |
| 348 | static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1}; |
| 349 | |
| 350 | return en[(reg >> 5) & 0x07]; |
| 351 | } |
| 352 | |
| 353 | static inline int PWM_EN_TO_REG(int val, int reg) |
| 354 | { |
| 355 | int en = (val == 1) ? 7 : 3; |
| 356 | |
| 357 | return (reg & 0x1f) | ((en & 0x07) << 5); |
| 358 | } |
| 359 | |
| 360 | /* PWM auto channels zone |
| 361 | * Register to auto channels zone mapping (ACZ is a bitfield with bit x |
| 362 | * corresponding to zone x+1): |
| 363 | * 000: 001 fan on zone 1 auto |
| 364 | * 001: 010 fan on zone 2 auto |
| 365 | * 010: 100 fan on zone 3 auto |
| 366 | * 011: 000 fan full on |
| 367 | * 100: 000 fan disabled |
| 368 | * 101: 110 fan on hottest of zones 2,3 auto |
| 369 | * 110: 111 fan on hottest of zones 1,2,3 auto |
| 370 | * 111: 000 fan in manual mode */ |
| 371 | static inline int PWM_ACZ_FROM_REG(int reg) |
| 372 | { |
| 373 | static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0}; |
| 374 | |
| 375 | return acz[(reg >> 5) & 0x07]; |
| 376 | } |
| 377 | |
| 378 | static inline int PWM_ACZ_TO_REG(int val, int reg) |
| 379 | { |
| 380 | int acz = (val == 4) ? 2 : val - 1; |
| 381 | |
| 382 | return (reg & 0x1f) | ((acz & 0x07) << 5); |
| 383 | } |
| 384 | |
| 385 | /* PWM frequency */ |
| 386 | static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88, |
| 387 | 15000, 20000, 30000, 25000, 0, 0, 0, 0}; |
| 388 | |
| 389 | static inline int PWM_FREQ_FROM_REG(int reg) |
| 390 | { |
| 391 | return PWM_FREQ[reg & 0x0f]; |
| 392 | } |
| 393 | |
| 394 | static int PWM_FREQ_TO_REG(int val, int reg) |
| 395 | { |
| 396 | int i; |
| 397 | |
| 398 | /* the first two cases are special - stupid chip design! */ |
| 399 | if (val > 27500) { |
| 400 | i = 10; |
| 401 | } else if (val > 22500) { |
| 402 | i = 11; |
| 403 | } else { |
| 404 | for (i = 9; i > 0; i--) { |
| 405 | if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2) { |
| 406 | break; |
| 407 | } |
| 408 | } |
| 409 | } |
| 410 | |
| 411 | return (reg & 0xf0) | i; |
| 412 | } |
| 413 | |
| 414 | /* PWM ramp rate |
| 415 | * Register layout: |
| 416 | * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0] |
| 417 | * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */ |
| 418 | static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5}; |
| 419 | |
| 420 | static inline int PWM_RR_FROM_REG(int reg, int ix) |
| 421 | { |
| 422 | int rr = (ix == 1) ? reg >> 4 : reg; |
| 423 | |
| 424 | return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0; |
| 425 | } |
| 426 | |
| 427 | static int PWM_RR_TO_REG(int val, int ix, int reg) |
| 428 | { |
| 429 | int i; |
| 430 | |
| 431 | for (i = 0; i < 7; i++) { |
| 432 | if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2) { |
| 433 | break; |
| 434 | } |
| 435 | } |
| 436 | |
| 437 | return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i; |
| 438 | } |
| 439 | |
| 440 | /* PWM ramp rate enable */ |
| 441 | static inline int PWM_RR_EN_FROM_REG(int reg, int ix) |
| 442 | { |
| 443 | return PWM_RR_FROM_REG(reg, ix) ? 1 : 0; |
| 444 | } |
| 445 | |
| 446 | static inline int PWM_RR_EN_TO_REG(int val, int ix, int reg) |
| 447 | { |
| 448 | int en = (ix == 1) ? 0x80 : 0x08; |
| 449 | |
| 450 | return val ? reg | en : reg & ~en; |
| 451 | } |
| 452 | |
| 453 | /* PWM min/off |
| 454 | * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for |
| 455 | * the register layout). */ |
| 456 | static inline int PWM_OFF_FROM_REG(int reg, int ix) |
| 457 | { |
| 458 | return (reg >> (ix + 5)) & 0x01; |
| 459 | } |
| 460 | |
| 461 | static inline int PWM_OFF_TO_REG(int val, int ix, int reg) |
| 462 | { |
| 463 | return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5)); |
| 464 | } |
| 465 | |
| 466 | /* --------------------------------------------------------------------- |
| 467 | * Device I/O access |
| 468 | * --------------------------------------------------------------------- */ |
| 469 | |
| 470 | static u8 dme1737_read(struct i2c_client *client, u8 reg) |
| 471 | { |
| 472 | s32 val = i2c_smbus_read_byte_data(client, reg); |
| 473 | |
| 474 | if (val < 0) { |
| 475 | dev_warn(&client->dev, "Read from register 0x%02x failed! " |
| 476 | "Please report to the driver maintainer.\n", reg); |
| 477 | } |
| 478 | |
| 479 | return val; |
| 480 | } |
| 481 | |
| 482 | static s32 dme1737_write(struct i2c_client *client, u8 reg, u8 value) |
| 483 | { |
| 484 | s32 res = i2c_smbus_write_byte_data(client, reg, value); |
| 485 | |
| 486 | if (res < 0) { |
| 487 | dev_warn(&client->dev, "Write to register 0x%02x failed! " |
| 488 | "Please report to the driver maintainer.\n", reg); |
| 489 | } |
| 490 | |
| 491 | return res; |
| 492 | } |
| 493 | |
| 494 | static struct dme1737_data *dme1737_update_device(struct device *dev) |
| 495 | { |
| 496 | struct i2c_client *client = to_i2c_client(dev); |
| 497 | struct dme1737_data *data = i2c_get_clientdata(client); |
| 498 | int ix; |
| 499 | u8 lsb[5]; |
| 500 | |
| 501 | mutex_lock(&data->update_lock); |
| 502 | |
| 503 | /* Enable a Vbat monitoring cycle every 10 mins */ |
| 504 | if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) { |
| 505 | dme1737_write(client, DME1737_REG_CONFIG, dme1737_read(client, |
| 506 | DME1737_REG_CONFIG) | 0x10); |
| 507 | data->last_vbat = jiffies; |
| 508 | } |
| 509 | |
| 510 | /* Sample register contents every 1 sec */ |
| 511 | if (time_after(jiffies, data->last_update + HZ) || !data->valid) { |
| 512 | data->vid = dme1737_read(client, DME1737_REG_VID) & 0x3f; |
| 513 | |
| 514 | /* In (voltage) registers */ |
| 515 | for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { |
| 516 | /* Voltage inputs are stored as 16 bit values even |
| 517 | * though they have only 12 bits resolution. This is |
| 518 | * to make it consistent with the temp inputs. */ |
| 519 | data->in[ix] = dme1737_read(client, |
| 520 | DME1737_REG_IN(ix)) << 8; |
| 521 | data->in_min[ix] = dme1737_read(client, |
| 522 | DME1737_REG_IN_MIN(ix)); |
| 523 | data->in_max[ix] = dme1737_read(client, |
| 524 | DME1737_REG_IN_MAX(ix)); |
| 525 | } |
| 526 | |
| 527 | /* Temp registers */ |
| 528 | for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { |
| 529 | /* Temp inputs are stored as 16 bit values even |
| 530 | * though they have only 12 bits resolution. This is |
| 531 | * to take advantage of implicit conversions between |
| 532 | * register values (2's complement) and temp values |
| 533 | * (signed decimal). */ |
| 534 | data->temp[ix] = dme1737_read(client, |
| 535 | DME1737_REG_TEMP(ix)) << 8; |
| 536 | data->temp_min[ix] = dme1737_read(client, |
| 537 | DME1737_REG_TEMP_MIN(ix)); |
| 538 | data->temp_max[ix] = dme1737_read(client, |
| 539 | DME1737_REG_TEMP_MAX(ix)); |
| 540 | data->temp_offset[ix] = dme1737_read(client, |
| 541 | DME1737_REG_TEMP_OFFSET(ix)); |
| 542 | } |
| 543 | |
| 544 | /* In and temp LSB registers |
| 545 | * The LSBs are latched when the MSBs are read, so the order in |
| 546 | * which the registers are read (MSB first, then LSB) is |
| 547 | * important! */ |
| 548 | for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) { |
| 549 | lsb[ix] = dme1737_read(client, |
| 550 | DME1737_REG_IN_TEMP_LSB(ix)); |
| 551 | } |
| 552 | for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { |
| 553 | data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] << |
| 554 | DME1737_REG_IN_LSB_SHL[ix]) & 0xf0; |
| 555 | } |
| 556 | for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { |
| 557 | data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] << |
| 558 | DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0; |
| 559 | } |
| 560 | |
| 561 | /* Fan registers */ |
| 562 | for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) { |
| 563 | /* Skip reading registers if optional fans are not |
| 564 | * present */ |
| 565 | if (!(data->has_fan & (1 << ix))) { |
| 566 | continue; |
| 567 | } |
| 568 | data->fan[ix] = dme1737_read(client, |
| 569 | DME1737_REG_FAN(ix)); |
| 570 | data->fan[ix] |= dme1737_read(client, |
| 571 | DME1737_REG_FAN(ix) + 1) << 8; |
| 572 | data->fan_min[ix] = dme1737_read(client, |
| 573 | DME1737_REG_FAN_MIN(ix)); |
| 574 | data->fan_min[ix] |= dme1737_read(client, |
| 575 | DME1737_REG_FAN_MIN(ix) + 1) << 8; |
| 576 | data->fan_opt[ix] = dme1737_read(client, |
| 577 | DME1737_REG_FAN_OPT(ix)); |
| 578 | /* fan_max exists only for fan[5-6] */ |
| 579 | if (ix > 3) { |
| 580 | data->fan_max[ix - 4] = dme1737_read(client, |
| 581 | DME1737_REG_FAN_MAX(ix)); |
| 582 | } |
| 583 | } |
| 584 | |
| 585 | /* PWM registers */ |
| 586 | for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) { |
| 587 | /* Skip reading registers if optional PWMs are not |
| 588 | * present */ |
| 589 | if (!(data->has_pwm & (1 << ix))) { |
| 590 | continue; |
| 591 | } |
| 592 | data->pwm[ix] = dme1737_read(client, |
| 593 | DME1737_REG_PWM(ix)); |
| 594 | data->pwm_freq[ix] = dme1737_read(client, |
| 595 | DME1737_REG_PWM_FREQ(ix)); |
| 596 | /* pwm_config and pwm_min exist only for pwm[1-3] */ |
| 597 | if (ix < 3) { |
| 598 | data->pwm_config[ix] = dme1737_read(client, |
| 599 | DME1737_REG_PWM_CONFIG(ix)); |
| 600 | data->pwm_min[ix] = dme1737_read(client, |
| 601 | DME1737_REG_PWM_MIN(ix)); |
| 602 | } |
| 603 | } |
| 604 | for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) { |
| 605 | data->pwm_rr[ix] = dme1737_read(client, |
| 606 | DME1737_REG_PWM_RR(ix)); |
| 607 | } |
| 608 | |
| 609 | /* Thermal zone registers */ |
| 610 | for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) { |
| 611 | data->zone_low[ix] = dme1737_read(client, |
| 612 | DME1737_REG_ZONE_LOW(ix)); |
| 613 | data->zone_abs[ix] = dme1737_read(client, |
| 614 | DME1737_REG_ZONE_ABS(ix)); |
| 615 | } |
| 616 | for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) { |
| 617 | data->zone_hyst[ix] = dme1737_read(client, |
| 618 | DME1737_REG_ZONE_HYST(ix)); |
| 619 | } |
| 620 | |
| 621 | /* Alarm registers */ |
| 622 | data->alarms = dme1737_read(client, |
| 623 | DME1737_REG_ALARM1); |
| 624 | /* Bit 7 tells us if the other alarm registers are non-zero and |
| 625 | * therefore also need to be read */ |
| 626 | if (data->alarms & 0x80) { |
| 627 | data->alarms |= dme1737_read(client, |
| 628 | DME1737_REG_ALARM2) << 8; |
| 629 | data->alarms |= dme1737_read(client, |
| 630 | DME1737_REG_ALARM3) << 16; |
| 631 | } |
| 632 | |
| 633 | data->last_update = jiffies; |
| 634 | data->valid = 1; |
| 635 | } |
| 636 | |
| 637 | mutex_unlock(&data->update_lock); |
| 638 | |
| 639 | return data; |
| 640 | } |
| 641 | |
| 642 | /* --------------------------------------------------------------------- |
| 643 | * Voltage sysfs attributes |
| 644 | * ix = [0-5] |
| 645 | * --------------------------------------------------------------------- */ |
| 646 | |
| 647 | #define SYS_IN_INPUT 0 |
| 648 | #define SYS_IN_MIN 1 |
| 649 | #define SYS_IN_MAX 2 |
| 650 | #define SYS_IN_ALARM 3 |
| 651 | |
| 652 | static ssize_t show_in(struct device *dev, struct device_attribute *attr, |
| 653 | char *buf) |
| 654 | { |
| 655 | struct dme1737_data *data = dme1737_update_device(dev); |
| 656 | struct sensor_device_attribute_2 |
| 657 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 658 | int ix = sensor_attr_2->index; |
| 659 | int fn = sensor_attr_2->nr; |
| 660 | int res; |
| 661 | |
| 662 | switch (fn) { |
| 663 | case SYS_IN_INPUT: |
| 664 | res = IN_FROM_REG(data->in[ix], ix, 16); |
| 665 | break; |
| 666 | case SYS_IN_MIN: |
| 667 | res = IN_FROM_REG(data->in_min[ix], ix, 8); |
| 668 | break; |
| 669 | case SYS_IN_MAX: |
| 670 | res = IN_FROM_REG(data->in_max[ix], ix, 8); |
| 671 | break; |
| 672 | case SYS_IN_ALARM: |
| 673 | res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01; |
| 674 | break; |
| 675 | default: |
| 676 | res = 0; |
| 677 | dev_dbg(dev, "Unknown attr fetch (%d)\n", fn); |
| 678 | } |
| 679 | |
| 680 | return sprintf(buf, "%d\n", res); |
| 681 | } |
| 682 | |
| 683 | static ssize_t set_in(struct device *dev, struct device_attribute *attr, |
| 684 | const char *buf, size_t count) |
| 685 | { |
| 686 | struct i2c_client *client = to_i2c_client(dev); |
| 687 | struct dme1737_data *data = i2c_get_clientdata(client); |
| 688 | struct sensor_device_attribute_2 |
| 689 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 690 | int ix = sensor_attr_2->index; |
| 691 | int fn = sensor_attr_2->nr; |
| 692 | long val = simple_strtol(buf, NULL, 10); |
| 693 | |
| 694 | mutex_lock(&data->update_lock); |
| 695 | switch (fn) { |
| 696 | case SYS_IN_MIN: |
| 697 | data->in_min[ix] = IN_TO_REG(val, ix); |
| 698 | dme1737_write(client, DME1737_REG_IN_MIN(ix), |
| 699 | data->in_min[ix]); |
| 700 | break; |
| 701 | case SYS_IN_MAX: |
| 702 | data->in_max[ix] = IN_TO_REG(val, ix); |
| 703 | dme1737_write(client, DME1737_REG_IN_MAX(ix), |
| 704 | data->in_max[ix]); |
| 705 | break; |
| 706 | default: |
| 707 | dev_dbg(dev, "Unknown attr fetch (%d)\n", fn); |
| 708 | } |
| 709 | mutex_unlock(&data->update_lock); |
| 710 | |
| 711 | return count; |
| 712 | } |
| 713 | |
| 714 | /* --------------------------------------------------------------------- |
| 715 | * Temperature sysfs attributes |
| 716 | * ix = [0-2] |
| 717 | * --------------------------------------------------------------------- */ |
| 718 | |
| 719 | #define SYS_TEMP_INPUT 0 |
| 720 | #define SYS_TEMP_MIN 1 |
| 721 | #define SYS_TEMP_MAX 2 |
| 722 | #define SYS_TEMP_OFFSET 3 |
| 723 | #define SYS_TEMP_ALARM 4 |
| 724 | #define SYS_TEMP_FAULT 5 |
| 725 | |
| 726 | static ssize_t show_temp(struct device *dev, struct device_attribute *attr, |
| 727 | char *buf) |
| 728 | { |
| 729 | struct dme1737_data *data = dme1737_update_device(dev); |
| 730 | struct sensor_device_attribute_2 |
| 731 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 732 | int ix = sensor_attr_2->index; |
| 733 | int fn = sensor_attr_2->nr; |
| 734 | int res; |
| 735 | |
| 736 | switch (fn) { |
| 737 | case SYS_TEMP_INPUT: |
| 738 | res = TEMP_FROM_REG(data->temp[ix], 16); |
| 739 | break; |
| 740 | case SYS_TEMP_MIN: |
| 741 | res = TEMP_FROM_REG(data->temp_min[ix], 8); |
| 742 | break; |
| 743 | case SYS_TEMP_MAX: |
| 744 | res = TEMP_FROM_REG(data->temp_max[ix], 8); |
| 745 | break; |
| 746 | case SYS_TEMP_OFFSET: |
| 747 | res = TEMP_FROM_REG(data->temp_offset[ix], 8); |
| 748 | break; |
| 749 | case SYS_TEMP_ALARM: |
| 750 | res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01; |
| 751 | break; |
| 752 | case SYS_TEMP_FAULT: |
Juerg Haefliger | c0f3140 | 2007-07-20 14:16:47 -0700 | [diff] [blame] | 753 | res = (((u16)data->temp[ix] & 0xff00) == 0x8000); |
Juerg Haefliger | 9431996 | 2007-06-09 10:11:16 -0400 | [diff] [blame] | 754 | break; |
| 755 | default: |
| 756 | res = 0; |
| 757 | dev_dbg(dev, "Unknown attr fetch (%d)\n", fn); |
| 758 | } |
| 759 | |
| 760 | return sprintf(buf, "%d\n", res); |
| 761 | } |
| 762 | |
| 763 | static ssize_t set_temp(struct device *dev, struct device_attribute *attr, |
| 764 | const char *buf, size_t count) |
| 765 | { |
| 766 | struct i2c_client *client = to_i2c_client(dev); |
| 767 | struct dme1737_data *data = i2c_get_clientdata(client); |
| 768 | struct sensor_device_attribute_2 |
| 769 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 770 | int ix = sensor_attr_2->index; |
| 771 | int fn = sensor_attr_2->nr; |
| 772 | long val = simple_strtol(buf, NULL, 10); |
| 773 | |
| 774 | mutex_lock(&data->update_lock); |
| 775 | switch (fn) { |
| 776 | case SYS_TEMP_MIN: |
| 777 | data->temp_min[ix] = TEMP_TO_REG(val); |
| 778 | dme1737_write(client, DME1737_REG_TEMP_MIN(ix), |
| 779 | data->temp_min[ix]); |
| 780 | break; |
| 781 | case SYS_TEMP_MAX: |
| 782 | data->temp_max[ix] = TEMP_TO_REG(val); |
| 783 | dme1737_write(client, DME1737_REG_TEMP_MAX(ix), |
| 784 | data->temp_max[ix]); |
| 785 | break; |
| 786 | case SYS_TEMP_OFFSET: |
| 787 | data->temp_offset[ix] = TEMP_TO_REG(val); |
| 788 | dme1737_write(client, DME1737_REG_TEMP_OFFSET(ix), |
| 789 | data->temp_offset[ix]); |
| 790 | break; |
| 791 | default: |
| 792 | dev_dbg(dev, "Unknown attr fetch (%d)\n", fn); |
| 793 | } |
| 794 | mutex_unlock(&data->update_lock); |
| 795 | |
| 796 | return count; |
| 797 | } |
| 798 | |
| 799 | /* --------------------------------------------------------------------- |
| 800 | * Zone sysfs attributes |
| 801 | * ix = [0-2] |
| 802 | * --------------------------------------------------------------------- */ |
| 803 | |
| 804 | #define SYS_ZONE_AUTO_CHANNELS_TEMP 0 |
| 805 | #define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1 |
| 806 | #define SYS_ZONE_AUTO_POINT1_TEMP 2 |
| 807 | #define SYS_ZONE_AUTO_POINT2_TEMP 3 |
| 808 | #define SYS_ZONE_AUTO_POINT3_TEMP 4 |
| 809 | |
| 810 | static ssize_t show_zone(struct device *dev, struct device_attribute *attr, |
| 811 | char *buf) |
| 812 | { |
| 813 | struct dme1737_data *data = dme1737_update_device(dev); |
| 814 | struct sensor_device_attribute_2 |
| 815 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 816 | int ix = sensor_attr_2->index; |
| 817 | int fn = sensor_attr_2->nr; |
| 818 | int res; |
| 819 | |
| 820 | switch (fn) { |
| 821 | case SYS_ZONE_AUTO_CHANNELS_TEMP: |
| 822 | /* check config2 for non-standard temp-to-zone mapping */ |
| 823 | if ((ix == 1) && (data->config2 & 0x02)) { |
| 824 | res = 4; |
| 825 | } else { |
| 826 | res = 1 << ix; |
| 827 | } |
| 828 | break; |
| 829 | case SYS_ZONE_AUTO_POINT1_TEMP_HYST: |
| 830 | res = TEMP_FROM_REG(data->zone_low[ix], 8) - |
| 831 | TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix); |
| 832 | break; |
| 833 | case SYS_ZONE_AUTO_POINT1_TEMP: |
| 834 | res = TEMP_FROM_REG(data->zone_low[ix], 8); |
| 835 | break; |
| 836 | case SYS_ZONE_AUTO_POINT2_TEMP: |
| 837 | /* pwm_freq holds the temp range bits in the upper nibble */ |
| 838 | res = TEMP_FROM_REG(data->zone_low[ix], 8) + |
| 839 | TEMP_RANGE_FROM_REG(data->pwm_freq[ix]); |
| 840 | break; |
| 841 | case SYS_ZONE_AUTO_POINT3_TEMP: |
| 842 | res = TEMP_FROM_REG(data->zone_abs[ix], 8); |
| 843 | break; |
| 844 | default: |
| 845 | res = 0; |
| 846 | dev_dbg(dev, "Unknown attr fetch (%d)\n", fn); |
| 847 | } |
| 848 | |
| 849 | return sprintf(buf, "%d\n", res); |
| 850 | } |
| 851 | |
| 852 | static ssize_t set_zone(struct device *dev, struct device_attribute *attr, |
| 853 | const char *buf, size_t count) |
| 854 | { |
| 855 | struct i2c_client *client = to_i2c_client(dev); |
| 856 | struct dme1737_data *data = i2c_get_clientdata(client); |
| 857 | struct sensor_device_attribute_2 |
| 858 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 859 | int ix = sensor_attr_2->index; |
| 860 | int fn = sensor_attr_2->nr; |
| 861 | long val = simple_strtol(buf, NULL, 10); |
| 862 | |
| 863 | mutex_lock(&data->update_lock); |
| 864 | switch (fn) { |
| 865 | case SYS_ZONE_AUTO_POINT1_TEMP_HYST: |
| 866 | /* Refresh the cache */ |
| 867 | data->zone_low[ix] = dme1737_read(client, |
| 868 | DME1737_REG_ZONE_LOW(ix)); |
| 869 | /* Modify the temp hyst value */ |
| 870 | data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG( |
| 871 | TEMP_FROM_REG(data->zone_low[ix], 8) - |
| 872 | val, ix, dme1737_read(client, |
| 873 | DME1737_REG_ZONE_HYST(ix == 2))); |
| 874 | dme1737_write(client, DME1737_REG_ZONE_HYST(ix == 2), |
| 875 | data->zone_hyst[ix == 2]); |
| 876 | break; |
| 877 | case SYS_ZONE_AUTO_POINT1_TEMP: |
| 878 | data->zone_low[ix] = TEMP_TO_REG(val); |
| 879 | dme1737_write(client, DME1737_REG_ZONE_LOW(ix), |
| 880 | data->zone_low[ix]); |
| 881 | break; |
| 882 | case SYS_ZONE_AUTO_POINT2_TEMP: |
| 883 | /* Refresh the cache */ |
| 884 | data->zone_low[ix] = dme1737_read(client, |
| 885 | DME1737_REG_ZONE_LOW(ix)); |
| 886 | /* Modify the temp range value (which is stored in the upper |
| 887 | * nibble of the pwm_freq register) */ |
| 888 | data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val - |
| 889 | TEMP_FROM_REG(data->zone_low[ix], 8), |
| 890 | dme1737_read(client, |
| 891 | DME1737_REG_PWM_FREQ(ix))); |
| 892 | dme1737_write(client, DME1737_REG_PWM_FREQ(ix), |
| 893 | data->pwm_freq[ix]); |
| 894 | break; |
| 895 | case SYS_ZONE_AUTO_POINT3_TEMP: |
| 896 | data->zone_abs[ix] = TEMP_TO_REG(val); |
| 897 | dme1737_write(client, DME1737_REG_ZONE_ABS(ix), |
| 898 | data->zone_abs[ix]); |
| 899 | break; |
| 900 | default: |
| 901 | dev_dbg(dev, "Unknown attr fetch (%d)\n", fn); |
| 902 | } |
| 903 | mutex_unlock(&data->update_lock); |
| 904 | |
| 905 | return count; |
| 906 | } |
| 907 | |
| 908 | /* --------------------------------------------------------------------- |
| 909 | * Fan sysfs attributes |
| 910 | * ix = [0-5] |
| 911 | * --------------------------------------------------------------------- */ |
| 912 | |
| 913 | #define SYS_FAN_INPUT 0 |
| 914 | #define SYS_FAN_MIN 1 |
| 915 | #define SYS_FAN_MAX 2 |
| 916 | #define SYS_FAN_ALARM 3 |
| 917 | #define SYS_FAN_TYPE 4 |
| 918 | |
| 919 | static ssize_t show_fan(struct device *dev, struct device_attribute *attr, |
| 920 | char *buf) |
| 921 | { |
| 922 | struct dme1737_data *data = dme1737_update_device(dev); |
| 923 | struct sensor_device_attribute_2 |
| 924 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 925 | int ix = sensor_attr_2->index; |
| 926 | int fn = sensor_attr_2->nr; |
| 927 | int res; |
| 928 | |
| 929 | switch (fn) { |
| 930 | case SYS_FAN_INPUT: |
| 931 | res = FAN_FROM_REG(data->fan[ix], |
| 932 | ix < 4 ? 0 : |
| 933 | FAN_TPC_FROM_REG(data->fan_opt[ix])); |
| 934 | break; |
| 935 | case SYS_FAN_MIN: |
| 936 | res = FAN_FROM_REG(data->fan_min[ix], |
| 937 | ix < 4 ? 0 : |
| 938 | FAN_TPC_FROM_REG(data->fan_opt[ix])); |
| 939 | break; |
| 940 | case SYS_FAN_MAX: |
| 941 | /* only valid for fan[5-6] */ |
| 942 | res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]); |
| 943 | break; |
| 944 | case SYS_FAN_ALARM: |
| 945 | res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01; |
| 946 | break; |
| 947 | case SYS_FAN_TYPE: |
| 948 | /* only valid for fan[1-4] */ |
| 949 | res = FAN_TYPE_FROM_REG(data->fan_opt[ix]); |
| 950 | break; |
| 951 | default: |
| 952 | res = 0; |
| 953 | dev_dbg(dev, "Unknown attr fetch (%d)\n", fn); |
| 954 | } |
| 955 | |
| 956 | return sprintf(buf, "%d\n", res); |
| 957 | } |
| 958 | |
| 959 | static ssize_t set_fan(struct device *dev, struct device_attribute *attr, |
| 960 | const char *buf, size_t count) |
| 961 | { |
| 962 | struct i2c_client *client = to_i2c_client(dev); |
| 963 | struct dme1737_data *data = i2c_get_clientdata(client); |
| 964 | struct sensor_device_attribute_2 |
| 965 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 966 | int ix = sensor_attr_2->index; |
| 967 | int fn = sensor_attr_2->nr; |
| 968 | long val = simple_strtol(buf, NULL, 10); |
| 969 | |
| 970 | mutex_lock(&data->update_lock); |
| 971 | switch (fn) { |
| 972 | case SYS_FAN_MIN: |
| 973 | if (ix < 4) { |
| 974 | data->fan_min[ix] = FAN_TO_REG(val, 0); |
| 975 | } else { |
| 976 | /* Refresh the cache */ |
| 977 | data->fan_opt[ix] = dme1737_read(client, |
| 978 | DME1737_REG_FAN_OPT(ix)); |
| 979 | /* Modify the fan min value */ |
| 980 | data->fan_min[ix] = FAN_TO_REG(val, |
| 981 | FAN_TPC_FROM_REG(data->fan_opt[ix])); |
| 982 | } |
| 983 | dme1737_write(client, DME1737_REG_FAN_MIN(ix), |
| 984 | data->fan_min[ix] & 0xff); |
| 985 | dme1737_write(client, DME1737_REG_FAN_MIN(ix) + 1, |
| 986 | data->fan_min[ix] >> 8); |
| 987 | break; |
| 988 | case SYS_FAN_MAX: |
| 989 | /* Only valid for fan[5-6] */ |
| 990 | data->fan_max[ix - 4] = FAN_MAX_TO_REG(val); |
| 991 | dme1737_write(client, DME1737_REG_FAN_MAX(ix), |
| 992 | data->fan_max[ix - 4]); |
| 993 | break; |
| 994 | case SYS_FAN_TYPE: |
| 995 | /* Only valid for fan[1-4] */ |
| 996 | if (!(val == 1 || val == 2 || val == 4)) { |
| 997 | count = -EINVAL; |
| 998 | dev_warn(&client->dev, "Fan type value %ld not " |
| 999 | "supported. Choose one of 1, 2, or 4.\n", |
| 1000 | val); |
| 1001 | goto exit; |
| 1002 | } |
| 1003 | data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(client, |
| 1004 | DME1737_REG_FAN_OPT(ix))); |
| 1005 | dme1737_write(client, DME1737_REG_FAN_OPT(ix), |
| 1006 | data->fan_opt[ix]); |
| 1007 | break; |
| 1008 | default: |
| 1009 | dev_dbg(dev, "Unknown attr fetch (%d)\n", fn); |
| 1010 | } |
| 1011 | exit: |
| 1012 | mutex_unlock(&data->update_lock); |
| 1013 | |
| 1014 | return count; |
| 1015 | } |
| 1016 | |
| 1017 | /* --------------------------------------------------------------------- |
| 1018 | * PWM sysfs attributes |
| 1019 | * ix = [0-4] |
| 1020 | * --------------------------------------------------------------------- */ |
| 1021 | |
| 1022 | #define SYS_PWM 0 |
| 1023 | #define SYS_PWM_FREQ 1 |
| 1024 | #define SYS_PWM_ENABLE 2 |
| 1025 | #define SYS_PWM_RAMP_RATE 3 |
| 1026 | #define SYS_PWM_AUTO_CHANNELS_ZONE 4 |
| 1027 | #define SYS_PWM_AUTO_PWM_MIN 5 |
| 1028 | #define SYS_PWM_AUTO_POINT1_PWM 6 |
| 1029 | #define SYS_PWM_AUTO_POINT2_PWM 7 |
| 1030 | |
| 1031 | static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, |
| 1032 | char *buf) |
| 1033 | { |
| 1034 | struct dme1737_data *data = dme1737_update_device(dev); |
| 1035 | struct sensor_device_attribute_2 |
| 1036 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 1037 | int ix = sensor_attr_2->index; |
| 1038 | int fn = sensor_attr_2->nr; |
| 1039 | int res; |
| 1040 | |
| 1041 | switch (fn) { |
| 1042 | case SYS_PWM: |
| 1043 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) { |
| 1044 | res = 255; |
| 1045 | } else { |
| 1046 | res = data->pwm[ix]; |
| 1047 | } |
| 1048 | break; |
| 1049 | case SYS_PWM_FREQ: |
| 1050 | res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]); |
| 1051 | break; |
| 1052 | case SYS_PWM_ENABLE: |
| 1053 | if (ix > 3) { |
| 1054 | res = 1; /* pwm[5-6] hard-wired to manual mode */ |
| 1055 | } else { |
| 1056 | res = PWM_EN_FROM_REG(data->pwm_config[ix]); |
| 1057 | } |
| 1058 | break; |
| 1059 | case SYS_PWM_RAMP_RATE: |
| 1060 | /* Only valid for pwm[1-3] */ |
| 1061 | res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix); |
| 1062 | break; |
| 1063 | case SYS_PWM_AUTO_CHANNELS_ZONE: |
| 1064 | /* Only valid for pwm[1-3] */ |
| 1065 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { |
| 1066 | res = PWM_ACZ_FROM_REG(data->pwm_config[ix]); |
| 1067 | } else { |
| 1068 | res = data->pwm_acz[ix]; |
| 1069 | } |
| 1070 | break; |
| 1071 | case SYS_PWM_AUTO_PWM_MIN: |
| 1072 | /* Only valid for pwm[1-3] */ |
| 1073 | if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) { |
| 1074 | res = data->pwm_min[ix]; |
| 1075 | } else { |
| 1076 | res = 0; |
| 1077 | } |
| 1078 | break; |
| 1079 | case SYS_PWM_AUTO_POINT1_PWM: |
| 1080 | /* Only valid for pwm[1-3] */ |
| 1081 | res = data->pwm_min[ix]; |
| 1082 | break; |
| 1083 | case SYS_PWM_AUTO_POINT2_PWM: |
| 1084 | /* Only valid for pwm[1-3] */ |
| 1085 | res = 255; /* hard-wired */ |
| 1086 | break; |
| 1087 | default: |
| 1088 | res = 0; |
| 1089 | dev_dbg(dev, "Unknown attr fetch (%d)\n", fn); |
| 1090 | } |
| 1091 | |
| 1092 | return sprintf(buf, "%d\n", res); |
| 1093 | } |
| 1094 | |
| 1095 | static struct attribute *dme1737_attr_pwm[]; |
| 1096 | static void dme1737_chmod_file(struct i2c_client*, struct attribute*, mode_t); |
| 1097 | |
| 1098 | static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, |
| 1099 | const char *buf, size_t count) |
| 1100 | { |
| 1101 | struct i2c_client *client = to_i2c_client(dev); |
| 1102 | struct dme1737_data *data = i2c_get_clientdata(client); |
| 1103 | struct sensor_device_attribute_2 |
| 1104 | *sensor_attr_2 = to_sensor_dev_attr_2(attr); |
| 1105 | int ix = sensor_attr_2->index; |
| 1106 | int fn = sensor_attr_2->nr; |
| 1107 | long val = simple_strtol(buf, NULL, 10); |
| 1108 | |
| 1109 | mutex_lock(&data->update_lock); |
| 1110 | switch (fn) { |
| 1111 | case SYS_PWM: |
| 1112 | data->pwm[ix] = SENSORS_LIMIT(val, 0, 255); |
| 1113 | dme1737_write(client, DME1737_REG_PWM(ix), data->pwm[ix]); |
| 1114 | break; |
| 1115 | case SYS_PWM_FREQ: |
| 1116 | data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(client, |
| 1117 | DME1737_REG_PWM_FREQ(ix))); |
| 1118 | dme1737_write(client, DME1737_REG_PWM_FREQ(ix), |
| 1119 | data->pwm_freq[ix]); |
| 1120 | break; |
| 1121 | case SYS_PWM_ENABLE: |
| 1122 | /* Only valid for pwm[1-3] */ |
| 1123 | if (val < 0 || val > 2) { |
| 1124 | count = -EINVAL; |
| 1125 | dev_warn(&client->dev, "PWM enable %ld not " |
| 1126 | "supported. Choose one of 0, 1, or 2.\n", |
| 1127 | val); |
| 1128 | goto exit; |
| 1129 | } |
| 1130 | /* Refresh the cache */ |
| 1131 | data->pwm_config[ix] = dme1737_read(client, |
| 1132 | DME1737_REG_PWM_CONFIG(ix)); |
| 1133 | if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) { |
| 1134 | /* Bail out if no change */ |
| 1135 | goto exit; |
| 1136 | } |
| 1137 | /* Do some housekeeping if we are currently in auto mode */ |
| 1138 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { |
| 1139 | /* Save the current zone channel assignment */ |
| 1140 | data->pwm_acz[ix] = PWM_ACZ_FROM_REG( |
| 1141 | data->pwm_config[ix]); |
| 1142 | /* Save the current ramp rate state and disable it */ |
| 1143 | data->pwm_rr[ix > 0] = dme1737_read(client, |
| 1144 | DME1737_REG_PWM_RR(ix > 0)); |
| 1145 | data->pwm_rr_en &= ~(1 << ix); |
| 1146 | if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) { |
| 1147 | data->pwm_rr_en |= (1 << ix); |
| 1148 | data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix, |
| 1149 | data->pwm_rr[ix > 0]); |
| 1150 | dme1737_write(client, |
| 1151 | DME1737_REG_PWM_RR(ix > 0), |
| 1152 | data->pwm_rr[ix > 0]); |
| 1153 | } |
| 1154 | } |
| 1155 | /* Set the new PWM mode */ |
| 1156 | switch (val) { |
| 1157 | case 0: |
| 1158 | /* Change permissions of pwm[ix] to read-only */ |
| 1159 | dme1737_chmod_file(client, dme1737_attr_pwm[ix], |
| 1160 | S_IRUGO); |
| 1161 | /* Turn fan fully on */ |
| 1162 | data->pwm_config[ix] = PWM_EN_TO_REG(0, |
| 1163 | data->pwm_config[ix]); |
| 1164 | dme1737_write(client, DME1737_REG_PWM_CONFIG(ix), |
| 1165 | data->pwm_config[ix]); |
| 1166 | break; |
| 1167 | case 1: |
| 1168 | /* Turn on manual mode */ |
| 1169 | data->pwm_config[ix] = PWM_EN_TO_REG(1, |
| 1170 | data->pwm_config[ix]); |
| 1171 | dme1737_write(client, DME1737_REG_PWM_CONFIG(ix), |
| 1172 | data->pwm_config[ix]); |
| 1173 | /* Change permissions of pwm[ix] to read-writeable */ |
| 1174 | dme1737_chmod_file(client, dme1737_attr_pwm[ix], |
| 1175 | S_IRUGO | S_IWUSR); |
| 1176 | break; |
| 1177 | case 2: |
| 1178 | /* Change permissions of pwm[ix] to read-only */ |
| 1179 | dme1737_chmod_file(client, dme1737_attr_pwm[ix], |
| 1180 | S_IRUGO); |
| 1181 | /* Turn on auto mode using the saved zone channel |
| 1182 | * assignment */ |
| 1183 | data->pwm_config[ix] = PWM_ACZ_TO_REG( |
| 1184 | data->pwm_acz[ix], |
| 1185 | data->pwm_config[ix]); |
| 1186 | dme1737_write(client, DME1737_REG_PWM_CONFIG(ix), |
| 1187 | data->pwm_config[ix]); |
| 1188 | /* Enable PWM ramp rate if previously enabled */ |
| 1189 | if (data->pwm_rr_en & (1 << ix)) { |
| 1190 | data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix, |
| 1191 | dme1737_read(client, |
| 1192 | DME1737_REG_PWM_RR(ix > 0))); |
| 1193 | dme1737_write(client, |
| 1194 | DME1737_REG_PWM_RR(ix > 0), |
| 1195 | data->pwm_rr[ix > 0]); |
| 1196 | } |
| 1197 | break; |
| 1198 | } |
| 1199 | break; |
| 1200 | case SYS_PWM_RAMP_RATE: |
| 1201 | /* Only valid for pwm[1-3] */ |
| 1202 | /* Refresh the cache */ |
| 1203 | data->pwm_config[ix] = dme1737_read(client, |
| 1204 | DME1737_REG_PWM_CONFIG(ix)); |
| 1205 | data->pwm_rr[ix > 0] = dme1737_read(client, |
| 1206 | DME1737_REG_PWM_RR(ix > 0)); |
| 1207 | /* Set the ramp rate value */ |
| 1208 | if (val > 0) { |
| 1209 | data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix, |
| 1210 | data->pwm_rr[ix > 0]); |
| 1211 | } |
| 1212 | /* Enable/disable the feature only if the associated PWM |
| 1213 | * output is in automatic mode. */ |
| 1214 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { |
| 1215 | data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix, |
| 1216 | data->pwm_rr[ix > 0]); |
| 1217 | } |
| 1218 | dme1737_write(client, DME1737_REG_PWM_RR(ix > 0), |
| 1219 | data->pwm_rr[ix > 0]); |
| 1220 | break; |
| 1221 | case SYS_PWM_AUTO_CHANNELS_ZONE: |
| 1222 | /* Only valid for pwm[1-3] */ |
| 1223 | if (!(val == 1 || val == 2 || val == 4 || |
| 1224 | val == 6 || val == 7)) { |
| 1225 | count = -EINVAL; |
| 1226 | dev_warn(&client->dev, "PWM auto channels zone %ld " |
| 1227 | "not supported. Choose one of 1, 2, 4, 6, " |
| 1228 | "or 7.\n", val); |
| 1229 | goto exit; |
| 1230 | } |
| 1231 | /* Refresh the cache */ |
| 1232 | data->pwm_config[ix] = dme1737_read(client, |
| 1233 | DME1737_REG_PWM_CONFIG(ix)); |
| 1234 | if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { |
| 1235 | /* PWM is already in auto mode so update the temp |
| 1236 | * channel assignment */ |
| 1237 | data->pwm_config[ix] = PWM_ACZ_TO_REG(val, |
| 1238 | data->pwm_config[ix]); |
| 1239 | dme1737_write(client, DME1737_REG_PWM_CONFIG(ix), |
| 1240 | data->pwm_config[ix]); |
| 1241 | } else { |
| 1242 | /* PWM is not in auto mode so we save the temp |
| 1243 | * channel assignment for later use */ |
| 1244 | data->pwm_acz[ix] = val; |
| 1245 | } |
| 1246 | break; |
| 1247 | case SYS_PWM_AUTO_PWM_MIN: |
| 1248 | /* Only valid for pwm[1-3] */ |
| 1249 | /* Refresh the cache */ |
| 1250 | data->pwm_min[ix] = dme1737_read(client, |
| 1251 | DME1737_REG_PWM_MIN(ix)); |
| 1252 | /* There are only 2 values supported for the auto_pwm_min |
| 1253 | * value: 0 or auto_point1_pwm. So if the temperature drops |
| 1254 | * below the auto_point1_temp_hyst value, the fan either turns |
| 1255 | * off or runs at auto_point1_pwm duty-cycle. */ |
| 1256 | if (val > ((data->pwm_min[ix] + 1) / 2)) { |
| 1257 | data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix, |
| 1258 | dme1737_read(client, |
| 1259 | DME1737_REG_PWM_RR(0))); |
| 1260 | |
| 1261 | } else { |
| 1262 | data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix, |
| 1263 | dme1737_read(client, |
| 1264 | DME1737_REG_PWM_RR(0))); |
| 1265 | |
| 1266 | } |
| 1267 | dme1737_write(client, DME1737_REG_PWM_RR(0), |
| 1268 | data->pwm_rr[0]); |
| 1269 | break; |
| 1270 | case SYS_PWM_AUTO_POINT1_PWM: |
| 1271 | /* Only valid for pwm[1-3] */ |
| 1272 | data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255); |
| 1273 | dme1737_write(client, DME1737_REG_PWM_MIN(ix), |
| 1274 | data->pwm_min[ix]); |
| 1275 | break; |
| 1276 | default: |
| 1277 | dev_dbg(dev, "Unknown attr fetch (%d)\n", fn); |
| 1278 | } |
| 1279 | exit: |
| 1280 | mutex_unlock(&data->update_lock); |
| 1281 | |
| 1282 | return count; |
| 1283 | } |
| 1284 | |
| 1285 | /* --------------------------------------------------------------------- |
| 1286 | * Miscellaneous sysfs attributes |
| 1287 | * --------------------------------------------------------------------- */ |
| 1288 | |
| 1289 | static ssize_t show_vrm(struct device *dev, struct device_attribute *attr, |
| 1290 | char *buf) |
| 1291 | { |
| 1292 | struct i2c_client *client = to_i2c_client(dev); |
| 1293 | struct dme1737_data *data = i2c_get_clientdata(client); |
| 1294 | |
| 1295 | return sprintf(buf, "%d\n", data->vrm); |
| 1296 | } |
| 1297 | |
| 1298 | static ssize_t set_vrm(struct device *dev, struct device_attribute *attr, |
| 1299 | const char *buf, size_t count) |
| 1300 | { |
| 1301 | struct i2c_client *client = to_i2c_client(dev); |
| 1302 | struct dme1737_data *data = i2c_get_clientdata(client); |
| 1303 | long val = simple_strtol(buf, NULL, 10); |
| 1304 | |
| 1305 | data->vrm = val; |
| 1306 | return count; |
| 1307 | } |
| 1308 | |
| 1309 | static ssize_t show_vid(struct device *dev, struct device_attribute *attr, |
| 1310 | char *buf) |
| 1311 | { |
| 1312 | struct dme1737_data *data = dme1737_update_device(dev); |
| 1313 | |
| 1314 | return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm)); |
| 1315 | } |
| 1316 | |
| 1317 | /* --------------------------------------------------------------------- |
| 1318 | * Sysfs device attribute defines and structs |
| 1319 | * --------------------------------------------------------------------- */ |
| 1320 | |
| 1321 | /* Voltages 0-6 */ |
| 1322 | |
| 1323 | #define SENSOR_DEVICE_ATTR_IN(ix) \ |
| 1324 | static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \ |
| 1325 | show_in, NULL, SYS_IN_INPUT, ix); \ |
| 1326 | static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \ |
| 1327 | show_in, set_in, SYS_IN_MIN, ix); \ |
| 1328 | static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \ |
| 1329 | show_in, set_in, SYS_IN_MAX, ix); \ |
| 1330 | static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \ |
| 1331 | show_in, NULL, SYS_IN_ALARM, ix) |
| 1332 | |
| 1333 | SENSOR_DEVICE_ATTR_IN(0); |
| 1334 | SENSOR_DEVICE_ATTR_IN(1); |
| 1335 | SENSOR_DEVICE_ATTR_IN(2); |
| 1336 | SENSOR_DEVICE_ATTR_IN(3); |
| 1337 | SENSOR_DEVICE_ATTR_IN(4); |
| 1338 | SENSOR_DEVICE_ATTR_IN(5); |
| 1339 | SENSOR_DEVICE_ATTR_IN(6); |
| 1340 | |
| 1341 | /* Temperatures 1-3 */ |
| 1342 | |
| 1343 | #define SENSOR_DEVICE_ATTR_TEMP(ix) \ |
| 1344 | static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \ |
| 1345 | show_temp, NULL, SYS_TEMP_INPUT, ix-1); \ |
| 1346 | static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \ |
| 1347 | show_temp, set_temp, SYS_TEMP_MIN, ix-1); \ |
| 1348 | static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \ |
| 1349 | show_temp, set_temp, SYS_TEMP_MAX, ix-1); \ |
| 1350 | static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \ |
| 1351 | show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \ |
| 1352 | static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \ |
| 1353 | show_temp, NULL, SYS_TEMP_ALARM, ix-1); \ |
| 1354 | static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \ |
| 1355 | show_temp, NULL, SYS_TEMP_FAULT, ix-1) |
| 1356 | |
| 1357 | SENSOR_DEVICE_ATTR_TEMP(1); |
| 1358 | SENSOR_DEVICE_ATTR_TEMP(2); |
| 1359 | SENSOR_DEVICE_ATTR_TEMP(3); |
| 1360 | |
| 1361 | /* Zones 1-3 */ |
| 1362 | |
| 1363 | #define SENSOR_DEVICE_ATTR_ZONE(ix) \ |
| 1364 | static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \ |
| 1365 | show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \ |
| 1366 | static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \ |
| 1367 | show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \ |
| 1368 | static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \ |
| 1369 | show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \ |
| 1370 | static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \ |
| 1371 | show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \ |
| 1372 | static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \ |
| 1373 | show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1) |
| 1374 | |
| 1375 | SENSOR_DEVICE_ATTR_ZONE(1); |
| 1376 | SENSOR_DEVICE_ATTR_ZONE(2); |
| 1377 | SENSOR_DEVICE_ATTR_ZONE(3); |
| 1378 | |
| 1379 | /* Fans 1-4 */ |
| 1380 | |
| 1381 | #define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \ |
| 1382 | static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \ |
| 1383 | show_fan, NULL, SYS_FAN_INPUT, ix-1); \ |
| 1384 | static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \ |
| 1385 | show_fan, set_fan, SYS_FAN_MIN, ix-1); \ |
| 1386 | static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \ |
| 1387 | show_fan, NULL, SYS_FAN_ALARM, ix-1); \ |
| 1388 | static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \ |
| 1389 | show_fan, set_fan, SYS_FAN_TYPE, ix-1) |
| 1390 | |
| 1391 | SENSOR_DEVICE_ATTR_FAN_1TO4(1); |
| 1392 | SENSOR_DEVICE_ATTR_FAN_1TO4(2); |
| 1393 | SENSOR_DEVICE_ATTR_FAN_1TO4(3); |
| 1394 | SENSOR_DEVICE_ATTR_FAN_1TO4(4); |
| 1395 | |
| 1396 | /* Fans 5-6 */ |
| 1397 | |
| 1398 | #define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \ |
| 1399 | static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \ |
| 1400 | show_fan, NULL, SYS_FAN_INPUT, ix-1); \ |
| 1401 | static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \ |
| 1402 | show_fan, set_fan, SYS_FAN_MIN, ix-1); \ |
| 1403 | static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \ |
| 1404 | show_fan, NULL, SYS_FAN_ALARM, ix-1); \ |
| 1405 | static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \ |
| 1406 | show_fan, set_fan, SYS_FAN_MAX, ix-1) |
| 1407 | |
| 1408 | SENSOR_DEVICE_ATTR_FAN_5TO6(5); |
| 1409 | SENSOR_DEVICE_ATTR_FAN_5TO6(6); |
| 1410 | |
| 1411 | /* PWMs 1-3 */ |
| 1412 | |
| 1413 | #define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \ |
| 1414 | static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \ |
| 1415 | show_pwm, set_pwm, SYS_PWM, ix-1); \ |
| 1416 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \ |
| 1417 | show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \ |
| 1418 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \ |
| 1419 | show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \ |
| 1420 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \ |
| 1421 | show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \ |
| 1422 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \ |
| 1423 | show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \ |
| 1424 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \ |
| 1425 | show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \ |
| 1426 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \ |
| 1427 | show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \ |
| 1428 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \ |
| 1429 | show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1) |
| 1430 | |
| 1431 | SENSOR_DEVICE_ATTR_PWM_1TO3(1); |
| 1432 | SENSOR_DEVICE_ATTR_PWM_1TO3(2); |
| 1433 | SENSOR_DEVICE_ATTR_PWM_1TO3(3); |
| 1434 | |
| 1435 | /* PWMs 5-6 */ |
| 1436 | |
| 1437 | #define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \ |
| 1438 | static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO | S_IWUSR, \ |
| 1439 | show_pwm, set_pwm, SYS_PWM, ix-1); \ |
| 1440 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO | S_IWUSR, \ |
| 1441 | show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \ |
| 1442 | static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \ |
| 1443 | show_pwm, NULL, SYS_PWM_ENABLE, ix-1) |
| 1444 | |
| 1445 | SENSOR_DEVICE_ATTR_PWM_5TO6(5); |
| 1446 | SENSOR_DEVICE_ATTR_PWM_5TO6(6); |
| 1447 | |
| 1448 | /* Misc */ |
| 1449 | |
| 1450 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm); |
| 1451 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL); |
| 1452 | |
| 1453 | #define SENSOR_DEV_ATTR_IN(ix) \ |
| 1454 | &sensor_dev_attr_in##ix##_input.dev_attr.attr, \ |
| 1455 | &sensor_dev_attr_in##ix##_min.dev_attr.attr, \ |
| 1456 | &sensor_dev_attr_in##ix##_max.dev_attr.attr, \ |
| 1457 | &sensor_dev_attr_in##ix##_alarm.dev_attr.attr |
| 1458 | |
| 1459 | /* These attributes are read-writeable only if the chip is *not* locked */ |
| 1460 | #define SENSOR_DEV_ATTR_TEMP_LOCK(ix) \ |
| 1461 | &sensor_dev_attr_temp##ix##_offset.dev_attr.attr |
| 1462 | |
| 1463 | #define SENSOR_DEV_ATTR_TEMP(ix) \ |
| 1464 | SENSOR_DEV_ATTR_TEMP_LOCK(ix), \ |
| 1465 | &sensor_dev_attr_temp##ix##_input.dev_attr.attr, \ |
| 1466 | &sensor_dev_attr_temp##ix##_min.dev_attr.attr, \ |
| 1467 | &sensor_dev_attr_temp##ix##_max.dev_attr.attr, \ |
| 1468 | &sensor_dev_attr_temp##ix##_alarm.dev_attr.attr, \ |
| 1469 | &sensor_dev_attr_temp##ix##_fault.dev_attr.attr |
| 1470 | |
| 1471 | /* These attributes are read-writeable only if the chip is *not* locked */ |
| 1472 | #define SENSOR_DEV_ATTR_ZONE_LOCK(ix) \ |
| 1473 | &sensor_dev_attr_zone##ix##_auto_point1_temp_hyst.dev_attr.attr, \ |
| 1474 | &sensor_dev_attr_zone##ix##_auto_point1_temp.dev_attr.attr, \ |
| 1475 | &sensor_dev_attr_zone##ix##_auto_point2_temp.dev_attr.attr, \ |
| 1476 | &sensor_dev_attr_zone##ix##_auto_point3_temp.dev_attr.attr |
| 1477 | |
| 1478 | #define SENSOR_DEV_ATTR_ZONE(ix) \ |
| 1479 | SENSOR_DEV_ATTR_ZONE_LOCK(ix), \ |
| 1480 | &sensor_dev_attr_zone##ix##_auto_channels_temp.dev_attr.attr |
| 1481 | |
| 1482 | #define SENSOR_DEV_ATTR_FAN_1TO4(ix) \ |
| 1483 | &sensor_dev_attr_fan##ix##_input.dev_attr.attr, \ |
| 1484 | &sensor_dev_attr_fan##ix##_min.dev_attr.attr, \ |
| 1485 | &sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \ |
| 1486 | &sensor_dev_attr_fan##ix##_type.dev_attr.attr |
| 1487 | |
| 1488 | #define SENSOR_DEV_ATTR_FAN_5TO6(ix) \ |
| 1489 | &sensor_dev_attr_fan##ix##_input.dev_attr.attr, \ |
| 1490 | &sensor_dev_attr_fan##ix##_min.dev_attr.attr, \ |
| 1491 | &sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \ |
| 1492 | &sensor_dev_attr_fan##ix##_max.dev_attr.attr |
| 1493 | |
| 1494 | /* These attributes are read-writeable only if the chip is *not* locked */ |
| 1495 | #define SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix) \ |
| 1496 | &sensor_dev_attr_pwm##ix##_freq.dev_attr.attr, \ |
| 1497 | &sensor_dev_attr_pwm##ix##_enable.dev_attr.attr, \ |
| 1498 | &sensor_dev_attr_pwm##ix##_ramp_rate.dev_attr.attr, \ |
| 1499 | &sensor_dev_attr_pwm##ix##_auto_channels_zone.dev_attr.attr, \ |
| 1500 | &sensor_dev_attr_pwm##ix##_auto_pwm_min.dev_attr.attr, \ |
| 1501 | &sensor_dev_attr_pwm##ix##_auto_point1_pwm.dev_attr.attr |
| 1502 | |
| 1503 | #define SENSOR_DEV_ATTR_PWM_1TO3(ix) \ |
| 1504 | SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix), \ |
| 1505 | &sensor_dev_attr_pwm##ix.dev_attr.attr, \ |
| 1506 | &sensor_dev_attr_pwm##ix##_auto_point2_pwm.dev_attr.attr |
| 1507 | |
| 1508 | /* These attributes are read-writeable only if the chip is *not* locked */ |
| 1509 | #define SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix) \ |
| 1510 | &sensor_dev_attr_pwm##ix.dev_attr.attr, \ |
| 1511 | &sensor_dev_attr_pwm##ix##_freq.dev_attr.attr |
| 1512 | |
| 1513 | #define SENSOR_DEV_ATTR_PWM_5TO6(ix) \ |
| 1514 | SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix), \ |
| 1515 | &sensor_dev_attr_pwm##ix##_enable.dev_attr.attr |
| 1516 | |
| 1517 | /* This struct holds all the attributes that are always present and need to be |
| 1518 | * created unconditionally. The attributes that need modification of their |
| 1519 | * permissions are created read-only and write permissions are added or removed |
| 1520 | * on the fly when required */ |
| 1521 | static struct attribute *dme1737_attr[] ={ |
| 1522 | /* Voltages */ |
| 1523 | SENSOR_DEV_ATTR_IN(0), |
| 1524 | SENSOR_DEV_ATTR_IN(1), |
| 1525 | SENSOR_DEV_ATTR_IN(2), |
| 1526 | SENSOR_DEV_ATTR_IN(3), |
| 1527 | SENSOR_DEV_ATTR_IN(4), |
| 1528 | SENSOR_DEV_ATTR_IN(5), |
| 1529 | SENSOR_DEV_ATTR_IN(6), |
| 1530 | /* Temperatures */ |
| 1531 | SENSOR_DEV_ATTR_TEMP(1), |
| 1532 | SENSOR_DEV_ATTR_TEMP(2), |
| 1533 | SENSOR_DEV_ATTR_TEMP(3), |
| 1534 | /* Zones */ |
| 1535 | SENSOR_DEV_ATTR_ZONE(1), |
| 1536 | SENSOR_DEV_ATTR_ZONE(2), |
| 1537 | SENSOR_DEV_ATTR_ZONE(3), |
| 1538 | /* Misc */ |
| 1539 | &dev_attr_vrm.attr, |
| 1540 | &dev_attr_cpu0_vid.attr, |
| 1541 | NULL |
| 1542 | }; |
| 1543 | |
| 1544 | static const struct attribute_group dme1737_group = { |
| 1545 | .attrs = dme1737_attr, |
| 1546 | }; |
| 1547 | |
| 1548 | /* The following structs hold the PWM attributes, some of which are optional. |
| 1549 | * Their creation depends on the chip configuration which is determined during |
| 1550 | * module load. */ |
| 1551 | static struct attribute *dme1737_attr_pwm1[] = { |
| 1552 | SENSOR_DEV_ATTR_PWM_1TO3(1), |
| 1553 | NULL |
| 1554 | }; |
| 1555 | static struct attribute *dme1737_attr_pwm2[] = { |
| 1556 | SENSOR_DEV_ATTR_PWM_1TO3(2), |
| 1557 | NULL |
| 1558 | }; |
| 1559 | static struct attribute *dme1737_attr_pwm3[] = { |
| 1560 | SENSOR_DEV_ATTR_PWM_1TO3(3), |
| 1561 | NULL |
| 1562 | }; |
| 1563 | static struct attribute *dme1737_attr_pwm5[] = { |
| 1564 | SENSOR_DEV_ATTR_PWM_5TO6(5), |
| 1565 | NULL |
| 1566 | }; |
| 1567 | static struct attribute *dme1737_attr_pwm6[] = { |
| 1568 | SENSOR_DEV_ATTR_PWM_5TO6(6), |
| 1569 | NULL |
| 1570 | }; |
| 1571 | |
| 1572 | static const struct attribute_group dme1737_pwm_group[] = { |
| 1573 | { .attrs = dme1737_attr_pwm1 }, |
| 1574 | { .attrs = dme1737_attr_pwm2 }, |
| 1575 | { .attrs = dme1737_attr_pwm3 }, |
| 1576 | { .attrs = NULL }, |
| 1577 | { .attrs = dme1737_attr_pwm5 }, |
| 1578 | { .attrs = dme1737_attr_pwm6 }, |
| 1579 | }; |
| 1580 | |
| 1581 | /* The following structs hold the fan attributes, some of which are optional. |
| 1582 | * Their creation depends on the chip configuration which is determined during |
| 1583 | * module load. */ |
| 1584 | static struct attribute *dme1737_attr_fan1[] = { |
| 1585 | SENSOR_DEV_ATTR_FAN_1TO4(1), |
| 1586 | NULL |
| 1587 | }; |
| 1588 | static struct attribute *dme1737_attr_fan2[] = { |
| 1589 | SENSOR_DEV_ATTR_FAN_1TO4(2), |
| 1590 | NULL |
| 1591 | }; |
| 1592 | static struct attribute *dme1737_attr_fan3[] = { |
| 1593 | SENSOR_DEV_ATTR_FAN_1TO4(3), |
| 1594 | NULL |
| 1595 | }; |
| 1596 | static struct attribute *dme1737_attr_fan4[] = { |
| 1597 | SENSOR_DEV_ATTR_FAN_1TO4(4), |
| 1598 | NULL |
| 1599 | }; |
| 1600 | static struct attribute *dme1737_attr_fan5[] = { |
| 1601 | SENSOR_DEV_ATTR_FAN_5TO6(5), |
| 1602 | NULL |
| 1603 | }; |
| 1604 | static struct attribute *dme1737_attr_fan6[] = { |
| 1605 | SENSOR_DEV_ATTR_FAN_5TO6(6), |
| 1606 | NULL |
| 1607 | }; |
| 1608 | |
| 1609 | static const struct attribute_group dme1737_fan_group[] = { |
| 1610 | { .attrs = dme1737_attr_fan1 }, |
| 1611 | { .attrs = dme1737_attr_fan2 }, |
| 1612 | { .attrs = dme1737_attr_fan3 }, |
| 1613 | { .attrs = dme1737_attr_fan4 }, |
| 1614 | { .attrs = dme1737_attr_fan5 }, |
| 1615 | { .attrs = dme1737_attr_fan6 }, |
| 1616 | }; |
| 1617 | |
| 1618 | /* The permissions of all of the following attributes are changed to read- |
| 1619 | * writeable if the chip is *not* locked. Otherwise they stay read-only. */ |
| 1620 | static struct attribute *dme1737_attr_lock[] = { |
| 1621 | /* Temperatures */ |
| 1622 | SENSOR_DEV_ATTR_TEMP_LOCK(1), |
| 1623 | SENSOR_DEV_ATTR_TEMP_LOCK(2), |
| 1624 | SENSOR_DEV_ATTR_TEMP_LOCK(3), |
| 1625 | /* Zones */ |
| 1626 | SENSOR_DEV_ATTR_ZONE_LOCK(1), |
| 1627 | SENSOR_DEV_ATTR_ZONE_LOCK(2), |
| 1628 | SENSOR_DEV_ATTR_ZONE_LOCK(3), |
| 1629 | NULL |
| 1630 | }; |
| 1631 | |
| 1632 | static const struct attribute_group dme1737_lock_group = { |
| 1633 | .attrs = dme1737_attr_lock, |
| 1634 | }; |
| 1635 | |
| 1636 | /* The permissions of the following PWM attributes are changed to read- |
| 1637 | * writeable if the chip is *not* locked and the respective PWM is available. |
| 1638 | * Otherwise they stay read-only. */ |
| 1639 | static struct attribute *dme1737_attr_pwm1_lock[] = { |
| 1640 | SENSOR_DEV_ATTR_PWM_1TO3_LOCK(1), |
| 1641 | NULL |
| 1642 | }; |
| 1643 | static struct attribute *dme1737_attr_pwm2_lock[] = { |
| 1644 | SENSOR_DEV_ATTR_PWM_1TO3_LOCK(2), |
| 1645 | NULL |
| 1646 | }; |
| 1647 | static struct attribute *dme1737_attr_pwm3_lock[] = { |
| 1648 | SENSOR_DEV_ATTR_PWM_1TO3_LOCK(3), |
| 1649 | NULL |
| 1650 | }; |
| 1651 | static struct attribute *dme1737_attr_pwm5_lock[] = { |
| 1652 | SENSOR_DEV_ATTR_PWM_5TO6_LOCK(5), |
| 1653 | NULL |
| 1654 | }; |
| 1655 | static struct attribute *dme1737_attr_pwm6_lock[] = { |
| 1656 | SENSOR_DEV_ATTR_PWM_5TO6_LOCK(6), |
| 1657 | NULL |
| 1658 | }; |
| 1659 | |
| 1660 | static const struct attribute_group dme1737_pwm_lock_group[] = { |
| 1661 | { .attrs = dme1737_attr_pwm1_lock }, |
| 1662 | { .attrs = dme1737_attr_pwm2_lock }, |
| 1663 | { .attrs = dme1737_attr_pwm3_lock }, |
| 1664 | { .attrs = NULL }, |
| 1665 | { .attrs = dme1737_attr_pwm5_lock }, |
| 1666 | { .attrs = dme1737_attr_pwm6_lock }, |
| 1667 | }; |
| 1668 | |
| 1669 | /* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the |
| 1670 | * chip is not locked. Otherwise they are read-only. */ |
| 1671 | static struct attribute *dme1737_attr_pwm[] = { |
| 1672 | &sensor_dev_attr_pwm1.dev_attr.attr, |
| 1673 | &sensor_dev_attr_pwm2.dev_attr.attr, |
| 1674 | &sensor_dev_attr_pwm3.dev_attr.attr, |
| 1675 | }; |
| 1676 | |
| 1677 | /* --------------------------------------------------------------------- |
| 1678 | * Super-IO functions |
| 1679 | * --------------------------------------------------------------------- */ |
| 1680 | |
| 1681 | static inline int dme1737_sio_inb(int sio_cip, int reg) |
| 1682 | { |
| 1683 | outb(reg, sio_cip); |
| 1684 | return inb(sio_cip + 1); |
| 1685 | } |
| 1686 | |
| 1687 | static inline void dme1737_sio_outb(int sio_cip, int reg, int val) |
| 1688 | { |
| 1689 | outb(reg, sio_cip); |
| 1690 | outb(val, sio_cip + 1); |
| 1691 | } |
| 1692 | |
| 1693 | static int dme1737_sio_get_features(int sio_cip, struct i2c_client *client) |
| 1694 | { |
| 1695 | struct dme1737_data *data = i2c_get_clientdata(client); |
| 1696 | int err = 0, reg; |
| 1697 | u16 addr; |
| 1698 | |
| 1699 | /* Enter configuration mode */ |
| 1700 | outb(0x55, sio_cip); |
| 1701 | |
| 1702 | /* Check device ID |
| 1703 | * The DME1737 can return either 0x78 or 0x77 as its device ID. */ |
| 1704 | reg = dme1737_sio_inb(sio_cip, 0x20); |
| 1705 | if (!(reg == 0x77 || reg == 0x78)) { |
| 1706 | err = -ENODEV; |
| 1707 | goto exit; |
| 1708 | } |
| 1709 | |
| 1710 | /* Select logical device A (runtime registers) */ |
| 1711 | dme1737_sio_outb(sio_cip, 0x07, 0x0a); |
| 1712 | |
| 1713 | /* Get the base address of the runtime registers */ |
| 1714 | if (!(addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) | |
| 1715 | dme1737_sio_inb(sio_cip, 0x61))) { |
| 1716 | err = -ENODEV; |
| 1717 | goto exit; |
| 1718 | } |
| 1719 | |
| 1720 | /* Read the runtime registers to determine which optional features |
| 1721 | * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set |
| 1722 | * to '10' if the respective feature is enabled. */ |
| 1723 | if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */ |
| 1724 | data->has_fan |= (1 << 5); |
| 1725 | } |
| 1726 | if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */ |
| 1727 | data->has_pwm |= (1 << 5); |
| 1728 | } |
| 1729 | if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */ |
| 1730 | data->has_fan |= (1 << 4); |
| 1731 | } |
| 1732 | if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */ |
| 1733 | data->has_pwm |= (1 << 4); |
| 1734 | } |
| 1735 | |
| 1736 | exit: |
| 1737 | /* Exit configuration mode */ |
| 1738 | outb(0xaa, sio_cip); |
| 1739 | |
| 1740 | return err; |
| 1741 | } |
| 1742 | |
| 1743 | /* --------------------------------------------------------------------- |
| 1744 | * Device detection, registration and initialization |
| 1745 | * --------------------------------------------------------------------- */ |
| 1746 | |
| 1747 | static struct i2c_driver dme1737_driver; |
| 1748 | |
| 1749 | static void dme1737_chmod_file(struct i2c_client *client, |
| 1750 | struct attribute *attr, mode_t mode) |
| 1751 | { |
| 1752 | if (sysfs_chmod_file(&client->dev.kobj, attr, mode)) { |
| 1753 | dev_warn(&client->dev, "Failed to change permissions of %s.\n", |
| 1754 | attr->name); |
| 1755 | } |
| 1756 | } |
| 1757 | |
| 1758 | static void dme1737_chmod_group(struct i2c_client *client, |
| 1759 | const struct attribute_group *group, |
| 1760 | mode_t mode) |
| 1761 | { |
| 1762 | struct attribute **attr; |
| 1763 | |
| 1764 | for (attr = group->attrs; *attr; attr++) { |
| 1765 | dme1737_chmod_file(client, *attr, mode); |
| 1766 | } |
| 1767 | } |
| 1768 | |
| 1769 | static int dme1737_init_client(struct i2c_client *client) |
| 1770 | { |
| 1771 | struct dme1737_data *data = i2c_get_clientdata(client); |
| 1772 | int ix; |
| 1773 | u8 reg; |
| 1774 | |
| 1775 | data->config = dme1737_read(client, DME1737_REG_CONFIG); |
| 1776 | /* Inform if part is not monitoring/started */ |
| 1777 | if (!(data->config & 0x01)) { |
| 1778 | if (!force_start) { |
| 1779 | dev_err(&client->dev, "Device is not monitoring. " |
| 1780 | "Use the force_start load parameter to " |
| 1781 | "override.\n"); |
| 1782 | return -EFAULT; |
| 1783 | } |
| 1784 | |
| 1785 | /* Force monitoring */ |
| 1786 | data->config |= 0x01; |
| 1787 | dme1737_write(client, DME1737_REG_CONFIG, data->config); |
| 1788 | } |
| 1789 | /* Inform if part is not ready */ |
| 1790 | if (!(data->config & 0x04)) { |
| 1791 | dev_err(&client->dev, "Device is not ready.\n"); |
| 1792 | return -EFAULT; |
| 1793 | } |
| 1794 | |
| 1795 | data->config2 = dme1737_read(client, DME1737_REG_CONFIG2); |
| 1796 | /* Check if optional fan3 input is enabled */ |
| 1797 | if (data->config2 & 0x04) { |
| 1798 | data->has_fan |= (1 << 2); |
| 1799 | } |
| 1800 | |
| 1801 | /* Fan4 and pwm3 are only available if the client's I2C address |
| 1802 | * is the default 0x2e. Otherwise the I/Os associated with these |
| 1803 | * functions are used for addr enable/select. */ |
| 1804 | if (client->addr == 0x2e) { |
| 1805 | data->has_fan |= (1 << 3); |
| 1806 | data->has_pwm |= (1 << 2); |
| 1807 | } |
| 1808 | |
| 1809 | /* Determine if the optional fan[5-6] and/or pwm[5-6] are enabled. |
| 1810 | * For this, we need to query the runtime registers through the |
| 1811 | * Super-IO LPC interface. Try both config ports 0x2e and 0x4e. */ |
| 1812 | if (dme1737_sio_get_features(0x2e, client) && |
| 1813 | dme1737_sio_get_features(0x4e, client)) { |
| 1814 | dev_warn(&client->dev, "Failed to query Super-IO for optional " |
| 1815 | "features.\n"); |
| 1816 | } |
| 1817 | |
| 1818 | /* Fan1, fan2, pwm1, and pwm2 are always present */ |
| 1819 | data->has_fan |= 0x03; |
| 1820 | data->has_pwm |= 0x03; |
| 1821 | |
| 1822 | dev_info(&client->dev, "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, " |
| 1823 | "fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n", |
| 1824 | (data->has_pwm & (1 << 2)) ? "yes" : "no", |
| 1825 | (data->has_pwm & (1 << 4)) ? "yes" : "no", |
| 1826 | (data->has_pwm & (1 << 5)) ? "yes" : "no", |
| 1827 | (data->has_fan & (1 << 2)) ? "yes" : "no", |
| 1828 | (data->has_fan & (1 << 3)) ? "yes" : "no", |
| 1829 | (data->has_fan & (1 << 4)) ? "yes" : "no", |
| 1830 | (data->has_fan & (1 << 5)) ? "yes" : "no"); |
| 1831 | |
| 1832 | reg = dme1737_read(client, DME1737_REG_TACH_PWM); |
| 1833 | /* Inform if fan-to-pwm mapping differs from the default */ |
| 1834 | if (reg != 0xa4) { |
| 1835 | dev_warn(&client->dev, "Non-standard fan to pwm mapping: " |
| 1836 | "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, " |
| 1837 | "fan4->pwm%d. Please report to the driver " |
| 1838 | "maintainer.\n", |
| 1839 | (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, |
| 1840 | ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1); |
| 1841 | } |
| 1842 | |
| 1843 | /* Switch pwm[1-3] to manual mode if they are currently disabled and |
| 1844 | * set the duty-cycles to 0% (which is identical to the PWMs being |
| 1845 | * disabled). */ |
| 1846 | if (!(data->config & 0x02)) { |
| 1847 | for (ix = 0; ix < 3; ix++) { |
| 1848 | data->pwm_config[ix] = dme1737_read(client, |
| 1849 | DME1737_REG_PWM_CONFIG(ix)); |
| 1850 | if ((data->has_pwm & (1 << ix)) && |
| 1851 | (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) { |
| 1852 | dev_info(&client->dev, "Switching pwm%d to " |
| 1853 | "manual mode.\n", ix + 1); |
| 1854 | data->pwm_config[ix] = PWM_EN_TO_REG(1, |
| 1855 | data->pwm_config[ix]); |
| 1856 | dme1737_write(client, DME1737_REG_PWM(ix), 0); |
| 1857 | dme1737_write(client, |
| 1858 | DME1737_REG_PWM_CONFIG(ix), |
| 1859 | data->pwm_config[ix]); |
| 1860 | } |
| 1861 | } |
| 1862 | } |
| 1863 | |
| 1864 | /* Initialize the default PWM auto channels zone (acz) assignments */ |
| 1865 | data->pwm_acz[0] = 1; /* pwm1 -> zone1 */ |
| 1866 | data->pwm_acz[1] = 2; /* pwm2 -> zone2 */ |
| 1867 | data->pwm_acz[2] = 4; /* pwm3 -> zone3 */ |
| 1868 | |
| 1869 | /* Set VRM */ |
| 1870 | data->vrm = vid_which_vrm(); |
| 1871 | |
| 1872 | return 0; |
| 1873 | } |
| 1874 | |
| 1875 | static int dme1737_detect(struct i2c_adapter *adapter, int address, |
| 1876 | int kind) |
| 1877 | { |
| 1878 | u8 company, verstep = 0; |
| 1879 | struct i2c_client *client; |
| 1880 | struct dme1737_data *data; |
| 1881 | int ix, err = 0; |
| 1882 | const char *name; |
| 1883 | |
| 1884 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { |
| 1885 | goto exit; |
| 1886 | } |
| 1887 | |
| 1888 | if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) { |
| 1889 | err = -ENOMEM; |
| 1890 | goto exit; |
| 1891 | } |
| 1892 | |
| 1893 | client = &data->client; |
| 1894 | i2c_set_clientdata(client, data); |
| 1895 | client->addr = address; |
| 1896 | client->adapter = adapter; |
| 1897 | client->driver = &dme1737_driver; |
| 1898 | |
| 1899 | /* A negative kind means that the driver was loaded with no force |
| 1900 | * parameter (default), so we must identify the chip. */ |
| 1901 | if (kind < 0) { |
| 1902 | company = dme1737_read(client, DME1737_REG_COMPANY); |
| 1903 | verstep = dme1737_read(client, DME1737_REG_VERSTEP); |
| 1904 | |
| 1905 | if (!((company == DME1737_COMPANY_SMSC) && |
| 1906 | ((verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP))) { |
| 1907 | err = -ENODEV; |
| 1908 | goto exit_kfree; |
| 1909 | } |
| 1910 | } |
| 1911 | |
| 1912 | kind = dme1737; |
| 1913 | name = "dme1737"; |
| 1914 | |
| 1915 | /* Fill in the remaining client fields and put it into the global |
| 1916 | * list */ |
| 1917 | strlcpy(client->name, name, I2C_NAME_SIZE); |
| 1918 | mutex_init(&data->update_lock); |
| 1919 | |
| 1920 | /* Tell the I2C layer a new client has arrived */ |
| 1921 | if ((err = i2c_attach_client(client))) { |
| 1922 | goto exit_kfree; |
| 1923 | } |
| 1924 | |
| 1925 | /* Initialize the DME1737 chip */ |
| 1926 | if ((err = dme1737_init_client(client))) { |
| 1927 | goto exit_detach; |
| 1928 | } |
| 1929 | |
| 1930 | /* Create standard sysfs attributes */ |
| 1931 | if ((err = sysfs_create_group(&client->dev.kobj, &dme1737_group))) { |
| 1932 | goto exit_detach; |
| 1933 | } |
| 1934 | |
| 1935 | /* Create fan sysfs attributes */ |
| 1936 | for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { |
| 1937 | if (data->has_fan & (1 << ix)) { |
| 1938 | if ((err = sysfs_create_group(&client->dev.kobj, |
| 1939 | &dme1737_fan_group[ix]))) { |
| 1940 | goto exit_remove; |
| 1941 | } |
| 1942 | } |
| 1943 | } |
| 1944 | |
| 1945 | /* Create PWM sysfs attributes */ |
| 1946 | for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { |
| 1947 | if (data->has_pwm & (1 << ix)) { |
| 1948 | if ((err = sysfs_create_group(&client->dev.kobj, |
| 1949 | &dme1737_pwm_group[ix]))) { |
| 1950 | goto exit_remove; |
| 1951 | } |
| 1952 | } |
| 1953 | } |
| 1954 | |
| 1955 | /* Inform if the device is locked. Otherwise change the permissions of |
| 1956 | * selected attributes from read-only to read-writeable. */ |
| 1957 | if (data->config & 0x02) { |
| 1958 | dev_info(&client->dev, "Device is locked. Some attributes " |
| 1959 | "will be read-only.\n"); |
| 1960 | } else { |
| 1961 | /* Change permissions of standard attributes */ |
| 1962 | dme1737_chmod_group(client, &dme1737_lock_group, |
| 1963 | S_IRUGO | S_IWUSR); |
| 1964 | |
| 1965 | /* Change permissions of PWM attributes */ |
| 1966 | for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_lock_group); ix++) { |
| 1967 | if (data->has_pwm & (1 << ix)) { |
| 1968 | dme1737_chmod_group(client, |
| 1969 | &dme1737_pwm_lock_group[ix], |
| 1970 | S_IRUGO | S_IWUSR); |
| 1971 | } |
| 1972 | } |
| 1973 | |
| 1974 | /* Change permissions of pwm[1-3] if in manual mode */ |
| 1975 | for (ix = 0; ix < 3; ix++) { |
| 1976 | if ((data->has_pwm & (1 << ix)) && |
| 1977 | (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) { |
| 1978 | dme1737_chmod_file(client, |
| 1979 | dme1737_attr_pwm[ix], |
| 1980 | S_IRUGO | S_IWUSR); |
| 1981 | } |
| 1982 | } |
| 1983 | } |
| 1984 | |
| 1985 | /* Register device */ |
Tony Jones | 1beeffe | 2007-08-20 13:46:20 -0700 | [diff] [blame] | 1986 | data->hwmon_dev = hwmon_device_register(&client->dev); |
| 1987 | if (IS_ERR(data->hwmon_dev)) { |
| 1988 | err = PTR_ERR(data->hwmon_dev); |
Juerg Haefliger | 9431996 | 2007-06-09 10:11:16 -0400 | [diff] [blame] | 1989 | goto exit_remove; |
| 1990 | } |
| 1991 | |
| 1992 | dev_info(&adapter->dev, "Found a DME1737 chip at 0x%02x " |
| 1993 | "(rev 0x%02x)\n", client->addr, verstep); |
| 1994 | |
| 1995 | return 0; |
| 1996 | |
| 1997 | exit_remove: |
| 1998 | for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { |
| 1999 | if (data->has_fan & (1 << ix)) { |
| 2000 | sysfs_remove_group(&client->dev.kobj, |
| 2001 | &dme1737_fan_group[ix]); |
| 2002 | } |
| 2003 | } |
| 2004 | for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { |
| 2005 | if (data->has_pwm & (1 << ix)) { |
| 2006 | sysfs_remove_group(&client->dev.kobj, |
| 2007 | &dme1737_pwm_group[ix]); |
| 2008 | } |
| 2009 | } |
| 2010 | sysfs_remove_group(&client->dev.kobj, &dme1737_group); |
| 2011 | exit_detach: |
| 2012 | i2c_detach_client(client); |
| 2013 | exit_kfree: |
| 2014 | kfree(data); |
| 2015 | exit: |
| 2016 | return err; |
| 2017 | } |
| 2018 | |
| 2019 | static int dme1737_attach_adapter(struct i2c_adapter *adapter) |
| 2020 | { |
| 2021 | if (!(adapter->class & I2C_CLASS_HWMON)) { |
| 2022 | return 0; |
| 2023 | } |
| 2024 | |
| 2025 | return i2c_probe(adapter, &addr_data, dme1737_detect); |
| 2026 | } |
| 2027 | |
| 2028 | static int dme1737_detach_client(struct i2c_client *client) |
| 2029 | { |
| 2030 | struct dme1737_data *data = i2c_get_clientdata(client); |
| 2031 | int ix, err; |
| 2032 | |
Tony Jones | 1beeffe | 2007-08-20 13:46:20 -0700 | [diff] [blame] | 2033 | hwmon_device_unregister(data->hwmon_dev); |
Juerg Haefliger | 9431996 | 2007-06-09 10:11:16 -0400 | [diff] [blame] | 2034 | |
| 2035 | for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { |
| 2036 | if (data->has_fan & (1 << ix)) { |
| 2037 | sysfs_remove_group(&client->dev.kobj, |
| 2038 | &dme1737_fan_group[ix]); |
| 2039 | } |
| 2040 | } |
| 2041 | for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { |
| 2042 | if (data->has_pwm & (1 << ix)) { |
| 2043 | sysfs_remove_group(&client->dev.kobj, |
| 2044 | &dme1737_pwm_group[ix]); |
| 2045 | } |
| 2046 | } |
| 2047 | sysfs_remove_group(&client->dev.kobj, &dme1737_group); |
| 2048 | |
| 2049 | if ((err = i2c_detach_client(client))) { |
| 2050 | return err; |
| 2051 | } |
| 2052 | |
| 2053 | kfree(data); |
| 2054 | return 0; |
| 2055 | } |
| 2056 | |
| 2057 | static struct i2c_driver dme1737_driver = { |
| 2058 | .driver = { |
| 2059 | .name = "dme1737", |
| 2060 | }, |
| 2061 | .attach_adapter = dme1737_attach_adapter, |
| 2062 | .detach_client = dme1737_detach_client, |
| 2063 | }; |
| 2064 | |
| 2065 | static int __init dme1737_init(void) |
| 2066 | { |
| 2067 | return i2c_add_driver(&dme1737_driver); |
| 2068 | } |
| 2069 | |
| 2070 | static void __exit dme1737_exit(void) |
| 2071 | { |
| 2072 | i2c_del_driver(&dme1737_driver); |
| 2073 | } |
| 2074 | |
| 2075 | MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>"); |
| 2076 | MODULE_DESCRIPTION("DME1737 sensors"); |
| 2077 | MODULE_LICENSE("GPL"); |
| 2078 | |
| 2079 | module_init(dme1737_init); |
| 2080 | module_exit(dme1737_exit); |