Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 1 | /* Freescale Enhanced Local Bus Controller NAND driver |
| 2 | * |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 3 | * Copyright © 2006-2007, 2010 Freescale Semiconductor |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 4 | * |
| 5 | * Authors: Nick Spence <nick.spence@freescale.com>, |
| 6 | * Scott Wood <scottwood@freescale.com> |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 7 | * Jack Lan <jack.lan@freescale.com> |
| 8 | * Roy Zang <tie-fei.zang@freescale.com> |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License, or |
| 13 | * (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/types.h> |
| 27 | #include <linux/init.h> |
| 28 | #include <linux/kernel.h> |
| 29 | #include <linux/string.h> |
| 30 | #include <linux/ioport.h> |
| 31 | #include <linux/of_platform.h> |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 32 | #include <linux/platform_device.h> |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 33 | #include <linux/slab.h> |
| 34 | #include <linux/interrupt.h> |
| 35 | |
| 36 | #include <linux/mtd/mtd.h> |
| 37 | #include <linux/mtd/nand.h> |
| 38 | #include <linux/mtd/nand_ecc.h> |
| 39 | #include <linux/mtd/partitions.h> |
| 40 | |
| 41 | #include <asm/io.h> |
Anton Vorontsov | d4a32fe | 2008-03-11 20:23:28 +0300 | [diff] [blame] | 42 | #include <asm/fsl_lbc.h> |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 43 | |
| 44 | #define MAX_BANKS 8 |
| 45 | #define ERR_BYTE 0xFF /* Value returned for read bytes when read failed */ |
| 46 | #define FCM_TIMEOUT_MSECS 500 /* Maximum number of mSecs to wait for FCM */ |
| 47 | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 48 | /* mtd information per set */ |
| 49 | |
| 50 | struct fsl_elbc_mtd { |
| 51 | struct mtd_info mtd; |
| 52 | struct nand_chip chip; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 53 | struct fsl_lbc_ctrl *ctrl; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 54 | |
| 55 | struct device *dev; |
| 56 | int bank; /* Chip select bank number */ |
| 57 | u8 __iomem *vbase; /* Chip select base virtual address */ |
| 58 | int page_size; /* NAND page size (0=512, 1=2048) */ |
| 59 | unsigned int fmr; /* FCM Flash Mode Register value */ |
| 60 | }; |
| 61 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 62 | /* Freescale eLBC FCM controller information */ |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 63 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 64 | struct fsl_elbc_fcm_ctrl { |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 65 | struct nand_hw_control controller; |
| 66 | struct fsl_elbc_mtd *chips[MAX_BANKS]; |
| 67 | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 68 | u8 __iomem *addr; /* Address of assigned FCM buffer */ |
| 69 | unsigned int page; /* Last page written to / read from */ |
| 70 | unsigned int read_bytes; /* Number of bytes read during command */ |
| 71 | unsigned int column; /* Saved column from SEQIN */ |
| 72 | unsigned int index; /* Pointer to next byte to 'read' */ |
| 73 | unsigned int status; /* status read from LTESR after last op */ |
| 74 | unsigned int mdr; /* UPM/FCM Data Register value */ |
| 75 | unsigned int use_mdr; /* Non zero if the MDR is to be set */ |
| 76 | unsigned int oob; /* Non zero if operating on OOB data */ |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 77 | unsigned int counter; /* counter for the initializations */ |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 78 | char *oob_poi; /* Place to write ECC after read back */ |
| 79 | }; |
| 80 | |
| 81 | /* These map to the positions used by the FCM hardware ECC generator */ |
| 82 | |
| 83 | /* Small Page FLASH with FMR[ECCM] = 0 */ |
| 84 | static struct nand_ecclayout fsl_elbc_oob_sp_eccm0 = { |
| 85 | .eccbytes = 3, |
| 86 | .eccpos = {6, 7, 8}, |
| 87 | .oobfree = { {0, 5}, {9, 7} }, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 88 | }; |
| 89 | |
| 90 | /* Small Page FLASH with FMR[ECCM] = 1 */ |
| 91 | static struct nand_ecclayout fsl_elbc_oob_sp_eccm1 = { |
| 92 | .eccbytes = 3, |
| 93 | .eccpos = {8, 9, 10}, |
| 94 | .oobfree = { {0, 5}, {6, 2}, {11, 5} }, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 95 | }; |
| 96 | |
| 97 | /* Large Page FLASH with FMR[ECCM] = 0 */ |
| 98 | static struct nand_ecclayout fsl_elbc_oob_lp_eccm0 = { |
| 99 | .eccbytes = 12, |
| 100 | .eccpos = {6, 7, 8, 22, 23, 24, 38, 39, 40, 54, 55, 56}, |
| 101 | .oobfree = { {1, 5}, {9, 13}, {25, 13}, {41, 13}, {57, 7} }, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 102 | }; |
| 103 | |
| 104 | /* Large Page FLASH with FMR[ECCM] = 1 */ |
| 105 | static struct nand_ecclayout fsl_elbc_oob_lp_eccm1 = { |
| 106 | .eccbytes = 12, |
| 107 | .eccpos = {8, 9, 10, 24, 25, 26, 40, 41, 42, 56, 57, 58}, |
| 108 | .oobfree = { {1, 7}, {11, 13}, {27, 13}, {43, 13}, {59, 5} }, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 109 | }; |
| 110 | |
Anton Vorontsov | 452db27 | 2008-06-27 23:04:04 +0400 | [diff] [blame] | 111 | /* |
| 112 | * fsl_elbc_oob_lp_eccm* specify that LP NAND's OOB free area starts at offset |
| 113 | * 1, so we have to adjust bad block pattern. This pattern should be used for |
| 114 | * x8 chips only. So far hardware does not support x16 chips anyway. |
| 115 | */ |
| 116 | static u8 scan_ff_pattern[] = { 0xff, }; |
| 117 | |
| 118 | static struct nand_bbt_descr largepage_memorybased = { |
| 119 | .options = 0, |
| 120 | .offs = 0, |
| 121 | .len = 1, |
| 122 | .pattern = scan_ff_pattern, |
| 123 | }; |
| 124 | |
Anton Vorontsov | ec6e0ea | 2008-06-27 23:04:13 +0400 | [diff] [blame] | 125 | /* |
| 126 | * ELBC may use HW ECC, so that OOB offsets, that NAND core uses for bbt, |
| 127 | * interfere with ECC positions, that's why we implement our own descriptors. |
| 128 | * OOB {11, 5}, works for both SP and LP chips, with ECCM = 1 and ECCM = 0. |
| 129 | */ |
| 130 | static u8 bbt_pattern[] = {'B', 'b', 't', '0' }; |
| 131 | static u8 mirror_pattern[] = {'1', 't', 'b', 'B' }; |
| 132 | |
| 133 | static struct nand_bbt_descr bbt_main_descr = { |
| 134 | .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE | |
| 135 | NAND_BBT_2BIT | NAND_BBT_VERSION, |
| 136 | .offs = 11, |
| 137 | .len = 4, |
| 138 | .veroffs = 15, |
| 139 | .maxblocks = 4, |
| 140 | .pattern = bbt_pattern, |
| 141 | }; |
| 142 | |
| 143 | static struct nand_bbt_descr bbt_mirror_descr = { |
| 144 | .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE | |
| 145 | NAND_BBT_2BIT | NAND_BBT_VERSION, |
| 146 | .offs = 11, |
| 147 | .len = 4, |
| 148 | .veroffs = 15, |
| 149 | .maxblocks = 4, |
| 150 | .pattern = mirror_pattern, |
| 151 | }; |
| 152 | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 153 | /*=================================*/ |
| 154 | |
| 155 | /* |
| 156 | * Set up the FCM hardware block and page address fields, and the fcm |
| 157 | * structure addr field to point to the correct FCM buffer in memory |
| 158 | */ |
| 159 | static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob) |
| 160 | { |
| 161 | struct nand_chip *chip = mtd->priv; |
| 162 | struct fsl_elbc_mtd *priv = chip->priv; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 163 | struct fsl_lbc_ctrl *ctrl = priv->ctrl; |
Anton Vorontsov | d4a32fe | 2008-03-11 20:23:28 +0300 | [diff] [blame] | 164 | struct fsl_lbc_regs __iomem *lbc = ctrl->regs; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 165 | struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = ctrl->nand; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 166 | int buf_num; |
| 167 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 168 | elbc_fcm_ctrl->page = page_addr; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 169 | |
| 170 | out_be32(&lbc->fbar, |
| 171 | page_addr >> (chip->phys_erase_shift - chip->page_shift)); |
| 172 | |
| 173 | if (priv->page_size) { |
| 174 | out_be32(&lbc->fpar, |
| 175 | ((page_addr << FPAR_LP_PI_SHIFT) & FPAR_LP_PI) | |
| 176 | (oob ? FPAR_LP_MS : 0) | column); |
| 177 | buf_num = (page_addr & 1) << 2; |
| 178 | } else { |
| 179 | out_be32(&lbc->fpar, |
| 180 | ((page_addr << FPAR_SP_PI_SHIFT) & FPAR_SP_PI) | |
| 181 | (oob ? FPAR_SP_MS : 0) | column); |
| 182 | buf_num = page_addr & 7; |
| 183 | } |
| 184 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 185 | elbc_fcm_ctrl->addr = priv->vbase + buf_num * 1024; |
| 186 | elbc_fcm_ctrl->index = column; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 187 | |
| 188 | /* for OOB data point to the second half of the buffer */ |
| 189 | if (oob) |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 190 | elbc_fcm_ctrl->index += priv->page_size ? 2048 : 512; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 191 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 192 | dev_vdbg(priv->dev, "set_addr: bank=%d, " |
| 193 | "elbc_fcm_ctrl->addr=0x%p (0x%p), " |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 194 | "index %x, pes %d ps %d\n", |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 195 | buf_num, elbc_fcm_ctrl->addr, priv->vbase, |
| 196 | elbc_fcm_ctrl->index, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 197 | chip->phys_erase_shift, chip->page_shift); |
| 198 | } |
| 199 | |
| 200 | /* |
| 201 | * execute FCM command and wait for it to complete |
| 202 | */ |
| 203 | static int fsl_elbc_run_command(struct mtd_info *mtd) |
| 204 | { |
| 205 | struct nand_chip *chip = mtd->priv; |
| 206 | struct fsl_elbc_mtd *priv = chip->priv; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 207 | struct fsl_lbc_ctrl *ctrl = priv->ctrl; |
| 208 | struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = ctrl->nand; |
Anton Vorontsov | d4a32fe | 2008-03-11 20:23:28 +0300 | [diff] [blame] | 209 | struct fsl_lbc_regs __iomem *lbc = ctrl->regs; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 210 | |
| 211 | /* Setup the FMR[OP] to execute without write protection */ |
| 212 | out_be32(&lbc->fmr, priv->fmr | 3); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 213 | if (elbc_fcm_ctrl->use_mdr) |
| 214 | out_be32(&lbc->mdr, elbc_fcm_ctrl->mdr); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 215 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 216 | dev_vdbg(priv->dev, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 217 | "fsl_elbc_run_command: fmr=%08x fir=%08x fcr=%08x\n", |
| 218 | in_be32(&lbc->fmr), in_be32(&lbc->fir), in_be32(&lbc->fcr)); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 219 | dev_vdbg(priv->dev, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 220 | "fsl_elbc_run_command: fbar=%08x fpar=%08x " |
| 221 | "fbcr=%08x bank=%d\n", |
| 222 | in_be32(&lbc->fbar), in_be32(&lbc->fpar), |
| 223 | in_be32(&lbc->fbcr), priv->bank); |
| 224 | |
Mike Hench | 1938de4 | 2008-03-19 12:40:15 -0500 | [diff] [blame] | 225 | ctrl->irq_status = 0; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 226 | /* execute special operation */ |
| 227 | out_be32(&lbc->lsor, priv->bank); |
| 228 | |
| 229 | /* wait for FCM complete flag or timeout */ |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 230 | wait_event_timeout(ctrl->irq_wait, ctrl->irq_status, |
| 231 | FCM_TIMEOUT_MSECS * HZ/1000); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 232 | elbc_fcm_ctrl->status = ctrl->irq_status; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 233 | /* store mdr value in case it was needed */ |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 234 | if (elbc_fcm_ctrl->use_mdr) |
| 235 | elbc_fcm_ctrl->mdr = in_be32(&lbc->mdr); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 236 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 237 | elbc_fcm_ctrl->use_mdr = 0; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 238 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 239 | if (elbc_fcm_ctrl->status != LTESR_CC) { |
| 240 | dev_info(priv->dev, |
Scott Wood | c1317f7 | 2009-11-13 14:14:15 -0600 | [diff] [blame] | 241 | "command failed: fir %x fcr %x status %x mdr %x\n", |
| 242 | in_be32(&lbc->fir), in_be32(&lbc->fcr), |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 243 | elbc_fcm_ctrl->status, elbc_fcm_ctrl->mdr); |
Scott Wood | c1317f7 | 2009-11-13 14:14:15 -0600 | [diff] [blame] | 244 | return -EIO; |
| 245 | } |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 246 | |
Scott Wood | c1317f7 | 2009-11-13 14:14:15 -0600 | [diff] [blame] | 247 | return 0; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 248 | } |
| 249 | |
| 250 | static void fsl_elbc_do_read(struct nand_chip *chip, int oob) |
| 251 | { |
| 252 | struct fsl_elbc_mtd *priv = chip->priv; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 253 | struct fsl_lbc_ctrl *ctrl = priv->ctrl; |
Anton Vorontsov | d4a32fe | 2008-03-11 20:23:28 +0300 | [diff] [blame] | 254 | struct fsl_lbc_regs __iomem *lbc = ctrl->regs; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 255 | |
| 256 | if (priv->page_size) { |
| 257 | out_be32(&lbc->fir, |
Scott Wood | 476459a | 2009-11-13 14:13:01 -0600 | [diff] [blame] | 258 | (FIR_OP_CM0 << FIR_OP0_SHIFT) | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 259 | (FIR_OP_CA << FIR_OP1_SHIFT) | |
| 260 | (FIR_OP_PA << FIR_OP2_SHIFT) | |
Scott Wood | 476459a | 2009-11-13 14:13:01 -0600 | [diff] [blame] | 261 | (FIR_OP_CM1 << FIR_OP3_SHIFT) | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 262 | (FIR_OP_RBW << FIR_OP4_SHIFT)); |
| 263 | |
| 264 | out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | |
| 265 | (NAND_CMD_READSTART << FCR_CMD1_SHIFT)); |
| 266 | } else { |
| 267 | out_be32(&lbc->fir, |
Scott Wood | 476459a | 2009-11-13 14:13:01 -0600 | [diff] [blame] | 268 | (FIR_OP_CM0 << FIR_OP0_SHIFT) | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 269 | (FIR_OP_CA << FIR_OP1_SHIFT) | |
| 270 | (FIR_OP_PA << FIR_OP2_SHIFT) | |
| 271 | (FIR_OP_RBW << FIR_OP3_SHIFT)); |
| 272 | |
| 273 | if (oob) |
| 274 | out_be32(&lbc->fcr, NAND_CMD_READOOB << FCR_CMD0_SHIFT); |
| 275 | else |
| 276 | out_be32(&lbc->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT); |
| 277 | } |
| 278 | } |
| 279 | |
| 280 | /* cmdfunc send commands to the FCM */ |
| 281 | static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command, |
| 282 | int column, int page_addr) |
| 283 | { |
| 284 | struct nand_chip *chip = mtd->priv; |
| 285 | struct fsl_elbc_mtd *priv = chip->priv; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 286 | struct fsl_lbc_ctrl *ctrl = priv->ctrl; |
| 287 | struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = ctrl->nand; |
Anton Vorontsov | d4a32fe | 2008-03-11 20:23:28 +0300 | [diff] [blame] | 288 | struct fsl_lbc_regs __iomem *lbc = ctrl->regs; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 289 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 290 | elbc_fcm_ctrl->use_mdr = 0; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 291 | |
| 292 | /* clear the read buffer */ |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 293 | elbc_fcm_ctrl->read_bytes = 0; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 294 | if (command != NAND_CMD_PAGEPROG) |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 295 | elbc_fcm_ctrl->index = 0; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 296 | |
| 297 | switch (command) { |
| 298 | /* READ0 and READ1 read the entire buffer to use hardware ECC. */ |
| 299 | case NAND_CMD_READ1: |
| 300 | column += 256; |
| 301 | |
| 302 | /* fall-through */ |
| 303 | case NAND_CMD_READ0: |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 304 | dev_dbg(priv->dev, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 305 | "fsl_elbc_cmdfunc: NAND_CMD_READ0, page_addr:" |
| 306 | " 0x%x, column: 0x%x.\n", page_addr, column); |
| 307 | |
| 308 | |
| 309 | out_be32(&lbc->fbcr, 0); /* read entire page to enable ECC */ |
| 310 | set_addr(mtd, 0, page_addr, 0); |
| 311 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 312 | elbc_fcm_ctrl->read_bytes = mtd->writesize + mtd->oobsize; |
| 313 | elbc_fcm_ctrl->index += column; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 314 | |
| 315 | fsl_elbc_do_read(chip, 0); |
| 316 | fsl_elbc_run_command(mtd); |
| 317 | return; |
| 318 | |
| 319 | /* READOOB reads only the OOB because no ECC is performed. */ |
| 320 | case NAND_CMD_READOOB: |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 321 | dev_vdbg(priv->dev, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 322 | "fsl_elbc_cmdfunc: NAND_CMD_READOOB, page_addr:" |
| 323 | " 0x%x, column: 0x%x.\n", page_addr, column); |
| 324 | |
| 325 | out_be32(&lbc->fbcr, mtd->oobsize - column); |
| 326 | set_addr(mtd, column, page_addr, 1); |
| 327 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 328 | elbc_fcm_ctrl->read_bytes = mtd->writesize + mtd->oobsize; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 329 | |
| 330 | fsl_elbc_do_read(chip, 1); |
| 331 | fsl_elbc_run_command(mtd); |
| 332 | return; |
| 333 | |
| 334 | /* READID must read all 5 possible bytes while CEB is active */ |
| 335 | case NAND_CMD_READID: |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 336 | dev_vdbg(priv->dev, "fsl_elbc_cmdfunc: NAND_CMD_READID.\n"); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 337 | |
Scott Wood | 476459a | 2009-11-13 14:13:01 -0600 | [diff] [blame] | 338 | out_be32(&lbc->fir, (FIR_OP_CM0 << FIR_OP0_SHIFT) | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 339 | (FIR_OP_UA << FIR_OP1_SHIFT) | |
| 340 | (FIR_OP_RBW << FIR_OP2_SHIFT)); |
| 341 | out_be32(&lbc->fcr, NAND_CMD_READID << FCR_CMD0_SHIFT); |
| 342 | /* 5 bytes for manuf, device and exts */ |
| 343 | out_be32(&lbc->fbcr, 5); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 344 | elbc_fcm_ctrl->read_bytes = 5; |
| 345 | elbc_fcm_ctrl->use_mdr = 1; |
| 346 | elbc_fcm_ctrl->mdr = 0; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 347 | |
| 348 | set_addr(mtd, 0, 0, 0); |
| 349 | fsl_elbc_run_command(mtd); |
| 350 | return; |
| 351 | |
| 352 | /* ERASE1 stores the block and page address */ |
| 353 | case NAND_CMD_ERASE1: |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 354 | dev_vdbg(priv->dev, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 355 | "fsl_elbc_cmdfunc: NAND_CMD_ERASE1, " |
| 356 | "page_addr: 0x%x.\n", page_addr); |
| 357 | set_addr(mtd, 0, page_addr, 0); |
| 358 | return; |
| 359 | |
| 360 | /* ERASE2 uses the block and page address from ERASE1 */ |
| 361 | case NAND_CMD_ERASE2: |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 362 | dev_vdbg(priv->dev, "fsl_elbc_cmdfunc: NAND_CMD_ERASE2.\n"); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 363 | |
| 364 | out_be32(&lbc->fir, |
Scott Wood | 476459a | 2009-11-13 14:13:01 -0600 | [diff] [blame] | 365 | (FIR_OP_CM0 << FIR_OP0_SHIFT) | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 366 | (FIR_OP_PA << FIR_OP1_SHIFT) | |
Scott Wood | 476459a | 2009-11-13 14:13:01 -0600 | [diff] [blame] | 367 | (FIR_OP_CM2 << FIR_OP2_SHIFT) | |
| 368 | (FIR_OP_CW1 << FIR_OP3_SHIFT) | |
| 369 | (FIR_OP_RS << FIR_OP4_SHIFT)); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 370 | |
| 371 | out_be32(&lbc->fcr, |
| 372 | (NAND_CMD_ERASE1 << FCR_CMD0_SHIFT) | |
Scott Wood | 476459a | 2009-11-13 14:13:01 -0600 | [diff] [blame] | 373 | (NAND_CMD_STATUS << FCR_CMD1_SHIFT) | |
| 374 | (NAND_CMD_ERASE2 << FCR_CMD2_SHIFT)); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 375 | |
| 376 | out_be32(&lbc->fbcr, 0); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 377 | elbc_fcm_ctrl->read_bytes = 0; |
| 378 | elbc_fcm_ctrl->use_mdr = 1; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 379 | |
| 380 | fsl_elbc_run_command(mtd); |
| 381 | return; |
| 382 | |
| 383 | /* SEQIN sets up the addr buffer and all registers except the length */ |
| 384 | case NAND_CMD_SEQIN: { |
| 385 | __be32 fcr; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 386 | dev_vdbg(priv->dev, |
| 387 | "fsl_elbc_cmdfunc: NAND_CMD_SEQIN/PAGE_PROG, " |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 388 | "page_addr: 0x%x, column: 0x%x.\n", |
| 389 | page_addr, column); |
| 390 | |
Sergej.Stepanov@ids.de | eeda667 | 2010-11-23 18:38:36 +0100 | [diff] [blame] | 391 | elbc_fcm_ctrl->column = column; |
| 392 | elbc_fcm_ctrl->oob = 0; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 393 | elbc_fcm_ctrl->use_mdr = 1; |
Scott Wood | 476459a | 2009-11-13 14:13:01 -0600 | [diff] [blame] | 394 | |
| 395 | fcr = (NAND_CMD_STATUS << FCR_CMD1_SHIFT) | |
| 396 | (NAND_CMD_SEQIN << FCR_CMD2_SHIFT) | |
| 397 | (NAND_CMD_PAGEPROG << FCR_CMD3_SHIFT); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 398 | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 399 | if (priv->page_size) { |
| 400 | out_be32(&lbc->fir, |
Scott Wood | 476459a | 2009-11-13 14:13:01 -0600 | [diff] [blame] | 401 | (FIR_OP_CM2 << FIR_OP0_SHIFT) | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 402 | (FIR_OP_CA << FIR_OP1_SHIFT) | |
| 403 | (FIR_OP_PA << FIR_OP2_SHIFT) | |
| 404 | (FIR_OP_WB << FIR_OP3_SHIFT) | |
Scott Wood | 476459a | 2009-11-13 14:13:01 -0600 | [diff] [blame] | 405 | (FIR_OP_CM3 << FIR_OP4_SHIFT) | |
| 406 | (FIR_OP_CW1 << FIR_OP5_SHIFT) | |
| 407 | (FIR_OP_RS << FIR_OP6_SHIFT)); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 408 | } else { |
| 409 | out_be32(&lbc->fir, |
Scott Wood | 476459a | 2009-11-13 14:13:01 -0600 | [diff] [blame] | 410 | (FIR_OP_CM0 << FIR_OP0_SHIFT) | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 411 | (FIR_OP_CM2 << FIR_OP1_SHIFT) | |
| 412 | (FIR_OP_CA << FIR_OP2_SHIFT) | |
| 413 | (FIR_OP_PA << FIR_OP3_SHIFT) | |
| 414 | (FIR_OP_WB << FIR_OP4_SHIFT) | |
Scott Wood | 476459a | 2009-11-13 14:13:01 -0600 | [diff] [blame] | 415 | (FIR_OP_CM3 << FIR_OP5_SHIFT) | |
| 416 | (FIR_OP_CW1 << FIR_OP6_SHIFT) | |
| 417 | (FIR_OP_RS << FIR_OP7_SHIFT)); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 418 | |
| 419 | if (column >= mtd->writesize) { |
| 420 | /* OOB area --> READOOB */ |
| 421 | column -= mtd->writesize; |
| 422 | fcr |= NAND_CMD_READOOB << FCR_CMD0_SHIFT; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 423 | elbc_fcm_ctrl->oob = 1; |
Scott Wood | 476459a | 2009-11-13 14:13:01 -0600 | [diff] [blame] | 424 | } else { |
| 425 | WARN_ON(column != 0); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 426 | /* First 256 bytes --> READ0 */ |
| 427 | fcr |= NAND_CMD_READ0 << FCR_CMD0_SHIFT; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 428 | } |
| 429 | } |
| 430 | |
| 431 | out_be32(&lbc->fcr, fcr); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 432 | set_addr(mtd, column, page_addr, elbc_fcm_ctrl->oob); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 433 | return; |
| 434 | } |
| 435 | |
| 436 | /* PAGEPROG reuses all of the setup from SEQIN and adds the length */ |
| 437 | case NAND_CMD_PAGEPROG: { |
| 438 | int full_page; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 439 | dev_vdbg(priv->dev, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 440 | "fsl_elbc_cmdfunc: NAND_CMD_PAGEPROG " |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 441 | "writing %d bytes.\n", elbc_fcm_ctrl->index); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 442 | |
| 443 | /* if the write did not start at 0 or is not a full page |
| 444 | * then set the exact length, otherwise use a full page |
| 445 | * write so the HW generates the ECC. |
| 446 | */ |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 447 | if (elbc_fcm_ctrl->oob || elbc_fcm_ctrl->column != 0 || |
| 448 | elbc_fcm_ctrl->index != mtd->writesize + mtd->oobsize) { |
| 449 | out_be32(&lbc->fbcr, elbc_fcm_ctrl->index); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 450 | full_page = 0; |
| 451 | } else { |
| 452 | out_be32(&lbc->fbcr, 0); |
| 453 | full_page = 1; |
| 454 | } |
| 455 | |
| 456 | fsl_elbc_run_command(mtd); |
| 457 | |
| 458 | /* Read back the page in order to fill in the ECC for the |
| 459 | * caller. Is this really needed? |
| 460 | */ |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 461 | if (full_page && elbc_fcm_ctrl->oob_poi) { |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 462 | out_be32(&lbc->fbcr, 3); |
| 463 | set_addr(mtd, 6, page_addr, 1); |
| 464 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 465 | elbc_fcm_ctrl->read_bytes = mtd->writesize + 9; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 466 | |
| 467 | fsl_elbc_do_read(chip, 1); |
| 468 | fsl_elbc_run_command(mtd); |
| 469 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 470 | memcpy_fromio(elbc_fcm_ctrl->oob_poi + 6, |
| 471 | &elbc_fcm_ctrl->addr[elbc_fcm_ctrl->index], 3); |
| 472 | elbc_fcm_ctrl->index += 3; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 473 | } |
| 474 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 475 | elbc_fcm_ctrl->oob_poi = NULL; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 476 | return; |
| 477 | } |
| 478 | |
| 479 | /* CMD_STATUS must read the status byte while CEB is active */ |
| 480 | /* Note - it does not wait for the ready line */ |
| 481 | case NAND_CMD_STATUS: |
| 482 | out_be32(&lbc->fir, |
| 483 | (FIR_OP_CM0 << FIR_OP0_SHIFT) | |
| 484 | (FIR_OP_RBW << FIR_OP1_SHIFT)); |
| 485 | out_be32(&lbc->fcr, NAND_CMD_STATUS << FCR_CMD0_SHIFT); |
| 486 | out_be32(&lbc->fbcr, 1); |
| 487 | set_addr(mtd, 0, 0, 0); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 488 | elbc_fcm_ctrl->read_bytes = 1; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 489 | |
| 490 | fsl_elbc_run_command(mtd); |
| 491 | |
| 492 | /* The chip always seems to report that it is |
| 493 | * write-protected, even when it is not. |
| 494 | */ |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 495 | setbits8(elbc_fcm_ctrl->addr, NAND_STATUS_WP); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 496 | return; |
| 497 | |
| 498 | /* RESET without waiting for the ready line */ |
| 499 | case NAND_CMD_RESET: |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 500 | dev_dbg(priv->dev, "fsl_elbc_cmdfunc: NAND_CMD_RESET.\n"); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 501 | out_be32(&lbc->fir, FIR_OP_CM0 << FIR_OP0_SHIFT); |
| 502 | out_be32(&lbc->fcr, NAND_CMD_RESET << FCR_CMD0_SHIFT); |
| 503 | fsl_elbc_run_command(mtd); |
| 504 | return; |
| 505 | |
| 506 | default: |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 507 | dev_err(priv->dev, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 508 | "fsl_elbc_cmdfunc: error, unsupported command 0x%x.\n", |
| 509 | command); |
| 510 | } |
| 511 | } |
| 512 | |
| 513 | static void fsl_elbc_select_chip(struct mtd_info *mtd, int chip) |
| 514 | { |
| 515 | /* The hardware does not seem to support multiple |
| 516 | * chips per bank. |
| 517 | */ |
| 518 | } |
| 519 | |
| 520 | /* |
| 521 | * Write buf to the FCM Controller Data Buffer |
| 522 | */ |
| 523 | static void fsl_elbc_write_buf(struct mtd_info *mtd, const u8 *buf, int len) |
| 524 | { |
| 525 | struct nand_chip *chip = mtd->priv; |
| 526 | struct fsl_elbc_mtd *priv = chip->priv; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 527 | struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = priv->ctrl->nand; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 528 | unsigned int bufsize = mtd->writesize + mtd->oobsize; |
| 529 | |
Anton Vorontsov | 0ff6631 | 2008-03-28 22:10:54 +0300 | [diff] [blame] | 530 | if (len <= 0) { |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 531 | dev_err(priv->dev, "write_buf of %d bytes", len); |
| 532 | elbc_fcm_ctrl->status = 0; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 533 | return; |
| 534 | } |
| 535 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 536 | if ((unsigned int)len > bufsize - elbc_fcm_ctrl->index) { |
| 537 | dev_err(priv->dev, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 538 | "write_buf beyond end of buffer " |
| 539 | "(%d requested, %u available)\n", |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 540 | len, bufsize - elbc_fcm_ctrl->index); |
| 541 | len = bufsize - elbc_fcm_ctrl->index; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 542 | } |
| 543 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 544 | memcpy_toio(&elbc_fcm_ctrl->addr[elbc_fcm_ctrl->index], buf, len); |
Anton Vorontsov | 0ff6631 | 2008-03-28 22:10:54 +0300 | [diff] [blame] | 545 | /* |
| 546 | * This is workaround for the weird elbc hangs during nand write, |
| 547 | * Scott Wood says: "...perhaps difference in how long it takes a |
| 548 | * write to make it through the localbus compared to a write to IMMR |
| 549 | * is causing problems, and sync isn't helping for some reason." |
| 550 | * Reading back the last byte helps though. |
| 551 | */ |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 552 | in_8(&elbc_fcm_ctrl->addr[elbc_fcm_ctrl->index] + len - 1); |
Anton Vorontsov | 0ff6631 | 2008-03-28 22:10:54 +0300 | [diff] [blame] | 553 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 554 | elbc_fcm_ctrl->index += len; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 555 | } |
| 556 | |
| 557 | /* |
| 558 | * read a byte from either the FCM hardware buffer if it has any data left |
| 559 | * otherwise issue a command to read a single byte. |
| 560 | */ |
| 561 | static u8 fsl_elbc_read_byte(struct mtd_info *mtd) |
| 562 | { |
| 563 | struct nand_chip *chip = mtd->priv; |
| 564 | struct fsl_elbc_mtd *priv = chip->priv; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 565 | struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = priv->ctrl->nand; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 566 | |
| 567 | /* If there are still bytes in the FCM, then use the next byte. */ |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 568 | if (elbc_fcm_ctrl->index < elbc_fcm_ctrl->read_bytes) |
| 569 | return in_8(&elbc_fcm_ctrl->addr[elbc_fcm_ctrl->index++]); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 570 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 571 | dev_err(priv->dev, "read_byte beyond end of buffer\n"); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 572 | return ERR_BYTE; |
| 573 | } |
| 574 | |
| 575 | /* |
| 576 | * Read from the FCM Controller Data Buffer |
| 577 | */ |
| 578 | static void fsl_elbc_read_buf(struct mtd_info *mtd, u8 *buf, int len) |
| 579 | { |
| 580 | struct nand_chip *chip = mtd->priv; |
| 581 | struct fsl_elbc_mtd *priv = chip->priv; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 582 | struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = priv->ctrl->nand; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 583 | int avail; |
| 584 | |
| 585 | if (len < 0) |
| 586 | return; |
| 587 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 588 | avail = min((unsigned int)len, |
| 589 | elbc_fcm_ctrl->read_bytes - elbc_fcm_ctrl->index); |
| 590 | memcpy_fromio(buf, &elbc_fcm_ctrl->addr[elbc_fcm_ctrl->index], avail); |
| 591 | elbc_fcm_ctrl->index += avail; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 592 | |
| 593 | if (len > avail) |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 594 | dev_err(priv->dev, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 595 | "read_buf beyond end of buffer " |
| 596 | "(%d requested, %d available)\n", |
| 597 | len, avail); |
| 598 | } |
| 599 | |
| 600 | /* |
| 601 | * Verify buffer against the FCM Controller Data Buffer |
| 602 | */ |
| 603 | static int fsl_elbc_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) |
| 604 | { |
| 605 | struct nand_chip *chip = mtd->priv; |
| 606 | struct fsl_elbc_mtd *priv = chip->priv; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 607 | struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = priv->ctrl->nand; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 608 | int i; |
| 609 | |
| 610 | if (len < 0) { |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 611 | dev_err(priv->dev, "write_buf of %d bytes", len); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 612 | return -EINVAL; |
| 613 | } |
| 614 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 615 | if ((unsigned int)len > |
| 616 | elbc_fcm_ctrl->read_bytes - elbc_fcm_ctrl->index) { |
| 617 | dev_err(priv->dev, |
| 618 | "verify_buf beyond end of buffer " |
| 619 | "(%d requested, %u available)\n", |
| 620 | len, elbc_fcm_ctrl->read_bytes - elbc_fcm_ctrl->index); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 621 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 622 | elbc_fcm_ctrl->index = elbc_fcm_ctrl->read_bytes; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 623 | return -EINVAL; |
| 624 | } |
| 625 | |
| 626 | for (i = 0; i < len; i++) |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 627 | if (in_8(&elbc_fcm_ctrl->addr[elbc_fcm_ctrl->index + i]) |
| 628 | != buf[i]) |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 629 | break; |
| 630 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 631 | elbc_fcm_ctrl->index += len; |
| 632 | return i == len && elbc_fcm_ctrl->status == LTESR_CC ? 0 : -EIO; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 633 | } |
| 634 | |
| 635 | /* This function is called after Program and Erase Operations to |
| 636 | * check for success or failure. |
| 637 | */ |
| 638 | static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip) |
| 639 | { |
| 640 | struct fsl_elbc_mtd *priv = chip->priv; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 641 | struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = priv->ctrl->nand; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 642 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 643 | if (elbc_fcm_ctrl->status != LTESR_CC) |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 644 | return NAND_STATUS_FAIL; |
| 645 | |
| 646 | /* The chip always seems to report that it is |
| 647 | * write-protected, even when it is not. |
| 648 | */ |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 649 | return (elbc_fcm_ctrl->mdr & 0xff) | NAND_STATUS_WP; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 650 | } |
| 651 | |
| 652 | static int fsl_elbc_chip_init_tail(struct mtd_info *mtd) |
| 653 | { |
| 654 | struct nand_chip *chip = mtd->priv; |
| 655 | struct fsl_elbc_mtd *priv = chip->priv; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 656 | struct fsl_lbc_ctrl *ctrl = priv->ctrl; |
Anton Vorontsov | d4a32fe | 2008-03-11 20:23:28 +0300 | [diff] [blame] | 657 | struct fsl_lbc_regs __iomem *lbc = ctrl->regs; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 658 | unsigned int al; |
| 659 | |
| 660 | /* calculate FMR Address Length field */ |
| 661 | al = 0; |
| 662 | if (chip->pagemask & 0xffff0000) |
| 663 | al++; |
| 664 | if (chip->pagemask & 0xff000000) |
| 665 | al++; |
| 666 | |
| 667 | /* add to ECCM mode set in fsl_elbc_init */ |
| 668 | priv->fmr |= (12 << FMR_CWTO_SHIFT) | /* Timeout > 12 ms */ |
| 669 | (al << FMR_AL_SHIFT); |
| 670 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 671 | dev_dbg(priv->dev, "fsl_elbc_init: nand->numchips = %d\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 672 | chip->numchips); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 673 | dev_dbg(priv->dev, "fsl_elbc_init: nand->chipsize = %lld\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 674 | chip->chipsize); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 675 | dev_dbg(priv->dev, "fsl_elbc_init: nand->pagemask = %8x\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 676 | chip->pagemask); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 677 | dev_dbg(priv->dev, "fsl_elbc_init: nand->chip_delay = %d\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 678 | chip->chip_delay); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 679 | dev_dbg(priv->dev, "fsl_elbc_init: nand->badblockpos = %d\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 680 | chip->badblockpos); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 681 | dev_dbg(priv->dev, "fsl_elbc_init: nand->chip_shift = %d\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 682 | chip->chip_shift); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 683 | dev_dbg(priv->dev, "fsl_elbc_init: nand->page_shift = %d\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 684 | chip->page_shift); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 685 | dev_dbg(priv->dev, "fsl_elbc_init: nand->phys_erase_shift = %d\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 686 | chip->phys_erase_shift); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 687 | dev_dbg(priv->dev, "fsl_elbc_init: nand->ecclayout = %p\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 688 | chip->ecclayout); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 689 | dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.mode = %d\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 690 | chip->ecc.mode); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 691 | dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.steps = %d\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 692 | chip->ecc.steps); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 693 | dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.bytes = %d\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 694 | chip->ecc.bytes); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 695 | dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.total = %d\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 696 | chip->ecc.total); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 697 | dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.layout = %p\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 698 | chip->ecc.layout); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 699 | dev_dbg(priv->dev, "fsl_elbc_init: mtd->flags = %08x\n", mtd->flags); |
| 700 | dev_dbg(priv->dev, "fsl_elbc_init: mtd->size = %lld\n", mtd->size); |
| 701 | dev_dbg(priv->dev, "fsl_elbc_init: mtd->erasesize = %d\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 702 | mtd->erasesize); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 703 | dev_dbg(priv->dev, "fsl_elbc_init: mtd->writesize = %d\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 704 | mtd->writesize); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 705 | dev_dbg(priv->dev, "fsl_elbc_init: mtd->oobsize = %d\n", |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 706 | mtd->oobsize); |
| 707 | |
| 708 | /* adjust Option Register and ECC to match Flash page size */ |
| 709 | if (mtd->writesize == 512) { |
| 710 | priv->page_size = 0; |
Mike Hench | 1938de4 | 2008-03-19 12:40:15 -0500 | [diff] [blame] | 711 | clrbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 712 | } else if (mtd->writesize == 2048) { |
| 713 | priv->page_size = 1; |
| 714 | setbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS); |
| 715 | /* adjust ecc setup if needed */ |
| 716 | if ((in_be32(&lbc->bank[priv->bank].br) & BR_DECC) == |
| 717 | BR_DECC_CHK_GEN) { |
| 718 | chip->ecc.size = 512; |
| 719 | chip->ecc.layout = (priv->fmr & FMR_ECCM) ? |
| 720 | &fsl_elbc_oob_lp_eccm1 : |
| 721 | &fsl_elbc_oob_lp_eccm0; |
Anton Vorontsov | 452db27 | 2008-06-27 23:04:04 +0400 | [diff] [blame] | 722 | chip->badblock_pattern = &largepage_memorybased; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 723 | } |
| 724 | } else { |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 725 | dev_err(priv->dev, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 726 | "fsl_elbc_init: page size %d is not supported\n", |
| 727 | mtd->writesize); |
| 728 | return -1; |
| 729 | } |
| 730 | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 731 | return 0; |
| 732 | } |
| 733 | |
| 734 | static int fsl_elbc_read_page(struct mtd_info *mtd, |
| 735 | struct nand_chip *chip, |
Sneha Narnakaje | 46a8cf2 | 2009-09-18 12:51:46 -0700 | [diff] [blame] | 736 | uint8_t *buf, |
| 737 | int page) |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 738 | { |
| 739 | fsl_elbc_read_buf(mtd, buf, mtd->writesize); |
| 740 | fsl_elbc_read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 741 | |
| 742 | if (fsl_elbc_wait(mtd, chip) & NAND_STATUS_FAIL) |
| 743 | mtd->ecc_stats.failed++; |
| 744 | |
| 745 | return 0; |
| 746 | } |
| 747 | |
| 748 | /* ECC will be calculated automatically, and errors will be detected in |
| 749 | * waitfunc. |
| 750 | */ |
| 751 | static void fsl_elbc_write_page(struct mtd_info *mtd, |
| 752 | struct nand_chip *chip, |
| 753 | const uint8_t *buf) |
| 754 | { |
| 755 | struct fsl_elbc_mtd *priv = chip->priv; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 756 | struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = priv->ctrl->nand; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 757 | |
| 758 | fsl_elbc_write_buf(mtd, buf, mtd->writesize); |
| 759 | fsl_elbc_write_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 760 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 761 | elbc_fcm_ctrl->oob_poi = chip->oob_poi; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 762 | } |
| 763 | |
| 764 | static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv) |
| 765 | { |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 766 | struct fsl_lbc_ctrl *ctrl = priv->ctrl; |
Anton Vorontsov | d4a32fe | 2008-03-11 20:23:28 +0300 | [diff] [blame] | 767 | struct fsl_lbc_regs __iomem *lbc = ctrl->regs; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 768 | struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = ctrl->nand; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 769 | struct nand_chip *chip = &priv->chip; |
| 770 | |
| 771 | dev_dbg(priv->dev, "eLBC Set Information for bank %d\n", priv->bank); |
| 772 | |
| 773 | /* Fill in fsl_elbc_mtd structure */ |
| 774 | priv->mtd.priv = chip; |
| 775 | priv->mtd.owner = THIS_MODULE; |
Jason Jin | 03ed107 | 2008-12-09 14:32:31 +0800 | [diff] [blame] | 776 | |
| 777 | /* Set the ECCM according to the settings in bootloader.*/ |
| 778 | priv->fmr = in_be32(&lbc->fmr) & FMR_ECCM; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 779 | |
| 780 | /* fill in nand_chip structure */ |
| 781 | /* set up function call table */ |
| 782 | chip->read_byte = fsl_elbc_read_byte; |
| 783 | chip->write_buf = fsl_elbc_write_buf; |
| 784 | chip->read_buf = fsl_elbc_read_buf; |
| 785 | chip->verify_buf = fsl_elbc_verify_buf; |
| 786 | chip->select_chip = fsl_elbc_select_chip; |
| 787 | chip->cmdfunc = fsl_elbc_cmdfunc; |
| 788 | chip->waitfunc = fsl_elbc_wait; |
| 789 | |
Anton Vorontsov | ec6e0ea | 2008-06-27 23:04:13 +0400 | [diff] [blame] | 790 | chip->bbt_td = &bbt_main_descr; |
| 791 | chip->bbt_md = &bbt_mirror_descr; |
| 792 | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 793 | /* set up nand options */ |
Anton Vorontsov | ec6e0ea | 2008-06-27 23:04:13 +0400 | [diff] [blame] | 794 | chip->options = NAND_NO_READRDY | NAND_NO_AUTOINCR | |
| 795 | NAND_USE_FLASH_BBT; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 796 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 797 | chip->controller = &elbc_fcm_ctrl->controller; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 798 | chip->priv = priv; |
| 799 | |
| 800 | chip->ecc.read_page = fsl_elbc_read_page; |
| 801 | chip->ecc.write_page = fsl_elbc_write_page; |
| 802 | |
| 803 | /* If CS Base Register selects full hardware ECC then use it */ |
| 804 | if ((in_be32(&lbc->bank[priv->bank].br) & BR_DECC) == |
| 805 | BR_DECC_CHK_GEN) { |
| 806 | chip->ecc.mode = NAND_ECC_HW; |
| 807 | /* put in small page settings and adjust later if needed */ |
| 808 | chip->ecc.layout = (priv->fmr & FMR_ECCM) ? |
| 809 | &fsl_elbc_oob_sp_eccm1 : &fsl_elbc_oob_sp_eccm0; |
| 810 | chip->ecc.size = 512; |
| 811 | chip->ecc.bytes = 3; |
| 812 | } else { |
| 813 | /* otherwise fall back to default software ECC */ |
| 814 | chip->ecc.mode = NAND_ECC_SOFT; |
| 815 | } |
| 816 | |
| 817 | return 0; |
| 818 | } |
| 819 | |
| 820 | static int fsl_elbc_chip_remove(struct fsl_elbc_mtd *priv) |
| 821 | { |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 822 | struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = priv->ctrl->nand; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 823 | nand_release(&priv->mtd); |
| 824 | |
Anton Vorontsov | 9ebed3e | 2008-03-18 19:34:03 +0300 | [diff] [blame] | 825 | kfree(priv->mtd.name); |
| 826 | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 827 | if (priv->vbase) |
| 828 | iounmap(priv->vbase); |
| 829 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 830 | elbc_fcm_ctrl->chips[priv->bank] = NULL; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 831 | kfree(priv); |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 832 | kfree(elbc_fcm_ctrl); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 833 | return 0; |
| 834 | } |
| 835 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 836 | static DEFINE_MUTEX(fsl_elbc_nand_mutex); |
| 837 | |
| 838 | static int __devinit fsl_elbc_nand_probe(struct platform_device *pdev) |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 839 | { |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 840 | struct fsl_lbc_regs __iomem *lbc; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 841 | struct fsl_elbc_mtd *priv; |
| 842 | struct resource res; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 843 | struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 844 | static const char *part_probe_types[] |
| 845 | = { "cmdlinepart", "RedBoot", NULL }; |
| 846 | struct mtd_partition *parts; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 847 | int ret; |
| 848 | int bank; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 849 | struct device *dev; |
| 850 | struct device_node *node = pdev->dev.of_node; |
| 851 | |
| 852 | if (!fsl_lbc_ctrl_dev || !fsl_lbc_ctrl_dev->regs) |
| 853 | return -ENODEV; |
| 854 | lbc = fsl_lbc_ctrl_dev->regs; |
| 855 | dev = fsl_lbc_ctrl_dev->dev; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 856 | |
| 857 | /* get, allocate and map the memory resource */ |
| 858 | ret = of_address_to_resource(node, 0, &res); |
| 859 | if (ret) { |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 860 | dev_err(dev, "failed to get resource\n"); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 861 | return ret; |
| 862 | } |
| 863 | |
| 864 | /* find which chip select it is connected to */ |
| 865 | for (bank = 0; bank < MAX_BANKS; bank++) |
| 866 | if ((in_be32(&lbc->bank[bank].br) & BR_V) && |
| 867 | (in_be32(&lbc->bank[bank].br) & BR_MSEL) == BR_MS_FCM && |
| 868 | (in_be32(&lbc->bank[bank].br) & |
| 869 | in_be32(&lbc->bank[bank].or) & BR_BA) |
Lan Chunhe-B25806 | 0b824d2 | 2010-10-18 15:22:32 +0800 | [diff] [blame] | 870 | == fsl_lbc_addr(res.start)) |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 871 | break; |
| 872 | |
| 873 | if (bank >= MAX_BANKS) { |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 874 | dev_err(dev, "address did not match any chip selects\n"); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 875 | return -ENODEV; |
| 876 | } |
| 877 | |
| 878 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
| 879 | if (!priv) |
| 880 | return -ENOMEM; |
| 881 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 882 | mutex_lock(&fsl_elbc_nand_mutex); |
| 883 | if (!fsl_lbc_ctrl_dev->nand) { |
| 884 | elbc_fcm_ctrl = kzalloc(sizeof(*elbc_fcm_ctrl), GFP_KERNEL); |
| 885 | if (!elbc_fcm_ctrl) { |
| 886 | dev_err(dev, "failed to allocate memory\n"); |
| 887 | mutex_unlock(&fsl_elbc_nand_mutex); |
| 888 | ret = -ENOMEM; |
| 889 | goto err; |
| 890 | } |
| 891 | elbc_fcm_ctrl->counter++; |
| 892 | |
| 893 | spin_lock_init(&elbc_fcm_ctrl->controller.lock); |
| 894 | init_waitqueue_head(&elbc_fcm_ctrl->controller.wq); |
| 895 | fsl_lbc_ctrl_dev->nand = elbc_fcm_ctrl; |
| 896 | } else { |
| 897 | elbc_fcm_ctrl = fsl_lbc_ctrl_dev->nand; |
| 898 | } |
| 899 | mutex_unlock(&fsl_elbc_nand_mutex); |
| 900 | |
| 901 | elbc_fcm_ctrl->chips[bank] = priv; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 902 | priv->bank = bank; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 903 | priv->ctrl = fsl_lbc_ctrl_dev; |
| 904 | priv->dev = dev; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 905 | |
H Hartley Sweeten | 8a19b55 | 2009-12-14 16:19:44 -0500 | [diff] [blame] | 906 | priv->vbase = ioremap(res.start, resource_size(&res)); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 907 | if (!priv->vbase) { |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 908 | dev_err(dev, "failed to map chip region\n"); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 909 | ret = -ENOMEM; |
| 910 | goto err; |
| 911 | } |
| 912 | |
akpm@linux-foundation.org | 650da9d | 2008-07-29 21:27:14 -0700 | [diff] [blame] | 913 | priv->mtd.name = kasprintf(GFP_KERNEL, "%x.flash", (unsigned)res.start); |
Anton Vorontsov | 9ebed3e | 2008-03-18 19:34:03 +0300 | [diff] [blame] | 914 | if (!priv->mtd.name) { |
| 915 | ret = -ENOMEM; |
| 916 | goto err; |
| 917 | } |
| 918 | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 919 | ret = fsl_elbc_chip_init(priv); |
| 920 | if (ret) |
| 921 | goto err; |
| 922 | |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 923 | ret = nand_scan_ident(&priv->mtd, 1, NULL); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 924 | if (ret) |
| 925 | goto err; |
| 926 | |
| 927 | ret = fsl_elbc_chip_init_tail(&priv->mtd); |
| 928 | if (ret) |
| 929 | goto err; |
| 930 | |
| 931 | ret = nand_scan_tail(&priv->mtd); |
| 932 | if (ret) |
| 933 | goto err; |
| 934 | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 935 | /* First look for RedBoot table or partitions on the command |
| 936 | * line, these take precedence over device tree information */ |
| 937 | ret = parse_mtd_partitions(&priv->mtd, part_probe_types, &parts, 0); |
| 938 | if (ret < 0) |
| 939 | goto err; |
| 940 | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 941 | if (ret == 0) { |
Sebastian Andrzej Siewior | 69fd3a8 | 2008-10-12 16:18:36 +0200 | [diff] [blame] | 942 | ret = of_mtd_parse_partitions(priv->dev, node, &parts); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 943 | if (ret < 0) |
| 944 | goto err; |
| 945 | } |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 946 | |
Jamie Iles | ed9281e | 2011-05-23 10:23:21 +0100 | [diff] [blame] | 947 | mtd_device_register(&priv->mtd, parts, ret); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 948 | |
Stephen Rothwell | 4712fff | 2009-01-21 13:16:28 +0000 | [diff] [blame] | 949 | printk(KERN_INFO "eLBC NAND device at 0x%llx, bank %d\n", |
| 950 | (unsigned long long)res.start, priv->bank); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 951 | return 0; |
| 952 | |
| 953 | err: |
| 954 | fsl_elbc_chip_remove(priv); |
| 955 | return ret; |
| 956 | } |
| 957 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 958 | static int fsl_elbc_nand_remove(struct platform_device *pdev) |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 959 | { |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 960 | int i; |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 961 | struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = fsl_lbc_ctrl_dev->nand; |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 962 | for (i = 0; i < MAX_BANKS; i++) |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 963 | if (elbc_fcm_ctrl->chips[i]) |
| 964 | fsl_elbc_chip_remove(elbc_fcm_ctrl->chips[i]); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 965 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 966 | mutex_lock(&fsl_elbc_nand_mutex); |
| 967 | elbc_fcm_ctrl->counter--; |
| 968 | if (!elbc_fcm_ctrl->counter) { |
| 969 | fsl_lbc_ctrl_dev->nand = NULL; |
| 970 | kfree(elbc_fcm_ctrl); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 971 | } |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 972 | mutex_unlock(&fsl_elbc_nand_mutex); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 973 | |
| 974 | return 0; |
| 975 | |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 976 | } |
| 977 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 978 | static const struct of_device_id fsl_elbc_nand_match[] = { |
| 979 | { .compatible = "fsl,elbc-fcm-nand", }, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 980 | {} |
| 981 | }; |
| 982 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 983 | static struct platform_driver fsl_elbc_nand_driver = { |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 984 | .driver = { |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 985 | .name = "fsl,elbc-fcm-nand", |
Grant Likely | 4018294 | 2010-04-13 16:13:02 -0700 | [diff] [blame] | 986 | .owner = THIS_MODULE, |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 987 | .of_match_table = fsl_elbc_nand_match, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 988 | }, |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 989 | .probe = fsl_elbc_nand_probe, |
| 990 | .remove = fsl_elbc_nand_remove, |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 991 | }; |
| 992 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 993 | static int __init fsl_elbc_nand_init(void) |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 994 | { |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 995 | return platform_driver_register(&fsl_elbc_nand_driver); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 996 | } |
| 997 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 998 | static void __exit fsl_elbc_nand_exit(void) |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 999 | { |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 1000 | platform_driver_unregister(&fsl_elbc_nand_driver); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 1001 | } |
| 1002 | |
Roy Zang | 3ab8f2a | 2010-10-18 15:22:31 +0800 | [diff] [blame] | 1003 | module_init(fsl_elbc_nand_init); |
| 1004 | module_exit(fsl_elbc_nand_exit); |
Scott Wood | 76b1046 | 2008-02-06 15:36:21 -0600 | [diff] [blame] | 1005 | |
| 1006 | MODULE_LICENSE("GPL"); |
| 1007 | MODULE_AUTHOR("Freescale"); |
| 1008 | MODULE_DESCRIPTION("Freescale Enhanced Local Bus Controller MTD NAND driver"); |