Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Driver for ESS Maestro3/Allegro (ES1988) soundcards. |
| 3 | * Copyright (c) 2000 by Zach Brown <zab@zabbo.net> |
| 4 | * Takashi Iwai <tiwai@suse.de> |
| 5 | * |
| 6 | * Most of the hardware init stuffs are based on maestro3 driver for |
| 7 | * OSS/Free by Zach Brown. Many thanks to Zach! |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * |
| 24 | * ChangeLog: |
| 25 | * Aug. 27, 2001 |
| 26 | * - Fixed deadlock on capture |
| 27 | * - Added Canyon3D-2 support by Rob Riggs <rob@pangalactic.org> |
| 28 | * |
| 29 | */ |
| 30 | |
| 31 | #define CARD_NAME "ESS Maestro3/Allegro/Canyon3D-2" |
| 32 | #define DRIVER_NAME "Maestro3" |
| 33 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #include <asm/io.h> |
| 35 | #include <linux/delay.h> |
| 36 | #include <linux/interrupt.h> |
| 37 | #include <linux/init.h> |
| 38 | #include <linux/pci.h> |
Tobias Klauser | 9d2f928 | 2006-03-22 10:53:19 +0100 | [diff] [blame] | 39 | #include <linux/dma-mapping.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | #include <linux/slab.h> |
| 41 | #include <linux/vmalloc.h> |
Paul Gortmaker | 65a7721 | 2011-07-15 13:13:37 -0400 | [diff] [blame^] | 42 | #include <linux/module.h> |
Clemens Ladisch | 81d7724 | 2006-11-06 09:26:41 +0100 | [diff] [blame] | 43 | #include <linux/firmware.h> |
Hans de Goede | eb581ad | 2010-04-23 05:26:42 -0400 | [diff] [blame] | 44 | #include <linux/input.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | #include <sound/core.h> |
| 46 | #include <sound/info.h> |
| 47 | #include <sound/control.h> |
| 48 | #include <sound/pcm.h> |
| 49 | #include <sound/mpu401.h> |
| 50 | #include <sound/ac97_codec.h> |
| 51 | #include <sound/initval.h> |
Clemens Ladisch | 81d7724 | 2006-11-06 09:26:41 +0100 | [diff] [blame] | 52 | #include <asm/byteorder.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 53 | |
| 54 | MODULE_AUTHOR("Zach Brown <zab@zabbo.net>, Takashi Iwai <tiwai@suse.de>"); |
| 55 | MODULE_DESCRIPTION("ESS Maestro3 PCI"); |
| 56 | MODULE_LICENSE("GPL"); |
| 57 | MODULE_SUPPORTED_DEVICE("{{ESS,Maestro3 PCI}," |
| 58 | "{ESS,ES1988}," |
| 59 | "{ESS,Allegro PCI}," |
| 60 | "{ESS,Allegro-1 PCI}," |
| 61 | "{ESS,Canyon3D-2/LE PCI}}"); |
Clemens Ladisch | 7e0af29 | 2007-05-03 17:59:54 +0200 | [diff] [blame] | 62 | MODULE_FIRMWARE("ess/maestro3_assp_kernel.fw"); |
| 63 | MODULE_FIRMWARE("ess/maestro3_assp_minisrc.fw"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | |
| 65 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ |
| 66 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ |
| 67 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* all enabled */ |
| 68 | static int external_amp[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1}; |
| 69 | static int amp_gpio[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1}; |
| 70 | |
| 71 | module_param_array(index, int, NULL, 0444); |
| 72 | MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard."); |
| 73 | module_param_array(id, charp, NULL, 0444); |
| 74 | MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard."); |
| 75 | module_param_array(enable, bool, NULL, 0444); |
| 76 | MODULE_PARM_DESC(enable, "Enable this soundcard."); |
| 77 | module_param_array(external_amp, bool, NULL, 0444); |
| 78 | MODULE_PARM_DESC(external_amp, "Enable external amp for " CARD_NAME " soundcard."); |
| 79 | module_param_array(amp_gpio, int, NULL, 0444); |
| 80 | MODULE_PARM_DESC(amp_gpio, "GPIO pin number for external amp. (default = -1)"); |
| 81 | |
| 82 | #define MAX_PLAYBACKS 2 |
| 83 | #define MAX_CAPTURES 1 |
| 84 | #define NR_DSPS (MAX_PLAYBACKS + MAX_CAPTURES) |
| 85 | |
| 86 | |
| 87 | /* |
| 88 | * maestro3 registers |
| 89 | */ |
| 90 | |
| 91 | /* Allegro PCI configuration registers */ |
| 92 | #define PCI_LEGACY_AUDIO_CTRL 0x40 |
| 93 | #define SOUND_BLASTER_ENABLE 0x00000001 |
| 94 | #define FM_SYNTHESIS_ENABLE 0x00000002 |
| 95 | #define GAME_PORT_ENABLE 0x00000004 |
| 96 | #define MPU401_IO_ENABLE 0x00000008 |
| 97 | #define MPU401_IRQ_ENABLE 0x00000010 |
| 98 | #define ALIAS_10BIT_IO 0x00000020 |
| 99 | #define SB_DMA_MASK 0x000000C0 |
| 100 | #define SB_DMA_0 0x00000040 |
| 101 | #define SB_DMA_1 0x00000040 |
| 102 | #define SB_DMA_R 0x00000080 |
| 103 | #define SB_DMA_3 0x000000C0 |
| 104 | #define SB_IRQ_MASK 0x00000700 |
| 105 | #define SB_IRQ_5 0x00000000 |
| 106 | #define SB_IRQ_7 0x00000100 |
| 107 | #define SB_IRQ_9 0x00000200 |
| 108 | #define SB_IRQ_10 0x00000300 |
| 109 | #define MIDI_IRQ_MASK 0x00003800 |
| 110 | #define SERIAL_IRQ_ENABLE 0x00004000 |
| 111 | #define DISABLE_LEGACY 0x00008000 |
| 112 | |
| 113 | #define PCI_ALLEGRO_CONFIG 0x50 |
| 114 | #define SB_ADDR_240 0x00000004 |
| 115 | #define MPU_ADDR_MASK 0x00000018 |
| 116 | #define MPU_ADDR_330 0x00000000 |
| 117 | #define MPU_ADDR_300 0x00000008 |
| 118 | #define MPU_ADDR_320 0x00000010 |
| 119 | #define MPU_ADDR_340 0x00000018 |
| 120 | #define USE_PCI_TIMING 0x00000040 |
| 121 | #define POSTED_WRITE_ENABLE 0x00000080 |
| 122 | #define DMA_POLICY_MASK 0x00000700 |
| 123 | #define DMA_DDMA 0x00000000 |
| 124 | #define DMA_TDMA 0x00000100 |
| 125 | #define DMA_PCPCI 0x00000200 |
| 126 | #define DMA_WBDMA16 0x00000400 |
| 127 | #define DMA_WBDMA4 0x00000500 |
| 128 | #define DMA_WBDMA2 0x00000600 |
| 129 | #define DMA_WBDMA1 0x00000700 |
| 130 | #define DMA_SAFE_GUARD 0x00000800 |
| 131 | #define HI_PERF_GP_ENABLE 0x00001000 |
| 132 | #define PIC_SNOOP_MODE_0 0x00002000 |
| 133 | #define PIC_SNOOP_MODE_1 0x00004000 |
| 134 | #define SOUNDBLASTER_IRQ_MASK 0x00008000 |
| 135 | #define RING_IN_ENABLE 0x00010000 |
| 136 | #define SPDIF_TEST_MODE 0x00020000 |
| 137 | #define CLK_MULT_MODE_SELECT_2 0x00040000 |
| 138 | #define EEPROM_WRITE_ENABLE 0x00080000 |
| 139 | #define CODEC_DIR_IN 0x00100000 |
| 140 | #define HV_BUTTON_FROM_GD 0x00200000 |
| 141 | #define REDUCED_DEBOUNCE 0x00400000 |
| 142 | #define HV_CTRL_ENABLE 0x00800000 |
| 143 | #define SPDIF_ENABLE 0x01000000 |
| 144 | #define CLK_DIV_SELECT 0x06000000 |
| 145 | #define CLK_DIV_BY_48 0x00000000 |
| 146 | #define CLK_DIV_BY_49 0x02000000 |
| 147 | #define CLK_DIV_BY_50 0x04000000 |
| 148 | #define CLK_DIV_RESERVED 0x06000000 |
| 149 | #define PM_CTRL_ENABLE 0x08000000 |
| 150 | #define CLK_MULT_MODE_SELECT 0x30000000 |
| 151 | #define CLK_MULT_MODE_SHIFT 28 |
| 152 | #define CLK_MULT_MODE_0 0x00000000 |
| 153 | #define CLK_MULT_MODE_1 0x10000000 |
| 154 | #define CLK_MULT_MODE_2 0x20000000 |
| 155 | #define CLK_MULT_MODE_3 0x30000000 |
| 156 | #define INT_CLK_SELECT 0x40000000 |
| 157 | #define INT_CLK_MULT_RESET 0x80000000 |
| 158 | |
| 159 | /* M3 */ |
| 160 | #define INT_CLK_SRC_NOT_PCI 0x00100000 |
| 161 | #define INT_CLK_MULT_ENABLE 0x80000000 |
| 162 | |
| 163 | #define PCI_ACPI_CONTROL 0x54 |
| 164 | #define PCI_ACPI_D0 0x00000000 |
| 165 | #define PCI_ACPI_D1 0xB4F70000 |
| 166 | #define PCI_ACPI_D2 0xB4F7B4F7 |
| 167 | |
| 168 | #define PCI_USER_CONFIG 0x58 |
| 169 | #define EXT_PCI_MASTER_ENABLE 0x00000001 |
| 170 | #define SPDIF_OUT_SELECT 0x00000002 |
| 171 | #define TEST_PIN_DIR_CTRL 0x00000004 |
| 172 | #define AC97_CODEC_TEST 0x00000020 |
| 173 | #define TRI_STATE_BUFFER 0x00000080 |
| 174 | #define IN_CLK_12MHZ_SELECT 0x00000100 |
| 175 | #define MULTI_FUNC_DISABLE 0x00000200 |
| 176 | #define EXT_MASTER_PAIR_SEL 0x00000400 |
| 177 | #define PCI_MASTER_SUPPORT 0x00000800 |
| 178 | #define STOP_CLOCK_ENABLE 0x00001000 |
| 179 | #define EAPD_DRIVE_ENABLE 0x00002000 |
| 180 | #define REQ_TRI_STATE_ENABLE 0x00004000 |
| 181 | #define REQ_LOW_ENABLE 0x00008000 |
| 182 | #define MIDI_1_ENABLE 0x00010000 |
| 183 | #define MIDI_2_ENABLE 0x00020000 |
| 184 | #define SB_AUDIO_SYNC 0x00040000 |
| 185 | #define HV_CTRL_TEST 0x00100000 |
| 186 | #define SOUNDBLASTER_TEST 0x00400000 |
| 187 | |
| 188 | #define PCI_USER_CONFIG_C 0x5C |
| 189 | |
| 190 | #define PCI_DDMA_CTRL 0x60 |
| 191 | #define DDMA_ENABLE 0x00000001 |
| 192 | |
| 193 | |
| 194 | /* Allegro registers */ |
| 195 | #define HOST_INT_CTRL 0x18 |
| 196 | #define SB_INT_ENABLE 0x0001 |
| 197 | #define MPU401_INT_ENABLE 0x0002 |
| 198 | #define ASSP_INT_ENABLE 0x0010 |
| 199 | #define RING_INT_ENABLE 0x0020 |
| 200 | #define HV_INT_ENABLE 0x0040 |
| 201 | #define CLKRUN_GEN_ENABLE 0x0100 |
| 202 | #define HV_CTRL_TO_PME 0x0400 |
| 203 | #define SOFTWARE_RESET_ENABLE 0x8000 |
| 204 | |
| 205 | /* |
| 206 | * should be using the above defines, probably. |
| 207 | */ |
| 208 | #define REGB_ENABLE_RESET 0x01 |
| 209 | #define REGB_STOP_CLOCK 0x10 |
| 210 | |
| 211 | #define HOST_INT_STATUS 0x1A |
| 212 | #define SB_INT_PENDING 0x01 |
| 213 | #define MPU401_INT_PENDING 0x02 |
| 214 | #define ASSP_INT_PENDING 0x10 |
| 215 | #define RING_INT_PENDING 0x20 |
| 216 | #define HV_INT_PENDING 0x40 |
| 217 | |
| 218 | #define HARDWARE_VOL_CTRL 0x1B |
| 219 | #define SHADOW_MIX_REG_VOICE 0x1C |
| 220 | #define HW_VOL_COUNTER_VOICE 0x1D |
| 221 | #define SHADOW_MIX_REG_MASTER 0x1E |
| 222 | #define HW_VOL_COUNTER_MASTER 0x1F |
| 223 | |
| 224 | #define CODEC_COMMAND 0x30 |
| 225 | #define CODEC_READ_B 0x80 |
| 226 | |
| 227 | #define CODEC_STATUS 0x30 |
| 228 | #define CODEC_BUSY_B 0x01 |
| 229 | |
| 230 | #define CODEC_DATA 0x32 |
| 231 | |
| 232 | #define RING_BUS_CTRL_A 0x36 |
| 233 | #define RAC_PME_ENABLE 0x0100 |
| 234 | #define RAC_SDFS_ENABLE 0x0200 |
| 235 | #define LAC_PME_ENABLE 0x0400 |
| 236 | #define LAC_SDFS_ENABLE 0x0800 |
| 237 | #define SERIAL_AC_LINK_ENABLE 0x1000 |
| 238 | #define IO_SRAM_ENABLE 0x2000 |
| 239 | #define IIS_INPUT_ENABLE 0x8000 |
| 240 | |
| 241 | #define RING_BUS_CTRL_B 0x38 |
| 242 | #define SECOND_CODEC_ID_MASK 0x0003 |
| 243 | #define SPDIF_FUNC_ENABLE 0x0010 |
| 244 | #define SECOND_AC_ENABLE 0x0020 |
| 245 | #define SB_MODULE_INTF_ENABLE 0x0040 |
| 246 | #define SSPE_ENABLE 0x0040 |
| 247 | #define M3I_DOCK_ENABLE 0x0080 |
| 248 | |
| 249 | #define SDO_OUT_DEST_CTRL 0x3A |
| 250 | #define COMMAND_ADDR_OUT 0x0003 |
| 251 | #define PCM_LR_OUT_LOCAL 0x0000 |
| 252 | #define PCM_LR_OUT_REMOTE 0x0004 |
| 253 | #define PCM_LR_OUT_MUTE 0x0008 |
| 254 | #define PCM_LR_OUT_BOTH 0x000C |
| 255 | #define LINE1_DAC_OUT_LOCAL 0x0000 |
| 256 | #define LINE1_DAC_OUT_REMOTE 0x0010 |
| 257 | #define LINE1_DAC_OUT_MUTE 0x0020 |
| 258 | #define LINE1_DAC_OUT_BOTH 0x0030 |
| 259 | #define PCM_CLS_OUT_LOCAL 0x0000 |
| 260 | #define PCM_CLS_OUT_REMOTE 0x0040 |
| 261 | #define PCM_CLS_OUT_MUTE 0x0080 |
| 262 | #define PCM_CLS_OUT_BOTH 0x00C0 |
| 263 | #define PCM_RLF_OUT_LOCAL 0x0000 |
| 264 | #define PCM_RLF_OUT_REMOTE 0x0100 |
| 265 | #define PCM_RLF_OUT_MUTE 0x0200 |
| 266 | #define PCM_RLF_OUT_BOTH 0x0300 |
| 267 | #define LINE2_DAC_OUT_LOCAL 0x0000 |
| 268 | #define LINE2_DAC_OUT_REMOTE 0x0400 |
| 269 | #define LINE2_DAC_OUT_MUTE 0x0800 |
| 270 | #define LINE2_DAC_OUT_BOTH 0x0C00 |
| 271 | #define HANDSET_OUT_LOCAL 0x0000 |
| 272 | #define HANDSET_OUT_REMOTE 0x1000 |
| 273 | #define HANDSET_OUT_MUTE 0x2000 |
| 274 | #define HANDSET_OUT_BOTH 0x3000 |
| 275 | #define IO_CTRL_OUT_LOCAL 0x0000 |
| 276 | #define IO_CTRL_OUT_REMOTE 0x4000 |
| 277 | #define IO_CTRL_OUT_MUTE 0x8000 |
| 278 | #define IO_CTRL_OUT_BOTH 0xC000 |
| 279 | |
| 280 | #define SDO_IN_DEST_CTRL 0x3C |
| 281 | #define STATUS_ADDR_IN 0x0003 |
| 282 | #define PCM_LR_IN_LOCAL 0x0000 |
| 283 | #define PCM_LR_IN_REMOTE 0x0004 |
| 284 | #define PCM_LR_RESERVED 0x0008 |
| 285 | #define PCM_LR_IN_BOTH 0x000C |
| 286 | #define LINE1_ADC_IN_LOCAL 0x0000 |
| 287 | #define LINE1_ADC_IN_REMOTE 0x0010 |
| 288 | #define LINE1_ADC_IN_MUTE 0x0020 |
| 289 | #define MIC_ADC_IN_LOCAL 0x0000 |
| 290 | #define MIC_ADC_IN_REMOTE 0x0040 |
| 291 | #define MIC_ADC_IN_MUTE 0x0080 |
| 292 | #define LINE2_DAC_IN_LOCAL 0x0000 |
| 293 | #define LINE2_DAC_IN_REMOTE 0x0400 |
| 294 | #define LINE2_DAC_IN_MUTE 0x0800 |
| 295 | #define HANDSET_IN_LOCAL 0x0000 |
| 296 | #define HANDSET_IN_REMOTE 0x1000 |
| 297 | #define HANDSET_IN_MUTE 0x2000 |
| 298 | #define IO_STATUS_IN_LOCAL 0x0000 |
| 299 | #define IO_STATUS_IN_REMOTE 0x4000 |
| 300 | |
| 301 | #define SPDIF_IN_CTRL 0x3E |
| 302 | #define SPDIF_IN_ENABLE 0x0001 |
| 303 | |
| 304 | #define GPIO_DATA 0x60 |
| 305 | #define GPIO_DATA_MASK 0x0FFF |
| 306 | #define GPIO_HV_STATUS 0x3000 |
| 307 | #define GPIO_PME_STATUS 0x4000 |
| 308 | |
| 309 | #define GPIO_MASK 0x64 |
| 310 | #define GPIO_DIRECTION 0x68 |
| 311 | #define GPO_PRIMARY_AC97 0x0001 |
| 312 | #define GPI_LINEOUT_SENSE 0x0004 |
| 313 | #define GPO_SECONDARY_AC97 0x0008 |
| 314 | #define GPI_VOL_DOWN 0x0010 |
| 315 | #define GPI_VOL_UP 0x0020 |
| 316 | #define GPI_IIS_CLK 0x0040 |
| 317 | #define GPI_IIS_LRCLK 0x0080 |
| 318 | #define GPI_IIS_DATA 0x0100 |
| 319 | #define GPI_DOCKING_STATUS 0x0100 |
| 320 | #define GPI_HEADPHONE_SENSE 0x0200 |
| 321 | #define GPO_EXT_AMP_SHUTDOWN 0x1000 |
| 322 | |
| 323 | #define GPO_EXT_AMP_M3 1 /* default m3 amp */ |
| 324 | #define GPO_EXT_AMP_ALLEGRO 8 /* default allegro amp */ |
| 325 | |
| 326 | /* M3 */ |
| 327 | #define GPO_M3_EXT_AMP_SHUTDN 0x0002 |
| 328 | |
| 329 | #define ASSP_INDEX_PORT 0x80 |
| 330 | #define ASSP_MEMORY_PORT 0x82 |
| 331 | #define ASSP_DATA_PORT 0x84 |
| 332 | |
| 333 | #define MPU401_DATA_PORT 0x98 |
| 334 | #define MPU401_STATUS_PORT 0x99 |
| 335 | |
| 336 | #define CLK_MULT_DATA_PORT 0x9C |
| 337 | |
| 338 | #define ASSP_CONTROL_A 0xA2 |
| 339 | #define ASSP_0_WS_ENABLE 0x01 |
| 340 | #define ASSP_CTRL_A_RESERVED1 0x02 |
| 341 | #define ASSP_CTRL_A_RESERVED2 0x04 |
| 342 | #define ASSP_CLK_49MHZ_SELECT 0x08 |
| 343 | #define FAST_PLU_ENABLE 0x10 |
| 344 | #define ASSP_CTRL_A_RESERVED3 0x20 |
| 345 | #define DSP_CLK_36MHZ_SELECT 0x40 |
| 346 | |
| 347 | #define ASSP_CONTROL_B 0xA4 |
| 348 | #define RESET_ASSP 0x00 |
| 349 | #define RUN_ASSP 0x01 |
| 350 | #define ENABLE_ASSP_CLOCK 0x00 |
| 351 | #define STOP_ASSP_CLOCK 0x10 |
| 352 | #define RESET_TOGGLE 0x40 |
| 353 | |
| 354 | #define ASSP_CONTROL_C 0xA6 |
| 355 | #define ASSP_HOST_INT_ENABLE 0x01 |
| 356 | #define FM_ADDR_REMAP_DISABLE 0x02 |
| 357 | #define HOST_WRITE_PORT_ENABLE 0x08 |
| 358 | |
| 359 | #define ASSP_HOST_INT_STATUS 0xAC |
| 360 | #define DSP2HOST_REQ_PIORECORD 0x01 |
| 361 | #define DSP2HOST_REQ_I2SRATE 0x02 |
| 362 | #define DSP2HOST_REQ_TIMER 0x04 |
| 363 | |
| 364 | /* AC97 registers */ |
| 365 | /* XXX fix this crap up */ |
| 366 | /*#define AC97_RESET 0x00*/ |
| 367 | |
| 368 | #define AC97_VOL_MUTE_B 0x8000 |
| 369 | #define AC97_VOL_M 0x1F |
| 370 | #define AC97_LEFT_VOL_S 8 |
| 371 | |
| 372 | #define AC97_MASTER_VOL 0x02 |
| 373 | #define AC97_LINE_LEVEL_VOL 0x04 |
| 374 | #define AC97_MASTER_MONO_VOL 0x06 |
| 375 | #define AC97_PC_BEEP_VOL 0x0A |
| 376 | #define AC97_PC_BEEP_VOL_M 0x0F |
| 377 | #define AC97_SROUND_MASTER_VOL 0x38 |
| 378 | #define AC97_PC_BEEP_VOL_S 1 |
| 379 | |
| 380 | /*#define AC97_PHONE_VOL 0x0C |
| 381 | #define AC97_MIC_VOL 0x0E*/ |
| 382 | #define AC97_MIC_20DB_ENABLE 0x40 |
| 383 | |
| 384 | /*#define AC97_LINEIN_VOL 0x10 |
| 385 | #define AC97_CD_VOL 0x12 |
| 386 | #define AC97_VIDEO_VOL 0x14 |
| 387 | #define AC97_AUX_VOL 0x16*/ |
| 388 | #define AC97_PCM_OUT_VOL 0x18 |
| 389 | /*#define AC97_RECORD_SELECT 0x1A*/ |
| 390 | #define AC97_RECORD_MIC 0x00 |
| 391 | #define AC97_RECORD_CD 0x01 |
| 392 | #define AC97_RECORD_VIDEO 0x02 |
| 393 | #define AC97_RECORD_AUX 0x03 |
| 394 | #define AC97_RECORD_MONO_MUX 0x02 |
| 395 | #define AC97_RECORD_DIGITAL 0x03 |
| 396 | #define AC97_RECORD_LINE 0x04 |
| 397 | #define AC97_RECORD_STEREO 0x05 |
| 398 | #define AC97_RECORD_MONO 0x06 |
| 399 | #define AC97_RECORD_PHONE 0x07 |
| 400 | |
| 401 | /*#define AC97_RECORD_GAIN 0x1C*/ |
| 402 | #define AC97_RECORD_VOL_M 0x0F |
| 403 | |
| 404 | /*#define AC97_GENERAL_PURPOSE 0x20*/ |
| 405 | #define AC97_POWER_DOWN_CTRL 0x26 |
| 406 | #define AC97_ADC_READY 0x0001 |
| 407 | #define AC97_DAC_READY 0x0002 |
| 408 | #define AC97_ANALOG_READY 0x0004 |
| 409 | #define AC97_VREF_ON 0x0008 |
| 410 | #define AC97_PR0 0x0100 |
| 411 | #define AC97_PR1 0x0200 |
| 412 | #define AC97_PR2 0x0400 |
| 413 | #define AC97_PR3 0x0800 |
| 414 | #define AC97_PR4 0x1000 |
| 415 | |
| 416 | #define AC97_RESERVED1 0x28 |
| 417 | |
| 418 | #define AC97_VENDOR_TEST 0x5A |
| 419 | |
| 420 | #define AC97_CLOCK_DELAY 0x5C |
| 421 | #define AC97_LINEOUT_MUX_SEL 0x0001 |
| 422 | #define AC97_MONO_MUX_SEL 0x0002 |
| 423 | #define AC97_CLOCK_DELAY_SEL 0x1F |
| 424 | #define AC97_DAC_CDS_SHIFT 6 |
| 425 | #define AC97_ADC_CDS_SHIFT 11 |
| 426 | |
| 427 | #define AC97_MULTI_CHANNEL_SEL 0x74 |
| 428 | |
| 429 | /*#define AC97_VENDOR_ID1 0x7C |
| 430 | #define AC97_VENDOR_ID2 0x7E*/ |
| 431 | |
| 432 | /* |
| 433 | * ASSP control regs |
| 434 | */ |
| 435 | #define DSP_PORT_TIMER_COUNT 0x06 |
| 436 | |
| 437 | #define DSP_PORT_MEMORY_INDEX 0x80 |
| 438 | |
| 439 | #define DSP_PORT_MEMORY_TYPE 0x82 |
| 440 | #define MEMTYPE_INTERNAL_CODE 0x0002 |
| 441 | #define MEMTYPE_INTERNAL_DATA 0x0003 |
| 442 | #define MEMTYPE_MASK 0x0003 |
| 443 | |
| 444 | #define DSP_PORT_MEMORY_DATA 0x84 |
| 445 | |
| 446 | #define DSP_PORT_CONTROL_REG_A 0xA2 |
| 447 | #define DSP_PORT_CONTROL_REG_B 0xA4 |
| 448 | #define DSP_PORT_CONTROL_REG_C 0xA6 |
| 449 | |
| 450 | #define REV_A_CODE_MEMORY_BEGIN 0x0000 |
| 451 | #define REV_A_CODE_MEMORY_END 0x0FFF |
| 452 | #define REV_A_CODE_MEMORY_UNIT_LENGTH 0x0040 |
| 453 | #define REV_A_CODE_MEMORY_LENGTH (REV_A_CODE_MEMORY_END - REV_A_CODE_MEMORY_BEGIN + 1) |
| 454 | |
| 455 | #define REV_B_CODE_MEMORY_BEGIN 0x0000 |
| 456 | #define REV_B_CODE_MEMORY_END 0x0BFF |
| 457 | #define REV_B_CODE_MEMORY_UNIT_LENGTH 0x0040 |
| 458 | #define REV_B_CODE_MEMORY_LENGTH (REV_B_CODE_MEMORY_END - REV_B_CODE_MEMORY_BEGIN + 1) |
| 459 | |
| 460 | #define REV_A_DATA_MEMORY_BEGIN 0x1000 |
| 461 | #define REV_A_DATA_MEMORY_END 0x2FFF |
| 462 | #define REV_A_DATA_MEMORY_UNIT_LENGTH 0x0080 |
| 463 | #define REV_A_DATA_MEMORY_LENGTH (REV_A_DATA_MEMORY_END - REV_A_DATA_MEMORY_BEGIN + 1) |
| 464 | |
| 465 | #define REV_B_DATA_MEMORY_BEGIN 0x1000 |
| 466 | #define REV_B_DATA_MEMORY_END 0x2BFF |
| 467 | #define REV_B_DATA_MEMORY_UNIT_LENGTH 0x0080 |
| 468 | #define REV_B_DATA_MEMORY_LENGTH (REV_B_DATA_MEMORY_END - REV_B_DATA_MEMORY_BEGIN + 1) |
| 469 | |
| 470 | |
| 471 | #define NUM_UNITS_KERNEL_CODE 16 |
| 472 | #define NUM_UNITS_KERNEL_DATA 2 |
| 473 | |
| 474 | #define NUM_UNITS_KERNEL_CODE_WITH_HSP 16 |
| 475 | #define NUM_UNITS_KERNEL_DATA_WITH_HSP 5 |
| 476 | |
| 477 | /* |
| 478 | * Kernel data layout |
| 479 | */ |
| 480 | |
| 481 | #define DP_SHIFT_COUNT 7 |
| 482 | |
| 483 | #define KDATA_BASE_ADDR 0x1000 |
| 484 | #define KDATA_BASE_ADDR2 0x1080 |
| 485 | |
| 486 | #define KDATA_TASK0 (KDATA_BASE_ADDR + 0x0000) |
| 487 | #define KDATA_TASK1 (KDATA_BASE_ADDR + 0x0001) |
| 488 | #define KDATA_TASK2 (KDATA_BASE_ADDR + 0x0002) |
| 489 | #define KDATA_TASK3 (KDATA_BASE_ADDR + 0x0003) |
| 490 | #define KDATA_TASK4 (KDATA_BASE_ADDR + 0x0004) |
| 491 | #define KDATA_TASK5 (KDATA_BASE_ADDR + 0x0005) |
| 492 | #define KDATA_TASK6 (KDATA_BASE_ADDR + 0x0006) |
| 493 | #define KDATA_TASK7 (KDATA_BASE_ADDR + 0x0007) |
| 494 | #define KDATA_TASK_ENDMARK (KDATA_BASE_ADDR + 0x0008) |
| 495 | |
| 496 | #define KDATA_CURRENT_TASK (KDATA_BASE_ADDR + 0x0009) |
| 497 | #define KDATA_TASK_SWITCH (KDATA_BASE_ADDR + 0x000A) |
| 498 | |
| 499 | #define KDATA_INSTANCE0_POS3D (KDATA_BASE_ADDR + 0x000B) |
| 500 | #define KDATA_INSTANCE1_POS3D (KDATA_BASE_ADDR + 0x000C) |
| 501 | #define KDATA_INSTANCE2_POS3D (KDATA_BASE_ADDR + 0x000D) |
| 502 | #define KDATA_INSTANCE3_POS3D (KDATA_BASE_ADDR + 0x000E) |
| 503 | #define KDATA_INSTANCE4_POS3D (KDATA_BASE_ADDR + 0x000F) |
| 504 | #define KDATA_INSTANCE5_POS3D (KDATA_BASE_ADDR + 0x0010) |
| 505 | #define KDATA_INSTANCE6_POS3D (KDATA_BASE_ADDR + 0x0011) |
| 506 | #define KDATA_INSTANCE7_POS3D (KDATA_BASE_ADDR + 0x0012) |
| 507 | #define KDATA_INSTANCE8_POS3D (KDATA_BASE_ADDR + 0x0013) |
| 508 | #define KDATA_INSTANCE_POS3D_ENDMARK (KDATA_BASE_ADDR + 0x0014) |
| 509 | |
| 510 | #define KDATA_INSTANCE0_SPKVIRT (KDATA_BASE_ADDR + 0x0015) |
| 511 | #define KDATA_INSTANCE_SPKVIRT_ENDMARK (KDATA_BASE_ADDR + 0x0016) |
| 512 | |
| 513 | #define KDATA_INSTANCE0_SPDIF (KDATA_BASE_ADDR + 0x0017) |
| 514 | #define KDATA_INSTANCE_SPDIF_ENDMARK (KDATA_BASE_ADDR + 0x0018) |
| 515 | |
| 516 | #define KDATA_INSTANCE0_MODEM (KDATA_BASE_ADDR + 0x0019) |
| 517 | #define KDATA_INSTANCE_MODEM_ENDMARK (KDATA_BASE_ADDR + 0x001A) |
| 518 | |
| 519 | #define KDATA_INSTANCE0_SRC (KDATA_BASE_ADDR + 0x001B) |
| 520 | #define KDATA_INSTANCE1_SRC (KDATA_BASE_ADDR + 0x001C) |
| 521 | #define KDATA_INSTANCE_SRC_ENDMARK (KDATA_BASE_ADDR + 0x001D) |
| 522 | |
| 523 | #define KDATA_INSTANCE0_MINISRC (KDATA_BASE_ADDR + 0x001E) |
| 524 | #define KDATA_INSTANCE1_MINISRC (KDATA_BASE_ADDR + 0x001F) |
| 525 | #define KDATA_INSTANCE2_MINISRC (KDATA_BASE_ADDR + 0x0020) |
| 526 | #define KDATA_INSTANCE3_MINISRC (KDATA_BASE_ADDR + 0x0021) |
| 527 | #define KDATA_INSTANCE_MINISRC_ENDMARK (KDATA_BASE_ADDR + 0x0022) |
| 528 | |
| 529 | #define KDATA_INSTANCE0_CPYTHRU (KDATA_BASE_ADDR + 0x0023) |
| 530 | #define KDATA_INSTANCE1_CPYTHRU (KDATA_BASE_ADDR + 0x0024) |
| 531 | #define KDATA_INSTANCE_CPYTHRU_ENDMARK (KDATA_BASE_ADDR + 0x0025) |
| 532 | |
| 533 | #define KDATA_CURRENT_DMA (KDATA_BASE_ADDR + 0x0026) |
| 534 | #define KDATA_DMA_SWITCH (KDATA_BASE_ADDR + 0x0027) |
| 535 | #define KDATA_DMA_ACTIVE (KDATA_BASE_ADDR + 0x0028) |
| 536 | |
| 537 | #define KDATA_DMA_XFER0 (KDATA_BASE_ADDR + 0x0029) |
| 538 | #define KDATA_DMA_XFER1 (KDATA_BASE_ADDR + 0x002A) |
| 539 | #define KDATA_DMA_XFER2 (KDATA_BASE_ADDR + 0x002B) |
| 540 | #define KDATA_DMA_XFER3 (KDATA_BASE_ADDR + 0x002C) |
| 541 | #define KDATA_DMA_XFER4 (KDATA_BASE_ADDR + 0x002D) |
| 542 | #define KDATA_DMA_XFER5 (KDATA_BASE_ADDR + 0x002E) |
| 543 | #define KDATA_DMA_XFER6 (KDATA_BASE_ADDR + 0x002F) |
| 544 | #define KDATA_DMA_XFER7 (KDATA_BASE_ADDR + 0x0030) |
| 545 | #define KDATA_DMA_XFER8 (KDATA_BASE_ADDR + 0x0031) |
| 546 | #define KDATA_DMA_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0032) |
| 547 | |
| 548 | #define KDATA_I2S_SAMPLE_COUNT (KDATA_BASE_ADDR + 0x0033) |
| 549 | #define KDATA_I2S_INT_METER (KDATA_BASE_ADDR + 0x0034) |
| 550 | #define KDATA_I2S_ACTIVE (KDATA_BASE_ADDR + 0x0035) |
| 551 | |
| 552 | #define KDATA_TIMER_COUNT_RELOAD (KDATA_BASE_ADDR + 0x0036) |
| 553 | #define KDATA_TIMER_COUNT_CURRENT (KDATA_BASE_ADDR + 0x0037) |
| 554 | |
| 555 | #define KDATA_HALT_SYNCH_CLIENT (KDATA_BASE_ADDR + 0x0038) |
| 556 | #define KDATA_HALT_SYNCH_DMA (KDATA_BASE_ADDR + 0x0039) |
| 557 | #define KDATA_HALT_ACKNOWLEDGE (KDATA_BASE_ADDR + 0x003A) |
| 558 | |
| 559 | #define KDATA_ADC1_XFER0 (KDATA_BASE_ADDR + 0x003B) |
| 560 | #define KDATA_ADC1_XFER_ENDMARK (KDATA_BASE_ADDR + 0x003C) |
| 561 | #define KDATA_ADC1_LEFT_VOLUME (KDATA_BASE_ADDR + 0x003D) |
| 562 | #define KDATA_ADC1_RIGHT_VOLUME (KDATA_BASE_ADDR + 0x003E) |
| 563 | #define KDATA_ADC1_LEFT_SUR_VOL (KDATA_BASE_ADDR + 0x003F) |
| 564 | #define KDATA_ADC1_RIGHT_SUR_VOL (KDATA_BASE_ADDR + 0x0040) |
| 565 | |
| 566 | #define KDATA_ADC2_XFER0 (KDATA_BASE_ADDR + 0x0041) |
| 567 | #define KDATA_ADC2_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0042) |
| 568 | #define KDATA_ADC2_LEFT_VOLUME (KDATA_BASE_ADDR + 0x0043) |
| 569 | #define KDATA_ADC2_RIGHT_VOLUME (KDATA_BASE_ADDR + 0x0044) |
| 570 | #define KDATA_ADC2_LEFT_SUR_VOL (KDATA_BASE_ADDR + 0x0045) |
| 571 | #define KDATA_ADC2_RIGHT_SUR_VOL (KDATA_BASE_ADDR + 0x0046) |
| 572 | |
| 573 | #define KDATA_CD_XFER0 (KDATA_BASE_ADDR + 0x0047) |
| 574 | #define KDATA_CD_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0048) |
| 575 | #define KDATA_CD_LEFT_VOLUME (KDATA_BASE_ADDR + 0x0049) |
| 576 | #define KDATA_CD_RIGHT_VOLUME (KDATA_BASE_ADDR + 0x004A) |
| 577 | #define KDATA_CD_LEFT_SUR_VOL (KDATA_BASE_ADDR + 0x004B) |
| 578 | #define KDATA_CD_RIGHT_SUR_VOL (KDATA_BASE_ADDR + 0x004C) |
| 579 | |
| 580 | #define KDATA_MIC_XFER0 (KDATA_BASE_ADDR + 0x004D) |
| 581 | #define KDATA_MIC_XFER_ENDMARK (KDATA_BASE_ADDR + 0x004E) |
| 582 | #define KDATA_MIC_VOLUME (KDATA_BASE_ADDR + 0x004F) |
| 583 | #define KDATA_MIC_SUR_VOL (KDATA_BASE_ADDR + 0x0050) |
| 584 | |
| 585 | #define KDATA_I2S_XFER0 (KDATA_BASE_ADDR + 0x0051) |
| 586 | #define KDATA_I2S_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0052) |
| 587 | |
| 588 | #define KDATA_CHI_XFER0 (KDATA_BASE_ADDR + 0x0053) |
| 589 | #define KDATA_CHI_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0054) |
| 590 | |
| 591 | #define KDATA_SPDIF_XFER (KDATA_BASE_ADDR + 0x0055) |
| 592 | #define KDATA_SPDIF_CURRENT_FRAME (KDATA_BASE_ADDR + 0x0056) |
| 593 | #define KDATA_SPDIF_FRAME0 (KDATA_BASE_ADDR + 0x0057) |
| 594 | #define KDATA_SPDIF_FRAME1 (KDATA_BASE_ADDR + 0x0058) |
| 595 | #define KDATA_SPDIF_FRAME2 (KDATA_BASE_ADDR + 0x0059) |
| 596 | |
| 597 | #define KDATA_SPDIF_REQUEST (KDATA_BASE_ADDR + 0x005A) |
| 598 | #define KDATA_SPDIF_TEMP (KDATA_BASE_ADDR + 0x005B) |
| 599 | |
| 600 | #define KDATA_SPDIFIN_XFER0 (KDATA_BASE_ADDR + 0x005C) |
| 601 | #define KDATA_SPDIFIN_XFER_ENDMARK (KDATA_BASE_ADDR + 0x005D) |
| 602 | #define KDATA_SPDIFIN_INT_METER (KDATA_BASE_ADDR + 0x005E) |
| 603 | |
| 604 | #define KDATA_DSP_RESET_COUNT (KDATA_BASE_ADDR + 0x005F) |
| 605 | #define KDATA_DEBUG_OUTPUT (KDATA_BASE_ADDR + 0x0060) |
| 606 | |
| 607 | #define KDATA_KERNEL_ISR_LIST (KDATA_BASE_ADDR + 0x0061) |
| 608 | |
| 609 | #define KDATA_KERNEL_ISR_CBSR1 (KDATA_BASE_ADDR + 0x0062) |
| 610 | #define KDATA_KERNEL_ISR_CBER1 (KDATA_BASE_ADDR + 0x0063) |
| 611 | #define KDATA_KERNEL_ISR_CBCR (KDATA_BASE_ADDR + 0x0064) |
| 612 | #define KDATA_KERNEL_ISR_AR0 (KDATA_BASE_ADDR + 0x0065) |
| 613 | #define KDATA_KERNEL_ISR_AR1 (KDATA_BASE_ADDR + 0x0066) |
| 614 | #define KDATA_KERNEL_ISR_AR2 (KDATA_BASE_ADDR + 0x0067) |
| 615 | #define KDATA_KERNEL_ISR_AR3 (KDATA_BASE_ADDR + 0x0068) |
| 616 | #define KDATA_KERNEL_ISR_AR4 (KDATA_BASE_ADDR + 0x0069) |
| 617 | #define KDATA_KERNEL_ISR_AR5 (KDATA_BASE_ADDR + 0x006A) |
| 618 | #define KDATA_KERNEL_ISR_BRCR (KDATA_BASE_ADDR + 0x006B) |
| 619 | #define KDATA_KERNEL_ISR_PASR (KDATA_BASE_ADDR + 0x006C) |
| 620 | #define KDATA_KERNEL_ISR_PAER (KDATA_BASE_ADDR + 0x006D) |
| 621 | |
| 622 | #define KDATA_CLIENT_SCRATCH0 (KDATA_BASE_ADDR + 0x006E) |
| 623 | #define KDATA_CLIENT_SCRATCH1 (KDATA_BASE_ADDR + 0x006F) |
| 624 | #define KDATA_KERNEL_SCRATCH (KDATA_BASE_ADDR + 0x0070) |
| 625 | #define KDATA_KERNEL_ISR_SCRATCH (KDATA_BASE_ADDR + 0x0071) |
| 626 | |
| 627 | #define KDATA_OUEUE_LEFT (KDATA_BASE_ADDR + 0x0072) |
| 628 | #define KDATA_QUEUE_RIGHT (KDATA_BASE_ADDR + 0x0073) |
| 629 | |
| 630 | #define KDATA_ADC1_REQUEST (KDATA_BASE_ADDR + 0x0074) |
| 631 | #define KDATA_ADC2_REQUEST (KDATA_BASE_ADDR + 0x0075) |
| 632 | #define KDATA_CD_REQUEST (KDATA_BASE_ADDR + 0x0076) |
| 633 | #define KDATA_MIC_REQUEST (KDATA_BASE_ADDR + 0x0077) |
| 634 | |
| 635 | #define KDATA_ADC1_MIXER_REQUEST (KDATA_BASE_ADDR + 0x0078) |
| 636 | #define KDATA_ADC2_MIXER_REQUEST (KDATA_BASE_ADDR + 0x0079) |
| 637 | #define KDATA_CD_MIXER_REQUEST (KDATA_BASE_ADDR + 0x007A) |
| 638 | #define KDATA_MIC_MIXER_REQUEST (KDATA_BASE_ADDR + 0x007B) |
| 639 | #define KDATA_MIC_SYNC_COUNTER (KDATA_BASE_ADDR + 0x007C) |
| 640 | |
| 641 | /* |
| 642 | * second 'segment' (?) reserved for mixer |
| 643 | * buffers.. |
| 644 | */ |
| 645 | |
| 646 | #define KDATA_MIXER_WORD0 (KDATA_BASE_ADDR2 + 0x0000) |
| 647 | #define KDATA_MIXER_WORD1 (KDATA_BASE_ADDR2 + 0x0001) |
| 648 | #define KDATA_MIXER_WORD2 (KDATA_BASE_ADDR2 + 0x0002) |
| 649 | #define KDATA_MIXER_WORD3 (KDATA_BASE_ADDR2 + 0x0003) |
| 650 | #define KDATA_MIXER_WORD4 (KDATA_BASE_ADDR2 + 0x0004) |
| 651 | #define KDATA_MIXER_WORD5 (KDATA_BASE_ADDR2 + 0x0005) |
| 652 | #define KDATA_MIXER_WORD6 (KDATA_BASE_ADDR2 + 0x0006) |
| 653 | #define KDATA_MIXER_WORD7 (KDATA_BASE_ADDR2 + 0x0007) |
| 654 | #define KDATA_MIXER_WORD8 (KDATA_BASE_ADDR2 + 0x0008) |
| 655 | #define KDATA_MIXER_WORD9 (KDATA_BASE_ADDR2 + 0x0009) |
| 656 | #define KDATA_MIXER_WORDA (KDATA_BASE_ADDR2 + 0x000A) |
| 657 | #define KDATA_MIXER_WORDB (KDATA_BASE_ADDR2 + 0x000B) |
| 658 | #define KDATA_MIXER_WORDC (KDATA_BASE_ADDR2 + 0x000C) |
| 659 | #define KDATA_MIXER_WORDD (KDATA_BASE_ADDR2 + 0x000D) |
| 660 | #define KDATA_MIXER_WORDE (KDATA_BASE_ADDR2 + 0x000E) |
| 661 | #define KDATA_MIXER_WORDF (KDATA_BASE_ADDR2 + 0x000F) |
| 662 | |
| 663 | #define KDATA_MIXER_XFER0 (KDATA_BASE_ADDR2 + 0x0010) |
| 664 | #define KDATA_MIXER_XFER1 (KDATA_BASE_ADDR2 + 0x0011) |
| 665 | #define KDATA_MIXER_XFER2 (KDATA_BASE_ADDR2 + 0x0012) |
| 666 | #define KDATA_MIXER_XFER3 (KDATA_BASE_ADDR2 + 0x0013) |
| 667 | #define KDATA_MIXER_XFER4 (KDATA_BASE_ADDR2 + 0x0014) |
| 668 | #define KDATA_MIXER_XFER5 (KDATA_BASE_ADDR2 + 0x0015) |
| 669 | #define KDATA_MIXER_XFER6 (KDATA_BASE_ADDR2 + 0x0016) |
| 670 | #define KDATA_MIXER_XFER7 (KDATA_BASE_ADDR2 + 0x0017) |
| 671 | #define KDATA_MIXER_XFER8 (KDATA_BASE_ADDR2 + 0x0018) |
| 672 | #define KDATA_MIXER_XFER9 (KDATA_BASE_ADDR2 + 0x0019) |
| 673 | #define KDATA_MIXER_XFER_ENDMARK (KDATA_BASE_ADDR2 + 0x001A) |
| 674 | |
| 675 | #define KDATA_MIXER_TASK_NUMBER (KDATA_BASE_ADDR2 + 0x001B) |
| 676 | #define KDATA_CURRENT_MIXER (KDATA_BASE_ADDR2 + 0x001C) |
| 677 | #define KDATA_MIXER_ACTIVE (KDATA_BASE_ADDR2 + 0x001D) |
| 678 | #define KDATA_MIXER_BANK_STATUS (KDATA_BASE_ADDR2 + 0x001E) |
| 679 | #define KDATA_DAC_LEFT_VOLUME (KDATA_BASE_ADDR2 + 0x001F) |
| 680 | #define KDATA_DAC_RIGHT_VOLUME (KDATA_BASE_ADDR2 + 0x0020) |
| 681 | |
| 682 | #define MAX_INSTANCE_MINISRC (KDATA_INSTANCE_MINISRC_ENDMARK - KDATA_INSTANCE0_MINISRC) |
| 683 | #define MAX_VIRTUAL_DMA_CHANNELS (KDATA_DMA_XFER_ENDMARK - KDATA_DMA_XFER0) |
| 684 | #define MAX_VIRTUAL_MIXER_CHANNELS (KDATA_MIXER_XFER_ENDMARK - KDATA_MIXER_XFER0) |
| 685 | #define MAX_VIRTUAL_ADC1_CHANNELS (KDATA_ADC1_XFER_ENDMARK - KDATA_ADC1_XFER0) |
| 686 | |
| 687 | /* |
| 688 | * client data area offsets |
| 689 | */ |
| 690 | #define CDATA_INSTANCE_READY 0x00 |
| 691 | |
| 692 | #define CDATA_HOST_SRC_ADDRL 0x01 |
| 693 | #define CDATA_HOST_SRC_ADDRH 0x02 |
| 694 | #define CDATA_HOST_SRC_END_PLUS_1L 0x03 |
| 695 | #define CDATA_HOST_SRC_END_PLUS_1H 0x04 |
| 696 | #define CDATA_HOST_SRC_CURRENTL 0x05 |
| 697 | #define CDATA_HOST_SRC_CURRENTH 0x06 |
| 698 | |
| 699 | #define CDATA_IN_BUF_CONNECT 0x07 |
| 700 | #define CDATA_OUT_BUF_CONNECT 0x08 |
| 701 | |
| 702 | #define CDATA_IN_BUF_BEGIN 0x09 |
| 703 | #define CDATA_IN_BUF_END_PLUS_1 0x0A |
| 704 | #define CDATA_IN_BUF_HEAD 0x0B |
| 705 | #define CDATA_IN_BUF_TAIL 0x0C |
| 706 | #define CDATA_OUT_BUF_BEGIN 0x0D |
| 707 | #define CDATA_OUT_BUF_END_PLUS_1 0x0E |
| 708 | #define CDATA_OUT_BUF_HEAD 0x0F |
| 709 | #define CDATA_OUT_BUF_TAIL 0x10 |
| 710 | |
| 711 | #define CDATA_DMA_CONTROL 0x11 |
| 712 | #define CDATA_RESERVED 0x12 |
| 713 | |
| 714 | #define CDATA_FREQUENCY 0x13 |
| 715 | #define CDATA_LEFT_VOLUME 0x14 |
| 716 | #define CDATA_RIGHT_VOLUME 0x15 |
| 717 | #define CDATA_LEFT_SUR_VOL 0x16 |
| 718 | #define CDATA_RIGHT_SUR_VOL 0x17 |
| 719 | |
| 720 | #define CDATA_HEADER_LEN 0x18 |
| 721 | |
| 722 | #define SRC3_DIRECTION_OFFSET CDATA_HEADER_LEN |
| 723 | #define SRC3_MODE_OFFSET (CDATA_HEADER_LEN + 1) |
| 724 | #define SRC3_WORD_LENGTH_OFFSET (CDATA_HEADER_LEN + 2) |
| 725 | #define SRC3_PARAMETER_OFFSET (CDATA_HEADER_LEN + 3) |
| 726 | #define SRC3_COEFF_ADDR_OFFSET (CDATA_HEADER_LEN + 8) |
| 727 | #define SRC3_FILTAP_ADDR_OFFSET (CDATA_HEADER_LEN + 10) |
| 728 | #define SRC3_TEMP_INBUF_ADDR_OFFSET (CDATA_HEADER_LEN + 16) |
| 729 | #define SRC3_TEMP_OUTBUF_ADDR_OFFSET (CDATA_HEADER_LEN + 17) |
| 730 | |
| 731 | #define MINISRC_IN_BUFFER_SIZE ( 0x50 * 2 ) |
| 732 | #define MINISRC_OUT_BUFFER_SIZE ( 0x50 * 2 * 2) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 733 | #define MINISRC_TMP_BUFFER_SIZE ( 112 + ( MINISRC_BIQUAD_STAGE * 3 + 4 ) * 2 * 2 ) |
| 734 | #define MINISRC_BIQUAD_STAGE 2 |
| 735 | #define MINISRC_COEF_LOC 0x175 |
| 736 | |
| 737 | #define DMACONTROL_BLOCK_MASK 0x000F |
| 738 | #define DMAC_BLOCK0_SELECTOR 0x0000 |
| 739 | #define DMAC_BLOCK1_SELECTOR 0x0001 |
| 740 | #define DMAC_BLOCK2_SELECTOR 0x0002 |
| 741 | #define DMAC_BLOCK3_SELECTOR 0x0003 |
| 742 | #define DMAC_BLOCK4_SELECTOR 0x0004 |
| 743 | #define DMAC_BLOCK5_SELECTOR 0x0005 |
| 744 | #define DMAC_BLOCK6_SELECTOR 0x0006 |
| 745 | #define DMAC_BLOCK7_SELECTOR 0x0007 |
| 746 | #define DMAC_BLOCK8_SELECTOR 0x0008 |
| 747 | #define DMAC_BLOCK9_SELECTOR 0x0009 |
| 748 | #define DMAC_BLOCKA_SELECTOR 0x000A |
| 749 | #define DMAC_BLOCKB_SELECTOR 0x000B |
| 750 | #define DMAC_BLOCKC_SELECTOR 0x000C |
| 751 | #define DMAC_BLOCKD_SELECTOR 0x000D |
| 752 | #define DMAC_BLOCKE_SELECTOR 0x000E |
| 753 | #define DMAC_BLOCKF_SELECTOR 0x000F |
| 754 | #define DMACONTROL_PAGE_MASK 0x00F0 |
| 755 | #define DMAC_PAGE0_SELECTOR 0x0030 |
| 756 | #define DMAC_PAGE1_SELECTOR 0x0020 |
| 757 | #define DMAC_PAGE2_SELECTOR 0x0010 |
| 758 | #define DMAC_PAGE3_SELECTOR 0x0000 |
| 759 | #define DMACONTROL_AUTOREPEAT 0x1000 |
| 760 | #define DMACONTROL_STOPPED 0x2000 |
| 761 | #define DMACONTROL_DIRECTION 0x0100 |
| 762 | |
| 763 | /* |
| 764 | * an arbitrary volume we set the internal |
| 765 | * volume settings to so that the ac97 volume |
| 766 | * range is a little less insane. 0x7fff is |
| 767 | * max. |
| 768 | */ |
| 769 | #define ARB_VOLUME ( 0x6800 ) |
| 770 | |
| 771 | /* |
| 772 | */ |
| 773 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 774 | struct m3_list { |
| 775 | int curlen; |
| 776 | int mem_addr; |
| 777 | int max; |
| 778 | }; |
| 779 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 780 | struct m3_dma { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 781 | |
| 782 | int number; |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 783 | struct snd_pcm_substream *substream; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 784 | |
| 785 | struct assp_instance { |
| 786 | unsigned short code, data; |
| 787 | } inst; |
| 788 | |
| 789 | int running; |
| 790 | int opened; |
| 791 | |
| 792 | unsigned long buffer_addr; |
| 793 | int dma_size; |
| 794 | int period_size; |
| 795 | unsigned int hwptr; |
| 796 | int count; |
| 797 | |
| 798 | int index[3]; |
| 799 | struct m3_list *index_list[3]; |
| 800 | |
| 801 | int in_lists; |
| 802 | |
| 803 | struct list_head list; |
| 804 | |
| 805 | }; |
| 806 | |
| 807 | struct snd_m3 { |
| 808 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 809 | struct snd_card *card; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 810 | |
| 811 | unsigned long iobase; |
| 812 | |
| 813 | int irq; |
| 814 | unsigned int allegro_flag : 1; |
| 815 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 816 | struct snd_ac97 *ac97; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 817 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 818 | struct snd_pcm *pcm; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 819 | |
| 820 | struct pci_dev *pci; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 821 | |
| 822 | int dacs_active; |
| 823 | int timer_users; |
| 824 | |
| 825 | struct m3_list msrc_list; |
| 826 | struct m3_list mixer_list; |
| 827 | struct m3_list adc1_list; |
| 828 | struct m3_list dma_list; |
| 829 | |
| 830 | /* for storing reset state..*/ |
| 831 | u8 reset_state; |
| 832 | |
| 833 | int external_amp; |
Takashi Iwai | 1061eeb | 2006-11-24 15:36:46 +0100 | [diff] [blame] | 834 | int amp_gpio; /* gpio pin # for external amp, -1 = default */ |
| 835 | unsigned int hv_config; /* hardware-volume config bits */ |
| 836 | unsigned irda_workaround :1; /* avoid to touch 0x10 on GPIO_DIRECTION |
| 837 | (e.g. for IrDA on Dell Inspirons) */ |
| 838 | unsigned is_omnibook :1; /* Do HP OmniBook GPIO magic? */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 839 | |
| 840 | /* midi */ |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 841 | struct snd_rawmidi *rmidi; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 842 | |
| 843 | /* pcm streams */ |
| 844 | int num_substreams; |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 845 | struct m3_dma *substreams; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 846 | |
| 847 | spinlock_t reg_lock; |
| 848 | |
Hans de Goede | eb581ad | 2010-04-23 05:26:42 -0400 | [diff] [blame] | 849 | #ifdef CONFIG_SND_MAESTRO3_INPUT |
| 850 | struct input_dev *input_dev; |
| 851 | char phys[64]; /* physical device path */ |
| 852 | #else |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 853 | struct snd_kcontrol *master_switch; |
| 854 | struct snd_kcontrol *master_volume; |
Hans de Goede | eb581ad | 2010-04-23 05:26:42 -0400 | [diff] [blame] | 855 | #endif |
Takashi Iwai | 30bdee0 | 2011-06-14 13:57:02 +0200 | [diff] [blame] | 856 | struct work_struct hwvol_work; |
Hans de Goede | eb581ad | 2010-04-23 05:26:42 -0400 | [diff] [blame] | 857 | |
Hans de Goede | 715aa67 | 2010-04-21 11:04:08 -0400 | [diff] [blame] | 858 | unsigned int in_suspend; |
Ville Syrjala | 82f008c | 2005-05-20 18:40:38 +0200 | [diff] [blame] | 859 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 860 | #ifdef CONFIG_PM |
| 861 | u16 *suspend_mem; |
| 862 | #endif |
Clemens Ladisch | 81d7724 | 2006-11-06 09:26:41 +0100 | [diff] [blame] | 863 | |
| 864 | const struct firmware *assp_kernel_image; |
| 865 | const struct firmware *assp_minisrc_image; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 866 | }; |
| 867 | |
| 868 | /* |
| 869 | * pci ids |
| 870 | */ |
Alexey Dobriyan | cebe41d | 2010-02-06 00:21:03 +0200 | [diff] [blame] | 871 | static DEFINE_PCI_DEVICE_TABLE(snd_m3_ids) = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 872 | {PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_ALLEGRO_1, PCI_ANY_ID, PCI_ANY_ID, |
| 873 | PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0}, |
| 874 | {PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_ALLEGRO, PCI_ANY_ID, PCI_ANY_ID, |
| 875 | PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0}, |
| 876 | {PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_CANYON3D_2LE, PCI_ANY_ID, PCI_ANY_ID, |
| 877 | PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0}, |
| 878 | {PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_CANYON3D_2, PCI_ANY_ID, PCI_ANY_ID, |
| 879 | PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0}, |
| 880 | {PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_MAESTRO3, PCI_ANY_ID, PCI_ANY_ID, |
| 881 | PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0}, |
| 882 | {PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_MAESTRO3_1, PCI_ANY_ID, PCI_ANY_ID, |
| 883 | PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0}, |
| 884 | {PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_MAESTRO3_HW, PCI_ANY_ID, PCI_ANY_ID, |
| 885 | PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0}, |
| 886 | {PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_MAESTRO3_2, PCI_ANY_ID, PCI_ANY_ID, |
| 887 | PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0}, |
| 888 | {0,}, |
| 889 | }; |
| 890 | |
| 891 | MODULE_DEVICE_TABLE(pci, snd_m3_ids); |
| 892 | |
Takashi Iwai | 1061eeb | 2006-11-24 15:36:46 +0100 | [diff] [blame] | 893 | static struct snd_pci_quirk m3_amp_quirk_list[] __devinitdata = { |
Hans de Goede | 7efbfd1 | 2010-04-21 11:04:06 -0400 | [diff] [blame] | 894 | SND_PCI_QUIRK(0x0E11, 0x0094, "Compaq Evo N600c", 0x0c), |
Takashi Iwai | 1061eeb | 2006-11-24 15:36:46 +0100 | [diff] [blame] | 895 | SND_PCI_QUIRK(0x10f7, 0x833e, "Panasonic CF-28", 0x0d), |
| 896 | SND_PCI_QUIRK(0x10f7, 0x833d, "Panasonic CF-72", 0x0d), |
| 897 | SND_PCI_QUIRK(0x1033, 0x80f1, "NEC LM800J/7", 0x03), |
| 898 | SND_PCI_QUIRK(0x1509, 0x1740, "LEGEND ZhaoYang 3100CF", 0x03), |
| 899 | { } /* END */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 900 | }; |
| 901 | |
Takashi Iwai | 1061eeb | 2006-11-24 15:36:46 +0100 | [diff] [blame] | 902 | static struct snd_pci_quirk m3_irda_quirk_list[] __devinitdata = { |
| 903 | SND_PCI_QUIRK(0x1028, 0x00b0, "Dell Inspiron 4000", 1), |
| 904 | SND_PCI_QUIRK(0x1028, 0x00a4, "Dell Inspiron 8000", 1), |
| 905 | SND_PCI_QUIRK(0x1028, 0x00e6, "Dell Inspiron 8100", 1), |
| 906 | { } /* END */ |
| 907 | }; |
| 908 | |
| 909 | /* hardware volume quirks */ |
| 910 | static struct snd_pci_quirk m3_hv_quirk_list[] __devinitdata = { |
Ville Syrjala | 82f008c | 2005-05-20 18:40:38 +0200 | [diff] [blame] | 911 | /* Allegro chips */ |
Takashi Iwai | 1061eeb | 2006-11-24 15:36:46 +0100 | [diff] [blame] | 912 | SND_PCI_QUIRK(0x0E11, 0x002E, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 913 | SND_PCI_QUIRK(0x0E11, 0x0094, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 914 | SND_PCI_QUIRK(0x0E11, 0xB112, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 915 | SND_PCI_QUIRK(0x0E11, 0xB114, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 916 | SND_PCI_QUIRK(0x103C, 0x0012, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 917 | SND_PCI_QUIRK(0x103C, 0x0018, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 918 | SND_PCI_QUIRK(0x103C, 0x001C, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 919 | SND_PCI_QUIRK(0x103C, 0x001D, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 920 | SND_PCI_QUIRK(0x103C, 0x001E, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 921 | SND_PCI_QUIRK(0x107B, 0x3350, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 922 | SND_PCI_QUIRK(0x10F7, 0x8338, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 923 | SND_PCI_QUIRK(0x10F7, 0x833C, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 924 | SND_PCI_QUIRK(0x10F7, 0x833D, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 925 | SND_PCI_QUIRK(0x10F7, 0x833E, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 926 | SND_PCI_QUIRK(0x10F7, 0x833F, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 927 | SND_PCI_QUIRK(0x13BD, 0x1018, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 928 | SND_PCI_QUIRK(0x13BD, 0x1019, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 929 | SND_PCI_QUIRK(0x13BD, 0x101A, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 930 | SND_PCI_QUIRK(0x14FF, 0x0F03, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 931 | SND_PCI_QUIRK(0x14FF, 0x0F04, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 932 | SND_PCI_QUIRK(0x14FF, 0x0F05, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 933 | SND_PCI_QUIRK(0x156D, 0xB400, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 934 | SND_PCI_QUIRK(0x156D, 0xB795, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 935 | SND_PCI_QUIRK(0x156D, 0xB797, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 936 | SND_PCI_QUIRK(0x156D, 0xC700, NULL, HV_CTRL_ENABLE | HV_BUTTON_FROM_GD), |
| 937 | SND_PCI_QUIRK(0x1033, 0x80F1, NULL, |
| 938 | HV_CTRL_ENABLE | HV_BUTTON_FROM_GD | REDUCED_DEBOUNCE), |
| 939 | SND_PCI_QUIRK(0x103C, 0x001A, NULL, /* HP OmniBook 6100 */ |
| 940 | HV_CTRL_ENABLE | HV_BUTTON_FROM_GD | REDUCED_DEBOUNCE), |
| 941 | SND_PCI_QUIRK(0x107B, 0x340A, NULL, |
| 942 | HV_CTRL_ENABLE | HV_BUTTON_FROM_GD | REDUCED_DEBOUNCE), |
| 943 | SND_PCI_QUIRK(0x107B, 0x3450, NULL, |
| 944 | HV_CTRL_ENABLE | HV_BUTTON_FROM_GD | REDUCED_DEBOUNCE), |
| 945 | SND_PCI_QUIRK(0x109F, 0x3134, NULL, |
| 946 | HV_CTRL_ENABLE | HV_BUTTON_FROM_GD | REDUCED_DEBOUNCE), |
| 947 | SND_PCI_QUIRK(0x109F, 0x3161, NULL, |
| 948 | HV_CTRL_ENABLE | HV_BUTTON_FROM_GD | REDUCED_DEBOUNCE), |
| 949 | SND_PCI_QUIRK(0x144D, 0x3280, NULL, |
| 950 | HV_CTRL_ENABLE | HV_BUTTON_FROM_GD | REDUCED_DEBOUNCE), |
| 951 | SND_PCI_QUIRK(0x144D, 0x3281, NULL, |
| 952 | HV_CTRL_ENABLE | HV_BUTTON_FROM_GD | REDUCED_DEBOUNCE), |
| 953 | SND_PCI_QUIRK(0x144D, 0xC002, NULL, |
| 954 | HV_CTRL_ENABLE | HV_BUTTON_FROM_GD | REDUCED_DEBOUNCE), |
| 955 | SND_PCI_QUIRK(0x144D, 0xC003, NULL, |
| 956 | HV_CTRL_ENABLE | HV_BUTTON_FROM_GD | REDUCED_DEBOUNCE), |
| 957 | SND_PCI_QUIRK(0x1509, 0x1740, NULL, |
| 958 | HV_CTRL_ENABLE | HV_BUTTON_FROM_GD | REDUCED_DEBOUNCE), |
| 959 | SND_PCI_QUIRK(0x1610, 0x0010, NULL, |
| 960 | HV_CTRL_ENABLE | HV_BUTTON_FROM_GD | REDUCED_DEBOUNCE), |
| 961 | SND_PCI_QUIRK(0x1042, 0x1042, NULL, HV_CTRL_ENABLE), |
| 962 | SND_PCI_QUIRK(0x107B, 0x9500, NULL, HV_CTRL_ENABLE), |
| 963 | SND_PCI_QUIRK(0x14FF, 0x0F06, NULL, HV_CTRL_ENABLE), |
| 964 | SND_PCI_QUIRK(0x1558, 0x8586, NULL, HV_CTRL_ENABLE), |
| 965 | SND_PCI_QUIRK(0x161F, 0x2011, NULL, HV_CTRL_ENABLE), |
Ville Syrjala | 82f008c | 2005-05-20 18:40:38 +0200 | [diff] [blame] | 966 | /* Maestro3 chips */ |
Takashi Iwai | 1061eeb | 2006-11-24 15:36:46 +0100 | [diff] [blame] | 967 | SND_PCI_QUIRK(0x103C, 0x000E, NULL, HV_CTRL_ENABLE), |
| 968 | SND_PCI_QUIRK(0x103C, 0x0010, NULL, HV_CTRL_ENABLE), |
| 969 | SND_PCI_QUIRK(0x103C, 0x0011, NULL, HV_CTRL_ENABLE), |
| 970 | SND_PCI_QUIRK(0x103C, 0x001B, NULL, HV_CTRL_ENABLE), |
| 971 | SND_PCI_QUIRK(0x104D, 0x80A6, NULL, HV_CTRL_ENABLE), |
| 972 | SND_PCI_QUIRK(0x104D, 0x80AA, NULL, HV_CTRL_ENABLE), |
| 973 | SND_PCI_QUIRK(0x107B, 0x5300, NULL, HV_CTRL_ENABLE), |
| 974 | SND_PCI_QUIRK(0x110A, 0x1998, NULL, HV_CTRL_ENABLE), |
| 975 | SND_PCI_QUIRK(0x13BD, 0x1015, NULL, HV_CTRL_ENABLE), |
| 976 | SND_PCI_QUIRK(0x13BD, 0x101C, NULL, HV_CTRL_ENABLE), |
| 977 | SND_PCI_QUIRK(0x13BD, 0x1802, NULL, HV_CTRL_ENABLE), |
| 978 | SND_PCI_QUIRK(0x1599, 0x0715, NULL, HV_CTRL_ENABLE), |
| 979 | SND_PCI_QUIRK(0x5643, 0x5643, NULL, HV_CTRL_ENABLE), |
| 980 | SND_PCI_QUIRK(0x144D, 0x3260, NULL, HV_CTRL_ENABLE | REDUCED_DEBOUNCE), |
| 981 | SND_PCI_QUIRK(0x144D, 0x3261, NULL, HV_CTRL_ENABLE | REDUCED_DEBOUNCE), |
| 982 | SND_PCI_QUIRK(0x144D, 0xC000, NULL, HV_CTRL_ENABLE | REDUCED_DEBOUNCE), |
| 983 | SND_PCI_QUIRK(0x144D, 0xC001, NULL, HV_CTRL_ENABLE | REDUCED_DEBOUNCE), |
| 984 | { } /* END */ |
| 985 | }; |
| 986 | |
| 987 | /* HP Omnibook quirks */ |
| 988 | static struct snd_pci_quirk m3_omnibook_quirk_list[] __devinitdata = { |
| 989 | SND_PCI_QUIRK_ID(0x103c, 0x0010), /* HP OmniBook 6000 */ |
| 990 | SND_PCI_QUIRK_ID(0x103c, 0x0011), /* HP OmniBook 500 */ |
| 991 | { } /* END */ |
Ville Syrjala | 82f008c | 2005-05-20 18:40:38 +0200 | [diff] [blame] | 992 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 993 | |
| 994 | /* |
| 995 | * lowlevel functions |
| 996 | */ |
| 997 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 998 | static inline void snd_m3_outw(struct snd_m3 *chip, u16 value, unsigned long reg) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 999 | { |
| 1000 | outw(value, chip->iobase + reg); |
| 1001 | } |
| 1002 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1003 | static inline u16 snd_m3_inw(struct snd_m3 *chip, unsigned long reg) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1004 | { |
| 1005 | return inw(chip->iobase + reg); |
| 1006 | } |
| 1007 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1008 | static inline void snd_m3_outb(struct snd_m3 *chip, u8 value, unsigned long reg) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1009 | { |
| 1010 | outb(value, chip->iobase + reg); |
| 1011 | } |
| 1012 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1013 | static inline u8 snd_m3_inb(struct snd_m3 *chip, unsigned long reg) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1014 | { |
| 1015 | return inb(chip->iobase + reg); |
| 1016 | } |
| 1017 | |
| 1018 | /* |
| 1019 | * access 16bit words to the code or data regions of the dsp's memory. |
| 1020 | * index addresses 16bit words. |
| 1021 | */ |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1022 | static u16 snd_m3_assp_read(struct snd_m3 *chip, u16 region, u16 index) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1023 | { |
| 1024 | snd_m3_outw(chip, region & MEMTYPE_MASK, DSP_PORT_MEMORY_TYPE); |
| 1025 | snd_m3_outw(chip, index, DSP_PORT_MEMORY_INDEX); |
| 1026 | return snd_m3_inw(chip, DSP_PORT_MEMORY_DATA); |
| 1027 | } |
| 1028 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1029 | static void snd_m3_assp_write(struct snd_m3 *chip, u16 region, u16 index, u16 data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1030 | { |
| 1031 | snd_m3_outw(chip, region & MEMTYPE_MASK, DSP_PORT_MEMORY_TYPE); |
| 1032 | snd_m3_outw(chip, index, DSP_PORT_MEMORY_INDEX); |
| 1033 | snd_m3_outw(chip, data, DSP_PORT_MEMORY_DATA); |
| 1034 | } |
| 1035 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1036 | static void snd_m3_assp_halt(struct snd_m3 *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1037 | { |
| 1038 | chip->reset_state = snd_m3_inb(chip, DSP_PORT_CONTROL_REG_B) & ~REGB_STOP_CLOCK; |
Takashi Iwai | 5ba1e7b | 2005-06-30 13:47:58 +0200 | [diff] [blame] | 1039 | msleep(10); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1040 | snd_m3_outb(chip, chip->reset_state & ~REGB_ENABLE_RESET, DSP_PORT_CONTROL_REG_B); |
| 1041 | } |
| 1042 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1043 | static void snd_m3_assp_continue(struct snd_m3 *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1044 | { |
| 1045 | snd_m3_outb(chip, chip->reset_state | REGB_ENABLE_RESET, DSP_PORT_CONTROL_REG_B); |
| 1046 | } |
| 1047 | |
| 1048 | |
| 1049 | /* |
| 1050 | * This makes me sad. the maestro3 has lists |
| 1051 | * internally that must be packed.. 0 terminates, |
| 1052 | * apparently, or maybe all unused entries have |
| 1053 | * to be 0, the lists have static lengths set |
| 1054 | * by the binary code images. |
| 1055 | */ |
| 1056 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1057 | static int snd_m3_add_list(struct snd_m3 *chip, struct m3_list *list, u16 val) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1058 | { |
| 1059 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1060 | list->mem_addr + list->curlen, |
| 1061 | val); |
| 1062 | return list->curlen++; |
| 1063 | } |
| 1064 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1065 | static void snd_m3_remove_list(struct snd_m3 *chip, struct m3_list *list, int index) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1066 | { |
| 1067 | u16 val; |
| 1068 | int lastindex = list->curlen - 1; |
| 1069 | |
| 1070 | if (index != lastindex) { |
| 1071 | val = snd_m3_assp_read(chip, MEMTYPE_INTERNAL_DATA, |
| 1072 | list->mem_addr + lastindex); |
| 1073 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1074 | list->mem_addr + index, |
| 1075 | val); |
| 1076 | } |
| 1077 | |
| 1078 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1079 | list->mem_addr + lastindex, |
| 1080 | 0); |
| 1081 | |
| 1082 | list->curlen--; |
| 1083 | } |
| 1084 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1085 | static void snd_m3_inc_timer_users(struct snd_m3 *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1086 | { |
| 1087 | chip->timer_users++; |
| 1088 | if (chip->timer_users != 1) |
| 1089 | return; |
| 1090 | |
| 1091 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1092 | KDATA_TIMER_COUNT_RELOAD, |
| 1093 | 240); |
| 1094 | |
| 1095 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1096 | KDATA_TIMER_COUNT_CURRENT, |
| 1097 | 240); |
| 1098 | |
| 1099 | snd_m3_outw(chip, |
| 1100 | snd_m3_inw(chip, HOST_INT_CTRL) | CLKRUN_GEN_ENABLE, |
| 1101 | HOST_INT_CTRL); |
| 1102 | } |
| 1103 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1104 | static void snd_m3_dec_timer_users(struct snd_m3 *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1105 | { |
| 1106 | chip->timer_users--; |
| 1107 | if (chip->timer_users > 0) |
| 1108 | return; |
| 1109 | |
| 1110 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1111 | KDATA_TIMER_COUNT_RELOAD, |
| 1112 | 0); |
| 1113 | |
| 1114 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1115 | KDATA_TIMER_COUNT_CURRENT, |
| 1116 | 0); |
| 1117 | |
| 1118 | snd_m3_outw(chip, |
| 1119 | snd_m3_inw(chip, HOST_INT_CTRL) & ~CLKRUN_GEN_ENABLE, |
| 1120 | HOST_INT_CTRL); |
| 1121 | } |
| 1122 | |
| 1123 | /* |
| 1124 | * start/stop |
| 1125 | */ |
| 1126 | |
| 1127 | /* spinlock held! */ |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1128 | static int snd_m3_pcm_start(struct snd_m3 *chip, struct m3_dma *s, |
| 1129 | struct snd_pcm_substream *subs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1130 | { |
| 1131 | if (! s || ! subs) |
| 1132 | return -EINVAL; |
| 1133 | |
| 1134 | snd_m3_inc_timer_users(chip); |
| 1135 | switch (subs->stream) { |
| 1136 | case SNDRV_PCM_STREAM_PLAYBACK: |
| 1137 | chip->dacs_active++; |
| 1138 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1139 | s->inst.data + CDATA_INSTANCE_READY, 1); |
| 1140 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1141 | KDATA_MIXER_TASK_NUMBER, |
| 1142 | chip->dacs_active); |
| 1143 | break; |
| 1144 | case SNDRV_PCM_STREAM_CAPTURE: |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1145 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1146 | KDATA_ADC1_REQUEST, 1); |
| 1147 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1148 | s->inst.data + CDATA_INSTANCE_READY, 1); |
| 1149 | break; |
| 1150 | } |
| 1151 | return 0; |
| 1152 | } |
| 1153 | |
| 1154 | /* spinlock held! */ |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1155 | static int snd_m3_pcm_stop(struct snd_m3 *chip, struct m3_dma *s, |
| 1156 | struct snd_pcm_substream *subs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1157 | { |
| 1158 | if (! s || ! subs) |
| 1159 | return -EINVAL; |
| 1160 | |
| 1161 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1162 | s->inst.data + CDATA_INSTANCE_READY, 0); |
| 1163 | snd_m3_dec_timer_users(chip); |
| 1164 | switch (subs->stream) { |
| 1165 | case SNDRV_PCM_STREAM_PLAYBACK: |
| 1166 | chip->dacs_active--; |
| 1167 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1168 | KDATA_MIXER_TASK_NUMBER, |
| 1169 | chip->dacs_active); |
| 1170 | break; |
| 1171 | case SNDRV_PCM_STREAM_CAPTURE: |
| 1172 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1173 | KDATA_ADC1_REQUEST, 0); |
| 1174 | break; |
| 1175 | } |
| 1176 | return 0; |
| 1177 | } |
| 1178 | |
| 1179 | static int |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1180 | snd_m3_pcm_trigger(struct snd_pcm_substream *subs, int cmd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1181 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1182 | struct snd_m3 *chip = snd_pcm_substream_chip(subs); |
| 1183 | struct m3_dma *s = subs->runtime->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1184 | int err = -EINVAL; |
| 1185 | |
Takashi Iwai | da3cec3 | 2008-08-08 17:12:14 +0200 | [diff] [blame] | 1186 | if (snd_BUG_ON(!s)) |
| 1187 | return -ENXIO; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1188 | |
| 1189 | spin_lock(&chip->reg_lock); |
| 1190 | switch (cmd) { |
| 1191 | case SNDRV_PCM_TRIGGER_START: |
| 1192 | case SNDRV_PCM_TRIGGER_RESUME: |
| 1193 | if (s->running) |
| 1194 | err = -EBUSY; |
| 1195 | else { |
| 1196 | s->running = 1; |
| 1197 | err = snd_m3_pcm_start(chip, s, subs); |
| 1198 | } |
| 1199 | break; |
| 1200 | case SNDRV_PCM_TRIGGER_STOP: |
| 1201 | case SNDRV_PCM_TRIGGER_SUSPEND: |
| 1202 | if (! s->running) |
| 1203 | err = 0; /* should return error? */ |
| 1204 | else { |
| 1205 | s->running = 0; |
| 1206 | err = snd_m3_pcm_stop(chip, s, subs); |
| 1207 | } |
| 1208 | break; |
| 1209 | } |
| 1210 | spin_unlock(&chip->reg_lock); |
| 1211 | return err; |
| 1212 | } |
| 1213 | |
| 1214 | /* |
| 1215 | * setup |
| 1216 | */ |
| 1217 | static void |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1218 | snd_m3_pcm_setup1(struct snd_m3 *chip, struct m3_dma *s, struct snd_pcm_substream *subs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1219 | { |
| 1220 | int dsp_in_size, dsp_out_size, dsp_in_buffer, dsp_out_buffer; |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1221 | struct snd_pcm_runtime *runtime = subs->runtime; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1222 | |
| 1223 | if (subs->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 1224 | dsp_in_size = MINISRC_IN_BUFFER_SIZE - (0x20 * 2); |
| 1225 | dsp_out_size = MINISRC_OUT_BUFFER_SIZE - (0x20 * 2); |
| 1226 | } else { |
| 1227 | dsp_in_size = MINISRC_IN_BUFFER_SIZE - (0x10 * 2); |
| 1228 | dsp_out_size = MINISRC_OUT_BUFFER_SIZE - (0x10 * 2); |
| 1229 | } |
| 1230 | dsp_in_buffer = s->inst.data + (MINISRC_TMP_BUFFER_SIZE / 2); |
| 1231 | dsp_out_buffer = dsp_in_buffer + (dsp_in_size / 2) + 1; |
| 1232 | |
| 1233 | s->dma_size = frames_to_bytes(runtime, runtime->buffer_size); |
| 1234 | s->period_size = frames_to_bytes(runtime, runtime->period_size); |
| 1235 | s->hwptr = 0; |
| 1236 | s->count = 0; |
| 1237 | |
| 1238 | #define LO(x) ((x) & 0xffff) |
| 1239 | #define HI(x) LO((x) >> 16) |
| 1240 | |
| 1241 | /* host dma buffer pointers */ |
| 1242 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1243 | s->inst.data + CDATA_HOST_SRC_ADDRL, |
| 1244 | LO(s->buffer_addr)); |
| 1245 | |
| 1246 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1247 | s->inst.data + CDATA_HOST_SRC_ADDRH, |
| 1248 | HI(s->buffer_addr)); |
| 1249 | |
| 1250 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1251 | s->inst.data + CDATA_HOST_SRC_END_PLUS_1L, |
| 1252 | LO(s->buffer_addr + s->dma_size)); |
| 1253 | |
| 1254 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1255 | s->inst.data + CDATA_HOST_SRC_END_PLUS_1H, |
| 1256 | HI(s->buffer_addr + s->dma_size)); |
| 1257 | |
| 1258 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1259 | s->inst.data + CDATA_HOST_SRC_CURRENTL, |
| 1260 | LO(s->buffer_addr)); |
| 1261 | |
| 1262 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1263 | s->inst.data + CDATA_HOST_SRC_CURRENTH, |
| 1264 | HI(s->buffer_addr)); |
| 1265 | #undef LO |
| 1266 | #undef HI |
| 1267 | |
| 1268 | /* dsp buffers */ |
| 1269 | |
| 1270 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1271 | s->inst.data + CDATA_IN_BUF_BEGIN, |
| 1272 | dsp_in_buffer); |
| 1273 | |
| 1274 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1275 | s->inst.data + CDATA_IN_BUF_END_PLUS_1, |
| 1276 | dsp_in_buffer + (dsp_in_size / 2)); |
| 1277 | |
| 1278 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1279 | s->inst.data + CDATA_IN_BUF_HEAD, |
| 1280 | dsp_in_buffer); |
| 1281 | |
| 1282 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1283 | s->inst.data + CDATA_IN_BUF_TAIL, |
| 1284 | dsp_in_buffer); |
| 1285 | |
| 1286 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1287 | s->inst.data + CDATA_OUT_BUF_BEGIN, |
| 1288 | dsp_out_buffer); |
| 1289 | |
| 1290 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1291 | s->inst.data + CDATA_OUT_BUF_END_PLUS_1, |
| 1292 | dsp_out_buffer + (dsp_out_size / 2)); |
| 1293 | |
| 1294 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1295 | s->inst.data + CDATA_OUT_BUF_HEAD, |
| 1296 | dsp_out_buffer); |
| 1297 | |
| 1298 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1299 | s->inst.data + CDATA_OUT_BUF_TAIL, |
| 1300 | dsp_out_buffer); |
| 1301 | } |
| 1302 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1303 | static void snd_m3_pcm_setup2(struct snd_m3 *chip, struct m3_dma *s, |
| 1304 | struct snd_pcm_runtime *runtime) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1305 | { |
| 1306 | u32 freq; |
| 1307 | |
| 1308 | /* |
| 1309 | * put us in the lists if we're not already there |
| 1310 | */ |
| 1311 | if (! s->in_lists) { |
| 1312 | s->index[0] = snd_m3_add_list(chip, s->index_list[0], |
| 1313 | s->inst.data >> DP_SHIFT_COUNT); |
| 1314 | s->index[1] = snd_m3_add_list(chip, s->index_list[1], |
| 1315 | s->inst.data >> DP_SHIFT_COUNT); |
| 1316 | s->index[2] = snd_m3_add_list(chip, s->index_list[2], |
| 1317 | s->inst.data >> DP_SHIFT_COUNT); |
| 1318 | s->in_lists = 1; |
| 1319 | } |
| 1320 | |
| 1321 | /* write to 'mono' word */ |
| 1322 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1323 | s->inst.data + SRC3_DIRECTION_OFFSET + 1, |
| 1324 | runtime->channels == 2 ? 0 : 1); |
| 1325 | /* write to '8bit' word */ |
| 1326 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1327 | s->inst.data + SRC3_DIRECTION_OFFSET + 2, |
| 1328 | snd_pcm_format_width(runtime->format) == 16 ? 0 : 1); |
| 1329 | |
| 1330 | /* set up dac/adc rate */ |
| 1331 | freq = ((runtime->rate << 15) + 24000 ) / 48000; |
| 1332 | if (freq) |
| 1333 | freq--; |
| 1334 | |
| 1335 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1336 | s->inst.data + CDATA_FREQUENCY, |
| 1337 | freq); |
| 1338 | } |
| 1339 | |
| 1340 | |
Andreas Mohr | 0b2dcd5 | 2006-03-28 12:56:14 +0200 | [diff] [blame] | 1341 | static const struct play_vals { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1342 | u16 addr, val; |
| 1343 | } pv[] = { |
| 1344 | {CDATA_LEFT_VOLUME, ARB_VOLUME}, |
| 1345 | {CDATA_RIGHT_VOLUME, ARB_VOLUME}, |
| 1346 | {SRC3_DIRECTION_OFFSET, 0} , |
| 1347 | /* +1, +2 are stereo/16 bit */ |
| 1348 | {SRC3_DIRECTION_OFFSET + 3, 0x0000}, /* fraction? */ |
| 1349 | {SRC3_DIRECTION_OFFSET + 4, 0}, /* first l */ |
| 1350 | {SRC3_DIRECTION_OFFSET + 5, 0}, /* first r */ |
| 1351 | {SRC3_DIRECTION_OFFSET + 6, 0}, /* second l */ |
| 1352 | {SRC3_DIRECTION_OFFSET + 7, 0}, /* second r */ |
| 1353 | {SRC3_DIRECTION_OFFSET + 8, 0}, /* delta l */ |
| 1354 | {SRC3_DIRECTION_OFFSET + 9, 0}, /* delta r */ |
| 1355 | {SRC3_DIRECTION_OFFSET + 10, 0x8000}, /* round */ |
| 1356 | {SRC3_DIRECTION_OFFSET + 11, 0xFF00}, /* higher bute mark */ |
| 1357 | {SRC3_DIRECTION_OFFSET + 13, 0}, /* temp0 */ |
| 1358 | {SRC3_DIRECTION_OFFSET + 14, 0}, /* c fraction */ |
| 1359 | {SRC3_DIRECTION_OFFSET + 15, 0}, /* counter */ |
| 1360 | {SRC3_DIRECTION_OFFSET + 16, 8}, /* numin */ |
| 1361 | {SRC3_DIRECTION_OFFSET + 17, 50*2}, /* numout */ |
| 1362 | {SRC3_DIRECTION_OFFSET + 18, MINISRC_BIQUAD_STAGE - 1}, /* numstage */ |
| 1363 | {SRC3_DIRECTION_OFFSET + 20, 0}, /* filtertap */ |
| 1364 | {SRC3_DIRECTION_OFFSET + 21, 0} /* booster */ |
| 1365 | }; |
| 1366 | |
| 1367 | |
| 1368 | /* the mode passed should be already shifted and masked */ |
| 1369 | static void |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1370 | snd_m3_playback_setup(struct snd_m3 *chip, struct m3_dma *s, |
| 1371 | struct snd_pcm_substream *subs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1372 | { |
| 1373 | unsigned int i; |
| 1374 | |
| 1375 | /* |
| 1376 | * some per client initializers |
| 1377 | */ |
| 1378 | |
| 1379 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1380 | s->inst.data + SRC3_DIRECTION_OFFSET + 12, |
| 1381 | s->inst.data + 40 + 8); |
| 1382 | |
| 1383 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1384 | s->inst.data + SRC3_DIRECTION_OFFSET + 19, |
| 1385 | s->inst.code + MINISRC_COEF_LOC); |
| 1386 | |
| 1387 | /* enable or disable low pass filter? */ |
| 1388 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1389 | s->inst.data + SRC3_DIRECTION_OFFSET + 22, |
| 1390 | subs->runtime->rate > 45000 ? 0xff : 0); |
| 1391 | |
| 1392 | /* tell it which way dma is going? */ |
| 1393 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1394 | s->inst.data + CDATA_DMA_CONTROL, |
| 1395 | DMACONTROL_AUTOREPEAT + DMAC_PAGE3_SELECTOR + DMAC_BLOCKF_SELECTOR); |
| 1396 | |
| 1397 | /* |
| 1398 | * set an armload of static initializers |
| 1399 | */ |
| 1400 | for (i = 0; i < ARRAY_SIZE(pv); i++) |
| 1401 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1402 | s->inst.data + pv[i].addr, pv[i].val); |
| 1403 | } |
| 1404 | |
| 1405 | /* |
| 1406 | * Native record driver |
| 1407 | */ |
Andreas Mohr | 0b2dcd5 | 2006-03-28 12:56:14 +0200 | [diff] [blame] | 1408 | static const struct rec_vals { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1409 | u16 addr, val; |
| 1410 | } rv[] = { |
| 1411 | {CDATA_LEFT_VOLUME, ARB_VOLUME}, |
| 1412 | {CDATA_RIGHT_VOLUME, ARB_VOLUME}, |
| 1413 | {SRC3_DIRECTION_OFFSET, 1} , |
| 1414 | /* +1, +2 are stereo/16 bit */ |
| 1415 | {SRC3_DIRECTION_OFFSET + 3, 0x0000}, /* fraction? */ |
| 1416 | {SRC3_DIRECTION_OFFSET + 4, 0}, /* first l */ |
| 1417 | {SRC3_DIRECTION_OFFSET + 5, 0}, /* first r */ |
| 1418 | {SRC3_DIRECTION_OFFSET + 6, 0}, /* second l */ |
| 1419 | {SRC3_DIRECTION_OFFSET + 7, 0}, /* second r */ |
| 1420 | {SRC3_DIRECTION_OFFSET + 8, 0}, /* delta l */ |
| 1421 | {SRC3_DIRECTION_OFFSET + 9, 0}, /* delta r */ |
| 1422 | {SRC3_DIRECTION_OFFSET + 10, 0x8000}, /* round */ |
| 1423 | {SRC3_DIRECTION_OFFSET + 11, 0xFF00}, /* higher bute mark */ |
| 1424 | {SRC3_DIRECTION_OFFSET + 13, 0}, /* temp0 */ |
| 1425 | {SRC3_DIRECTION_OFFSET + 14, 0}, /* c fraction */ |
| 1426 | {SRC3_DIRECTION_OFFSET + 15, 0}, /* counter */ |
| 1427 | {SRC3_DIRECTION_OFFSET + 16, 50},/* numin */ |
| 1428 | {SRC3_DIRECTION_OFFSET + 17, 8}, /* numout */ |
| 1429 | {SRC3_DIRECTION_OFFSET + 18, 0}, /* numstage */ |
| 1430 | {SRC3_DIRECTION_OFFSET + 19, 0}, /* coef */ |
| 1431 | {SRC3_DIRECTION_OFFSET + 20, 0}, /* filtertap */ |
| 1432 | {SRC3_DIRECTION_OFFSET + 21, 0}, /* booster */ |
| 1433 | {SRC3_DIRECTION_OFFSET + 22, 0xff} /* skip lpf */ |
| 1434 | }; |
| 1435 | |
| 1436 | static void |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1437 | snd_m3_capture_setup(struct snd_m3 *chip, struct m3_dma *s, struct snd_pcm_substream *subs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1438 | { |
| 1439 | unsigned int i; |
| 1440 | |
| 1441 | /* |
| 1442 | * some per client initializers |
| 1443 | */ |
| 1444 | |
| 1445 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1446 | s->inst.data + SRC3_DIRECTION_OFFSET + 12, |
| 1447 | s->inst.data + 40 + 8); |
| 1448 | |
| 1449 | /* tell it which way dma is going? */ |
| 1450 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1451 | s->inst.data + CDATA_DMA_CONTROL, |
| 1452 | DMACONTROL_DIRECTION + DMACONTROL_AUTOREPEAT + |
| 1453 | DMAC_PAGE3_SELECTOR + DMAC_BLOCKF_SELECTOR); |
| 1454 | |
| 1455 | /* |
| 1456 | * set an armload of static initializers |
| 1457 | */ |
| 1458 | for (i = 0; i < ARRAY_SIZE(rv); i++) |
| 1459 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 1460 | s->inst.data + rv[i].addr, rv[i].val); |
| 1461 | } |
| 1462 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1463 | static int snd_m3_pcm_hw_params(struct snd_pcm_substream *substream, |
| 1464 | struct snd_pcm_hw_params *hw_params) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1465 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1466 | struct m3_dma *s = substream->runtime->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1467 | int err; |
| 1468 | |
| 1469 | if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0) |
| 1470 | return err; |
| 1471 | /* set buffer address */ |
| 1472 | s->buffer_addr = substream->runtime->dma_addr; |
| 1473 | if (s->buffer_addr & 0x3) { |
Takashi Iwai | 99b359b | 2005-10-20 18:26:44 +0200 | [diff] [blame] | 1474 | snd_printk(KERN_ERR "oh my, not aligned\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1475 | s->buffer_addr = s->buffer_addr & ~0x3; |
| 1476 | } |
| 1477 | return 0; |
| 1478 | } |
| 1479 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1480 | static int snd_m3_pcm_hw_free(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1481 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1482 | struct m3_dma *s; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1483 | |
| 1484 | if (substream->runtime->private_data == NULL) |
| 1485 | return 0; |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1486 | s = substream->runtime->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1487 | snd_pcm_lib_free_pages(substream); |
| 1488 | s->buffer_addr = 0; |
| 1489 | return 0; |
| 1490 | } |
| 1491 | |
| 1492 | static int |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1493 | snd_m3_pcm_prepare(struct snd_pcm_substream *subs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1494 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1495 | struct snd_m3 *chip = snd_pcm_substream_chip(subs); |
| 1496 | struct snd_pcm_runtime *runtime = subs->runtime; |
| 1497 | struct m3_dma *s = runtime->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1498 | |
Takashi Iwai | da3cec3 | 2008-08-08 17:12:14 +0200 | [diff] [blame] | 1499 | if (snd_BUG_ON(!s)) |
| 1500 | return -ENXIO; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1501 | |
| 1502 | if (runtime->format != SNDRV_PCM_FORMAT_U8 && |
| 1503 | runtime->format != SNDRV_PCM_FORMAT_S16_LE) |
| 1504 | return -EINVAL; |
| 1505 | if (runtime->rate > 48000 || |
| 1506 | runtime->rate < 8000) |
| 1507 | return -EINVAL; |
| 1508 | |
| 1509 | spin_lock_irq(&chip->reg_lock); |
| 1510 | |
| 1511 | snd_m3_pcm_setup1(chip, s, subs); |
| 1512 | |
| 1513 | if (subs->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| 1514 | snd_m3_playback_setup(chip, s, subs); |
| 1515 | else |
| 1516 | snd_m3_capture_setup(chip, s, subs); |
| 1517 | |
| 1518 | snd_m3_pcm_setup2(chip, s, runtime); |
| 1519 | |
| 1520 | spin_unlock_irq(&chip->reg_lock); |
| 1521 | |
| 1522 | return 0; |
| 1523 | } |
| 1524 | |
| 1525 | /* |
| 1526 | * get current pointer |
| 1527 | */ |
| 1528 | static unsigned int |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1529 | snd_m3_get_pointer(struct snd_m3 *chip, struct m3_dma *s, struct snd_pcm_substream *subs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1530 | { |
| 1531 | u16 hi = 0, lo = 0; |
| 1532 | int retry = 10; |
| 1533 | u32 addr; |
| 1534 | |
| 1535 | /* |
| 1536 | * try and get a valid answer |
| 1537 | */ |
| 1538 | while (retry--) { |
| 1539 | hi = snd_m3_assp_read(chip, MEMTYPE_INTERNAL_DATA, |
| 1540 | s->inst.data + CDATA_HOST_SRC_CURRENTH); |
| 1541 | |
| 1542 | lo = snd_m3_assp_read(chip, MEMTYPE_INTERNAL_DATA, |
| 1543 | s->inst.data + CDATA_HOST_SRC_CURRENTL); |
| 1544 | |
| 1545 | if (hi == snd_m3_assp_read(chip, MEMTYPE_INTERNAL_DATA, |
| 1546 | s->inst.data + CDATA_HOST_SRC_CURRENTH)) |
| 1547 | break; |
| 1548 | } |
| 1549 | addr = lo | ((u32)hi<<16); |
| 1550 | return (unsigned int)(addr - s->buffer_addr); |
| 1551 | } |
| 1552 | |
| 1553 | static snd_pcm_uframes_t |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1554 | snd_m3_pcm_pointer(struct snd_pcm_substream *subs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1555 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1556 | struct snd_m3 *chip = snd_pcm_substream_chip(subs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1557 | unsigned int ptr; |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1558 | struct m3_dma *s = subs->runtime->private_data; |
Takashi Iwai | da3cec3 | 2008-08-08 17:12:14 +0200 | [diff] [blame] | 1559 | |
| 1560 | if (snd_BUG_ON(!s)) |
| 1561 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1562 | |
| 1563 | spin_lock(&chip->reg_lock); |
| 1564 | ptr = snd_m3_get_pointer(chip, s, subs); |
| 1565 | spin_unlock(&chip->reg_lock); |
| 1566 | return bytes_to_frames(subs->runtime, ptr); |
| 1567 | } |
| 1568 | |
| 1569 | |
| 1570 | /* update pointer */ |
| 1571 | /* spinlock held! */ |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1572 | static void snd_m3_update_ptr(struct snd_m3 *chip, struct m3_dma *s) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1573 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1574 | struct snd_pcm_substream *subs = s->substream; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1575 | unsigned int hwptr; |
| 1576 | int diff; |
| 1577 | |
| 1578 | if (! s->running) |
| 1579 | return; |
| 1580 | |
Andreas Mohr | 0b2dcd5 | 2006-03-28 12:56:14 +0200 | [diff] [blame] | 1581 | hwptr = snd_m3_get_pointer(chip, s, subs); |
| 1582 | |
| 1583 | /* try to avoid expensive modulo divisions */ |
| 1584 | if (hwptr >= s->dma_size) |
| 1585 | hwptr %= s->dma_size; |
| 1586 | |
| 1587 | diff = s->dma_size + hwptr - s->hwptr; |
| 1588 | if (diff >= s->dma_size) |
| 1589 | diff %= s->dma_size; |
| 1590 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1591 | s->hwptr = hwptr; |
| 1592 | s->count += diff; |
Andreas Mohr | 0b2dcd5 | 2006-03-28 12:56:14 +0200 | [diff] [blame] | 1593 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1594 | if (s->count >= (signed)s->period_size) { |
Andreas Mohr | 0b2dcd5 | 2006-03-28 12:56:14 +0200 | [diff] [blame] | 1595 | |
| 1596 | if (s->count < 2 * (signed)s->period_size) |
| 1597 | s->count -= (signed)s->period_size; |
| 1598 | else |
| 1599 | s->count %= s->period_size; |
| 1600 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1601 | spin_unlock(&chip->reg_lock); |
| 1602 | snd_pcm_period_elapsed(subs); |
| 1603 | spin_lock(&chip->reg_lock); |
| 1604 | } |
| 1605 | } |
| 1606 | |
Hans de Goede | 20133d4 | 2010-04-21 11:04:07 -0400 | [diff] [blame] | 1607 | /* The m3's hardware volume works by incrementing / decrementing 2 counters |
| 1608 | (without wrap around) in response to volume button presses and then |
| 1609 | generating an interrupt. The pair of counters is stored in bits 1-3 and 5-7 |
| 1610 | of a byte wide register. The meaning of bits 0 and 4 is unknown. */ |
Takashi Iwai | 30bdee0 | 2011-06-14 13:57:02 +0200 | [diff] [blame] | 1611 | static void snd_m3_update_hw_volume(struct work_struct *work) |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1612 | { |
Takashi Iwai | 30bdee0 | 2011-06-14 13:57:02 +0200 | [diff] [blame] | 1613 | struct snd_m3 *chip = container_of(work, struct snd_m3, hwvol_work); |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1614 | int x, val; |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1615 | |
| 1616 | /* Figure out which volume control button was pushed, |
| 1617 | based on differences from the default register |
| 1618 | values. */ |
| 1619 | x = inb(chip->iobase + SHADOW_MIX_REG_VOICE) & 0xee; |
| 1620 | |
Hans de Goede | 20133d4 | 2010-04-21 11:04:07 -0400 | [diff] [blame] | 1621 | /* Reset the volume counters to 4. Tests on the allegro integrated |
| 1622 | into a Compaq N600C laptop, have revealed that: |
| 1623 | 1) Writing any value will result in the 2 counters being reset to |
| 1624 | 4 so writing 0x88 is not strictly necessary |
| 1625 | 2) Writing to any of the 4 involved registers will reset all 4 |
| 1626 | of them (and reading them always returns the same value for all |
| 1627 | of them) |
| 1628 | It could be that a maestro deviates from this, so leave the code |
| 1629 | as is. */ |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1630 | outb(0x88, chip->iobase + SHADOW_MIX_REG_VOICE); |
| 1631 | outb(0x88, chip->iobase + HW_VOL_COUNTER_VOICE); |
| 1632 | outb(0x88, chip->iobase + SHADOW_MIX_REG_MASTER); |
| 1633 | outb(0x88, chip->iobase + HW_VOL_COUNTER_MASTER); |
| 1634 | |
Hans de Goede | 715aa67 | 2010-04-21 11:04:08 -0400 | [diff] [blame] | 1635 | /* Ignore spurious HV interrupts during suspend / resume, this avoids |
| 1636 | mistaking them for a mute button press. */ |
| 1637 | if (chip->in_suspend) |
| 1638 | return; |
| 1639 | |
Hans de Goede | eb581ad | 2010-04-23 05:26:42 -0400 | [diff] [blame] | 1640 | #ifndef CONFIG_SND_MAESTRO3_INPUT |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1641 | if (!chip->master_switch || !chip->master_volume) |
| 1642 | return; |
| 1643 | |
Takashi Iwai | 30bdee0 | 2011-06-14 13:57:02 +0200 | [diff] [blame] | 1644 | val = snd_ac97_read(chip->ac97, AC97_MASTER); |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1645 | switch (x) { |
| 1646 | case 0x88: |
Hans de Goede | 20133d4 | 2010-04-21 11:04:07 -0400 | [diff] [blame] | 1647 | /* The counters have not changed, yet we've received a HV |
| 1648 | interrupt. According to tests run by various people this |
| 1649 | happens when pressing the mute button. */ |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1650 | val ^= 0x8000; |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1651 | break; |
| 1652 | case 0xaa: |
Hans de Goede | 20133d4 | 2010-04-21 11:04:07 -0400 | [diff] [blame] | 1653 | /* counters increased by 1 -> volume up */ |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1654 | if ((val & 0x7f) > 0) |
| 1655 | val--; |
| 1656 | if ((val & 0x7f00) > 0) |
| 1657 | val -= 0x0100; |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1658 | break; |
| 1659 | case 0x66: |
Hans de Goede | 20133d4 | 2010-04-21 11:04:07 -0400 | [diff] [blame] | 1660 | /* counters decreased by 1 -> volume down */ |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1661 | if ((val & 0x7f) < 0x1f) |
| 1662 | val++; |
| 1663 | if ((val & 0x7f00) < 0x1f00) |
| 1664 | val += 0x0100; |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1665 | break; |
| 1666 | } |
Takashi Iwai | 30bdee0 | 2011-06-14 13:57:02 +0200 | [diff] [blame] | 1667 | if (snd_ac97_update(chip->ac97, AC97_MASTER, val)) |
| 1668 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, |
| 1669 | &chip->master_switch->id); |
Hans de Goede | eb581ad | 2010-04-23 05:26:42 -0400 | [diff] [blame] | 1670 | #else |
| 1671 | if (!chip->input_dev) |
| 1672 | return; |
| 1673 | |
| 1674 | val = 0; |
| 1675 | switch (x) { |
| 1676 | case 0x88: |
| 1677 | /* The counters have not changed, yet we've received a HV |
| 1678 | interrupt. According to tests run by various people this |
| 1679 | happens when pressing the mute button. */ |
| 1680 | val = KEY_MUTE; |
| 1681 | break; |
| 1682 | case 0xaa: |
| 1683 | /* counters increased by 1 -> volume up */ |
| 1684 | val = KEY_VOLUMEUP; |
| 1685 | break; |
| 1686 | case 0x66: |
| 1687 | /* counters decreased by 1 -> volume down */ |
| 1688 | val = KEY_VOLUMEDOWN; |
| 1689 | break; |
| 1690 | } |
| 1691 | |
| 1692 | if (val) { |
| 1693 | input_report_key(chip->input_dev, val, 1); |
| 1694 | input_sync(chip->input_dev); |
| 1695 | input_report_key(chip->input_dev, val, 0); |
| 1696 | input_sync(chip->input_dev); |
| 1697 | } |
| 1698 | #endif |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1699 | } |
| 1700 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 1701 | static irqreturn_t snd_m3_interrupt(int irq, void *dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1702 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1703 | struct snd_m3 *chip = dev_id; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1704 | u8 status; |
| 1705 | int i; |
| 1706 | |
| 1707 | status = inb(chip->iobase + HOST_INT_STATUS); |
| 1708 | |
| 1709 | if (status == 0xff) |
| 1710 | return IRQ_NONE; |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1711 | |
| 1712 | if (status & HV_INT_PENDING) |
Takashi Iwai | 30bdee0 | 2011-06-14 13:57:02 +0200 | [diff] [blame] | 1713 | schedule_work(&chip->hwvol_work); |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1714 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1715 | /* |
| 1716 | * ack an assp int if its running |
| 1717 | * and has an int pending |
| 1718 | */ |
| 1719 | if (status & ASSP_INT_PENDING) { |
| 1720 | u8 ctl = inb(chip->iobase + ASSP_CONTROL_B); |
| 1721 | if (!(ctl & STOP_ASSP_CLOCK)) { |
| 1722 | ctl = inb(chip->iobase + ASSP_HOST_INT_STATUS); |
| 1723 | if (ctl & DSP2HOST_REQ_TIMER) { |
| 1724 | outb(DSP2HOST_REQ_TIMER, chip->iobase + ASSP_HOST_INT_STATUS); |
| 1725 | /* update adc/dac info if it was a timer int */ |
| 1726 | spin_lock(&chip->reg_lock); |
| 1727 | for (i = 0; i < chip->num_substreams; i++) { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1728 | struct m3_dma *s = &chip->substreams[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1729 | if (s->running) |
| 1730 | snd_m3_update_ptr(chip, s); |
| 1731 | } |
| 1732 | spin_unlock(&chip->reg_lock); |
| 1733 | } |
| 1734 | } |
| 1735 | } |
| 1736 | |
| 1737 | #if 0 /* TODO: not supported yet */ |
| 1738 | if ((status & MPU401_INT_PENDING) && chip->rmidi) |
| 1739 | snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs); |
| 1740 | #endif |
| 1741 | |
| 1742 | /* ack ints */ |
Ville Syrjala | 8849138 | 2005-05-12 14:14:28 +0200 | [diff] [blame] | 1743 | outb(status, chip->iobase + HOST_INT_STATUS); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1744 | |
| 1745 | return IRQ_HANDLED; |
| 1746 | } |
| 1747 | |
| 1748 | |
| 1749 | /* |
| 1750 | */ |
| 1751 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1752 | static struct snd_pcm_hardware snd_m3_playback = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1753 | { |
| 1754 | .info = (SNDRV_PCM_INFO_MMAP | |
| 1755 | SNDRV_PCM_INFO_INTERLEAVED | |
| 1756 | SNDRV_PCM_INFO_MMAP_VALID | |
| 1757 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
| 1758 | /*SNDRV_PCM_INFO_PAUSE |*/ |
| 1759 | SNDRV_PCM_INFO_RESUME), |
| 1760 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, |
| 1761 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, |
| 1762 | .rate_min = 8000, |
| 1763 | .rate_max = 48000, |
| 1764 | .channels_min = 1, |
| 1765 | .channels_max = 2, |
| 1766 | .buffer_bytes_max = (512*1024), |
| 1767 | .period_bytes_min = 64, |
| 1768 | .period_bytes_max = (512*1024), |
| 1769 | .periods_min = 1, |
| 1770 | .periods_max = 1024, |
| 1771 | }; |
| 1772 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1773 | static struct snd_pcm_hardware snd_m3_capture = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1774 | { |
| 1775 | .info = (SNDRV_PCM_INFO_MMAP | |
| 1776 | SNDRV_PCM_INFO_INTERLEAVED | |
| 1777 | SNDRV_PCM_INFO_MMAP_VALID | |
| 1778 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
| 1779 | /*SNDRV_PCM_INFO_PAUSE |*/ |
| 1780 | SNDRV_PCM_INFO_RESUME), |
| 1781 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, |
| 1782 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, |
| 1783 | .rate_min = 8000, |
| 1784 | .rate_max = 48000, |
| 1785 | .channels_min = 1, |
| 1786 | .channels_max = 2, |
| 1787 | .buffer_bytes_max = (512*1024), |
| 1788 | .period_bytes_min = 64, |
| 1789 | .period_bytes_max = (512*1024), |
| 1790 | .periods_min = 1, |
| 1791 | .periods_max = 1024, |
| 1792 | }; |
| 1793 | |
| 1794 | |
| 1795 | /* |
| 1796 | */ |
| 1797 | |
| 1798 | static int |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1799 | snd_m3_substream_open(struct snd_m3 *chip, struct snd_pcm_substream *subs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1800 | { |
| 1801 | int i; |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1802 | struct m3_dma *s; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1803 | |
| 1804 | spin_lock_irq(&chip->reg_lock); |
| 1805 | for (i = 0; i < chip->num_substreams; i++) { |
| 1806 | s = &chip->substreams[i]; |
| 1807 | if (! s->opened) |
| 1808 | goto __found; |
| 1809 | } |
| 1810 | spin_unlock_irq(&chip->reg_lock); |
| 1811 | return -ENOMEM; |
| 1812 | __found: |
| 1813 | s->opened = 1; |
| 1814 | s->running = 0; |
| 1815 | spin_unlock_irq(&chip->reg_lock); |
| 1816 | |
| 1817 | subs->runtime->private_data = s; |
| 1818 | s->substream = subs; |
| 1819 | |
| 1820 | /* set list owners */ |
| 1821 | if (subs->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 1822 | s->index_list[0] = &chip->mixer_list; |
| 1823 | } else |
| 1824 | s->index_list[0] = &chip->adc1_list; |
| 1825 | s->index_list[1] = &chip->msrc_list; |
| 1826 | s->index_list[2] = &chip->dma_list; |
| 1827 | |
| 1828 | return 0; |
| 1829 | } |
| 1830 | |
| 1831 | static void |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1832 | snd_m3_substream_close(struct snd_m3 *chip, struct snd_pcm_substream *subs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1833 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1834 | struct m3_dma *s = subs->runtime->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1835 | |
| 1836 | if (s == NULL) |
| 1837 | return; /* not opened properly */ |
| 1838 | |
| 1839 | spin_lock_irq(&chip->reg_lock); |
| 1840 | if (s->substream && s->running) |
| 1841 | snd_m3_pcm_stop(chip, s, s->substream); /* does this happen? */ |
| 1842 | if (s->in_lists) { |
| 1843 | snd_m3_remove_list(chip, s->index_list[0], s->index[0]); |
| 1844 | snd_m3_remove_list(chip, s->index_list[1], s->index[1]); |
| 1845 | snd_m3_remove_list(chip, s->index_list[2], s->index[2]); |
| 1846 | s->in_lists = 0; |
| 1847 | } |
| 1848 | s->running = 0; |
| 1849 | s->opened = 0; |
| 1850 | spin_unlock_irq(&chip->reg_lock); |
| 1851 | } |
| 1852 | |
| 1853 | static int |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1854 | snd_m3_playback_open(struct snd_pcm_substream *subs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1855 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1856 | struct snd_m3 *chip = snd_pcm_substream_chip(subs); |
| 1857 | struct snd_pcm_runtime *runtime = subs->runtime; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1858 | int err; |
| 1859 | |
| 1860 | if ((err = snd_m3_substream_open(chip, subs)) < 0) |
| 1861 | return err; |
| 1862 | |
| 1863 | runtime->hw = snd_m3_playback; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1864 | |
| 1865 | return 0; |
| 1866 | } |
| 1867 | |
| 1868 | static int |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1869 | snd_m3_playback_close(struct snd_pcm_substream *subs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1870 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1871 | struct snd_m3 *chip = snd_pcm_substream_chip(subs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1872 | |
| 1873 | snd_m3_substream_close(chip, subs); |
| 1874 | return 0; |
| 1875 | } |
| 1876 | |
| 1877 | static int |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1878 | snd_m3_capture_open(struct snd_pcm_substream *subs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1879 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1880 | struct snd_m3 *chip = snd_pcm_substream_chip(subs); |
| 1881 | struct snd_pcm_runtime *runtime = subs->runtime; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1882 | int err; |
| 1883 | |
| 1884 | if ((err = snd_m3_substream_open(chip, subs)) < 0) |
| 1885 | return err; |
| 1886 | |
| 1887 | runtime->hw = snd_m3_capture; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1888 | |
| 1889 | return 0; |
| 1890 | } |
| 1891 | |
| 1892 | static int |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1893 | snd_m3_capture_close(struct snd_pcm_substream *subs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1894 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1895 | struct snd_m3 *chip = snd_pcm_substream_chip(subs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1896 | |
| 1897 | snd_m3_substream_close(chip, subs); |
| 1898 | return 0; |
| 1899 | } |
| 1900 | |
| 1901 | /* |
| 1902 | * create pcm instance |
| 1903 | */ |
| 1904 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1905 | static struct snd_pcm_ops snd_m3_playback_ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1906 | .open = snd_m3_playback_open, |
| 1907 | .close = snd_m3_playback_close, |
| 1908 | .ioctl = snd_pcm_lib_ioctl, |
| 1909 | .hw_params = snd_m3_pcm_hw_params, |
| 1910 | .hw_free = snd_m3_pcm_hw_free, |
| 1911 | .prepare = snd_m3_pcm_prepare, |
| 1912 | .trigger = snd_m3_pcm_trigger, |
| 1913 | .pointer = snd_m3_pcm_pointer, |
| 1914 | }; |
| 1915 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1916 | static struct snd_pcm_ops snd_m3_capture_ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1917 | .open = snd_m3_capture_open, |
| 1918 | .close = snd_m3_capture_close, |
| 1919 | .ioctl = snd_pcm_lib_ioctl, |
| 1920 | .hw_params = snd_m3_pcm_hw_params, |
| 1921 | .hw_free = snd_m3_pcm_hw_free, |
| 1922 | .prepare = snd_m3_pcm_prepare, |
| 1923 | .trigger = snd_m3_pcm_trigger, |
| 1924 | .pointer = snd_m3_pcm_pointer, |
| 1925 | }; |
| 1926 | |
| 1927 | static int __devinit |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1928 | snd_m3_pcm(struct snd_m3 * chip, int device) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1929 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1930 | struct snd_pcm *pcm; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1931 | int err; |
| 1932 | |
| 1933 | err = snd_pcm_new(chip->card, chip->card->driver, device, |
| 1934 | MAX_PLAYBACKS, MAX_CAPTURES, &pcm); |
| 1935 | if (err < 0) |
| 1936 | return err; |
| 1937 | |
| 1938 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_m3_playback_ops); |
| 1939 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_m3_capture_ops); |
| 1940 | |
| 1941 | pcm->private_data = chip; |
| 1942 | pcm->info_flags = 0; |
| 1943 | strcpy(pcm->name, chip->card->driver); |
| 1944 | chip->pcm = pcm; |
| 1945 | |
| 1946 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, |
| 1947 | snd_dma_pci_data(chip->pci), 64*1024, 64*1024); |
| 1948 | |
| 1949 | return 0; |
| 1950 | } |
| 1951 | |
| 1952 | |
| 1953 | /* |
| 1954 | * ac97 interface |
| 1955 | */ |
| 1956 | |
| 1957 | /* |
| 1958 | * Wait for the ac97 serial bus to be free. |
| 1959 | * return nonzero if the bus is still busy. |
| 1960 | */ |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1961 | static int snd_m3_ac97_wait(struct snd_m3 *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1962 | { |
| 1963 | int i = 10000; |
| 1964 | |
| 1965 | do { |
| 1966 | if (! (snd_m3_inb(chip, 0x30) & 1)) |
| 1967 | return 0; |
Andreas Mohr | 0b2dcd5 | 2006-03-28 12:56:14 +0200 | [diff] [blame] | 1968 | cpu_relax(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1969 | } while (i-- > 0); |
| 1970 | |
Takashi Iwai | 99b359b | 2005-10-20 18:26:44 +0200 | [diff] [blame] | 1971 | snd_printk(KERN_ERR "ac97 serial bus busy\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1972 | return 1; |
| 1973 | } |
| 1974 | |
| 1975 | static unsigned short |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1976 | snd_m3_ac97_read(struct snd_ac97 *ac97, unsigned short reg) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1977 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1978 | struct snd_m3 *chip = ac97->private_data; |
Andreas Mohr | 0b2dcd5 | 2006-03-28 12:56:14 +0200 | [diff] [blame] | 1979 | unsigned short data = 0xffff; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1980 | |
| 1981 | if (snd_m3_ac97_wait(chip)) |
Andreas Mohr | 0b2dcd5 | 2006-03-28 12:56:14 +0200 | [diff] [blame] | 1982 | goto fail; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1983 | snd_m3_outb(chip, 0x80 | (reg & 0x7f), CODEC_COMMAND); |
| 1984 | if (snd_m3_ac97_wait(chip)) |
Takashi Iwai | 30bdee0 | 2011-06-14 13:57:02 +0200 | [diff] [blame] | 1985 | goto fail; |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1986 | data = snd_m3_inw(chip, CODEC_DATA); |
Andreas Mohr | 0b2dcd5 | 2006-03-28 12:56:14 +0200 | [diff] [blame] | 1987 | fail: |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 1988 | return data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1989 | } |
| 1990 | |
| 1991 | static void |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1992 | snd_m3_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1993 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 1994 | struct snd_m3 *chip = ac97->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1995 | |
| 1996 | if (snd_m3_ac97_wait(chip)) |
| 1997 | return; |
| 1998 | snd_m3_outw(chip, val, CODEC_DATA); |
| 1999 | snd_m3_outb(chip, reg & 0x7f, CODEC_COMMAND); |
| 2000 | } |
| 2001 | |
| 2002 | |
| 2003 | static void snd_m3_remote_codec_config(int io, int isremote) |
| 2004 | { |
| 2005 | isremote = isremote ? 1 : 0; |
| 2006 | |
| 2007 | outw((inw(io + RING_BUS_CTRL_B) & ~SECOND_CODEC_ID_MASK) | isremote, |
| 2008 | io + RING_BUS_CTRL_B); |
| 2009 | outw((inw(io + SDO_OUT_DEST_CTRL) & ~COMMAND_ADDR_OUT) | isremote, |
| 2010 | io + SDO_OUT_DEST_CTRL); |
| 2011 | outw((inw(io + SDO_IN_DEST_CTRL) & ~STATUS_ADDR_IN) | isremote, |
| 2012 | io + SDO_IN_DEST_CTRL); |
| 2013 | } |
| 2014 | |
| 2015 | /* |
| 2016 | * hack, returns non zero on err |
| 2017 | */ |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2018 | static int snd_m3_try_read_vendor(struct snd_m3 *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2019 | { |
| 2020 | u16 ret; |
| 2021 | |
| 2022 | if (snd_m3_ac97_wait(chip)) |
| 2023 | return 1; |
| 2024 | |
| 2025 | snd_m3_outb(chip, 0x80 | (AC97_VENDOR_ID1 & 0x7f), 0x30); |
| 2026 | |
| 2027 | if (snd_m3_ac97_wait(chip)) |
| 2028 | return 1; |
| 2029 | |
| 2030 | ret = snd_m3_inw(chip, 0x32); |
| 2031 | |
| 2032 | return (ret == 0) || (ret == 0xffff); |
| 2033 | } |
| 2034 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2035 | static void snd_m3_ac97_reset(struct snd_m3 *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2036 | { |
| 2037 | u16 dir; |
| 2038 | int delay1 = 0, delay2 = 0, i; |
| 2039 | int io = chip->iobase; |
| 2040 | |
| 2041 | if (chip->allegro_flag) { |
| 2042 | /* |
| 2043 | * the onboard codec on the allegro seems |
| 2044 | * to want to wait a very long time before |
| 2045 | * coming back to life |
| 2046 | */ |
| 2047 | delay1 = 50; |
| 2048 | delay2 = 800; |
| 2049 | } else { |
| 2050 | /* maestro3 */ |
| 2051 | delay1 = 20; |
| 2052 | delay2 = 500; |
| 2053 | } |
| 2054 | |
| 2055 | for (i = 0; i < 5; i++) { |
| 2056 | dir = inw(io + GPIO_DIRECTION); |
Takashi Iwai | 1061eeb | 2006-11-24 15:36:46 +0100 | [diff] [blame] | 2057 | if (!chip->irda_workaround) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2058 | dir |= 0x10; /* assuming pci bus master? */ |
| 2059 | |
| 2060 | snd_m3_remote_codec_config(io, 0); |
| 2061 | |
| 2062 | outw(IO_SRAM_ENABLE, io + RING_BUS_CTRL_A); |
| 2063 | udelay(20); |
| 2064 | |
| 2065 | outw(dir & ~GPO_PRIMARY_AC97 , io + GPIO_DIRECTION); |
| 2066 | outw(~GPO_PRIMARY_AC97 , io + GPIO_MASK); |
| 2067 | outw(0, io + GPIO_DATA); |
| 2068 | outw(dir | GPO_PRIMARY_AC97, io + GPIO_DIRECTION); |
| 2069 | |
Nishanth Aravamudan | 8433a50 | 2005-10-24 15:02:37 +0200 | [diff] [blame] | 2070 | schedule_timeout_uninterruptible(msecs_to_jiffies(delay1)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2071 | |
| 2072 | outw(GPO_PRIMARY_AC97, io + GPIO_DATA); |
| 2073 | udelay(5); |
| 2074 | /* ok, bring back the ac-link */ |
| 2075 | outw(IO_SRAM_ENABLE | SERIAL_AC_LINK_ENABLE, io + RING_BUS_CTRL_A); |
| 2076 | outw(~0, io + GPIO_MASK); |
| 2077 | |
Nishanth Aravamudan | 8433a50 | 2005-10-24 15:02:37 +0200 | [diff] [blame] | 2078 | schedule_timeout_uninterruptible(msecs_to_jiffies(delay2)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2079 | |
| 2080 | if (! snd_m3_try_read_vendor(chip)) |
| 2081 | break; |
| 2082 | |
| 2083 | delay1 += 10; |
| 2084 | delay2 += 100; |
| 2085 | |
| 2086 | snd_printd("maestro3: retrying codec reset with delays of %d and %d ms\n", |
| 2087 | delay1, delay2); |
| 2088 | } |
| 2089 | |
| 2090 | #if 0 |
| 2091 | /* more gung-ho reset that doesn't |
| 2092 | * seem to work anywhere :) |
| 2093 | */ |
| 2094 | tmp = inw(io + RING_BUS_CTRL_A); |
| 2095 | outw(RAC_SDFS_ENABLE|LAC_SDFS_ENABLE, io + RING_BUS_CTRL_A); |
Takashi Iwai | 5ba1e7b | 2005-06-30 13:47:58 +0200 | [diff] [blame] | 2096 | msleep(20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2097 | outw(tmp, io + RING_BUS_CTRL_A); |
Takashi Iwai | 5ba1e7b | 2005-06-30 13:47:58 +0200 | [diff] [blame] | 2098 | msleep(50); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2099 | #endif |
| 2100 | } |
| 2101 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2102 | static int __devinit snd_m3_mixer(struct snd_m3 *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2103 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2104 | struct snd_ac97_bus *pbus; |
| 2105 | struct snd_ac97_template ac97; |
Hans de Goede | eb581ad | 2010-04-23 05:26:42 -0400 | [diff] [blame] | 2106 | #ifndef CONFIG_SND_MAESTRO3_INPUT |
Harvey Harrison | e37273d | 2008-02-28 11:56:37 +0100 | [diff] [blame] | 2107 | struct snd_ctl_elem_id elem_id; |
Hans de Goede | eb581ad | 2010-04-23 05:26:42 -0400 | [diff] [blame] | 2108 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2109 | int err; |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2110 | static struct snd_ac97_bus_ops ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2111 | .write = snd_m3_ac97_write, |
| 2112 | .read = snd_m3_ac97_read, |
| 2113 | }; |
| 2114 | |
| 2115 | if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0) |
| 2116 | return err; |
| 2117 | |
| 2118 | memset(&ac97, 0, sizeof(ac97)); |
| 2119 | ac97.private_data = chip; |
| 2120 | if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97)) < 0) |
| 2121 | return err; |
| 2122 | |
| 2123 | /* seems ac97 PCM needs initialization.. hack hack.. */ |
| 2124 | snd_ac97_write(chip->ac97, AC97_PCM, 0x8000 | (15 << 8) | 15); |
Nishanth Aravamudan | 8433a50 | 2005-10-24 15:02:37 +0200 | [diff] [blame] | 2125 | schedule_timeout_uninterruptible(msecs_to_jiffies(100)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2126 | snd_ac97_write(chip->ac97, AC97_PCM, 0); |
| 2127 | |
Hans de Goede | eb581ad | 2010-04-23 05:26:42 -0400 | [diff] [blame] | 2128 | #ifndef CONFIG_SND_MAESTRO3_INPUT |
Harvey Harrison | e37273d | 2008-02-28 11:56:37 +0100 | [diff] [blame] | 2129 | memset(&elem_id, 0, sizeof(elem_id)); |
| 2130 | elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; |
| 2131 | strcpy(elem_id.name, "Master Playback Switch"); |
| 2132 | chip->master_switch = snd_ctl_find_id(chip->card, &elem_id); |
| 2133 | memset(&elem_id, 0, sizeof(elem_id)); |
| 2134 | elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; |
| 2135 | strcpy(elem_id.name, "Master Playback Volume"); |
| 2136 | chip->master_volume = snd_ctl_find_id(chip->card, &elem_id); |
Hans de Goede | eb581ad | 2010-04-23 05:26:42 -0400 | [diff] [blame] | 2137 | #endif |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 2138 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2139 | return 0; |
| 2140 | } |
| 2141 | |
| 2142 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2143 | /* |
| 2144 | * initialize ASSP |
| 2145 | */ |
| 2146 | |
| 2147 | #define MINISRC_LPF_LEN 10 |
Takashi Iwai | f40b689 | 2006-07-05 16:51:05 +0200 | [diff] [blame] | 2148 | static const u16 minisrc_lpf[MINISRC_LPF_LEN] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2149 | 0X0743, 0X1104, 0X0A4C, 0XF88D, 0X242C, |
| 2150 | 0X1023, 0X1AA9, 0X0B60, 0XEFDD, 0X186F |
| 2151 | }; |
| 2152 | |
Takashi Iwai | f40b689 | 2006-07-05 16:51:05 +0200 | [diff] [blame] | 2153 | static void snd_m3_assp_init(struct snd_m3 *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2154 | { |
| 2155 | unsigned int i; |
David Woodhouse | fa6e1cb | 2008-05-29 11:58:27 +0300 | [diff] [blame] | 2156 | const u16 *data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2157 | |
| 2158 | /* zero kernel data */ |
| 2159 | for (i = 0; i < (REV_B_DATA_MEMORY_UNIT_LENGTH * NUM_UNITS_KERNEL_DATA) / 2; i++) |
| 2160 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 2161 | KDATA_BASE_ADDR + i, 0); |
| 2162 | |
| 2163 | /* zero mixer data? */ |
| 2164 | for (i = 0; i < (REV_B_DATA_MEMORY_UNIT_LENGTH * NUM_UNITS_KERNEL_DATA) / 2; i++) |
| 2165 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 2166 | KDATA_BASE_ADDR2 + i, 0); |
| 2167 | |
| 2168 | /* init dma pointer */ |
| 2169 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 2170 | KDATA_CURRENT_DMA, |
| 2171 | KDATA_DMA_XFER0); |
| 2172 | |
| 2173 | /* write kernel into code memory.. */ |
David Woodhouse | fa6e1cb | 2008-05-29 11:58:27 +0300 | [diff] [blame] | 2174 | data = (const u16 *)chip->assp_kernel_image->data; |
Clemens Ladisch | 81d7724 | 2006-11-06 09:26:41 +0100 | [diff] [blame] | 2175 | for (i = 0 ; i * 2 < chip->assp_kernel_image->size; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2176 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_CODE, |
David Woodhouse | fa6e1cb | 2008-05-29 11:58:27 +0300 | [diff] [blame] | 2177 | REV_B_CODE_MEMORY_BEGIN + i, |
| 2178 | le16_to_cpu(data[i])); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2179 | } |
| 2180 | |
| 2181 | /* |
| 2182 | * We only have this one client and we know that 0x400 |
| 2183 | * is free in our kernel's mem map, so lets just |
| 2184 | * drop it there. It seems that the minisrc doesn't |
| 2185 | * need vectors, so we won't bother with them.. |
| 2186 | */ |
David Woodhouse | fa6e1cb | 2008-05-29 11:58:27 +0300 | [diff] [blame] | 2187 | data = (const u16 *)chip->assp_minisrc_image->data; |
Clemens Ladisch | 81d7724 | 2006-11-06 09:26:41 +0100 | [diff] [blame] | 2188 | for (i = 0; i * 2 < chip->assp_minisrc_image->size; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2189 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_CODE, |
David Woodhouse | fa6e1cb | 2008-05-29 11:58:27 +0300 | [diff] [blame] | 2190 | 0x400 + i, le16_to_cpu(data[i])); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2191 | } |
| 2192 | |
| 2193 | /* |
| 2194 | * write the coefficients for the low pass filter? |
| 2195 | */ |
| 2196 | for (i = 0; i < MINISRC_LPF_LEN ; i++) { |
| 2197 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_CODE, |
| 2198 | 0x400 + MINISRC_COEF_LOC + i, |
| 2199 | minisrc_lpf[i]); |
| 2200 | } |
| 2201 | |
| 2202 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_CODE, |
| 2203 | 0x400 + MINISRC_COEF_LOC + MINISRC_LPF_LEN, |
| 2204 | 0x8000); |
| 2205 | |
| 2206 | /* |
| 2207 | * the minisrc is the only thing on |
| 2208 | * our task list.. |
| 2209 | */ |
| 2210 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 2211 | KDATA_TASK0, |
| 2212 | 0x400); |
| 2213 | |
| 2214 | /* |
| 2215 | * init the mixer number.. |
| 2216 | */ |
| 2217 | |
| 2218 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 2219 | KDATA_MIXER_TASK_NUMBER,0); |
| 2220 | |
| 2221 | /* |
| 2222 | * EXTREME KERNEL MASTER VOLUME |
| 2223 | */ |
| 2224 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 2225 | KDATA_DAC_LEFT_VOLUME, ARB_VOLUME); |
| 2226 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 2227 | KDATA_DAC_RIGHT_VOLUME, ARB_VOLUME); |
| 2228 | |
| 2229 | chip->mixer_list.curlen = 0; |
| 2230 | chip->mixer_list.mem_addr = KDATA_MIXER_XFER0; |
| 2231 | chip->mixer_list.max = MAX_VIRTUAL_MIXER_CHANNELS; |
| 2232 | chip->adc1_list.curlen = 0; |
| 2233 | chip->adc1_list.mem_addr = KDATA_ADC1_XFER0; |
| 2234 | chip->adc1_list.max = MAX_VIRTUAL_ADC1_CHANNELS; |
| 2235 | chip->dma_list.curlen = 0; |
| 2236 | chip->dma_list.mem_addr = KDATA_DMA_XFER0; |
| 2237 | chip->dma_list.max = MAX_VIRTUAL_DMA_CHANNELS; |
| 2238 | chip->msrc_list.curlen = 0; |
| 2239 | chip->msrc_list.mem_addr = KDATA_INSTANCE0_MINISRC; |
| 2240 | chip->msrc_list.max = MAX_INSTANCE_MINISRC; |
| 2241 | } |
| 2242 | |
| 2243 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2244 | static int __devinit snd_m3_assp_client_init(struct snd_m3 *chip, struct m3_dma *s, int index) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2245 | { |
| 2246 | int data_bytes = 2 * ( MINISRC_TMP_BUFFER_SIZE / 2 + |
| 2247 | MINISRC_IN_BUFFER_SIZE / 2 + |
| 2248 | 1 + MINISRC_OUT_BUFFER_SIZE / 2 + 1 ); |
| 2249 | int address, i; |
| 2250 | |
| 2251 | /* |
| 2252 | * the revb memory map has 0x1100 through 0x1c00 |
| 2253 | * free. |
| 2254 | */ |
| 2255 | |
| 2256 | /* |
Andreas Mohr | 0b2dcd5 | 2006-03-28 12:56:14 +0200 | [diff] [blame] | 2257 | * align instance address to 256 bytes so that its |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2258 | * shifted list address is aligned. |
| 2259 | * list address = (mem address >> 1) >> 7; |
| 2260 | */ |
Clemens Ladisch | 7ab3992 | 2006-10-09 08:13:32 +0200 | [diff] [blame] | 2261 | data_bytes = ALIGN(data_bytes, 256); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2262 | address = 0x1100 + ((data_bytes/2) * index); |
| 2263 | |
| 2264 | if ((address + (data_bytes/2)) >= 0x1c00) { |
Takashi Iwai | 99b359b | 2005-10-20 18:26:44 +0200 | [diff] [blame] | 2265 | snd_printk(KERN_ERR "no memory for %d bytes at ind %d (addr 0x%x)\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2266 | data_bytes, index, address); |
| 2267 | return -ENOMEM; |
| 2268 | } |
| 2269 | |
| 2270 | s->number = index; |
| 2271 | s->inst.code = 0x400; |
| 2272 | s->inst.data = address; |
| 2273 | |
| 2274 | for (i = data_bytes / 2; i > 0; address++, i--) { |
| 2275 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 2276 | address, 0); |
| 2277 | } |
| 2278 | |
| 2279 | return 0; |
| 2280 | } |
| 2281 | |
| 2282 | |
| 2283 | /* |
| 2284 | * this works for the reference board, have to find |
| 2285 | * out about others |
| 2286 | * |
| 2287 | * this needs more magic for 4 speaker, but.. |
| 2288 | */ |
| 2289 | static void |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2290 | snd_m3_amp_enable(struct snd_m3 *chip, int enable) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2291 | { |
| 2292 | int io = chip->iobase; |
| 2293 | u16 gpo, polarity; |
| 2294 | |
| 2295 | if (! chip->external_amp) |
| 2296 | return; |
| 2297 | |
| 2298 | polarity = enable ? 0 : 1; |
| 2299 | polarity = polarity << chip->amp_gpio; |
| 2300 | gpo = 1 << chip->amp_gpio; |
| 2301 | |
| 2302 | outw(~gpo, io + GPIO_MASK); |
| 2303 | |
| 2304 | outw(inw(io + GPIO_DIRECTION) | gpo, |
| 2305 | io + GPIO_DIRECTION); |
| 2306 | |
| 2307 | outw((GPO_SECONDARY_AC97 | GPO_PRIMARY_AC97 | polarity), |
| 2308 | io + GPIO_DATA); |
| 2309 | |
| 2310 | outw(0xffff, io + GPIO_MASK); |
| 2311 | } |
| 2312 | |
Ville Syrjälä | 8b83afe | 2008-06-03 20:52:10 +0300 | [diff] [blame] | 2313 | static void |
| 2314 | snd_m3_hv_init(struct snd_m3 *chip) |
| 2315 | { |
| 2316 | unsigned long io = chip->iobase; |
| 2317 | u16 val = GPI_VOL_DOWN | GPI_VOL_UP; |
| 2318 | |
| 2319 | if (!chip->is_omnibook) |
| 2320 | return; |
| 2321 | |
| 2322 | /* |
| 2323 | * Volume buttons on some HP OmniBook laptops |
| 2324 | * require some GPIO magic to work correctly. |
| 2325 | */ |
| 2326 | outw(0xffff, io + GPIO_MASK); |
| 2327 | outw(0x0000, io + GPIO_DATA); |
| 2328 | |
| 2329 | outw(~val, io + GPIO_MASK); |
| 2330 | outw(inw(io + GPIO_DIRECTION) & ~val, io + GPIO_DIRECTION); |
| 2331 | outw(val, io + GPIO_MASK); |
| 2332 | |
| 2333 | outw(0xffff, io + GPIO_MASK); |
| 2334 | } |
| 2335 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2336 | static int |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2337 | snd_m3_chip_init(struct snd_m3 *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2338 | { |
| 2339 | struct pci_dev *pcidev = chip->pci; |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 2340 | unsigned long io = chip->iobase; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2341 | u32 n; |
| 2342 | u16 w; |
| 2343 | u8 t; /* makes as much sense as 'n', no? */ |
| 2344 | |
| 2345 | pci_read_config_word(pcidev, PCI_LEGACY_AUDIO_CTRL, &w); |
| 2346 | w &= ~(SOUND_BLASTER_ENABLE|FM_SYNTHESIS_ENABLE| |
| 2347 | MPU401_IO_ENABLE|MPU401_IRQ_ENABLE|ALIAS_10BIT_IO| |
| 2348 | DISABLE_LEGACY); |
| 2349 | pci_write_config_word(pcidev, PCI_LEGACY_AUDIO_CTRL, w); |
| 2350 | |
| 2351 | pci_read_config_dword(pcidev, PCI_ALLEGRO_CONFIG, &n); |
Ville Syrjala | 82f008c | 2005-05-20 18:40:38 +0200 | [diff] [blame] | 2352 | n &= ~(HV_CTRL_ENABLE | REDUCED_DEBOUNCE | HV_BUTTON_FROM_GD); |
Takashi Iwai | 1061eeb | 2006-11-24 15:36:46 +0100 | [diff] [blame] | 2353 | n |= chip->hv_config; |
Ville Syrjala | 82f008c | 2005-05-20 18:40:38 +0200 | [diff] [blame] | 2354 | /* For some reason we must always use reduced debounce. */ |
| 2355 | n |= REDUCED_DEBOUNCE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2356 | n |= PM_CTRL_ENABLE | CLK_DIV_BY_49 | USE_PCI_TIMING; |
| 2357 | pci_write_config_dword(pcidev, PCI_ALLEGRO_CONFIG, n); |
| 2358 | |
| 2359 | outb(RESET_ASSP, chip->iobase + ASSP_CONTROL_B); |
| 2360 | pci_read_config_dword(pcidev, PCI_ALLEGRO_CONFIG, &n); |
| 2361 | n &= ~INT_CLK_SELECT; |
| 2362 | if (!chip->allegro_flag) { |
| 2363 | n &= ~INT_CLK_MULT_ENABLE; |
| 2364 | n |= INT_CLK_SRC_NOT_PCI; |
| 2365 | } |
| 2366 | n &= ~( CLK_MULT_MODE_SELECT | CLK_MULT_MODE_SELECT_2 ); |
| 2367 | pci_write_config_dword(pcidev, PCI_ALLEGRO_CONFIG, n); |
| 2368 | |
| 2369 | if (chip->allegro_flag) { |
| 2370 | pci_read_config_dword(pcidev, PCI_USER_CONFIG, &n); |
| 2371 | n |= IN_CLK_12MHZ_SELECT; |
| 2372 | pci_write_config_dword(pcidev, PCI_USER_CONFIG, n); |
| 2373 | } |
| 2374 | |
| 2375 | t = inb(chip->iobase + ASSP_CONTROL_A); |
| 2376 | t &= ~( DSP_CLK_36MHZ_SELECT | ASSP_CLK_49MHZ_SELECT); |
| 2377 | t |= ASSP_CLK_49MHZ_SELECT; |
| 2378 | t |= ASSP_0_WS_ENABLE; |
| 2379 | outb(t, chip->iobase + ASSP_CONTROL_A); |
| 2380 | |
Charles R. Anderson | 051b516 | 2005-10-18 18:04:36 +0200 | [diff] [blame] | 2381 | snd_m3_assp_init(chip); /* download DSP code before starting ASSP below */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2382 | outb(RUN_ASSP, chip->iobase + ASSP_CONTROL_B); |
| 2383 | |
Ville Syrjala | db68d15 | 2005-05-12 14:19:32 +0200 | [diff] [blame] | 2384 | outb(0x00, io + HARDWARE_VOL_CTRL); |
| 2385 | outb(0x88, io + SHADOW_MIX_REG_VOICE); |
| 2386 | outb(0x88, io + HW_VOL_COUNTER_VOICE); |
| 2387 | outb(0x88, io + SHADOW_MIX_REG_MASTER); |
| 2388 | outb(0x88, io + HW_VOL_COUNTER_MASTER); |
| 2389 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2390 | return 0; |
| 2391 | } |
| 2392 | |
| 2393 | static void |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2394 | snd_m3_enable_ints(struct snd_m3 *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2395 | { |
| 2396 | unsigned long io = chip->iobase; |
Takashi Iwai | 5ba1e7b | 2005-06-30 13:47:58 +0200 | [diff] [blame] | 2397 | unsigned short val; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2398 | |
| 2399 | /* TODO: MPU401 not supported yet */ |
Takashi Iwai | 5ba1e7b | 2005-06-30 13:47:58 +0200 | [diff] [blame] | 2400 | val = ASSP_INT_ENABLE /*| MPU401_INT_ENABLE*/; |
Takashi Iwai | 1061eeb | 2006-11-24 15:36:46 +0100 | [diff] [blame] | 2401 | if (chip->hv_config & HV_CTRL_ENABLE) |
Takashi Iwai | 5ba1e7b | 2005-06-30 13:47:58 +0200 | [diff] [blame] | 2402 | val |= HV_INT_ENABLE; |
Ville Syrjälä | 1bde78b | 2010-05-07 00:12:13 +0300 | [diff] [blame] | 2403 | outb(val, chip->iobase + HOST_INT_STATUS); |
Takashi Iwai | 5ba1e7b | 2005-06-30 13:47:58 +0200 | [diff] [blame] | 2404 | outw(val, io + HOST_INT_CTRL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2405 | outb(inb(io + ASSP_CONTROL_C) | ASSP_HOST_INT_ENABLE, |
| 2406 | io + ASSP_CONTROL_C); |
| 2407 | } |
| 2408 | |
| 2409 | |
| 2410 | /* |
| 2411 | */ |
| 2412 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2413 | static int snd_m3_free(struct snd_m3 *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2414 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2415 | struct m3_dma *s; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2416 | int i; |
| 2417 | |
Takashi Iwai | 30bdee0 | 2011-06-14 13:57:02 +0200 | [diff] [blame] | 2418 | cancel_work_sync(&chip->hwvol_work); |
Hans de Goede | eb581ad | 2010-04-23 05:26:42 -0400 | [diff] [blame] | 2419 | #ifdef CONFIG_SND_MAESTRO3_INPUT |
| 2420 | if (chip->input_dev) |
| 2421 | input_unregister_device(chip->input_dev); |
| 2422 | #endif |
| 2423 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2424 | if (chip->substreams) { |
| 2425 | spin_lock_irq(&chip->reg_lock); |
| 2426 | for (i = 0; i < chip->num_substreams; i++) { |
| 2427 | s = &chip->substreams[i]; |
| 2428 | /* check surviving pcms; this should not happen though.. */ |
| 2429 | if (s->substream && s->running) |
| 2430 | snd_m3_pcm_stop(chip, s, s->substream); |
| 2431 | } |
| 2432 | spin_unlock_irq(&chip->reg_lock); |
| 2433 | kfree(chip->substreams); |
| 2434 | } |
| 2435 | if (chip->iobase) { |
Ville Syrjala | 8849138 | 2005-05-12 14:14:28 +0200 | [diff] [blame] | 2436 | outw(0, chip->iobase + HOST_INT_CTRL); /* disable ints */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2437 | } |
| 2438 | |
| 2439 | #ifdef CONFIG_PM |
| 2440 | vfree(chip->suspend_mem); |
| 2441 | #endif |
| 2442 | |
Jeff Garzik | f000fd8 | 2008-04-22 13:50:34 +0200 | [diff] [blame] | 2443 | if (chip->irq >= 0) |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2444 | free_irq(chip->irq, chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2445 | |
| 2446 | if (chip->iobase) |
| 2447 | pci_release_regions(chip->pci); |
| 2448 | |
Takashi Iwai | b7dd2b3 | 2007-04-26 14:13:44 +0200 | [diff] [blame] | 2449 | release_firmware(chip->assp_kernel_image); |
| 2450 | release_firmware(chip->assp_minisrc_image); |
Clemens Ladisch | 81d7724 | 2006-11-06 09:26:41 +0100 | [diff] [blame] | 2451 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2452 | pci_disable_device(chip->pci); |
| 2453 | kfree(chip); |
| 2454 | return 0; |
| 2455 | } |
| 2456 | |
| 2457 | |
| 2458 | /* |
| 2459 | * APM support |
| 2460 | */ |
| 2461 | #ifdef CONFIG_PM |
Takashi Iwai | 0e2364a | 2005-11-17 16:10:19 +0100 | [diff] [blame] | 2462 | static int m3_suspend(struct pci_dev *pci, pm_message_t state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2463 | { |
Takashi Iwai | 0e2364a | 2005-11-17 16:10:19 +0100 | [diff] [blame] | 2464 | struct snd_card *card = pci_get_drvdata(pci); |
| 2465 | struct snd_m3 *chip = card->private_data; |
Harvey Harrison | e37273d | 2008-02-28 11:56:37 +0100 | [diff] [blame] | 2466 | int i, dsp_index; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2467 | |
| 2468 | if (chip->suspend_mem == NULL) |
| 2469 | return 0; |
| 2470 | |
Hans de Goede | 715aa67 | 2010-04-21 11:04:08 -0400 | [diff] [blame] | 2471 | chip->in_suspend = 1; |
Takashi Iwai | 30bdee0 | 2011-06-14 13:57:02 +0200 | [diff] [blame] | 2472 | cancel_work_sync(&chip->hwvol_work); |
Takashi Iwai | 0e2364a | 2005-11-17 16:10:19 +0100 | [diff] [blame] | 2473 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2474 | snd_pcm_suspend_all(chip->pcm); |
| 2475 | snd_ac97_suspend(chip->ac97); |
| 2476 | |
Takashi Iwai | 5ba1e7b | 2005-06-30 13:47:58 +0200 | [diff] [blame] | 2477 | msleep(10); /* give the assp a chance to idle.. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2478 | |
| 2479 | snd_m3_assp_halt(chip); |
| 2480 | |
| 2481 | /* save dsp image */ |
Harvey Harrison | e37273d | 2008-02-28 11:56:37 +0100 | [diff] [blame] | 2482 | dsp_index = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2483 | for (i = REV_B_CODE_MEMORY_BEGIN; i <= REV_B_CODE_MEMORY_END; i++) |
Harvey Harrison | e37273d | 2008-02-28 11:56:37 +0100 | [diff] [blame] | 2484 | chip->suspend_mem[dsp_index++] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2485 | snd_m3_assp_read(chip, MEMTYPE_INTERNAL_CODE, i); |
| 2486 | for (i = REV_B_DATA_MEMORY_BEGIN ; i <= REV_B_DATA_MEMORY_END; i++) |
Harvey Harrison | e37273d | 2008-02-28 11:56:37 +0100 | [diff] [blame] | 2487 | chip->suspend_mem[dsp_index++] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2488 | snd_m3_assp_read(chip, MEMTYPE_INTERNAL_DATA, i); |
| 2489 | |
Takashi Iwai | 0e2364a | 2005-11-17 16:10:19 +0100 | [diff] [blame] | 2490 | pci_disable_device(pci); |
| 2491 | pci_save_state(pci); |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 2492 | pci_set_power_state(pci, pci_choose_state(pci, state)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2493 | return 0; |
| 2494 | } |
| 2495 | |
Takashi Iwai | 0e2364a | 2005-11-17 16:10:19 +0100 | [diff] [blame] | 2496 | static int m3_resume(struct pci_dev *pci) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2497 | { |
Takashi Iwai | 0e2364a | 2005-11-17 16:10:19 +0100 | [diff] [blame] | 2498 | struct snd_card *card = pci_get_drvdata(pci); |
| 2499 | struct snd_m3 *chip = card->private_data; |
Harvey Harrison | e37273d | 2008-02-28 11:56:37 +0100 | [diff] [blame] | 2500 | int i, dsp_index; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2501 | |
| 2502 | if (chip->suspend_mem == NULL) |
| 2503 | return 0; |
| 2504 | |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 2505 | pci_set_power_state(pci, PCI_D0); |
Takashi Iwai | 0e2364a | 2005-11-17 16:10:19 +0100 | [diff] [blame] | 2506 | pci_restore_state(pci); |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 2507 | if (pci_enable_device(pci) < 0) { |
| 2508 | printk(KERN_ERR "maestor3: pci_enable_device failed, " |
| 2509 | "disabling device\n"); |
| 2510 | snd_card_disconnect(card); |
| 2511 | return -EIO; |
| 2512 | } |
Takashi Iwai | 0e2364a | 2005-11-17 16:10:19 +0100 | [diff] [blame] | 2513 | pci_set_master(pci); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2514 | |
| 2515 | /* first lets just bring everything back. .*/ |
| 2516 | snd_m3_outw(chip, 0, 0x54); |
| 2517 | snd_m3_outw(chip, 0, 0x56); |
| 2518 | |
| 2519 | snd_m3_chip_init(chip); |
| 2520 | snd_m3_assp_halt(chip); |
| 2521 | snd_m3_ac97_reset(chip); |
| 2522 | |
| 2523 | /* restore dsp image */ |
Harvey Harrison | e37273d | 2008-02-28 11:56:37 +0100 | [diff] [blame] | 2524 | dsp_index = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2525 | for (i = REV_B_CODE_MEMORY_BEGIN; i <= REV_B_CODE_MEMORY_END; i++) |
| 2526 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_CODE, i, |
Harvey Harrison | e37273d | 2008-02-28 11:56:37 +0100 | [diff] [blame] | 2527 | chip->suspend_mem[dsp_index++]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2528 | for (i = REV_B_DATA_MEMORY_BEGIN ; i <= REV_B_DATA_MEMORY_END; i++) |
| 2529 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, i, |
Harvey Harrison | e37273d | 2008-02-28 11:56:37 +0100 | [diff] [blame] | 2530 | chip->suspend_mem[dsp_index++]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2531 | |
| 2532 | /* tell the dma engine to restart itself */ |
| 2533 | snd_m3_assp_write(chip, MEMTYPE_INTERNAL_DATA, |
| 2534 | KDATA_DMA_ACTIVE, 0); |
| 2535 | |
| 2536 | /* restore ac97 registers */ |
| 2537 | snd_ac97_resume(chip->ac97); |
| 2538 | |
| 2539 | snd_m3_assp_continue(chip); |
| 2540 | snd_m3_enable_ints(chip); |
| 2541 | snd_m3_amp_enable(chip, 1); |
| 2542 | |
Ville Syrjälä | 8b83afe | 2008-06-03 20:52:10 +0300 | [diff] [blame] | 2543 | snd_m3_hv_init(chip); |
| 2544 | |
Takashi Iwai | 0e2364a | 2005-11-17 16:10:19 +0100 | [diff] [blame] | 2545 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
Hans de Goede | 715aa67 | 2010-04-21 11:04:08 -0400 | [diff] [blame] | 2546 | chip->in_suspend = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2547 | return 0; |
| 2548 | } |
| 2549 | #endif /* CONFIG_PM */ |
| 2550 | |
Hans de Goede | eb581ad | 2010-04-23 05:26:42 -0400 | [diff] [blame] | 2551 | #ifdef CONFIG_SND_MAESTRO3_INPUT |
| 2552 | static int __devinit snd_m3_input_register(struct snd_m3 *chip) |
| 2553 | { |
| 2554 | struct input_dev *input_dev; |
| 2555 | int err; |
| 2556 | |
| 2557 | input_dev = input_allocate_device(); |
| 2558 | if (!input_dev) |
| 2559 | return -ENOMEM; |
| 2560 | |
| 2561 | snprintf(chip->phys, sizeof(chip->phys), "pci-%s/input0", |
| 2562 | pci_name(chip->pci)); |
| 2563 | |
| 2564 | input_dev->name = chip->card->driver; |
| 2565 | input_dev->phys = chip->phys; |
| 2566 | input_dev->id.bustype = BUS_PCI; |
| 2567 | input_dev->id.vendor = chip->pci->vendor; |
| 2568 | input_dev->id.product = chip->pci->device; |
| 2569 | input_dev->dev.parent = &chip->pci->dev; |
| 2570 | |
| 2571 | __set_bit(EV_KEY, input_dev->evbit); |
| 2572 | __set_bit(KEY_MUTE, input_dev->keybit); |
| 2573 | __set_bit(KEY_VOLUMEDOWN, input_dev->keybit); |
| 2574 | __set_bit(KEY_VOLUMEUP, input_dev->keybit); |
| 2575 | |
| 2576 | err = input_register_device(input_dev); |
| 2577 | if (err) { |
| 2578 | input_free_device(input_dev); |
| 2579 | return err; |
| 2580 | } |
| 2581 | |
| 2582 | chip->input_dev = input_dev; |
| 2583 | return 0; |
| 2584 | } |
| 2585 | #endif /* CONFIG_INPUT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2586 | |
| 2587 | /* |
| 2588 | */ |
| 2589 | |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2590 | static int snd_m3_dev_free(struct snd_device *device) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2591 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2592 | struct snd_m3 *chip = device->device_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2593 | return snd_m3_free(chip); |
| 2594 | } |
| 2595 | |
| 2596 | static int __devinit |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2597 | snd_m3_create(struct snd_card *card, struct pci_dev *pci, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2598 | int enable_amp, |
| 2599 | int amp_gpio, |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2600 | struct snd_m3 **chip_ret) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2601 | { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2602 | struct snd_m3 *chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2603 | int i, err; |
Takashi Iwai | 1061eeb | 2006-11-24 15:36:46 +0100 | [diff] [blame] | 2604 | const struct snd_pci_quirk *quirk; |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2605 | static struct snd_device_ops ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2606 | .dev_free = snd_m3_dev_free, |
| 2607 | }; |
| 2608 | |
| 2609 | *chip_ret = NULL; |
| 2610 | |
| 2611 | if (pci_enable_device(pci)) |
| 2612 | return -EIO; |
| 2613 | |
| 2614 | /* check, if we can restrict PCI DMA transfers to 28 bits */ |
Yang Hongyang | ce0b620 | 2009-04-06 19:01:17 -0700 | [diff] [blame] | 2615 | if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 || |
| 2616 | pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) { |
Takashi Iwai | 99b359b | 2005-10-20 18:26:44 +0200 | [diff] [blame] | 2617 | snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2618 | pci_disable_device(pci); |
| 2619 | return -ENXIO; |
| 2620 | } |
| 2621 | |
Takashi Iwai | e560d8d | 2005-09-09 14:21:46 +0200 | [diff] [blame] | 2622 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2623 | if (chip == NULL) { |
| 2624 | pci_disable_device(pci); |
| 2625 | return -ENOMEM; |
| 2626 | } |
| 2627 | |
| 2628 | spin_lock_init(&chip->reg_lock); |
Takashi Iwai | 5ba1e7b | 2005-06-30 13:47:58 +0200 | [diff] [blame] | 2629 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2630 | switch (pci->device) { |
| 2631 | case PCI_DEVICE_ID_ESS_ALLEGRO: |
| 2632 | case PCI_DEVICE_ID_ESS_ALLEGRO_1: |
| 2633 | case PCI_DEVICE_ID_ESS_CANYON3D_2LE: |
| 2634 | case PCI_DEVICE_ID_ESS_CANYON3D_2: |
| 2635 | chip->allegro_flag = 1; |
| 2636 | break; |
| 2637 | } |
| 2638 | |
| 2639 | chip->card = card; |
| 2640 | chip->pci = pci; |
| 2641 | chip->irq = -1; |
Takashi Iwai | 30bdee0 | 2011-06-14 13:57:02 +0200 | [diff] [blame] | 2642 | INIT_WORK(&chip->hwvol_work, snd_m3_update_hw_volume); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2643 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2644 | chip->external_amp = enable_amp; |
| 2645 | if (amp_gpio >= 0 && amp_gpio <= 0x0f) |
| 2646 | chip->amp_gpio = amp_gpio; |
Takashi Iwai | 1061eeb | 2006-11-24 15:36:46 +0100 | [diff] [blame] | 2647 | else { |
| 2648 | quirk = snd_pci_quirk_lookup(pci, m3_amp_quirk_list); |
| 2649 | if (quirk) { |
| 2650 | snd_printdd(KERN_INFO "maestro3: set amp-gpio " |
| 2651 | "for '%s'\n", quirk->name); |
| 2652 | chip->amp_gpio = quirk->value; |
| 2653 | } else if (chip->allegro_flag) |
| 2654 | chip->amp_gpio = GPO_EXT_AMP_ALLEGRO; |
| 2655 | else /* presumably this is for all 'maestro3's.. */ |
| 2656 | chip->amp_gpio = GPO_EXT_AMP_M3; |
| 2657 | } |
| 2658 | |
| 2659 | quirk = snd_pci_quirk_lookup(pci, m3_irda_quirk_list); |
| 2660 | if (quirk) { |
| 2661 | snd_printdd(KERN_INFO "maestro3: enabled irda workaround " |
| 2662 | "for '%s'\n", quirk->name); |
| 2663 | chip->irda_workaround = 1; |
| 2664 | } |
| 2665 | quirk = snd_pci_quirk_lookup(pci, m3_hv_quirk_list); |
| 2666 | if (quirk) |
| 2667 | chip->hv_config = quirk->value; |
| 2668 | if (snd_pci_quirk_lookup(pci, m3_omnibook_quirk_list)) |
| 2669 | chip->is_omnibook = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2670 | |
| 2671 | chip->num_substreams = NR_DSPS; |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2672 | chip->substreams = kcalloc(chip->num_substreams, sizeof(struct m3_dma), |
| 2673 | GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2674 | if (chip->substreams == NULL) { |
| 2675 | kfree(chip); |
| 2676 | pci_disable_device(pci); |
| 2677 | return -ENOMEM; |
| 2678 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2679 | |
Clemens Ladisch | 81d7724 | 2006-11-06 09:26:41 +0100 | [diff] [blame] | 2680 | err = request_firmware(&chip->assp_kernel_image, |
| 2681 | "ess/maestro3_assp_kernel.fw", &pci->dev); |
| 2682 | if (err < 0) { |
Clemens Ladisch | 81d7724 | 2006-11-06 09:26:41 +0100 | [diff] [blame] | 2683 | snd_m3_free(chip); |
| 2684 | return err; |
David Woodhouse | fa6e1cb | 2008-05-29 11:58:27 +0300 | [diff] [blame] | 2685 | } |
Clemens Ladisch | 81d7724 | 2006-11-06 09:26:41 +0100 | [diff] [blame] | 2686 | |
| 2687 | err = request_firmware(&chip->assp_minisrc_image, |
| 2688 | "ess/maestro3_assp_minisrc.fw", &pci->dev); |
| 2689 | if (err < 0) { |
Clemens Ladisch | 81d7724 | 2006-11-06 09:26:41 +0100 | [diff] [blame] | 2690 | snd_m3_free(chip); |
| 2691 | return err; |
David Woodhouse | fa6e1cb | 2008-05-29 11:58:27 +0300 | [diff] [blame] | 2692 | } |
Clemens Ladisch | 81d7724 | 2006-11-06 09:26:41 +0100 | [diff] [blame] | 2693 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2694 | if ((err = pci_request_regions(pci, card->driver)) < 0) { |
| 2695 | snd_m3_free(chip); |
| 2696 | return err; |
| 2697 | } |
| 2698 | chip->iobase = pci_resource_start(pci, 0); |
| 2699 | |
| 2700 | /* just to be sure */ |
| 2701 | pci_set_master(pci); |
| 2702 | |
| 2703 | snd_m3_chip_init(chip); |
| 2704 | snd_m3_assp_halt(chip); |
| 2705 | |
| 2706 | snd_m3_ac97_reset(chip); |
| 2707 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2708 | snd_m3_amp_enable(chip, 1); |
| 2709 | |
Ville Syrjälä | 8b83afe | 2008-06-03 20:52:10 +0300 | [diff] [blame] | 2710 | snd_m3_hv_init(chip); |
| 2711 | |
Takashi Iwai | 437a5a4 | 2006-11-21 12:14:23 +0100 | [diff] [blame] | 2712 | if (request_irq(pci->irq, snd_m3_interrupt, IRQF_SHARED, |
Takashi Iwai | 934c2b6 | 2011-06-10 16:36:37 +0200 | [diff] [blame] | 2713 | KBUILD_MODNAME, chip)) { |
Takashi Iwai | 99b359b | 2005-10-20 18:26:44 +0200 | [diff] [blame] | 2714 | snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2715 | snd_m3_free(chip); |
| 2716 | return -ENOMEM; |
| 2717 | } |
| 2718 | chip->irq = pci->irq; |
| 2719 | |
| 2720 | #ifdef CONFIG_PM |
| 2721 | chip->suspend_mem = vmalloc(sizeof(u16) * (REV_B_CODE_MEMORY_LENGTH + REV_B_DATA_MEMORY_LENGTH)); |
| 2722 | if (chip->suspend_mem == NULL) |
| 2723 | snd_printk(KERN_WARNING "can't allocate apm buffer\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2724 | #endif |
| 2725 | |
| 2726 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { |
| 2727 | snd_m3_free(chip); |
| 2728 | return err; |
| 2729 | } |
| 2730 | |
| 2731 | if ((err = snd_m3_mixer(chip)) < 0) |
| 2732 | return err; |
| 2733 | |
| 2734 | for (i = 0; i < chip->num_substreams; i++) { |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2735 | struct m3_dma *s = &chip->substreams[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2736 | if ((err = snd_m3_assp_client_init(chip, s, i)) < 0) |
| 2737 | return err; |
| 2738 | } |
| 2739 | |
| 2740 | if ((err = snd_m3_pcm(chip, 0)) < 0) |
| 2741 | return err; |
Hans de Goede | eb581ad | 2010-04-23 05:26:42 -0400 | [diff] [blame] | 2742 | |
| 2743 | #ifdef CONFIG_SND_MAESTRO3_INPUT |
| 2744 | if (chip->hv_config & HV_CTRL_ENABLE) { |
| 2745 | err = snd_m3_input_register(chip); |
| 2746 | if (err) |
| 2747 | snd_printk(KERN_WARNING "Input device registration " |
| 2748 | "failed with error %i", err); |
| 2749 | } |
| 2750 | #endif |
| 2751 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2752 | snd_m3_enable_ints(chip); |
| 2753 | snd_m3_assp_continue(chip); |
| 2754 | |
| 2755 | snd_card_set_dev(card, &pci->dev); |
| 2756 | |
| 2757 | *chip_ret = chip; |
| 2758 | |
| 2759 | return 0; |
| 2760 | } |
| 2761 | |
| 2762 | /* |
| 2763 | */ |
| 2764 | static int __devinit |
| 2765 | snd_m3_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) |
| 2766 | { |
| 2767 | static int dev; |
Takashi Iwai | 3470c29 | 2005-11-17 15:05:09 +0100 | [diff] [blame] | 2768 | struct snd_card *card; |
| 2769 | struct snd_m3 *chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2770 | int err; |
| 2771 | |
| 2772 | /* don't pick up modems */ |
| 2773 | if (((pci->class >> 8) & 0xffff) != PCI_CLASS_MULTIMEDIA_AUDIO) |
| 2774 | return -ENODEV; |
| 2775 | |
| 2776 | if (dev >= SNDRV_CARDS) |
| 2777 | return -ENODEV; |
| 2778 | if (!enable[dev]) { |
| 2779 | dev++; |
| 2780 | return -ENOENT; |
| 2781 | } |
| 2782 | |
Takashi Iwai | e58de7b | 2008-12-28 16:44:30 +0100 | [diff] [blame] | 2783 | err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card); |
| 2784 | if (err < 0) |
| 2785 | return err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2786 | |
| 2787 | switch (pci->device) { |
| 2788 | case PCI_DEVICE_ID_ESS_ALLEGRO: |
| 2789 | case PCI_DEVICE_ID_ESS_ALLEGRO_1: |
| 2790 | strcpy(card->driver, "Allegro"); |
| 2791 | break; |
| 2792 | case PCI_DEVICE_ID_ESS_CANYON3D_2LE: |
| 2793 | case PCI_DEVICE_ID_ESS_CANYON3D_2: |
| 2794 | strcpy(card->driver, "Canyon3D-2"); |
| 2795 | break; |
| 2796 | default: |
| 2797 | strcpy(card->driver, "Maestro3"); |
| 2798 | break; |
| 2799 | } |
| 2800 | |
| 2801 | if ((err = snd_m3_create(card, pci, |
| 2802 | external_amp[dev], |
| 2803 | amp_gpio[dev], |
| 2804 | &chip)) < 0) { |
| 2805 | snd_card_free(card); |
| 2806 | return err; |
| 2807 | } |
Takashi Iwai | 0e2364a | 2005-11-17 16:10:19 +0100 | [diff] [blame] | 2808 | card->private_data = chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2809 | |
| 2810 | sprintf(card->shortname, "ESS %s PCI", card->driver); |
| 2811 | sprintf(card->longname, "%s at 0x%lx, irq %d", |
| 2812 | card->shortname, chip->iobase, chip->irq); |
| 2813 | |
| 2814 | if ((err = snd_card_register(card)) < 0) { |
| 2815 | snd_card_free(card); |
| 2816 | return err; |
| 2817 | } |
| 2818 | |
| 2819 | #if 0 /* TODO: not supported yet */ |
Andreas Mohr | 0b2dcd5 | 2006-03-28 12:56:14 +0200 | [diff] [blame] | 2820 | /* TODO enable MIDI IRQ and I/O */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2821 | err = snd_mpu401_uart_new(chip->card, 0, MPU401_HW_MPU401, |
Takashi Iwai | 302e4c2 | 2006-05-23 13:24:30 +0200 | [diff] [blame] | 2822 | chip->iobase + MPU401_DATA_PORT, |
Clemens Ladisch | dba8b46 | 2011-09-13 11:24:41 +0200 | [diff] [blame] | 2823 | MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK, |
| 2824 | -1, &chip->rmidi); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2825 | if (err < 0) |
Andreas Mohr | 0b2dcd5 | 2006-03-28 12:56:14 +0200 | [diff] [blame] | 2826 | printk(KERN_WARNING "maestro3: no MIDI support.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2827 | #endif |
| 2828 | |
| 2829 | pci_set_drvdata(pci, card); |
| 2830 | dev++; |
| 2831 | return 0; |
| 2832 | } |
| 2833 | |
| 2834 | static void __devexit snd_m3_remove(struct pci_dev *pci) |
| 2835 | { |
| 2836 | snd_card_free(pci_get_drvdata(pci)); |
| 2837 | pci_set_drvdata(pci, NULL); |
| 2838 | } |
| 2839 | |
| 2840 | static struct pci_driver driver = { |
Takashi Iwai | 3733e42 | 2011-06-10 16:20:20 +0200 | [diff] [blame] | 2841 | .name = KBUILD_MODNAME, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2842 | .id_table = snd_m3_ids, |
| 2843 | .probe = snd_m3_probe, |
| 2844 | .remove = __devexit_p(snd_m3_remove), |
Takashi Iwai | 0e2364a | 2005-11-17 16:10:19 +0100 | [diff] [blame] | 2845 | #ifdef CONFIG_PM |
| 2846 | .suspend = m3_suspend, |
| 2847 | .resume = m3_resume, |
| 2848 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2849 | }; |
| 2850 | |
| 2851 | static int __init alsa_card_m3_init(void) |
| 2852 | { |
Takashi Iwai | 01d25d4 | 2005-04-11 16:58:24 +0200 | [diff] [blame] | 2853 | return pci_register_driver(&driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2854 | } |
| 2855 | |
| 2856 | static void __exit alsa_card_m3_exit(void) |
| 2857 | { |
| 2858 | pci_unregister_driver(&driver); |
| 2859 | } |
| 2860 | |
| 2861 | module_init(alsa_card_m3_init) |
| 2862 | module_exit(alsa_card_m3_exit) |