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Joerg Roedeldb3c33c2011-09-27 15:57:13 +02001/*
2 * drivers/pci/ats.c
3 *
4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
Joerg Roedelc320b972011-09-27 15:57:15 +02005 * Copyright (C) 2011 Advanced Micro Devices,
Joerg Roedeldb3c33c2011-09-27 15:57:13 +02006 *
7 * PCI Express I/O Virtualization (IOV) support.
8 * Address Translation Service 1.0
Joerg Roedelc320b972011-09-27 15:57:15 +02009 * Page Request Interface added by Joerg Roedel <joerg.roedel@amd.com>
Joerg Roedel086ac112011-09-27 15:57:16 +020010 * PASID support added by Joerg Roedel <joerg.roedel@amd.com>
Joerg Roedeldb3c33c2011-09-27 15:57:13 +020011 */
12
Paul Gortmaker363c75d2011-05-27 09:37:25 -040013#include <linux/export.h>
Joerg Roedeldb3c33c2011-09-27 15:57:13 +020014#include <linux/pci-ats.h>
15#include <linux/pci.h>
16
17#include "pci.h"
18
19static int ats_alloc_one(struct pci_dev *dev, int ps)
20{
21 int pos;
22 u16 cap;
23 struct pci_ats *ats;
24
25 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
26 if (!pos)
27 return -ENODEV;
28
29 ats = kzalloc(sizeof(*ats), GFP_KERNEL);
30 if (!ats)
31 return -ENOMEM;
32
33 ats->pos = pos;
34 ats->stu = ps;
35 pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
36 ats->qdep = PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
37 PCI_ATS_MAX_QDEP;
38 dev->ats = ats;
39
40 return 0;
41}
42
43static void ats_free_one(struct pci_dev *dev)
44{
45 kfree(dev->ats);
46 dev->ats = NULL;
47}
48
49/**
50 * pci_enable_ats - enable the ATS capability
51 * @dev: the PCI device
52 * @ps: the IOMMU page shift
53 *
54 * Returns 0 on success, or negative on failure.
55 */
56int pci_enable_ats(struct pci_dev *dev, int ps)
57{
58 int rc;
59 u16 ctrl;
60
61 BUG_ON(dev->ats && dev->ats->is_enabled);
62
63 if (ps < PCI_ATS_MIN_STU)
64 return -EINVAL;
65
66 if (dev->is_physfn || dev->is_virtfn) {
67 struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;
68
69 mutex_lock(&pdev->sriov->lock);
70 if (pdev->ats)
71 rc = pdev->ats->stu == ps ? 0 : -EINVAL;
72 else
73 rc = ats_alloc_one(pdev, ps);
74
75 if (!rc)
76 pdev->ats->ref_cnt++;
77 mutex_unlock(&pdev->sriov->lock);
78 if (rc)
79 return rc;
80 }
81
82 if (!dev->is_physfn) {
83 rc = ats_alloc_one(dev, ps);
84 if (rc)
85 return rc;
86 }
87
88 ctrl = PCI_ATS_CTRL_ENABLE;
89 if (!dev->is_virtfn)
90 ctrl |= PCI_ATS_CTRL_STU(ps - PCI_ATS_MIN_STU);
91 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
92
93 dev->ats->is_enabled = 1;
94
95 return 0;
96}
Joerg Roedeld4c06362011-09-27 15:57:14 +020097EXPORT_SYMBOL_GPL(pci_enable_ats);
Joerg Roedeldb3c33c2011-09-27 15:57:13 +020098
99/**
100 * pci_disable_ats - disable the ATS capability
101 * @dev: the PCI device
102 */
103void pci_disable_ats(struct pci_dev *dev)
104{
105 u16 ctrl;
106
107 BUG_ON(!dev->ats || !dev->ats->is_enabled);
108
109 pci_read_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, &ctrl);
110 ctrl &= ~PCI_ATS_CTRL_ENABLE;
111 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
112
113 dev->ats->is_enabled = 0;
114
115 if (dev->is_physfn || dev->is_virtfn) {
116 struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;
117
118 mutex_lock(&pdev->sriov->lock);
119 pdev->ats->ref_cnt--;
120 if (!pdev->ats->ref_cnt)
121 ats_free_one(pdev);
122 mutex_unlock(&pdev->sriov->lock);
123 }
124
125 if (!dev->is_physfn)
126 ats_free_one(dev);
127}
Joerg Roedeld4c06362011-09-27 15:57:14 +0200128EXPORT_SYMBOL_GPL(pci_disable_ats);
Joerg Roedeldb3c33c2011-09-27 15:57:13 +0200129
130/**
131 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
132 * @dev: the PCI device
133 *
134 * Returns the queue depth on success, or negative on failure.
135 *
136 * The ATS spec uses 0 in the Invalidate Queue Depth field to
137 * indicate that the function can accept 32 Invalidate Request.
138 * But here we use the `real' values (i.e. 1~32) for the Queue
139 * Depth; and 0 indicates the function shares the Queue with
140 * other functions (doesn't exclusively own a Queue).
141 */
142int pci_ats_queue_depth(struct pci_dev *dev)
143{
144 int pos;
145 u16 cap;
146
147 if (dev->is_virtfn)
148 return 0;
149
150 if (dev->ats)
151 return dev->ats->qdep;
152
153 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
154 if (!pos)
155 return -ENODEV;
156
157 pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
158
159 return PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
160 PCI_ATS_MAX_QDEP;
161}
Joerg Roedeld4c06362011-09-27 15:57:14 +0200162EXPORT_SYMBOL_GPL(pci_ats_queue_depth);
Joerg Roedelc320b972011-09-27 15:57:15 +0200163
164#ifdef CONFIG_PCI_PRI
165/**
166 * pci_enable_pri - Enable PRI capability
167 * @ pdev: PCI device structure
168 *
169 * Returns 0 on success, negative value on error
170 */
171int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
172{
173 u16 control, status;
174 u32 max_requests;
175 int pos;
176
177 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
178 if (!pos)
179 return -EINVAL;
180
181 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
182 pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status);
183 if ((control & PCI_PRI_ENABLE) || !(status & PCI_PRI_STATUS_STOPPED))
184 return -EBUSY;
185
186 pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ_OFF, &max_requests);
187 reqs = min(max_requests, reqs);
188 pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ_OFF, reqs);
189
190 control |= PCI_PRI_ENABLE;
191 pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
192
193 return 0;
194}
195EXPORT_SYMBOL_GPL(pci_enable_pri);
196
197/**
198 * pci_disable_pri - Disable PRI capability
199 * @pdev: PCI device structure
200 *
201 * Only clears the enabled-bit, regardless of its former value
202 */
203void pci_disable_pri(struct pci_dev *pdev)
204{
205 u16 control;
206 int pos;
207
208 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
209 if (!pos)
210 return;
211
212 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
213 control &= ~PCI_PRI_ENABLE;
214 pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
215}
216EXPORT_SYMBOL_GPL(pci_disable_pri);
217
218/**
219 * pci_pri_enabled - Checks if PRI capability is enabled
220 * @pdev: PCI device structure
221 *
222 * Returns true if PRI is enabled on the device, false otherwise
223 */
224bool pci_pri_enabled(struct pci_dev *pdev)
225{
226 u16 control;
227 int pos;
228
229 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
230 if (!pos)
231 return false;
232
233 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
234
235 return (control & PCI_PRI_ENABLE) ? true : false;
236}
237EXPORT_SYMBOL_GPL(pci_pri_enabled);
238
239/**
240 * pci_reset_pri - Resets device's PRI state
241 * @pdev: PCI device structure
242 *
243 * The PRI capability must be disabled before this function is called.
244 * Returns 0 on success, negative value on error.
245 */
246int pci_reset_pri(struct pci_dev *pdev)
247{
248 u16 control;
249 int pos;
250
251 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
252 if (!pos)
253 return -EINVAL;
254
255 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
256 if (control & PCI_PRI_ENABLE)
257 return -EBUSY;
258
259 control |= PCI_PRI_RESET;
260
261 pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
262
263 return 0;
264}
265EXPORT_SYMBOL_GPL(pci_reset_pri);
266
267/**
268 * pci_pri_stopped - Checks whether the PRI capability is stopped
269 * @pdev: PCI device structure
270 *
271 * Returns true if the PRI capability on the device is disabled and the
272 * device has no outstanding PRI requests, false otherwise. The device
273 * indicates this via the STOPPED bit in the status register of the
274 * capability.
275 * The device internal state can be cleared by resetting the PRI state
276 * with pci_reset_pri(). This can force the capability into the STOPPED
277 * state.
278 */
279bool pci_pri_stopped(struct pci_dev *pdev)
280{
281 u16 control, status;
282 int pos;
283
284 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
285 if (!pos)
286 return true;
287
288 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
289 pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status);
290
291 if (control & PCI_PRI_ENABLE)
292 return false;
293
294 return (status & PCI_PRI_STATUS_STOPPED) ? true : false;
295}
296EXPORT_SYMBOL_GPL(pci_pri_stopped);
297
298/**
299 * pci_pri_status - Request PRI status of a device
300 * @pdev: PCI device structure
301 *
302 * Returns negative value on failure, status on success. The status can
303 * be checked against status-bits. Supported bits are currently:
304 * PCI_PRI_STATUS_RF: Response failure
305 * PCI_PRI_STATUS_UPRGI: Unexpected Page Request Group Index
306 * PCI_PRI_STATUS_STOPPED: PRI has stopped
307 */
308int pci_pri_status(struct pci_dev *pdev)
309{
310 u16 status, control;
311 int pos;
312
313 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
314 if (!pos)
315 return -EINVAL;
316
317 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
318 pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status);
319
320 /* Stopped bit is undefined when enable == 1, so clear it */
321 if (control & PCI_PRI_ENABLE)
322 status &= ~PCI_PRI_STATUS_STOPPED;
323
324 return status;
325}
326EXPORT_SYMBOL_GPL(pci_pri_status);
327#endif /* CONFIG_PCI_PRI */
Joerg Roedel086ac112011-09-27 15:57:16 +0200328
329#ifdef CONFIG_PCI_PASID
330/**
331 * pci_enable_pasid - Enable the PASID capability
332 * @pdev: PCI device structure
333 * @features: Features to enable
334 *
335 * Returns 0 on success, negative value on error. This function checks
336 * whether the features are actually supported by the device and returns
337 * an error if not.
338 */
339int pci_enable_pasid(struct pci_dev *pdev, int features)
340{
341 u16 control, supported;
342 int pos;
343
344 pos = pci_find_ext_capability(pdev, PCI_PASID_CAP);
345 if (!pos)
346 return -EINVAL;
347
348 pci_read_config_word(pdev, pos + PCI_PASID_CONTROL_OFF, &control);
349 pci_read_config_word(pdev, pos + PCI_PASID_CAP_OFF, &supported);
350
351 if (!(supported & PCI_PASID_ENABLE))
352 return -EINVAL;
353
354 supported &= PCI_PASID_EXEC | PCI_PASID_PRIV;
355
356 /* User wants to enable anything unsupported? */
357 if ((supported & features) != features)
358 return -EINVAL;
359
360 control = PCI_PASID_ENABLE | features;
361
362 pci_write_config_word(pdev, pos + PCI_PASID_CONTROL_OFF, control);
363
364 return 0;
365}
366EXPORT_SYMBOL_GPL(pci_enable_pasid);
367
368/**
369 * pci_disable_pasid - Disable the PASID capability
370 * @pdev: PCI device structure
371 *
372 */
373void pci_disable_pasid(struct pci_dev *pdev)
374{
375 u16 control = 0;
376 int pos;
377
378 pos = pci_find_ext_capability(pdev, PCI_PASID_CAP);
379 if (!pos)
380 return;
381
382 pci_write_config_word(pdev, pos + PCI_PASID_CONTROL_OFF, control);
383}
384EXPORT_SYMBOL_GPL(pci_disable_pasid);
385
386/**
387 * pci_pasid_features - Check which PASID features are supported
388 * @pdev: PCI device structure
389 *
390 * Returns a negative value when no PASI capability is present.
391 * Otherwise is returns a bitmask with supported features. Current
392 * features reported are:
393 * PCI_PASID_ENABLE - PASID capability can be enabled
394 * PCI_PASID_EXEC - Execute permission supported
395 * PCI_PASID_PRIV - Priviledged mode supported
396 */
397int pci_pasid_features(struct pci_dev *pdev)
398{
399 u16 supported;
400 int pos;
401
402 pos = pci_find_ext_capability(pdev, PCI_PASID_CAP);
403 if (!pos)
404 return -EINVAL;
405
406 pci_read_config_word(pdev, pos + PCI_PASID_CAP_OFF, &supported);
407
408 supported &= PCI_PASID_ENABLE | PCI_PASID_EXEC | PCI_PASID_PRIV;
409
410 return supported;
411}
412EXPORT_SYMBOL_GPL(pci_pasid_features);
413
414#define PASID_NUMBER_SHIFT 8
415#define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT)
416/**
417 * pci_max_pasid - Get maximum number of PASIDs supported by device
418 * @pdev: PCI device structure
419 *
420 * Returns negative value when PASID capability is not present.
421 * Otherwise it returns the numer of supported PASIDs.
422 */
423int pci_max_pasids(struct pci_dev *pdev)
424{
425 u16 supported;
426 int pos;
427
428 pos = pci_find_ext_capability(pdev, PCI_PASID_CAP);
429 if (!pos)
430 return -EINVAL;
431
432 pci_read_config_word(pdev, pos + PCI_PASID_CAP_OFF, &supported);
433
434 supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT;
435
436 return (1 << supported);
437}
438EXPORT_SYMBOL_GPL(pci_max_pasids);
439#endif /* CONFIG_PCI_PASID */