blob: 17304705f2cf9443b99690565ece5b537e3e61c4 [file] [log] [blame]
Shawn Guo289569f2010-12-18 21:39:28 +08001/*
2 * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
Oleksij Rempel7e4ac672015-10-12 21:15:34 +02003 * Copyright (C) 2014 Oleksij Rempel <linux@rempel-privat.de>
4 * Add Alphascale ASM9260 support.
Shawn Guo289569f2010-12-18 21:39:28 +08005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/irq.h>
Joel Porquet41a83e02015-07-07 17:11:46 -040024#include <linux/irqchip.h>
Shawn Guo83a84ef2012-08-20 21:34:56 +080025#include <linux/irqdomain.h>
Shawn Guo289569f2010-12-18 21:39:28 +080026#include <linux/io.h>
Shawn Guo83a84ef2012-08-20 21:34:56 +080027#include <linux/of.h>
Shawn Guo8256aa72013-03-25 21:13:22 +080028#include <linux/of_address.h>
Shawn Guo83a84ef2012-08-20 21:34:56 +080029#include <linux/of_irq.h>
Shawn Guocec6bae2013-03-25 21:20:05 +080030#include <linux/stmp_device.h>
Shawn Guo4e0a1b82012-08-20 10:14:56 +080031#include <asm/exception.h>
Shawn Guo289569f2010-12-18 21:39:28 +080032
Oleksij Rempel7e4ac672015-10-12 21:15:34 +020033#include "alphascale_asm9260-icoll.h"
34
Oleksij Rempel25e34b42015-10-12 21:15:33 +020035/*
36 * this device provide 4 offsets for each register:
37 * 0x0 - plain read write mode
38 * 0x4 - set mode, OR logic.
39 * 0x8 - clr mode, XOR logic.
40 * 0xc - togle mode.
41 */
42#define SET_REG 4
43#define CLR_REG 8
44
Shawn Guo289569f2010-12-18 21:39:28 +080045#define HW_ICOLL_VECTOR 0x0000
46#define HW_ICOLL_LEVELACK 0x0010
47#define HW_ICOLL_CTRL 0x0020
Shawn Guo4e0a1b82012-08-20 10:14:56 +080048#define HW_ICOLL_STAT_OFFSET 0x0070
Oleksij Rempel25e34b42015-10-12 21:15:33 +020049#define HW_ICOLL_INTERRUPT0 0x0120
50#define HW_ICOLL_INTERRUPTn(n) ((n) * 0x10)
51#define BM_ICOLL_INTR_ENABLE BIT(2)
Shawn Guo289569f2010-12-18 21:39:28 +080052#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 0x1
53
Shawn Guo83a84ef2012-08-20 21:34:56 +080054#define ICOLL_NUM_IRQS 128
55
Oleksij Rempel7e4ac672015-10-12 21:15:34 +020056enum icoll_type {
57 ICOLL,
58 ASM9260_ICOLL,
59};
60
Oleksij Rempel25e34b42015-10-12 21:15:33 +020061struct icoll_priv {
62 void __iomem *vector;
63 void __iomem *levelack;
64 void __iomem *ctrl;
65 void __iomem *stat;
66 void __iomem *intr;
Oleksij Rempel7e4ac672015-10-12 21:15:34 +020067 void __iomem *clear;
68 enum icoll_type type;
Oleksij Rempel25e34b42015-10-12 21:15:33 +020069};
70
71static struct icoll_priv icoll_priv;
Shawn Guo83a84ef2012-08-20 21:34:56 +080072static struct irq_domain *icoll_domain;
Shawn Guo289569f2010-12-18 21:39:28 +080073
Oleksij Rempel7e4ac672015-10-12 21:15:34 +020074/* calculate bit offset depending on number of intterupt per register */
75static u32 icoll_intr_bitshift(struct irq_data *d, u32 bit)
76{
77 /*
78 * mask lower part of hwirq to convert it
79 * in 0, 1, 2 or 3 and then multiply it by 8 (or shift by 3)
80 */
81 return bit << ((d->hwirq & 3) << 3);
82}
83
84/* calculate mem offset depending on number of intterupt per register */
85static void __iomem *icoll_intr_reg(struct irq_data *d)
86{
87 /* offset = hwirq / intr_per_reg * 0x10 */
88 return icoll_priv.intr + ((d->hwirq >> 2) * 0x10);
89}
90
Uwe Kleine-Königbf0c11182011-02-18 21:31:41 +010091static void icoll_ack_irq(struct irq_data *d)
Shawn Guo289569f2010-12-18 21:39:28 +080092{
93 /*
94 * The Interrupt Collector is able to prioritize irqs.
95 * Currently only level 0 is used. So acking can use
96 * BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 unconditionally.
97 */
98 __raw_writel(BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0,
Oleksij Rempel25e34b42015-10-12 21:15:33 +020099 icoll_priv.levelack);
Shawn Guo289569f2010-12-18 21:39:28 +0800100}
101
Uwe Kleine-Königbf0c11182011-02-18 21:31:41 +0100102static void icoll_mask_irq(struct irq_data *d)
Shawn Guo289569f2010-12-18 21:39:28 +0800103{
Oleksij Rempel25e34b42015-10-12 21:15:33 +0200104 __raw_writel(BM_ICOLL_INTR_ENABLE,
105 icoll_priv.intr + CLR_REG + HW_ICOLL_INTERRUPTn(d->hwirq));
Shawn Guo289569f2010-12-18 21:39:28 +0800106}
107
Uwe Kleine-Königbf0c11182011-02-18 21:31:41 +0100108static void icoll_unmask_irq(struct irq_data *d)
Shawn Guo289569f2010-12-18 21:39:28 +0800109{
Oleksij Rempel25e34b42015-10-12 21:15:33 +0200110 __raw_writel(BM_ICOLL_INTR_ENABLE,
111 icoll_priv.intr + SET_REG + HW_ICOLL_INTERRUPTn(d->hwirq));
Shawn Guo289569f2010-12-18 21:39:28 +0800112}
113
Oleksij Rempel7e4ac672015-10-12 21:15:34 +0200114static void asm9260_mask_irq(struct irq_data *d)
115{
116 __raw_writel(icoll_intr_bitshift(d, BM_ICOLL_INTR_ENABLE),
117 icoll_intr_reg(d) + CLR_REG);
118}
119
120static void asm9260_unmask_irq(struct irq_data *d)
121{
122 __raw_writel(ASM9260_BM_CLEAR_BIT(d->hwirq),
123 icoll_priv.clear +
124 ASM9260_HW_ICOLL_CLEARn(d->hwirq));
125
126 __raw_writel(icoll_intr_bitshift(d, BM_ICOLL_INTR_ENABLE),
127 icoll_intr_reg(d) + SET_REG);
128}
129
Shawn Guo289569f2010-12-18 21:39:28 +0800130static struct irq_chip mxs_icoll_chip = {
Uwe Kleine-Königbf0c11182011-02-18 21:31:41 +0100131 .irq_ack = icoll_ack_irq,
132 .irq_mask = icoll_mask_irq,
133 .irq_unmask = icoll_unmask_irq,
Shawn Guo289569f2010-12-18 21:39:28 +0800134};
135
Oleksij Rempel7e4ac672015-10-12 21:15:34 +0200136static struct irq_chip asm9260_icoll_chip = {
137 .irq_ack = icoll_ack_irq,
138 .irq_mask = asm9260_mask_irq,
139 .irq_unmask = asm9260_unmask_irq,
140};
141
Shawn Guo4e0a1b82012-08-20 10:14:56 +0800142asmlinkage void __exception_irq_entry icoll_handle_irq(struct pt_regs *regs)
143{
144 u32 irqnr;
145
Oleksij Rempel25e34b42015-10-12 21:15:33 +0200146 irqnr = __raw_readl(icoll_priv.stat);
147 __raw_writel(irqnr, icoll_priv.vector);
Marc Zyngierb3410e52014-08-26 11:03:24 +0100148 handle_domain_irq(icoll_domain, irqnr, regs);
Shawn Guo4e0a1b82012-08-20 10:14:56 +0800149}
150
Shawn Guo83a84ef2012-08-20 21:34:56 +0800151static int icoll_irq_domain_map(struct irq_domain *d, unsigned int virq,
152 irq_hw_number_t hw)
Shawn Guo289569f2010-12-18 21:39:28 +0800153{
Oleksij Rempel7e4ac672015-10-12 21:15:34 +0200154 struct irq_chip *chip;
155
156 if (icoll_priv.type == ICOLL)
157 chip = &mxs_icoll_chip;
158 else
159 chip = &asm9260_icoll_chip;
160
161 irq_set_chip_and_handler(virq, chip, handle_level_irq);
Shawn Guo289569f2010-12-18 21:39:28 +0800162
Shawn Guo83a84ef2012-08-20 21:34:56 +0800163 return 0;
164}
165
Krzysztof Kozlowski96009732015-04-27 21:54:24 +0900166static const struct irq_domain_ops icoll_irq_domain_ops = {
Shawn Guo83a84ef2012-08-20 21:34:56 +0800167 .map = icoll_irq_domain_map,
168 .xlate = irq_domain_xlate_onecell,
169};
170
Oleksij Rempel25e34b42015-10-12 21:15:33 +0200171static void __init icoll_add_domain(struct device_node *np,
172 int num)
173{
174 icoll_domain = irq_domain_add_linear(np, num,
175 &icoll_irq_domain_ops, NULL);
176
177 if (!icoll_domain)
178 panic("%s: unable to create irq domain", np->full_name);
179}
180
181static void __iomem * __init icoll_init_iobase(struct device_node *np)
182{
183 void __iomem *icoll_base;
184
185 icoll_base = of_io_request_and_map(np, 0, np->name);
Vladimir Zapolskiyedf8fcd2016-03-09 03:21:40 +0200186 if (IS_ERR(icoll_base))
Oleksij Rempel25e34b42015-10-12 21:15:33 +0200187 panic("%s: unable to map resource", np->full_name);
188 return icoll_base;
189}
190
Rob Herring10776b52014-05-12 11:37:07 -0500191static int __init icoll_of_init(struct device_node *np,
Shawn Guo83a84ef2012-08-20 21:34:56 +0800192 struct device_node *interrupt_parent)
193{
Oleksij Rempel25e34b42015-10-12 21:15:33 +0200194 void __iomem *icoll_base;
195
Oleksij Rempel7e4ac672015-10-12 21:15:34 +0200196 icoll_priv.type = ICOLL;
197
Oleksij Rempel25e34b42015-10-12 21:15:33 +0200198 icoll_base = icoll_init_iobase(np);
199 icoll_priv.vector = icoll_base + HW_ICOLL_VECTOR;
200 icoll_priv.levelack = icoll_base + HW_ICOLL_LEVELACK;
201 icoll_priv.ctrl = icoll_base + HW_ICOLL_CTRL;
202 icoll_priv.stat = icoll_base + HW_ICOLL_STAT_OFFSET;
203 icoll_priv.intr = icoll_base + HW_ICOLL_INTERRUPT0;
Oleksij Rempel7e4ac672015-10-12 21:15:34 +0200204 icoll_priv.clear = NULL;
Shawn Guo8256aa72013-03-25 21:13:22 +0800205
Shawn Guo289569f2010-12-18 21:39:28 +0800206 /*
207 * Interrupt Collector reset, which initializes the priority
208 * for each irq to level 0.
209 */
Oleksij Rempel25e34b42015-10-12 21:15:33 +0200210 stmp_reset_block(icoll_priv.ctrl);
Shawn Guo289569f2010-12-18 21:39:28 +0800211
Oleksij Rempel25e34b42015-10-12 21:15:33 +0200212 icoll_add_domain(np, ICOLL_NUM_IRQS);
Oleksij Rempele59a8452015-10-12 21:15:30 +0200213
214 return 0;
Shawn Guo83a84ef2012-08-20 21:34:56 +0800215}
Shawn Guo6a8e95b2013-03-25 21:34:51 +0800216IRQCHIP_DECLARE(mxs, "fsl,icoll", icoll_of_init);
Oleksij Rempel7e4ac672015-10-12 21:15:34 +0200217
218static int __init asm9260_of_init(struct device_node *np,
219 struct device_node *interrupt_parent)
220{
221 void __iomem *icoll_base;
222 int i;
223
224 icoll_priv.type = ASM9260_ICOLL;
225
226 icoll_base = icoll_init_iobase(np);
227 icoll_priv.vector = icoll_base + ASM9260_HW_ICOLL_VECTOR;
228 icoll_priv.levelack = icoll_base + ASM9260_HW_ICOLL_LEVELACK;
229 icoll_priv.ctrl = icoll_base + ASM9260_HW_ICOLL_CTRL;
230 icoll_priv.stat = icoll_base + ASM9260_HW_ICOLL_STAT_OFFSET;
231 icoll_priv.intr = icoll_base + ASM9260_HW_ICOLL_INTERRUPT0;
232 icoll_priv.clear = icoll_base + ASM9260_HW_ICOLL_CLEAR0;
233
234 writel_relaxed(ASM9260_BM_CTRL_IRQ_ENABLE,
235 icoll_priv.ctrl);
236 /*
237 * ASM9260 don't provide reset bit. So, we need to set level 0
238 * manually.
239 */
240 for (i = 0; i < 16 * 0x10; i += 0x10)
241 writel(0, icoll_priv.intr + i);
242
243 icoll_add_domain(np, ASM9260_NUM_IRQS);
Oleksij Rempelc5b63522016-01-29 10:57:53 +0100244 set_handle_irq(icoll_handle_irq);
Oleksij Rempel7e4ac672015-10-12 21:15:34 +0200245
246 return 0;
247}
248IRQCHIP_DECLARE(asm9260, "alphascale,asm9260-icoll", asm9260_of_init);