Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1 | /* Driver for Realtek PCI-Express card reader |
| 2 | * |
Wei WANG | 09fd867 | 2013-08-20 14:18:56 +0800 | [diff] [blame] | 3 | * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License as published by the |
| 7 | * Free Software Foundation; either version 2, or (at your option) any |
| 8 | * later version. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, but |
| 11 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 13 | * General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License along |
| 16 | * with this program; if not, see <http://www.gnu.org/licenses/>. |
| 17 | * |
| 18 | * Author: |
| 19 | * Wei WANG <wei_wang@realsil.com.cn> |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 20 | */ |
| 21 | |
| 22 | #include <linux/pci.h> |
| 23 | #include <linux/module.h> |
Samuel Ortiz | aec17ea | 2012-11-09 10:19:54 +0100 | [diff] [blame] | 24 | #include <linux/slab.h> |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 25 | #include <linux/dma-mapping.h> |
| 26 | #include <linux/highmem.h> |
| 27 | #include <linux/interrupt.h> |
| 28 | #include <linux/delay.h> |
| 29 | #include <linux/idr.h> |
| 30 | #include <linux/platform_device.h> |
| 31 | #include <linux/mfd/core.h> |
| 32 | #include <linux/mfd/rtsx_pci.h> |
| 33 | #include <asm/unaligned.h> |
| 34 | |
| 35 | #include "rtsx_pcr.h" |
| 36 | |
| 37 | static bool msi_en = true; |
| 38 | module_param(msi_en, bool, S_IRUGO | S_IWUSR); |
| 39 | MODULE_PARM_DESC(msi_en, "Enable MSI"); |
| 40 | |
| 41 | static DEFINE_IDR(rtsx_pci_idr); |
| 42 | static DEFINE_SPINLOCK(rtsx_pci_lock); |
| 43 | |
| 44 | static struct mfd_cell rtsx_pcr_cells[] = { |
| 45 | [RTSX_SD_CARD] = { |
| 46 | .name = DRV_NAME_RTSX_PCI_SDMMC, |
| 47 | }, |
| 48 | [RTSX_MS_CARD] = { |
| 49 | .name = DRV_NAME_RTSX_PCI_MS, |
| 50 | }, |
| 51 | }; |
| 52 | |
Jingoo Han | 36fcd06 | 2013-12-03 08:15:39 +0900 | [diff] [blame] | 53 | static const struct pci_device_id rtsx_pci_ids[] = { |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 54 | { PCI_DEVICE(0x10EC, 0x5209), PCI_CLASS_OTHERS << 16, 0xFF0000 }, |
| 55 | { PCI_DEVICE(0x10EC, 0x5229), PCI_CLASS_OTHERS << 16, 0xFF0000 }, |
| 56 | { PCI_DEVICE(0x10EC, 0x5289), PCI_CLASS_OTHERS << 16, 0xFF0000 }, |
Roger Tseng | e123793 | 2013-02-04 15:45:59 +0800 | [diff] [blame] | 57 | { PCI_DEVICE(0x10EC, 0x5227), PCI_CLASS_OTHERS << 16, 0xFF0000 }, |
Wei WANG | 4c4b8c1 | 2013-04-11 10:43:40 +0800 | [diff] [blame] | 58 | { PCI_DEVICE(0x10EC, 0x5249), PCI_CLASS_OTHERS << 16, 0xFF0000 }, |
Roger Tseng | 9032eab | 2013-04-19 21:52:42 +0800 | [diff] [blame] | 59 | { PCI_DEVICE(0x10EC, 0x5287), PCI_CLASS_OTHERS << 16, 0xFF0000 }, |
Micky Ching | 56cb3cc | 2013-12-18 10:03:13 +0800 | [diff] [blame] | 60 | { PCI_DEVICE(0x10EC, 0x5286), PCI_CLASS_OTHERS << 16, 0xFF0000 }, |
Micky Ching | 663c425f | 2015-02-25 13:50:14 +0800 | [diff] [blame^] | 61 | { PCI_DEVICE(0x10EC, 0x524A), PCI_CLASS_OTHERS << 16, 0xFF0000 }, |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 62 | { 0, } |
| 63 | }; |
| 64 | |
| 65 | MODULE_DEVICE_TABLE(pci, rtsx_pci_ids); |
| 66 | |
Micky Ching | 19f3bd5 | 2015-02-25 13:50:13 +0800 | [diff] [blame] | 67 | static inline void rtsx_pci_enable_aspm(struct rtsx_pcr *pcr) |
| 68 | { |
| 69 | rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, |
| 70 | 0xFC, pcr->aspm_en); |
| 71 | } |
| 72 | |
| 73 | static inline void rtsx_pci_disable_aspm(struct rtsx_pcr *pcr) |
| 74 | { |
| 75 | rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, |
| 76 | 0xFC, 0); |
| 77 | } |
| 78 | |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 79 | void rtsx_pci_start_run(struct rtsx_pcr *pcr) |
| 80 | { |
| 81 | /* If pci device removed, don't queue idle work any more */ |
| 82 | if (pcr->remove_pci) |
| 83 | return; |
| 84 | |
| 85 | if (pcr->state != PDEV_STAT_RUN) { |
| 86 | pcr->state = PDEV_STAT_RUN; |
| 87 | if (pcr->ops->enable_auto_blink) |
| 88 | pcr->ops->enable_auto_blink(pcr); |
Wei WANG | 773ccdf | 2013-08-20 14:18:51 +0800 | [diff] [blame] | 89 | |
| 90 | if (pcr->aspm_en) |
Micky Ching | 19f3bd5 | 2015-02-25 13:50:13 +0800 | [diff] [blame] | 91 | rtsx_pci_disable_aspm(pcr); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 92 | } |
| 93 | |
| 94 | mod_delayed_work(system_wq, &pcr->idle_work, msecs_to_jiffies(200)); |
| 95 | } |
| 96 | EXPORT_SYMBOL_GPL(rtsx_pci_start_run); |
| 97 | |
| 98 | int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data) |
| 99 | { |
| 100 | int i; |
| 101 | u32 val = HAIMR_WRITE_START; |
| 102 | |
| 103 | val |= (u32)(addr & 0x3FFF) << 16; |
| 104 | val |= (u32)mask << 8; |
| 105 | val |= (u32)data; |
| 106 | |
| 107 | rtsx_pci_writel(pcr, RTSX_HAIMR, val); |
| 108 | |
| 109 | for (i = 0; i < MAX_RW_REG_CNT; i++) { |
| 110 | val = rtsx_pci_readl(pcr, RTSX_HAIMR); |
| 111 | if ((val & HAIMR_TRANS_END) == 0) { |
| 112 | if (data != (u8)val) |
| 113 | return -EIO; |
| 114 | return 0; |
| 115 | } |
| 116 | } |
| 117 | |
| 118 | return -ETIMEDOUT; |
| 119 | } |
| 120 | EXPORT_SYMBOL_GPL(rtsx_pci_write_register); |
| 121 | |
| 122 | int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data) |
| 123 | { |
| 124 | u32 val = HAIMR_READ_START; |
| 125 | int i; |
| 126 | |
| 127 | val |= (u32)(addr & 0x3FFF) << 16; |
| 128 | rtsx_pci_writel(pcr, RTSX_HAIMR, val); |
| 129 | |
| 130 | for (i = 0; i < MAX_RW_REG_CNT; i++) { |
| 131 | val = rtsx_pci_readl(pcr, RTSX_HAIMR); |
| 132 | if ((val & HAIMR_TRANS_END) == 0) |
| 133 | break; |
| 134 | } |
| 135 | |
| 136 | if (i >= MAX_RW_REG_CNT) |
| 137 | return -ETIMEDOUT; |
| 138 | |
| 139 | if (data) |
| 140 | *data = (u8)(val & 0xFF); |
| 141 | |
| 142 | return 0; |
| 143 | } |
| 144 | EXPORT_SYMBOL_GPL(rtsx_pci_read_register); |
| 145 | |
Micky Ching | 663c425f | 2015-02-25 13:50:14 +0800 | [diff] [blame^] | 146 | int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 147 | { |
| 148 | int err, i, finished = 0; |
| 149 | u8 tmp; |
| 150 | |
| 151 | rtsx_pci_init_cmd(pcr); |
| 152 | |
| 153 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYDATA0, 0xFF, (u8)val); |
| 154 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYDATA1, 0xFF, (u8)(val >> 8)); |
| 155 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYADDR, 0xFF, addr); |
| 156 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYRWCTL, 0xFF, 0x81); |
| 157 | |
| 158 | err = rtsx_pci_send_cmd(pcr, 100); |
| 159 | if (err < 0) |
| 160 | return err; |
| 161 | |
| 162 | for (i = 0; i < 100000; i++) { |
| 163 | err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); |
| 164 | if (err < 0) |
| 165 | return err; |
| 166 | |
| 167 | if (!(tmp & 0x80)) { |
| 168 | finished = 1; |
| 169 | break; |
| 170 | } |
| 171 | } |
| 172 | |
| 173 | if (!finished) |
| 174 | return -ETIMEDOUT; |
| 175 | |
| 176 | return 0; |
| 177 | } |
Micky Ching | 663c425f | 2015-02-25 13:50:14 +0800 | [diff] [blame^] | 178 | |
| 179 | int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) |
| 180 | { |
| 181 | if (pcr->ops->write_phy) |
| 182 | return pcr->ops->write_phy(pcr, addr, val); |
| 183 | |
| 184 | return __rtsx_pci_write_phy_register(pcr, addr, val); |
| 185 | } |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 186 | EXPORT_SYMBOL_GPL(rtsx_pci_write_phy_register); |
| 187 | |
Micky Ching | 663c425f | 2015-02-25 13:50:14 +0800 | [diff] [blame^] | 188 | int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 189 | { |
| 190 | int err, i, finished = 0; |
| 191 | u16 data; |
| 192 | u8 *ptr, tmp; |
| 193 | |
| 194 | rtsx_pci_init_cmd(pcr); |
| 195 | |
| 196 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYADDR, 0xFF, addr); |
| 197 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYRWCTL, 0xFF, 0x80); |
| 198 | |
| 199 | err = rtsx_pci_send_cmd(pcr, 100); |
| 200 | if (err < 0) |
| 201 | return err; |
| 202 | |
| 203 | for (i = 0; i < 100000; i++) { |
| 204 | err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); |
| 205 | if (err < 0) |
| 206 | return err; |
| 207 | |
| 208 | if (!(tmp & 0x80)) { |
| 209 | finished = 1; |
| 210 | break; |
| 211 | } |
| 212 | } |
| 213 | |
| 214 | if (!finished) |
| 215 | return -ETIMEDOUT; |
| 216 | |
| 217 | rtsx_pci_init_cmd(pcr); |
| 218 | |
| 219 | rtsx_pci_add_cmd(pcr, READ_REG_CMD, PHYDATA0, 0, 0); |
| 220 | rtsx_pci_add_cmd(pcr, READ_REG_CMD, PHYDATA1, 0, 0); |
| 221 | |
| 222 | err = rtsx_pci_send_cmd(pcr, 100); |
| 223 | if (err < 0) |
| 224 | return err; |
| 225 | |
| 226 | ptr = rtsx_pci_get_cmd_data(pcr); |
| 227 | data = ((u16)ptr[1] << 8) | ptr[0]; |
| 228 | |
| 229 | if (val) |
| 230 | *val = data; |
| 231 | |
| 232 | return 0; |
| 233 | } |
Micky Ching | 663c425f | 2015-02-25 13:50:14 +0800 | [diff] [blame^] | 234 | |
| 235 | int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) |
| 236 | { |
| 237 | if (pcr->ops->read_phy) |
| 238 | return pcr->ops->read_phy(pcr, addr, val); |
| 239 | |
| 240 | return __rtsx_pci_read_phy_register(pcr, addr, val); |
| 241 | } |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 242 | EXPORT_SYMBOL_GPL(rtsx_pci_read_phy_register); |
| 243 | |
| 244 | void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr) |
| 245 | { |
| 246 | rtsx_pci_writel(pcr, RTSX_HCBCTLR, STOP_CMD); |
| 247 | rtsx_pci_writel(pcr, RTSX_HDBCTLR, STOP_DMA); |
| 248 | |
| 249 | rtsx_pci_write_register(pcr, DMACTL, 0x80, 0x80); |
| 250 | rtsx_pci_write_register(pcr, RBCTL, 0x80, 0x80); |
| 251 | } |
| 252 | EXPORT_SYMBOL_GPL(rtsx_pci_stop_cmd); |
| 253 | |
| 254 | void rtsx_pci_add_cmd(struct rtsx_pcr *pcr, |
| 255 | u8 cmd_type, u16 reg_addr, u8 mask, u8 data) |
| 256 | { |
| 257 | unsigned long flags; |
| 258 | u32 val = 0; |
| 259 | u32 *ptr = (u32 *)(pcr->host_cmds_ptr); |
| 260 | |
| 261 | val |= (u32)(cmd_type & 0x03) << 30; |
| 262 | val |= (u32)(reg_addr & 0x3FFF) << 16; |
| 263 | val |= (u32)mask << 8; |
| 264 | val |= (u32)data; |
| 265 | |
| 266 | spin_lock_irqsave(&pcr->lock, flags); |
| 267 | ptr += pcr->ci; |
| 268 | if (pcr->ci < (HOST_CMDS_BUF_LEN / 4)) { |
| 269 | put_unaligned_le32(val, ptr); |
| 270 | ptr++; |
| 271 | pcr->ci++; |
| 272 | } |
| 273 | spin_unlock_irqrestore(&pcr->lock, flags); |
| 274 | } |
| 275 | EXPORT_SYMBOL_GPL(rtsx_pci_add_cmd); |
| 276 | |
| 277 | void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr) |
| 278 | { |
| 279 | u32 val = 1 << 31; |
| 280 | |
| 281 | rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); |
| 282 | |
| 283 | val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; |
| 284 | /* Hardware Auto Response */ |
| 285 | val |= 0x40000000; |
| 286 | rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); |
| 287 | } |
| 288 | EXPORT_SYMBOL_GPL(rtsx_pci_send_cmd_no_wait); |
| 289 | |
| 290 | int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout) |
| 291 | { |
| 292 | struct completion trans_done; |
| 293 | u32 val = 1 << 31; |
| 294 | long timeleft; |
| 295 | unsigned long flags; |
| 296 | int err = 0; |
| 297 | |
| 298 | spin_lock_irqsave(&pcr->lock, flags); |
| 299 | |
| 300 | /* set up data structures for the wakeup system */ |
| 301 | pcr->done = &trans_done; |
| 302 | pcr->trans_result = TRANS_NOT_READY; |
| 303 | init_completion(&trans_done); |
| 304 | |
| 305 | rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); |
| 306 | |
| 307 | val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; |
| 308 | /* Hardware Auto Response */ |
| 309 | val |= 0x40000000; |
| 310 | rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); |
| 311 | |
| 312 | spin_unlock_irqrestore(&pcr->lock, flags); |
| 313 | |
| 314 | /* Wait for TRANS_OK_INT */ |
| 315 | timeleft = wait_for_completion_interruptible_timeout( |
| 316 | &trans_done, msecs_to_jiffies(timeout)); |
| 317 | if (timeleft <= 0) { |
| 318 | dev_dbg(&(pcr->pci->dev), "Timeout (%s %d)\n", |
| 319 | __func__, __LINE__); |
| 320 | err = -ETIMEDOUT; |
| 321 | goto finish_send_cmd; |
| 322 | } |
| 323 | |
| 324 | spin_lock_irqsave(&pcr->lock, flags); |
| 325 | if (pcr->trans_result == TRANS_RESULT_FAIL) |
| 326 | err = -EINVAL; |
| 327 | else if (pcr->trans_result == TRANS_RESULT_OK) |
| 328 | err = 0; |
| 329 | else if (pcr->trans_result == TRANS_NO_DEVICE) |
| 330 | err = -ENODEV; |
| 331 | spin_unlock_irqrestore(&pcr->lock, flags); |
| 332 | |
| 333 | finish_send_cmd: |
| 334 | spin_lock_irqsave(&pcr->lock, flags); |
| 335 | pcr->done = NULL; |
| 336 | spin_unlock_irqrestore(&pcr->lock, flags); |
| 337 | |
| 338 | if ((err < 0) && (err != -ENODEV)) |
| 339 | rtsx_pci_stop_cmd(pcr); |
| 340 | |
| 341 | if (pcr->finish_me) |
| 342 | complete(pcr->finish_me); |
| 343 | |
| 344 | return err; |
| 345 | } |
| 346 | EXPORT_SYMBOL_GPL(rtsx_pci_send_cmd); |
| 347 | |
| 348 | static void rtsx_pci_add_sg_tbl(struct rtsx_pcr *pcr, |
| 349 | dma_addr_t addr, unsigned int len, int end) |
| 350 | { |
| 351 | u64 *ptr = (u64 *)(pcr->host_sg_tbl_ptr) + pcr->sgi; |
| 352 | u64 val; |
| 353 | u8 option = SG_VALID | SG_TRANS_DATA; |
| 354 | |
| 355 | dev_dbg(&(pcr->pci->dev), "DMA addr: 0x%x, Len: 0x%x\n", |
| 356 | (unsigned int)addr, len); |
| 357 | |
| 358 | if (end) |
| 359 | option |= SG_END; |
| 360 | val = ((u64)addr << 32) | ((u64)len << 12) | option; |
| 361 | |
| 362 | put_unaligned_le64(val, ptr); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 363 | pcr->sgi++; |
| 364 | } |
| 365 | |
| 366 | int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist, |
| 367 | int num_sg, bool read, int timeout) |
| 368 | { |
Micky Ching | 8cd1183 | 2014-06-06 15:05:44 +0800 | [diff] [blame] | 369 | int err = 0, count; |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 370 | |
Micky Ching | 98fcc57 | 2014-04-29 09:54:54 +0800 | [diff] [blame] | 371 | dev_dbg(&(pcr->pci->dev), "--> %s: num_sg = %d\n", __func__, num_sg); |
Micky Ching | 8cd1183 | 2014-06-06 15:05:44 +0800 | [diff] [blame] | 372 | count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read); |
| 373 | if (count < 1) |
| 374 | return -EINVAL; |
| 375 | dev_dbg(&(pcr->pci->dev), "DMA mapping count: %d\n", count); |
Micky Ching | 98fcc57 | 2014-04-29 09:54:54 +0800 | [diff] [blame] | 376 | |
Micky Ching | 8cd1183 | 2014-06-06 15:05:44 +0800 | [diff] [blame] | 377 | err = rtsx_pci_dma_transfer(pcr, sglist, count, read, timeout); |
| 378 | |
| 379 | rtsx_pci_dma_unmap_sg(pcr, sglist, num_sg, read); |
| 380 | |
| 381 | return err; |
| 382 | } |
| 383 | EXPORT_SYMBOL_GPL(rtsx_pci_transfer_data); |
| 384 | |
| 385 | int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, |
| 386 | int num_sg, bool read) |
| 387 | { |
| 388 | enum dma_data_direction dir = read ? DMA_FROM_DEVICE : DMA_TO_DEVICE; |
| 389 | |
Micky Ching | 98fcc57 | 2014-04-29 09:54:54 +0800 | [diff] [blame] | 390 | if (pcr->remove_pci) |
| 391 | return -EINVAL; |
| 392 | |
| 393 | if ((sglist == NULL) || (num_sg <= 0)) |
| 394 | return -EINVAL; |
| 395 | |
Micky Ching | 8cd1183 | 2014-06-06 15:05:44 +0800 | [diff] [blame] | 396 | return dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dir); |
| 397 | } |
| 398 | EXPORT_SYMBOL_GPL(rtsx_pci_dma_map_sg); |
Micky Ching | 98fcc57 | 2014-04-29 09:54:54 +0800 | [diff] [blame] | 399 | |
Micky Ching | 8cd1183 | 2014-06-06 15:05:44 +0800 | [diff] [blame] | 400 | void rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, |
| 401 | int num_sg, bool read) |
| 402 | { |
| 403 | enum dma_data_direction dir = read ? DMA_FROM_DEVICE : DMA_TO_DEVICE; |
| 404 | |
| 405 | dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dir); |
| 406 | } |
| 407 | EXPORT_SYMBOL_GPL(rtsx_pci_dma_unmap_sg); |
| 408 | |
| 409 | int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist, |
| 410 | int count, bool read, int timeout) |
| 411 | { |
| 412 | struct completion trans_done; |
| 413 | struct scatterlist *sg; |
| 414 | dma_addr_t addr; |
| 415 | long timeleft; |
| 416 | unsigned long flags; |
| 417 | unsigned int len; |
| 418 | int i, err = 0; |
| 419 | u32 val; |
| 420 | u8 dir = read ? DEVICE_TO_HOST : HOST_TO_DEVICE; |
| 421 | |
| 422 | if (pcr->remove_pci) |
| 423 | return -ENODEV; |
| 424 | |
| 425 | if ((sglist == NULL) || (count < 1)) |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 426 | return -EINVAL; |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 427 | |
Micky Ching | 98fcc57 | 2014-04-29 09:54:54 +0800 | [diff] [blame] | 428 | val = ((u32)(dir & 0x01) << 29) | TRIG_DMA | ADMA_MODE; |
| 429 | pcr->sgi = 0; |
| 430 | for_each_sg(sglist, sg, count, i) { |
| 431 | addr = sg_dma_address(sg); |
| 432 | len = sg_dma_len(sg); |
| 433 | rtsx_pci_add_sg_tbl(pcr, addr, len, i == count - 1); |
| 434 | } |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 435 | |
| 436 | spin_lock_irqsave(&pcr->lock, flags); |
| 437 | |
| 438 | pcr->done = &trans_done; |
| 439 | pcr->trans_result = TRANS_NOT_READY; |
| 440 | init_completion(&trans_done); |
Micky Ching | 98fcc57 | 2014-04-29 09:54:54 +0800 | [diff] [blame] | 441 | rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr); |
| 442 | rtsx_pci_writel(pcr, RTSX_HDBCTLR, val); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 443 | |
| 444 | spin_unlock_irqrestore(&pcr->lock, flags); |
| 445 | |
| 446 | timeleft = wait_for_completion_interruptible_timeout( |
| 447 | &trans_done, msecs_to_jiffies(timeout)); |
| 448 | if (timeleft <= 0) { |
| 449 | dev_dbg(&(pcr->pci->dev), "Timeout (%s %d)\n", |
| 450 | __func__, __LINE__); |
| 451 | err = -ETIMEDOUT; |
| 452 | goto out; |
| 453 | } |
| 454 | |
| 455 | spin_lock_irqsave(&pcr->lock, flags); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 456 | if (pcr->trans_result == TRANS_RESULT_FAIL) |
| 457 | err = -EINVAL; |
| 458 | else if (pcr->trans_result == TRANS_NO_DEVICE) |
| 459 | err = -ENODEV; |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 460 | spin_unlock_irqrestore(&pcr->lock, flags); |
| 461 | |
| 462 | out: |
| 463 | spin_lock_irqsave(&pcr->lock, flags); |
| 464 | pcr->done = NULL; |
| 465 | spin_unlock_irqrestore(&pcr->lock, flags); |
| 466 | |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 467 | if ((err < 0) && (err != -ENODEV)) |
| 468 | rtsx_pci_stop_cmd(pcr); |
| 469 | |
| 470 | if (pcr->finish_me) |
| 471 | complete(pcr->finish_me); |
| 472 | |
| 473 | return err; |
| 474 | } |
Micky Ching | 8cd1183 | 2014-06-06 15:05:44 +0800 | [diff] [blame] | 475 | EXPORT_SYMBOL_GPL(rtsx_pci_dma_transfer); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 476 | |
| 477 | int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) |
| 478 | { |
| 479 | int err; |
| 480 | int i, j; |
| 481 | u16 reg; |
| 482 | u8 *ptr; |
| 483 | |
| 484 | if (buf_len > 512) |
| 485 | buf_len = 512; |
| 486 | |
| 487 | ptr = buf; |
| 488 | reg = PPBUF_BASE2; |
| 489 | for (i = 0; i < buf_len / 256; i++) { |
| 490 | rtsx_pci_init_cmd(pcr); |
| 491 | |
| 492 | for (j = 0; j < 256; j++) |
| 493 | rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); |
| 494 | |
| 495 | err = rtsx_pci_send_cmd(pcr, 250); |
| 496 | if (err < 0) |
| 497 | return err; |
| 498 | |
| 499 | memcpy(ptr, rtsx_pci_get_cmd_data(pcr), 256); |
| 500 | ptr += 256; |
| 501 | } |
| 502 | |
| 503 | if (buf_len % 256) { |
| 504 | rtsx_pci_init_cmd(pcr); |
| 505 | |
| 506 | for (j = 0; j < buf_len % 256; j++) |
| 507 | rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); |
| 508 | |
| 509 | err = rtsx_pci_send_cmd(pcr, 250); |
| 510 | if (err < 0) |
| 511 | return err; |
| 512 | } |
| 513 | |
| 514 | memcpy(ptr, rtsx_pci_get_cmd_data(pcr), buf_len % 256); |
| 515 | |
| 516 | return 0; |
| 517 | } |
| 518 | EXPORT_SYMBOL_GPL(rtsx_pci_read_ppbuf); |
| 519 | |
| 520 | int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) |
| 521 | { |
| 522 | int err; |
| 523 | int i, j; |
| 524 | u16 reg; |
| 525 | u8 *ptr; |
| 526 | |
| 527 | if (buf_len > 512) |
| 528 | buf_len = 512; |
| 529 | |
| 530 | ptr = buf; |
| 531 | reg = PPBUF_BASE2; |
| 532 | for (i = 0; i < buf_len / 256; i++) { |
| 533 | rtsx_pci_init_cmd(pcr); |
| 534 | |
| 535 | for (j = 0; j < 256; j++) { |
| 536 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, |
| 537 | reg++, 0xFF, *ptr); |
| 538 | ptr++; |
| 539 | } |
| 540 | |
| 541 | err = rtsx_pci_send_cmd(pcr, 250); |
| 542 | if (err < 0) |
| 543 | return err; |
| 544 | } |
| 545 | |
| 546 | if (buf_len % 256) { |
| 547 | rtsx_pci_init_cmd(pcr); |
| 548 | |
| 549 | for (j = 0; j < buf_len % 256; j++) { |
| 550 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, |
| 551 | reg++, 0xFF, *ptr); |
| 552 | ptr++; |
| 553 | } |
| 554 | |
| 555 | err = rtsx_pci_send_cmd(pcr, 250); |
| 556 | if (err < 0) |
| 557 | return err; |
| 558 | } |
| 559 | |
| 560 | return 0; |
| 561 | } |
| 562 | EXPORT_SYMBOL_GPL(rtsx_pci_write_ppbuf); |
| 563 | |
| 564 | static int rtsx_pci_set_pull_ctl(struct rtsx_pcr *pcr, const u32 *tbl) |
| 565 | { |
| 566 | int err; |
| 567 | |
| 568 | rtsx_pci_init_cmd(pcr); |
| 569 | |
| 570 | while (*tbl & 0xFFFF0000) { |
| 571 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, |
| 572 | (u16)(*tbl >> 16), 0xFF, (u8)(*tbl)); |
| 573 | tbl++; |
| 574 | } |
| 575 | |
| 576 | err = rtsx_pci_send_cmd(pcr, 100); |
| 577 | if (err < 0) |
| 578 | return err; |
| 579 | |
| 580 | return 0; |
| 581 | } |
| 582 | |
| 583 | int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card) |
| 584 | { |
| 585 | const u32 *tbl; |
| 586 | |
| 587 | if (card == RTSX_SD_CARD) |
| 588 | tbl = pcr->sd_pull_ctl_enable_tbl; |
| 589 | else if (card == RTSX_MS_CARD) |
| 590 | tbl = pcr->ms_pull_ctl_enable_tbl; |
| 591 | else |
| 592 | return -EINVAL; |
| 593 | |
| 594 | return rtsx_pci_set_pull_ctl(pcr, tbl); |
| 595 | } |
| 596 | EXPORT_SYMBOL_GPL(rtsx_pci_card_pull_ctl_enable); |
| 597 | |
| 598 | int rtsx_pci_card_pull_ctl_disable(struct rtsx_pcr *pcr, int card) |
| 599 | { |
| 600 | const u32 *tbl; |
| 601 | |
| 602 | if (card == RTSX_SD_CARD) |
| 603 | tbl = pcr->sd_pull_ctl_disable_tbl; |
| 604 | else if (card == RTSX_MS_CARD) |
| 605 | tbl = pcr->ms_pull_ctl_disable_tbl; |
| 606 | else |
| 607 | return -EINVAL; |
| 608 | |
| 609 | |
| 610 | return rtsx_pci_set_pull_ctl(pcr, tbl); |
| 611 | } |
| 612 | EXPORT_SYMBOL_GPL(rtsx_pci_card_pull_ctl_disable); |
| 613 | |
| 614 | static void rtsx_pci_enable_bus_int(struct rtsx_pcr *pcr) |
| 615 | { |
| 616 | pcr->bier = TRANS_OK_INT_EN | TRANS_FAIL_INT_EN | SD_INT_EN; |
| 617 | |
| 618 | if (pcr->num_slots > 1) |
| 619 | pcr->bier |= MS_INT_EN; |
| 620 | |
| 621 | /* Enable Bus Interrupt */ |
| 622 | rtsx_pci_writel(pcr, RTSX_BIER, pcr->bier); |
| 623 | |
| 624 | dev_dbg(&(pcr->pci->dev), "RTSX_BIER: 0x%08x\n", pcr->bier); |
| 625 | } |
| 626 | |
| 627 | static inline u8 double_ssc_depth(u8 depth) |
| 628 | { |
| 629 | return ((depth > 1) ? (depth - 1) : depth); |
| 630 | } |
| 631 | |
| 632 | static u8 revise_ssc_depth(u8 ssc_depth, u8 div) |
| 633 | { |
| 634 | if (div > CLK_DIV_1) { |
| 635 | if (ssc_depth > (div - 1)) |
| 636 | ssc_depth -= (div - 1); |
| 637 | else |
| 638 | ssc_depth = SSC_DEPTH_4M; |
| 639 | } |
| 640 | |
| 641 | return ssc_depth; |
| 642 | } |
| 643 | |
| 644 | int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, |
| 645 | u8 ssc_depth, bool initial_mode, bool double_clk, bool vpclk) |
| 646 | { |
| 647 | int err, clk; |
Wei WANG | eebbe25 | 2013-01-29 15:21:36 +0800 | [diff] [blame] | 648 | u8 n, clk_divider, mcu_cnt, div; |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 649 | u8 depth[] = { |
| 650 | [RTSX_SSC_DEPTH_4M] = SSC_DEPTH_4M, |
| 651 | [RTSX_SSC_DEPTH_2M] = SSC_DEPTH_2M, |
| 652 | [RTSX_SSC_DEPTH_1M] = SSC_DEPTH_1M, |
| 653 | [RTSX_SSC_DEPTH_500K] = SSC_DEPTH_500K, |
| 654 | [RTSX_SSC_DEPTH_250K] = SSC_DEPTH_250K, |
| 655 | }; |
| 656 | |
| 657 | if (initial_mode) { |
| 658 | /* We use 250k(around) here, in initial stage */ |
| 659 | clk_divider = SD_CLK_DIVIDE_128; |
| 660 | card_clock = 30000000; |
| 661 | } else { |
| 662 | clk_divider = SD_CLK_DIVIDE_0; |
| 663 | } |
| 664 | err = rtsx_pci_write_register(pcr, SD_CFG1, |
| 665 | SD_CLK_DIVIDE_MASK, clk_divider); |
| 666 | if (err < 0) |
| 667 | return err; |
| 668 | |
| 669 | card_clock /= 1000000; |
| 670 | dev_dbg(&(pcr->pci->dev), "Switch card clock to %dMHz\n", card_clock); |
| 671 | |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 672 | clk = card_clock; |
| 673 | if (!initial_mode && double_clk) |
| 674 | clk = card_clock * 2; |
| 675 | dev_dbg(&(pcr->pci->dev), |
| 676 | "Internal SSC clock: %dMHz (cur_clock = %d)\n", |
| 677 | clk, pcr->cur_clock); |
| 678 | |
| 679 | if (clk == pcr->cur_clock) |
| 680 | return 0; |
| 681 | |
Wei WANG | ab4e8f8 | 2013-01-23 09:51:06 +0800 | [diff] [blame] | 682 | if (pcr->ops->conv_clk_and_div_n) |
Wei WANG | 678cacd | 2013-01-29 15:21:35 +0800 | [diff] [blame] | 683 | n = (u8)pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N); |
Wei WANG | ab4e8f8 | 2013-01-23 09:51:06 +0800 | [diff] [blame] | 684 | else |
Wei WANG | 678cacd | 2013-01-29 15:21:35 +0800 | [diff] [blame] | 685 | n = (u8)(clk - 2); |
Wei WANG | eebbe25 | 2013-01-29 15:21:36 +0800 | [diff] [blame] | 686 | if ((clk <= 2) || (n > MAX_DIV_N_PCR)) |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 687 | return -EINVAL; |
| 688 | |
| 689 | mcu_cnt = (u8)(125/clk + 3); |
| 690 | if (mcu_cnt > 15) |
| 691 | mcu_cnt = 15; |
| 692 | |
Wei WANG | eebbe25 | 2013-01-29 15:21:36 +0800 | [diff] [blame] | 693 | /* Make sure that the SSC clock div_n is not less than MIN_DIV_N_PCR */ |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 694 | div = CLK_DIV_1; |
Wei WANG | eebbe25 | 2013-01-29 15:21:36 +0800 | [diff] [blame] | 695 | while ((n < MIN_DIV_N_PCR) && (div < CLK_DIV_8)) { |
Wei WANG | ab4e8f8 | 2013-01-23 09:51:06 +0800 | [diff] [blame] | 696 | if (pcr->ops->conv_clk_and_div_n) { |
Wei WANG | 678cacd | 2013-01-29 15:21:35 +0800 | [diff] [blame] | 697 | int dbl_clk = pcr->ops->conv_clk_and_div_n(n, |
Wei WANG | ab4e8f8 | 2013-01-23 09:51:06 +0800 | [diff] [blame] | 698 | DIV_N_TO_CLK) * 2; |
Wei WANG | 678cacd | 2013-01-29 15:21:35 +0800 | [diff] [blame] | 699 | n = (u8)pcr->ops->conv_clk_and_div_n(dbl_clk, |
Wei WANG | ab4e8f8 | 2013-01-23 09:51:06 +0800 | [diff] [blame] | 700 | CLK_TO_DIV_N); |
| 701 | } else { |
Wei WANG | 678cacd | 2013-01-29 15:21:35 +0800 | [diff] [blame] | 702 | n = (n + 2) * 2 - 2; |
Wei WANG | ab4e8f8 | 2013-01-23 09:51:06 +0800 | [diff] [blame] | 703 | } |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 704 | div++; |
| 705 | } |
Wei WANG | 678cacd | 2013-01-29 15:21:35 +0800 | [diff] [blame] | 706 | dev_dbg(&(pcr->pci->dev), "n = %d, div = %d\n", n, div); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 707 | |
| 708 | ssc_depth = depth[ssc_depth]; |
| 709 | if (double_clk) |
| 710 | ssc_depth = double_ssc_depth(ssc_depth); |
| 711 | |
| 712 | ssc_depth = revise_ssc_depth(ssc_depth, div); |
| 713 | dev_dbg(&(pcr->pci->dev), "ssc_depth = %d\n", ssc_depth); |
| 714 | |
| 715 | rtsx_pci_init_cmd(pcr); |
| 716 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, |
| 717 | CLK_LOW_FREQ, CLK_LOW_FREQ); |
| 718 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, |
| 719 | 0xFF, (div << 4) | mcu_cnt); |
| 720 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); |
| 721 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, |
| 722 | SSC_DEPTH_MASK, ssc_depth); |
Wei WANG | 678cacd | 2013-01-29 15:21:35 +0800 | [diff] [blame] | 723 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 724 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); |
| 725 | if (vpclk) { |
| 726 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, |
| 727 | PHASE_NOT_RESET, 0); |
| 728 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, |
| 729 | PHASE_NOT_RESET, PHASE_NOT_RESET); |
| 730 | } |
| 731 | |
| 732 | err = rtsx_pci_send_cmd(pcr, 2000); |
| 733 | if (err < 0) |
| 734 | return err; |
| 735 | |
| 736 | /* Wait SSC clock stable */ |
| 737 | udelay(10); |
| 738 | err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); |
| 739 | if (err < 0) |
| 740 | return err; |
| 741 | |
| 742 | pcr->cur_clock = clk; |
| 743 | return 0; |
| 744 | } |
| 745 | EXPORT_SYMBOL_GPL(rtsx_pci_switch_clock); |
| 746 | |
| 747 | int rtsx_pci_card_power_on(struct rtsx_pcr *pcr, int card) |
| 748 | { |
| 749 | if (pcr->ops->card_power_on) |
| 750 | return pcr->ops->card_power_on(pcr, card); |
| 751 | |
| 752 | return 0; |
| 753 | } |
| 754 | EXPORT_SYMBOL_GPL(rtsx_pci_card_power_on); |
| 755 | |
| 756 | int rtsx_pci_card_power_off(struct rtsx_pcr *pcr, int card) |
| 757 | { |
| 758 | if (pcr->ops->card_power_off) |
| 759 | return pcr->ops->card_power_off(pcr, card); |
| 760 | |
| 761 | return 0; |
| 762 | } |
| 763 | EXPORT_SYMBOL_GPL(rtsx_pci_card_power_off); |
| 764 | |
Wei WANG | c348195 | 2013-02-08 15:24:27 +0800 | [diff] [blame] | 765 | int rtsx_pci_card_exclusive_check(struct rtsx_pcr *pcr, int card) |
| 766 | { |
| 767 | unsigned int cd_mask[] = { |
| 768 | [RTSX_SD_CARD] = SD_EXIST, |
| 769 | [RTSX_MS_CARD] = MS_EXIST |
| 770 | }; |
| 771 | |
Wei WANG | 773ccdf | 2013-08-20 14:18:51 +0800 | [diff] [blame] | 772 | if (!(pcr->flags & PCR_MS_PMOS)) { |
Wei WANG | c348195 | 2013-02-08 15:24:27 +0800 | [diff] [blame] | 773 | /* When using single PMOS, accessing card is not permitted |
| 774 | * if the existing card is not the designated one. |
| 775 | */ |
| 776 | if (pcr->card_exist & (~cd_mask[card])) |
| 777 | return -EIO; |
| 778 | } |
| 779 | |
| 780 | return 0; |
| 781 | } |
| 782 | EXPORT_SYMBOL_GPL(rtsx_pci_card_exclusive_check); |
| 783 | |
Wei WANG | d817ac4 | 2013-01-23 09:51:04 +0800 | [diff] [blame] | 784 | int rtsx_pci_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) |
| 785 | { |
| 786 | if (pcr->ops->switch_output_voltage) |
| 787 | return pcr->ops->switch_output_voltage(pcr, voltage); |
| 788 | |
| 789 | return 0; |
| 790 | } |
| 791 | EXPORT_SYMBOL_GPL(rtsx_pci_switch_output_voltage); |
| 792 | |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 793 | unsigned int rtsx_pci_card_exist(struct rtsx_pcr *pcr) |
| 794 | { |
| 795 | unsigned int val; |
| 796 | |
| 797 | val = rtsx_pci_readl(pcr, RTSX_BIPR); |
| 798 | if (pcr->ops->cd_deglitch) |
| 799 | val = pcr->ops->cd_deglitch(pcr); |
| 800 | |
| 801 | return val; |
| 802 | } |
| 803 | EXPORT_SYMBOL_GPL(rtsx_pci_card_exist); |
| 804 | |
| 805 | void rtsx_pci_complete_unfinished_transfer(struct rtsx_pcr *pcr) |
| 806 | { |
| 807 | struct completion finish; |
| 808 | |
| 809 | pcr->finish_me = &finish; |
| 810 | init_completion(&finish); |
| 811 | |
| 812 | if (pcr->done) |
| 813 | complete(pcr->done); |
| 814 | |
| 815 | if (!pcr->remove_pci) |
| 816 | rtsx_pci_stop_cmd(pcr); |
| 817 | |
| 818 | wait_for_completion_interruptible_timeout(&finish, |
| 819 | msecs_to_jiffies(2)); |
| 820 | pcr->finish_me = NULL; |
| 821 | } |
| 822 | EXPORT_SYMBOL_GPL(rtsx_pci_complete_unfinished_transfer); |
| 823 | |
| 824 | static void rtsx_pci_card_detect(struct work_struct *work) |
| 825 | { |
| 826 | struct delayed_work *dwork; |
| 827 | struct rtsx_pcr *pcr; |
| 828 | unsigned long flags; |
Wei WANG | 504decc | 2013-01-29 15:21:37 +0800 | [diff] [blame] | 829 | unsigned int card_detect = 0, card_inserted, card_removed; |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 830 | u32 irq_status; |
| 831 | |
| 832 | dwork = to_delayed_work(work); |
| 833 | pcr = container_of(dwork, struct rtsx_pcr, carddet_work); |
| 834 | |
| 835 | dev_dbg(&(pcr->pci->dev), "--> %s\n", __func__); |
| 836 | |
Wei WANG | 504decc | 2013-01-29 15:21:37 +0800 | [diff] [blame] | 837 | mutex_lock(&pcr->pcr_mutex); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 838 | spin_lock_irqsave(&pcr->lock, flags); |
| 839 | |
| 840 | irq_status = rtsx_pci_readl(pcr, RTSX_BIPR); |
| 841 | dev_dbg(&(pcr->pci->dev), "irq_status: 0x%08x\n", irq_status); |
| 842 | |
Wei WANG | 504decc | 2013-01-29 15:21:37 +0800 | [diff] [blame] | 843 | irq_status &= CARD_EXIST; |
| 844 | card_inserted = pcr->card_inserted & irq_status; |
| 845 | card_removed = pcr->card_removed; |
| 846 | pcr->card_inserted = 0; |
| 847 | pcr->card_removed = 0; |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 848 | |
| 849 | spin_unlock_irqrestore(&pcr->lock, flags); |
| 850 | |
Wei WANG | 504decc | 2013-01-29 15:21:37 +0800 | [diff] [blame] | 851 | if (card_inserted || card_removed) { |
| 852 | dev_dbg(&(pcr->pci->dev), |
| 853 | "card_inserted: 0x%x, card_removed: 0x%x\n", |
| 854 | card_inserted, card_removed); |
| 855 | |
| 856 | if (pcr->ops->cd_deglitch) |
| 857 | card_inserted = pcr->ops->cd_deglitch(pcr); |
| 858 | |
| 859 | card_detect = card_inserted | card_removed; |
Wei WANG | c348195 | 2013-02-08 15:24:27 +0800 | [diff] [blame] | 860 | |
| 861 | pcr->card_exist |= card_inserted; |
| 862 | pcr->card_exist &= ~card_removed; |
Wei WANG | 504decc | 2013-01-29 15:21:37 +0800 | [diff] [blame] | 863 | } |
| 864 | |
| 865 | mutex_unlock(&pcr->pcr_mutex); |
| 866 | |
Wei WANG | 2d1484f | 2013-01-27 01:55:16 +0100 | [diff] [blame] | 867 | if ((card_detect & SD_EXIST) && pcr->slots[RTSX_SD_CARD].card_event) |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 868 | pcr->slots[RTSX_SD_CARD].card_event( |
| 869 | pcr->slots[RTSX_SD_CARD].p_dev); |
Wei WANG | 2d1484f | 2013-01-27 01:55:16 +0100 | [diff] [blame] | 870 | if ((card_detect & MS_EXIST) && pcr->slots[RTSX_MS_CARD].card_event) |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 871 | pcr->slots[RTSX_MS_CARD].card_event( |
| 872 | pcr->slots[RTSX_MS_CARD].p_dev); |
| 873 | } |
| 874 | |
| 875 | static irqreturn_t rtsx_pci_isr(int irq, void *dev_id) |
| 876 | { |
| 877 | struct rtsx_pcr *pcr = dev_id; |
| 878 | u32 int_reg; |
| 879 | |
| 880 | if (!pcr) |
| 881 | return IRQ_NONE; |
| 882 | |
| 883 | spin_lock(&pcr->lock); |
| 884 | |
| 885 | int_reg = rtsx_pci_readl(pcr, RTSX_BIPR); |
| 886 | /* Clear interrupt flag */ |
| 887 | rtsx_pci_writel(pcr, RTSX_BIPR, int_reg); |
| 888 | if ((int_reg & pcr->bier) == 0) { |
| 889 | spin_unlock(&pcr->lock); |
| 890 | return IRQ_NONE; |
| 891 | } |
| 892 | if (int_reg == 0xFFFFFFFF) { |
| 893 | spin_unlock(&pcr->lock); |
| 894 | return IRQ_HANDLED; |
| 895 | } |
| 896 | |
| 897 | int_reg &= (pcr->bier | 0x7FFFFF); |
| 898 | |
| 899 | if (int_reg & SD_INT) { |
| 900 | if (int_reg & SD_EXIST) { |
| 901 | pcr->card_inserted |= SD_EXIST; |
| 902 | } else { |
| 903 | pcr->card_removed |= SD_EXIST; |
| 904 | pcr->card_inserted &= ~SD_EXIST; |
| 905 | } |
| 906 | } |
| 907 | |
| 908 | if (int_reg & MS_INT) { |
| 909 | if (int_reg & MS_EXIST) { |
| 910 | pcr->card_inserted |= MS_EXIST; |
| 911 | } else { |
| 912 | pcr->card_removed |= MS_EXIST; |
| 913 | pcr->card_inserted &= ~MS_EXIST; |
| 914 | } |
| 915 | } |
| 916 | |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 917 | if (int_reg & (NEED_COMPLETE_INT | DELINK_INT)) { |
Micky Ching | 98fcc57 | 2014-04-29 09:54:54 +0800 | [diff] [blame] | 918 | if (int_reg & (TRANS_FAIL_INT | DELINK_INT)) { |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 919 | pcr->trans_result = TRANS_RESULT_FAIL; |
Micky Ching | 98fcc57 | 2014-04-29 09:54:54 +0800 | [diff] [blame] | 920 | if (pcr->done) |
| 921 | complete(pcr->done); |
| 922 | } else if (int_reg & TRANS_OK_INT) { |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 923 | pcr->trans_result = TRANS_RESULT_OK; |
Micky Ching | 98fcc57 | 2014-04-29 09:54:54 +0800 | [diff] [blame] | 924 | if (pcr->done) |
| 925 | complete(pcr->done); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 926 | } |
| 927 | } |
| 928 | |
Wei WANG | 504decc | 2013-01-29 15:21:37 +0800 | [diff] [blame] | 929 | if (pcr->card_inserted || pcr->card_removed) |
| 930 | schedule_delayed_work(&pcr->carddet_work, |
| 931 | msecs_to_jiffies(200)); |
| 932 | |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 933 | spin_unlock(&pcr->lock); |
| 934 | return IRQ_HANDLED; |
| 935 | } |
| 936 | |
| 937 | static int rtsx_pci_acquire_irq(struct rtsx_pcr *pcr) |
| 938 | { |
| 939 | dev_info(&(pcr->pci->dev), "%s: pcr->msi_en = %d, pci->irq = %d\n", |
| 940 | __func__, pcr->msi_en, pcr->pci->irq); |
| 941 | |
| 942 | if (request_irq(pcr->pci->irq, rtsx_pci_isr, |
| 943 | pcr->msi_en ? 0 : IRQF_SHARED, |
| 944 | DRV_NAME_RTSX_PCI, pcr)) { |
| 945 | dev_err(&(pcr->pci->dev), |
| 946 | "rtsx_sdmmc: unable to grab IRQ %d, disabling device\n", |
| 947 | pcr->pci->irq); |
| 948 | return -1; |
| 949 | } |
| 950 | |
| 951 | pcr->irq = pcr->pci->irq; |
| 952 | pci_intx(pcr->pci, !pcr->msi_en); |
| 953 | |
| 954 | return 0; |
| 955 | } |
| 956 | |
| 957 | static void rtsx_pci_idle_work(struct work_struct *work) |
| 958 | { |
| 959 | struct delayed_work *dwork = to_delayed_work(work); |
| 960 | struct rtsx_pcr *pcr = container_of(dwork, struct rtsx_pcr, idle_work); |
| 961 | |
| 962 | dev_dbg(&(pcr->pci->dev), "--> %s\n", __func__); |
| 963 | |
| 964 | mutex_lock(&pcr->pcr_mutex); |
| 965 | |
| 966 | pcr->state = PDEV_STAT_IDLE; |
| 967 | |
| 968 | if (pcr->ops->disable_auto_blink) |
| 969 | pcr->ops->disable_auto_blink(pcr); |
| 970 | if (pcr->ops->turn_off_led) |
| 971 | pcr->ops->turn_off_led(pcr); |
| 972 | |
Wei WANG | 773ccdf | 2013-08-20 14:18:51 +0800 | [diff] [blame] | 973 | if (pcr->aspm_en) |
Micky Ching | 19f3bd5 | 2015-02-25 13:50:13 +0800 | [diff] [blame] | 974 | rtsx_pci_enable_aspm(pcr); |
Wei WANG | 773ccdf | 2013-08-20 14:18:51 +0800 | [diff] [blame] | 975 | |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 976 | mutex_unlock(&pcr->pcr_mutex); |
| 977 | } |
| 978 | |
Thierry Reding | 451be64 | 2014-10-02 09:25:17 +0200 | [diff] [blame] | 979 | #ifdef CONFIG_PM |
Wei WANG | 5947c16 | 2013-08-20 14:18:52 +0800 | [diff] [blame] | 980 | static void rtsx_pci_power_off(struct rtsx_pcr *pcr, u8 pm_state) |
| 981 | { |
| 982 | if (pcr->ops->turn_off_led) |
| 983 | pcr->ops->turn_off_led(pcr); |
| 984 | |
| 985 | rtsx_pci_writel(pcr, RTSX_BIER, 0); |
| 986 | pcr->bier = 0; |
| 987 | |
| 988 | rtsx_pci_write_register(pcr, PETXCFG, 0x08, 0x08); |
| 989 | rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, pm_state); |
| 990 | |
| 991 | if (pcr->ops->force_power_down) |
Wei WANG | eb891c6 | 2013-08-20 14:18:55 +0800 | [diff] [blame] | 992 | pcr->ops->force_power_down(pcr, pm_state); |
Wei WANG | 5947c16 | 2013-08-20 14:18:52 +0800 | [diff] [blame] | 993 | } |
Thierry Reding | 451be64 | 2014-10-02 09:25:17 +0200 | [diff] [blame] | 994 | #endif |
Wei WANG | 5947c16 | 2013-08-20 14:18:52 +0800 | [diff] [blame] | 995 | |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 996 | static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) |
| 997 | { |
| 998 | int err; |
| 999 | |
Micky Ching | 19f3bd5 | 2015-02-25 13:50:13 +0800 | [diff] [blame] | 1000 | pcr->pcie_cap = pci_find_capability(pcr->pci, PCI_CAP_ID_EXP); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1001 | rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); |
| 1002 | |
| 1003 | rtsx_pci_enable_bus_int(pcr); |
| 1004 | |
| 1005 | /* Power on SSC */ |
| 1006 | err = rtsx_pci_write_register(pcr, FPDCTL, SSC_POWER_DOWN, 0); |
| 1007 | if (err < 0) |
| 1008 | return err; |
| 1009 | |
| 1010 | /* Wait SSC power stable */ |
| 1011 | udelay(200); |
| 1012 | |
Micky Ching | 19f3bd5 | 2015-02-25 13:50:13 +0800 | [diff] [blame] | 1013 | rtsx_pci_disable_aspm(pcr); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1014 | if (pcr->ops->optimize_phy) { |
| 1015 | err = pcr->ops->optimize_phy(pcr); |
| 1016 | if (err < 0) |
| 1017 | return err; |
| 1018 | } |
| 1019 | |
| 1020 | rtsx_pci_init_cmd(pcr); |
| 1021 | |
| 1022 | /* Set mcu_cnt to 7 to ensure data can be sampled properly */ |
| 1023 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, 0x07, 0x07); |
| 1024 | |
| 1025 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, HOST_SLEEP_STATE, 0x03, 0x00); |
| 1026 | /* Disable card clock */ |
| 1027 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, 0x1E, 0); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1028 | /* Reset delink mode */ |
| 1029 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x0A, 0); |
| 1030 | /* Card driving select */ |
Wei WANG | 773ccdf | 2013-08-20 14:18:51 +0800 | [diff] [blame] | 1031 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DRIVE_SEL, |
| 1032 | 0xFF, pcr->card_drive_sel); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1033 | /* Enable SSC Clock */ |
| 1034 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, |
| 1035 | 0xFF, SSC_8X_EN | SSC_SEL_4M); |
| 1036 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, 0x12); |
| 1037 | /* Disable cd_pwr_save */ |
| 1038 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x16, 0x10); |
| 1039 | /* Clear Link Ready Interrupt */ |
| 1040 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, |
| 1041 | LINK_RDY_INT, LINK_RDY_INT); |
| 1042 | /* Enlarge the estimation window of PERST# glitch |
| 1043 | * to reduce the chance of invalid card interrupt |
| 1044 | */ |
| 1045 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PERST_GLITCH_WIDTH, 0xFF, 0x80); |
| 1046 | /* Update RC oscillator to 400k |
| 1047 | * bit[0] F_HIGH: for RC oscillator, Rst_value is 1'b1 |
| 1048 | * 1: 2M 0: 400k |
| 1049 | */ |
| 1050 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RCCTL, 0x01, 0x00); |
| 1051 | /* Set interrupt write clear |
| 1052 | * bit 1: U_elbi_if_rd_clr_en |
| 1053 | * 1: Enable ELBI interrupt[31:22] & [7:0] flag read clear |
| 1054 | * 0: ELBI interrupt flag[31:22] & [7:0] only can be write clear |
| 1055 | */ |
| 1056 | rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, NFTS_TX_CTRL, 0x02, 0); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1057 | |
| 1058 | err = rtsx_pci_send_cmd(pcr, 100); |
| 1059 | if (err < 0) |
| 1060 | return err; |
| 1061 | |
| 1062 | /* Enable clk_request_n to enable clock power management */ |
Micky Ching | 19f3bd5 | 2015-02-25 13:50:13 +0800 | [diff] [blame] | 1063 | rtsx_pci_write_config_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL + 1, 1); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1064 | /* Enter L1 when host tx idle */ |
| 1065 | rtsx_pci_write_config_byte(pcr, 0x70F, 0x5B); |
| 1066 | |
| 1067 | if (pcr->ops->extra_init_hw) { |
| 1068 | err = pcr->ops->extra_init_hw(pcr); |
| 1069 | if (err < 0) |
| 1070 | return err; |
| 1071 | } |
| 1072 | |
Wei WANG | c348195 | 2013-02-08 15:24:27 +0800 | [diff] [blame] | 1073 | /* No CD interrupt if probing driver with card inserted. |
| 1074 | * So we need to initialize pcr->card_exist here. |
| 1075 | */ |
| 1076 | if (pcr->ops->cd_deglitch) |
| 1077 | pcr->card_exist = pcr->ops->cd_deglitch(pcr); |
| 1078 | else |
| 1079 | pcr->card_exist = rtsx_pci_readl(pcr, RTSX_BIPR) & CARD_EXIST; |
| 1080 | |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1081 | return 0; |
| 1082 | } |
| 1083 | |
| 1084 | static int rtsx_pci_init_chip(struct rtsx_pcr *pcr) |
| 1085 | { |
| 1086 | int err; |
| 1087 | |
| 1088 | spin_lock_init(&pcr->lock); |
| 1089 | mutex_init(&pcr->pcr_mutex); |
| 1090 | |
| 1091 | switch (PCI_PID(pcr)) { |
| 1092 | default: |
| 1093 | case 0x5209: |
| 1094 | rts5209_init_params(pcr); |
| 1095 | break; |
| 1096 | |
| 1097 | case 0x5229: |
| 1098 | rts5229_init_params(pcr); |
| 1099 | break; |
| 1100 | |
| 1101 | case 0x5289: |
| 1102 | rtl8411_init_params(pcr); |
| 1103 | break; |
Roger Tseng | e123793 | 2013-02-04 15:45:59 +0800 | [diff] [blame] | 1104 | |
| 1105 | case 0x5227: |
| 1106 | rts5227_init_params(pcr); |
| 1107 | break; |
Wei WANG | 4c4b8c1 | 2013-04-11 10:43:40 +0800 | [diff] [blame] | 1108 | |
| 1109 | case 0x5249: |
| 1110 | rts5249_init_params(pcr); |
| 1111 | break; |
Roger Tseng | 9032eab | 2013-04-19 21:52:42 +0800 | [diff] [blame] | 1112 | |
Micky Ching | 663c425f | 2015-02-25 13:50:14 +0800 | [diff] [blame^] | 1113 | case 0x524A: |
| 1114 | rts524a_init_params(pcr); |
| 1115 | break; |
| 1116 | |
Roger Tseng | 9032eab | 2013-04-19 21:52:42 +0800 | [diff] [blame] | 1117 | case 0x5287: |
| 1118 | rtl8411b_init_params(pcr); |
| 1119 | break; |
Micky Ching | 56cb3cc | 2013-12-18 10:03:13 +0800 | [diff] [blame] | 1120 | |
| 1121 | case 0x5286: |
| 1122 | rtl8402_init_params(pcr); |
| 1123 | break; |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1124 | } |
| 1125 | |
| 1126 | dev_dbg(&(pcr->pci->dev), "PID: 0x%04x, IC version: 0x%02x\n", |
| 1127 | PCI_PID(pcr), pcr->ic_version); |
| 1128 | |
| 1129 | pcr->slots = kcalloc(pcr->num_slots, sizeof(struct rtsx_slot), |
| 1130 | GFP_KERNEL); |
| 1131 | if (!pcr->slots) |
| 1132 | return -ENOMEM; |
| 1133 | |
Wei WANG | 773ccdf | 2013-08-20 14:18:51 +0800 | [diff] [blame] | 1134 | if (pcr->ops->fetch_vendor_settings) |
| 1135 | pcr->ops->fetch_vendor_settings(pcr); |
| 1136 | |
| 1137 | dev_dbg(&(pcr->pci->dev), "pcr->aspm_en = 0x%x\n", pcr->aspm_en); |
| 1138 | dev_dbg(&(pcr->pci->dev), "pcr->sd30_drive_sel_1v8 = 0x%x\n", |
| 1139 | pcr->sd30_drive_sel_1v8); |
| 1140 | dev_dbg(&(pcr->pci->dev), "pcr->sd30_drive_sel_3v3 = 0x%x\n", |
| 1141 | pcr->sd30_drive_sel_3v3); |
| 1142 | dev_dbg(&(pcr->pci->dev), "pcr->card_drive_sel = 0x%x\n", |
| 1143 | pcr->card_drive_sel); |
| 1144 | dev_dbg(&(pcr->pci->dev), "pcr->flags = 0x%x\n", pcr->flags); |
| 1145 | |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1146 | pcr->state = PDEV_STAT_IDLE; |
| 1147 | err = rtsx_pci_init_hw(pcr); |
| 1148 | if (err < 0) { |
| 1149 | kfree(pcr->slots); |
| 1150 | return err; |
| 1151 | } |
| 1152 | |
| 1153 | return 0; |
| 1154 | } |
| 1155 | |
Greg Kroah-Hartman | 612b95c | 2012-12-21 15:03:15 -0800 | [diff] [blame] | 1156 | static int rtsx_pci_probe(struct pci_dev *pcidev, |
| 1157 | const struct pci_device_id *id) |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1158 | { |
| 1159 | struct rtsx_pcr *pcr; |
| 1160 | struct pcr_handle *handle; |
| 1161 | u32 base, len; |
| 1162 | int ret, i; |
| 1163 | |
| 1164 | dev_dbg(&(pcidev->dev), |
| 1165 | ": Realtek PCI-E Card Reader found at %s [%04x:%04x] (rev %x)\n", |
| 1166 | pci_name(pcidev), (int)pcidev->vendor, (int)pcidev->device, |
| 1167 | (int)pcidev->revision); |
| 1168 | |
Wei WANG | f84ef04 | 2013-01-29 15:21:34 +0800 | [diff] [blame] | 1169 | ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32)); |
| 1170 | if (ret < 0) |
| 1171 | return ret; |
| 1172 | |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1173 | ret = pci_enable_device(pcidev); |
| 1174 | if (ret) |
| 1175 | return ret; |
| 1176 | |
| 1177 | ret = pci_request_regions(pcidev, DRV_NAME_RTSX_PCI); |
| 1178 | if (ret) |
| 1179 | goto disable; |
| 1180 | |
| 1181 | pcr = kzalloc(sizeof(*pcr), GFP_KERNEL); |
| 1182 | if (!pcr) { |
| 1183 | ret = -ENOMEM; |
| 1184 | goto release_pci; |
| 1185 | } |
| 1186 | |
| 1187 | handle = kzalloc(sizeof(*handle), GFP_KERNEL); |
| 1188 | if (!handle) { |
| 1189 | ret = -ENOMEM; |
| 1190 | goto free_pcr; |
| 1191 | } |
| 1192 | handle->pcr = pcr; |
| 1193 | |
Tejun Heo | 9f12563 | 2013-02-27 17:04:29 -0800 | [diff] [blame] | 1194 | idr_preload(GFP_KERNEL); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1195 | spin_lock(&rtsx_pci_lock); |
Tejun Heo | 9f12563 | 2013-02-27 17:04:29 -0800 | [diff] [blame] | 1196 | ret = idr_alloc(&rtsx_pci_idr, pcr, 0, 0, GFP_NOWAIT); |
| 1197 | if (ret >= 0) |
| 1198 | pcr->id = ret; |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1199 | spin_unlock(&rtsx_pci_lock); |
Tejun Heo | 9f12563 | 2013-02-27 17:04:29 -0800 | [diff] [blame] | 1200 | idr_preload_end(); |
| 1201 | if (ret < 0) |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1202 | goto free_handle; |
| 1203 | |
| 1204 | pcr->pci = pcidev; |
| 1205 | dev_set_drvdata(&pcidev->dev, handle); |
| 1206 | |
| 1207 | len = pci_resource_len(pcidev, 0); |
| 1208 | base = pci_resource_start(pcidev, 0); |
| 1209 | pcr->remap_addr = ioremap_nocache(base, len); |
| 1210 | if (!pcr->remap_addr) { |
| 1211 | ret = -ENOMEM; |
Sachin Kamat | af1192d | 2013-09-20 14:19:34 +0530 | [diff] [blame] | 1212 | goto free_handle; |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1213 | } |
| 1214 | |
| 1215 | pcr->rtsx_resv_buf = dma_alloc_coherent(&(pcidev->dev), |
| 1216 | RTSX_RESV_BUF_LEN, &(pcr->rtsx_resv_buf_addr), |
| 1217 | GFP_KERNEL); |
| 1218 | if (pcr->rtsx_resv_buf == NULL) { |
| 1219 | ret = -ENXIO; |
| 1220 | goto unmap; |
| 1221 | } |
| 1222 | pcr->host_cmds_ptr = pcr->rtsx_resv_buf; |
| 1223 | pcr->host_cmds_addr = pcr->rtsx_resv_buf_addr; |
| 1224 | pcr->host_sg_tbl_ptr = pcr->rtsx_resv_buf + HOST_CMDS_BUF_LEN; |
| 1225 | pcr->host_sg_tbl_addr = pcr->rtsx_resv_buf_addr + HOST_CMDS_BUF_LEN; |
| 1226 | |
| 1227 | pcr->card_inserted = 0; |
| 1228 | pcr->card_removed = 0; |
| 1229 | INIT_DELAYED_WORK(&pcr->carddet_work, rtsx_pci_card_detect); |
| 1230 | INIT_DELAYED_WORK(&pcr->idle_work, rtsx_pci_idle_work); |
| 1231 | |
| 1232 | pcr->msi_en = msi_en; |
| 1233 | if (pcr->msi_en) { |
| 1234 | ret = pci_enable_msi(pcidev); |
Chris Ball | 5152970 | 2014-09-04 17:11:53 +0100 | [diff] [blame] | 1235 | if (ret) |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1236 | pcr->msi_en = false; |
| 1237 | } |
| 1238 | |
| 1239 | ret = rtsx_pci_acquire_irq(pcr); |
| 1240 | if (ret < 0) |
Jiri Slaby | 9d66b56 | 2013-04-04 21:34:11 +0200 | [diff] [blame] | 1241 | goto disable_msi; |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1242 | |
| 1243 | pci_set_master(pcidev); |
| 1244 | synchronize_irq(pcr->irq); |
| 1245 | |
| 1246 | ret = rtsx_pci_init_chip(pcr); |
| 1247 | if (ret < 0) |
| 1248 | goto disable_irq; |
| 1249 | |
| 1250 | for (i = 0; i < ARRAY_SIZE(rtsx_pcr_cells); i++) { |
| 1251 | rtsx_pcr_cells[i].platform_data = handle; |
| 1252 | rtsx_pcr_cells[i].pdata_size = sizeof(*handle); |
| 1253 | } |
| 1254 | ret = mfd_add_devices(&pcidev->dev, pcr->id, rtsx_pcr_cells, |
| 1255 | ARRAY_SIZE(rtsx_pcr_cells), NULL, 0, NULL); |
| 1256 | if (ret < 0) |
| 1257 | goto disable_irq; |
| 1258 | |
| 1259 | schedule_delayed_work(&pcr->idle_work, msecs_to_jiffies(200)); |
| 1260 | |
| 1261 | return 0; |
| 1262 | |
| 1263 | disable_irq: |
| 1264 | free_irq(pcr->irq, (void *)pcr); |
Jiri Slaby | 9d66b56 | 2013-04-04 21:34:11 +0200 | [diff] [blame] | 1265 | disable_msi: |
| 1266 | if (pcr->msi_en) |
| 1267 | pci_disable_msi(pcr->pci); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1268 | dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, |
| 1269 | pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); |
| 1270 | unmap: |
| 1271 | iounmap(pcr->remap_addr); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1272 | free_handle: |
| 1273 | kfree(handle); |
| 1274 | free_pcr: |
| 1275 | kfree(pcr); |
| 1276 | release_pci: |
| 1277 | pci_release_regions(pcidev); |
| 1278 | disable: |
| 1279 | pci_disable_device(pcidev); |
| 1280 | |
| 1281 | return ret; |
| 1282 | } |
| 1283 | |
Greg Kroah-Hartman | 612b95c | 2012-12-21 15:03:15 -0800 | [diff] [blame] | 1284 | static void rtsx_pci_remove(struct pci_dev *pcidev) |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1285 | { |
| 1286 | struct pcr_handle *handle = pci_get_drvdata(pcidev); |
| 1287 | struct rtsx_pcr *pcr = handle->pcr; |
| 1288 | |
| 1289 | pcr->remove_pci = true; |
| 1290 | |
Thomas Gleixner | 73beb63 | 2013-12-02 12:20:36 +0100 | [diff] [blame] | 1291 | /* Disable interrupts at the pcr level */ |
| 1292 | spin_lock_irq(&pcr->lock); |
| 1293 | rtsx_pci_writel(pcr, RTSX_BIER, 0); |
| 1294 | pcr->bier = 0; |
| 1295 | spin_unlock_irq(&pcr->lock); |
| 1296 | |
| 1297 | cancel_delayed_work_sync(&pcr->carddet_work); |
| 1298 | cancel_delayed_work_sync(&pcr->idle_work); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1299 | |
| 1300 | mfd_remove_devices(&pcidev->dev); |
| 1301 | |
| 1302 | dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, |
| 1303 | pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); |
| 1304 | free_irq(pcr->irq, (void *)pcr); |
| 1305 | if (pcr->msi_en) |
| 1306 | pci_disable_msi(pcr->pci); |
| 1307 | iounmap(pcr->remap_addr); |
| 1308 | |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1309 | pci_release_regions(pcidev); |
| 1310 | pci_disable_device(pcidev); |
| 1311 | |
| 1312 | spin_lock(&rtsx_pci_lock); |
| 1313 | idr_remove(&rtsx_pci_idr, pcr->id); |
| 1314 | spin_unlock(&rtsx_pci_lock); |
| 1315 | |
| 1316 | kfree(pcr->slots); |
| 1317 | kfree(pcr); |
| 1318 | kfree(handle); |
| 1319 | |
| 1320 | dev_dbg(&(pcidev->dev), |
| 1321 | ": Realtek PCI-E Card Reader at %s [%04x:%04x] has been removed\n", |
| 1322 | pci_name(pcidev), (int)pcidev->vendor, (int)pcidev->device); |
| 1323 | } |
| 1324 | |
| 1325 | #ifdef CONFIG_PM |
| 1326 | |
| 1327 | static int rtsx_pci_suspend(struct pci_dev *pcidev, pm_message_t state) |
| 1328 | { |
| 1329 | struct pcr_handle *handle; |
| 1330 | struct rtsx_pcr *pcr; |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1331 | |
| 1332 | dev_dbg(&(pcidev->dev), "--> %s\n", __func__); |
| 1333 | |
| 1334 | handle = pci_get_drvdata(pcidev); |
| 1335 | pcr = handle->pcr; |
| 1336 | |
| 1337 | cancel_delayed_work(&pcr->carddet_work); |
| 1338 | cancel_delayed_work(&pcr->idle_work); |
| 1339 | |
| 1340 | mutex_lock(&pcr->pcr_mutex); |
| 1341 | |
Wei WANG | 5947c16 | 2013-08-20 14:18:52 +0800 | [diff] [blame] | 1342 | rtsx_pci_power_off(pcr, HOST_ENTER_S3); |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1343 | |
| 1344 | pci_save_state(pcidev); |
| 1345 | pci_enable_wake(pcidev, pci_choose_state(pcidev, state), 0); |
| 1346 | pci_disable_device(pcidev); |
| 1347 | pci_set_power_state(pcidev, pci_choose_state(pcidev, state)); |
| 1348 | |
| 1349 | mutex_unlock(&pcr->pcr_mutex); |
Wei WANG | 5947c16 | 2013-08-20 14:18:52 +0800 | [diff] [blame] | 1350 | return 0; |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1351 | } |
| 1352 | |
| 1353 | static int rtsx_pci_resume(struct pci_dev *pcidev) |
| 1354 | { |
| 1355 | struct pcr_handle *handle; |
| 1356 | struct rtsx_pcr *pcr; |
| 1357 | int ret = 0; |
| 1358 | |
| 1359 | dev_dbg(&(pcidev->dev), "--> %s\n", __func__); |
| 1360 | |
| 1361 | handle = pci_get_drvdata(pcidev); |
| 1362 | pcr = handle->pcr; |
| 1363 | |
| 1364 | mutex_lock(&pcr->pcr_mutex); |
| 1365 | |
| 1366 | pci_set_power_state(pcidev, PCI_D0); |
| 1367 | pci_restore_state(pcidev); |
| 1368 | ret = pci_enable_device(pcidev); |
| 1369 | if (ret) |
| 1370 | goto out; |
| 1371 | pci_set_master(pcidev); |
| 1372 | |
| 1373 | ret = rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, 0x00); |
| 1374 | if (ret) |
| 1375 | goto out; |
| 1376 | |
| 1377 | ret = rtsx_pci_init_hw(pcr); |
| 1378 | if (ret) |
| 1379 | goto out; |
| 1380 | |
| 1381 | schedule_delayed_work(&pcr->idle_work, msecs_to_jiffies(200)); |
| 1382 | |
| 1383 | out: |
| 1384 | mutex_unlock(&pcr->pcr_mutex); |
| 1385 | return ret; |
| 1386 | } |
| 1387 | |
Wei WANG | 5947c16 | 2013-08-20 14:18:52 +0800 | [diff] [blame] | 1388 | static void rtsx_pci_shutdown(struct pci_dev *pcidev) |
| 1389 | { |
| 1390 | struct pcr_handle *handle; |
| 1391 | struct rtsx_pcr *pcr; |
| 1392 | |
| 1393 | dev_dbg(&(pcidev->dev), "--> %s\n", __func__); |
| 1394 | |
| 1395 | handle = pci_get_drvdata(pcidev); |
| 1396 | pcr = handle->pcr; |
| 1397 | rtsx_pci_power_off(pcr, HOST_ENTER_S1); |
| 1398 | |
| 1399 | pci_disable_device(pcidev); |
| 1400 | } |
| 1401 | |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1402 | #else /* CONFIG_PM */ |
| 1403 | |
| 1404 | #define rtsx_pci_suspend NULL |
| 1405 | #define rtsx_pci_resume NULL |
Wei WANG | 5947c16 | 2013-08-20 14:18:52 +0800 | [diff] [blame] | 1406 | #define rtsx_pci_shutdown NULL |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1407 | |
| 1408 | #endif /* CONFIG_PM */ |
| 1409 | |
| 1410 | static struct pci_driver rtsx_pci_driver = { |
| 1411 | .name = DRV_NAME_RTSX_PCI, |
| 1412 | .id_table = rtsx_pci_ids, |
| 1413 | .probe = rtsx_pci_probe, |
Greg Kroah-Hartman | 612b95c | 2012-12-21 15:03:15 -0800 | [diff] [blame] | 1414 | .remove = rtsx_pci_remove, |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1415 | .suspend = rtsx_pci_suspend, |
| 1416 | .resume = rtsx_pci_resume, |
Wei WANG | 5947c16 | 2013-08-20 14:18:52 +0800 | [diff] [blame] | 1417 | .shutdown = rtsx_pci_shutdown, |
Wei WANG | ada8a8a | 2012-10-29 13:49:33 +0800 | [diff] [blame] | 1418 | }; |
| 1419 | module_pci_driver(rtsx_pci_driver); |
| 1420 | |
| 1421 | MODULE_LICENSE("GPL"); |
| 1422 | MODULE_AUTHOR("Wei WANG <wei_wang@realsil.com.cn>"); |
| 1423 | MODULE_DESCRIPTION("Realtek PCI-E Card Reader Driver"); |