Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * SGI UV APIC functions (note: not an Intel compatible APIC) |
| 7 | * |
Dimitri Sivanich | 5f40f7d | 2014-03-31 09:37:00 -0500 | [diff] [blame] | 8 | * Copyright (C) 2007-2014 Silicon Graphics, Inc. All rights reserved. |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 9 | */ |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 10 | #include <linux/cpumask.h> |
Ingo Molnar | 0b1da1c | 2009-02-26 14:10:10 +0100 | [diff] [blame] | 11 | #include <linux/hardirq.h> |
| 12 | #include <linux/proc_fs.h> |
| 13 | #include <linux/threads.h> |
| 14 | #include <linux/kernel.h> |
Paul Gortmaker | 186f436 | 2016-07-13 20:18:56 -0400 | [diff] [blame] | 15 | #include <linux/export.h> |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 16 | #include <linux/string.h> |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 17 | #include <linux/ctype.h> |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 18 | #include <linux/sched.h> |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 19 | #include <linux/timer.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 20 | #include <linux/slab.h> |
Ingo Molnar | 0b1da1c | 2009-02-26 14:10:10 +0100 | [diff] [blame] | 21 | #include <linux/cpu.h> |
| 22 | #include <linux/init.h> |
Jack Steiner | 27229ca | 2009-04-17 09:24:47 -0500 | [diff] [blame] | 23 | #include <linux/io.h> |
Mike Travis | 841582e | 2010-02-02 14:38:14 -0800 | [diff] [blame] | 24 | #include <linux/pci.h> |
Russ Anderson | 78c0617 | 2010-02-26 10:49:12 -0600 | [diff] [blame] | 25 | #include <linux/kdebug.h> |
Jean Delvare | ca444564 | 2011-03-25 15:20:14 +0100 | [diff] [blame] | 26 | #include <linux/delay.h> |
Cliff Wickman | 818987e | 2011-03-31 09:32:02 -0500 | [diff] [blame] | 27 | #include <linux/crash_dump.h> |
Robin Holt | 1b3a5d0 | 2013-07-08 16:01:42 -0700 | [diff] [blame] | 28 | #include <linux/reboot.h> |
Ingo Molnar | 0b1da1c | 2009-02-26 14:10:10 +0100 | [diff] [blame] | 29 | |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 30 | #include <asm/uv/uv_mmrs.h> |
| 31 | #include <asm/uv/uv_hub.h> |
Ingo Molnar | 0b1da1c | 2009-02-26 14:10:10 +0100 | [diff] [blame] | 32 | #include <asm/current.h> |
| 33 | #include <asm/pgtable.h> |
Russ Anderson | 7019cc2 | 2008-07-09 15:27:19 -0500 | [diff] [blame] | 34 | #include <asm/uv/bios.h> |
Ingo Molnar | 0b1da1c | 2009-02-26 14:10:10 +0100 | [diff] [blame] | 35 | #include <asm/uv/uv.h> |
| 36 | #include <asm/apic.h> |
| 37 | #include <asm/ipi.h> |
| 38 | #include <asm/smp.h> |
Jack Steiner | fd12a0d | 2009-11-19 14:23:41 -0600 | [diff] [blame] | 39 | #include <asm/x86_init.h> |
Jack Steiner | 1d44e82 | 2011-05-09 11:35:19 -0500 | [diff] [blame] | 40 | #include <asm/nmi.h> |
| 41 | |
Yinghai Lu | 510b372 | 2008-07-22 13:20:22 -0700 | [diff] [blame] | 42 | DEFINE_PER_CPU(int, x2apic_extra_bits); |
| 43 | |
Mike Travis | 841582e | 2010-02-02 14:38:14 -0800 | [diff] [blame] | 44 | #define PR_DEVEL(fmt, args...) pr_devel("%s: " fmt, __func__, args) |
| 45 | |
Yinghai Lu | 1b9b89e | 2008-07-21 22:08:21 -0700 | [diff] [blame] | 46 | static enum uv_system_type uv_system_type; |
Jack Steiner | fd12a0d | 2009-11-19 14:23:41 -0600 | [diff] [blame] | 47 | static u64 gru_start_paddr, gru_end_paddr; |
Dimitri Sivanich | 879d5ad | 2013-05-29 10:56:09 -0500 | [diff] [blame] | 48 | static u64 gru_dist_base, gru_first_node_paddr = -1LL, gru_last_node_paddr; |
| 49 | static u64 gru_dist_lmask, gru_dist_umask; |
Russ Anderson | c8f730b | 2010-10-26 16:27:28 -0500 | [diff] [blame] | 50 | static union uvh_apicid uvh_apicid; |
Mike Travis | 405422d | 2016-04-29 16:54:17 -0500 | [diff] [blame] | 51 | |
| 52 | /* info derived from CPUID */ |
| 53 | static struct { |
| 54 | unsigned int apicid_shift; |
| 55 | unsigned int apicid_mask; |
| 56 | unsigned int socketid_shift; /* aka pnode_shift for UV1/2/3 */ |
| 57 | unsigned int pnode_mask; |
| 58 | unsigned int gpa_shift; |
| 59 | } uv_cpuid; |
| 60 | |
Jack Steiner | 7a1110e | 2010-01-12 15:09:04 -0600 | [diff] [blame] | 61 | int uv_min_hub_revision_id; |
| 62 | EXPORT_SYMBOL_GPL(uv_min_hub_revision_id); |
Dimitri Sivanich | 8191c9f | 2010-11-16 16:23:52 -0600 | [diff] [blame] | 63 | unsigned int uv_apicid_hibits; |
| 64 | EXPORT_SYMBOL_GPL(uv_apicid_hibits); |
Jack Steiner | fd12a0d | 2009-11-19 14:23:41 -0600 | [diff] [blame] | 65 | |
Suresh Siddha | 1a8880a | 2011-05-20 17:51:20 -0700 | [diff] [blame] | 66 | static struct apic apic_x2apic_uv_x; |
Mike Travis | 3edcf2f | 2016-04-29 16:54:15 -0500 | [diff] [blame] | 67 | static struct uv_hub_info_s uv_hub_info_node0; |
Suresh Siddha | 1a8880a | 2011-05-20 17:51:20 -0700 | [diff] [blame] | 68 | |
Mike Travis | 7563421 | 2016-04-29 16:54:06 -0500 | [diff] [blame] | 69 | /* Set this to use hardware error handler instead of kernel panic */ |
| 70 | static int disable_uv_undefined_panic = 1; |
| 71 | unsigned long uv_undefined(char *str) |
| 72 | { |
| 73 | if (likely(!disable_uv_undefined_panic)) |
| 74 | panic("UV: error: undefined MMR: %s\n", str); |
| 75 | else |
| 76 | pr_crit("UV: error: undefined MMR: %s\n", str); |
| 77 | return ~0ul; /* cause a machine fault */ |
| 78 | } |
| 79 | EXPORT_SYMBOL(uv_undefined); |
| 80 | |
Jack Steiner | e681041 | 2010-11-30 13:55:39 -0600 | [diff] [blame] | 81 | static unsigned long __init uv_early_read_mmr(unsigned long addr) |
| 82 | { |
| 83 | unsigned long val, *mmr; |
| 84 | |
| 85 | mmr = early_ioremap(UV_LOCAL_MMR_BASE | addr, sizeof(*mmr)); |
| 86 | val = *mmr; |
| 87 | early_iounmap(mmr, sizeof(*mmr)); |
| 88 | return val; |
| 89 | } |
| 90 | |
H. Peter Anvin | eb41c8b | 2009-11-23 14:46:07 -0800 | [diff] [blame] | 91 | static inline bool is_GRU_range(u64 start, u64 end) |
Jack Steiner | fd12a0d | 2009-11-19 14:23:41 -0600 | [diff] [blame] | 92 | { |
Dimitri Sivanich | 879d5ad | 2013-05-29 10:56:09 -0500 | [diff] [blame] | 93 | if (gru_dist_base) { |
| 94 | u64 su = start & gru_dist_umask; /* upper (incl pnode) bits */ |
| 95 | u64 sl = start & gru_dist_lmask; /* base offset bits */ |
| 96 | u64 eu = end & gru_dist_umask; |
| 97 | u64 el = end & gru_dist_lmask; |
| 98 | |
| 99 | /* Must reside completely within a single GRU range */ |
| 100 | return (sl == gru_dist_base && el == gru_dist_base && |
| 101 | su >= gru_first_node_paddr && |
| 102 | su <= gru_last_node_paddr && |
| 103 | eu == su); |
| 104 | } else { |
| 105 | return start >= gru_start_paddr && end <= gru_end_paddr; |
| 106 | } |
Jack Steiner | fd12a0d | 2009-11-19 14:23:41 -0600 | [diff] [blame] | 107 | } |
| 108 | |
H. Peter Anvin | eb41c8b | 2009-11-23 14:46:07 -0800 | [diff] [blame] | 109 | static bool uv_is_untracked_pat_range(u64 start, u64 end) |
Jack Steiner | fd12a0d | 2009-11-19 14:23:41 -0600 | [diff] [blame] | 110 | { |
| 111 | return is_ISA_range(start, end) || is_GRU_range(start, end); |
| 112 | } |
Yinghai Lu | 1b9b89e | 2008-07-21 22:08:21 -0700 | [diff] [blame] | 113 | |
Jack Steiner | d8850ba | 2010-11-30 13:55:40 -0600 | [diff] [blame] | 114 | static int __init early_get_pnodeid(void) |
Jack Steiner | 27229ca | 2009-04-17 09:24:47 -0500 | [diff] [blame] | 115 | { |
| 116 | union uvh_node_id_u node_id; |
Jack Steiner | d8850ba | 2010-11-30 13:55:40 -0600 | [diff] [blame] | 117 | union uvh_rh_gam_config_mmr_u m_n_config; |
| 118 | int pnode; |
Jack Steiner | 7a1110e | 2010-01-12 15:09:04 -0600 | [diff] [blame] | 119 | |
| 120 | /* Currently, all blades have same revision number */ |
Jack Steiner | e681041 | 2010-11-30 13:55:39 -0600 | [diff] [blame] | 121 | node_id.v = uv_early_read_mmr(UVH_NODE_ID); |
Jack Steiner | d8850ba | 2010-11-30 13:55:40 -0600 | [diff] [blame] | 122 | m_n_config.v = uv_early_read_mmr(UVH_RH_GAM_CONFIG_MMR); |
Jack Steiner | 7a1110e | 2010-01-12 15:09:04 -0600 | [diff] [blame] | 123 | uv_min_hub_revision_id = node_id.s.revision; |
| 124 | |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 125 | switch (node_id.s.part_number) { |
| 126 | case UV2_HUB_PART_NUMBER: |
| 127 | case UV2_HUB_PART_NUMBER_X: |
Jack Steiner | 2a91959 | 2011-05-11 12:50:28 -0500 | [diff] [blame] | 128 | uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1; |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 129 | break; |
| 130 | case UV3_HUB_PART_NUMBER: |
| 131 | case UV3_HUB_PART_NUMBER_X: |
Russ Anderson | dd3c9c4 | 2013-10-14 11:17:34 -0500 | [diff] [blame] | 132 | uv_min_hub_revision_id += UV3_HUB_REVISION_BASE; |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 133 | break; |
Mike Travis | a0ec83f | 2016-04-29 16:54:05 -0500 | [diff] [blame] | 134 | case UV4_HUB_PART_NUMBER: |
| 135 | uv_min_hub_revision_id += UV4_HUB_REVISION_BASE - 1; |
| 136 | break; |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 137 | } |
Jack Steiner | 2a91959 | 2011-05-11 12:50:28 -0500 | [diff] [blame] | 138 | |
| 139 | uv_hub_info->hub_revision = uv_min_hub_revision_id; |
Mike Travis | 405422d | 2016-04-29 16:54:17 -0500 | [diff] [blame] | 140 | uv_cpuid.pnode_mask = (1 << m_n_config.s.n_skt) - 1; |
| 141 | pnode = (node_id.s.node_id >> 1) & uv_cpuid.pnode_mask; |
| 142 | uv_cpuid.gpa_shift = 46; /* default unless changed */ |
| 143 | |
| 144 | pr_info("UV: rev:%d part#:%x nodeid:%04x n_skt:%d pnmsk:%x pn:%x\n", |
| 145 | node_id.s.revision, node_id.s.part_number, node_id.s.node_id, |
| 146 | m_n_config.s.n_skt, uv_cpuid.pnode_mask, pnode); |
Jack Steiner | d8850ba | 2010-11-30 13:55:40 -0600 | [diff] [blame] | 147 | return pnode; |
Jack Steiner | 27229ca | 2009-04-17 09:24:47 -0500 | [diff] [blame] | 148 | } |
| 149 | |
Mike Travis | 405422d | 2016-04-29 16:54:17 -0500 | [diff] [blame] | 150 | /* [copied from arch/x86/kernel/cpu/topology.c:detect_extended_topology()] */ |
| 151 | #define SMT_LEVEL 0 /* leaf 0xb SMT level */ |
| 152 | #define INVALID_TYPE 0 /* leaf 0xb sub-leaf types */ |
| 153 | #define SMT_TYPE 1 |
| 154 | #define CORE_TYPE 2 |
| 155 | #define LEAFB_SUBTYPE(ecx) (((ecx) >> 8) & 0xff) |
| 156 | #define BITS_SHIFT_NEXT_LEVEL(eax) ((eax) & 0x1f) |
| 157 | |
| 158 | static void set_x2apic_bits(void) |
Russ Anderson | c8f730b | 2010-10-26 16:27:28 -0500 | [diff] [blame] | 159 | { |
Mike Travis | 405422d | 2016-04-29 16:54:17 -0500 | [diff] [blame] | 160 | unsigned int eax, ebx, ecx, edx, sub_index; |
| 161 | unsigned int sid_shift; |
| 162 | |
| 163 | cpuid(0, &eax, &ebx, &ecx, &edx); |
| 164 | if (eax < 0xb) { |
| 165 | pr_info("UV: CPU does not have CPUID.11\n"); |
| 166 | return; |
| 167 | } |
| 168 | cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx); |
| 169 | if (ebx == 0 || (LEAFB_SUBTYPE(ecx) != SMT_TYPE)) { |
| 170 | pr_info("UV: CPUID.11 not implemented\n"); |
| 171 | return; |
| 172 | } |
| 173 | sid_shift = BITS_SHIFT_NEXT_LEVEL(eax); |
| 174 | sub_index = 1; |
| 175 | do { |
| 176 | cpuid_count(0xb, sub_index, &eax, &ebx, &ecx, &edx); |
| 177 | if (LEAFB_SUBTYPE(ecx) == CORE_TYPE) { |
| 178 | sid_shift = BITS_SHIFT_NEXT_LEVEL(eax); |
| 179 | break; |
| 180 | } |
| 181 | sub_index++; |
| 182 | } while (LEAFB_SUBTYPE(ecx) != INVALID_TYPE); |
| 183 | uv_cpuid.apicid_shift = 0; |
| 184 | uv_cpuid.apicid_mask = (~(-1 << sid_shift)); |
| 185 | uv_cpuid.socketid_shift = sid_shift; |
| 186 | } |
| 187 | |
| 188 | static void __init early_get_apic_socketid_shift(void) |
| 189 | { |
| 190 | if (is_uv2_hub() || is_uv3_hub()) |
| 191 | uvh_apicid.v = uv_early_read_mmr(UVH_APICID); |
| 192 | |
| 193 | set_x2apic_bits(); |
| 194 | |
| 195 | pr_info("UV: apicid_shift:%d apicid_mask:0x%x\n", |
| 196 | uv_cpuid.apicid_shift, uv_cpuid.apicid_mask); |
| 197 | pr_info("UV: socketid_shift:%d pnode_mask:0x%x\n", |
| 198 | uv_cpuid.socketid_shift, uv_cpuid.pnode_mask); |
Russ Anderson | c8f730b | 2010-10-26 16:27:28 -0500 | [diff] [blame] | 199 | } |
| 200 | |
Dimitri Sivanich | 8191c9f | 2010-11-16 16:23:52 -0600 | [diff] [blame] | 201 | /* |
| 202 | * Add an extra bit as dictated by bios to the destination apicid of |
| 203 | * interrupts potentially passing through the UV HUB. This prevents |
| 204 | * a deadlock between interrupts and IO port operations. |
| 205 | */ |
| 206 | static void __init uv_set_apicid_hibit(void) |
| 207 | { |
Jack Steiner | 2a91959 | 2011-05-11 12:50:28 -0500 | [diff] [blame] | 208 | union uv1h_lb_target_physical_apic_id_mask_u apicid_mask; |
Dimitri Sivanich | 8191c9f | 2010-11-16 16:23:52 -0600 | [diff] [blame] | 209 | |
Jack Steiner | 2a91959 | 2011-05-11 12:50:28 -0500 | [diff] [blame] | 210 | if (is_uv1_hub()) { |
| 211 | apicid_mask.v = |
| 212 | uv_early_read_mmr(UV1H_LB_TARGET_PHYSICAL_APIC_ID_MASK); |
| 213 | uv_apicid_hibits = |
| 214 | apicid_mask.s1.bit_enables & UV_APICID_HIBIT_MASK; |
| 215 | } |
Dimitri Sivanich | 8191c9f | 2010-11-16 16:23:52 -0600 | [diff] [blame] | 216 | } |
| 217 | |
Leonardo Potenza | 52459ab | 2009-08-16 18:55:48 +0200 | [diff] [blame] | 218 | static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
Yinghai Lu | 1b9b89e | 2008-07-21 22:08:21 -0700 | [diff] [blame] | 219 | { |
Mike Travis | 379b97e | 2015-04-09 13:26:30 -0500 | [diff] [blame] | 220 | int pnodeid; |
| 221 | int uv_apic; |
Russ Anderson | 1d2c867 | 2010-01-15 12:09:09 -0600 | [diff] [blame] | 222 | |
Mike Travis | 7a4e017 | 2015-04-09 13:26:29 -0500 | [diff] [blame] | 223 | if (strncmp(oem_id, "SGI", 3) != 0) |
| 224 | return 0; |
| 225 | |
Mike Travis | 5a52e8f | 2016-08-01 13:40:53 -0500 | [diff] [blame] | 226 | if (numa_off) { |
| 227 | pr_err("UV: NUMA is off, disabling UV support\n"); |
| 228 | return 0; |
| 229 | } |
| 230 | |
Mike Travis | 3edcf2f | 2016-04-29 16:54:15 -0500 | [diff] [blame] | 231 | /* Setup early hub type field in uv_hub_info for Node 0 */ |
| 232 | uv_cpu_info->p_uv_hub_info = &uv_hub_info_node0; |
| 233 | |
Mike Travis | 379b97e | 2015-04-09 13:26:30 -0500 | [diff] [blame] | 234 | /* |
| 235 | * Determine UV arch type. |
| 236 | * SGI: UV100/1000 |
| 237 | * SGI2: UV2000/3000 |
| 238 | * SGI3: UV300 (truncated to 4 chars because of different varieties) |
Mike Travis | a0ec83f | 2016-04-29 16:54:05 -0500 | [diff] [blame] | 239 | * SGI4: UV400 (truncated to 4 chars because of different varieties) |
Mike Travis | 379b97e | 2015-04-09 13:26:30 -0500 | [diff] [blame] | 240 | */ |
| 241 | uv_hub_info->hub_revision = |
Mike Travis | a0ec83f | 2016-04-29 16:54:05 -0500 | [diff] [blame] | 242 | !strncmp(oem_id, "SGI4", 4) ? UV4_HUB_REVISION_BASE : |
Mike Travis | 379b97e | 2015-04-09 13:26:30 -0500 | [diff] [blame] | 243 | !strncmp(oem_id, "SGI3", 4) ? UV3_HUB_REVISION_BASE : |
| 244 | !strcmp(oem_id, "SGI2") ? UV2_HUB_REVISION_BASE : |
| 245 | !strcmp(oem_id, "SGI") ? UV1_HUB_REVISION_BASE : 0; |
| 246 | |
| 247 | if (uv_hub_info->hub_revision == 0) |
| 248 | goto badbios; |
| 249 | |
| 250 | pnodeid = early_get_pnodeid(); |
Mike Travis | 405422d | 2016-04-29 16:54:17 -0500 | [diff] [blame] | 251 | early_get_apic_socketid_shift(); |
Mike Travis | 379b97e | 2015-04-09 13:26:30 -0500 | [diff] [blame] | 252 | x86_platform.is_untracked_pat_range = uv_is_untracked_pat_range; |
| 253 | x86_platform.nmi_init = uv_nmi_init; |
| 254 | |
| 255 | if (!strcmp(oem_table_id, "UVX")) { /* most common */ |
| 256 | uv_system_type = UV_X2APIC; |
| 257 | uv_apic = 0; |
| 258 | |
| 259 | } else if (!strcmp(oem_table_id, "UVH")) { /* only UV1 systems */ |
| 260 | uv_system_type = UV_NON_UNIQUE_APIC; |
| 261 | __this_cpu_write(x2apic_extra_bits, |
| 262 | pnodeid << uvh_apicid.s.pnode_shift); |
| 263 | uv_set_apicid_hibit(); |
| 264 | uv_apic = 1; |
| 265 | |
| 266 | } else if (!strcmp(oem_table_id, "UVL")) { /* only used for */ |
| 267 | uv_system_type = UV_LEGACY_APIC; /* very small systems */ |
| 268 | uv_apic = 0; |
| 269 | |
| 270 | } else { |
| 271 | goto badbios; |
Yinghai Lu | 1b9b89e | 2008-07-21 22:08:21 -0700 | [diff] [blame] | 272 | } |
Mike Travis | 379b97e | 2015-04-09 13:26:30 -0500 | [diff] [blame] | 273 | |
| 274 | pr_info("UV: OEM IDs %s/%s, System/HUB Types %d/%d, uv_apic %d\n", |
| 275 | oem_id, oem_table_id, uv_system_type, |
| 276 | uv_min_hub_revision_id, uv_apic); |
| 277 | |
| 278 | return uv_apic; |
| 279 | |
| 280 | badbios: |
| 281 | pr_err("UV: OEM_ID:%s OEM_TABLE_ID:%s\n", oem_id, oem_table_id); |
| 282 | pr_err("Current BIOS not supported, update kernel and/or BIOS\n"); |
| 283 | BUG(); |
Yinghai Lu | 1b9b89e | 2008-07-21 22:08:21 -0700 | [diff] [blame] | 284 | } |
| 285 | |
| 286 | enum uv_system_type get_uv_system_type(void) |
| 287 | { |
| 288 | return uv_system_type; |
| 289 | } |
| 290 | |
| 291 | int is_uv_system(void) |
| 292 | { |
| 293 | return uv_system_type != UV_NONE; |
| 294 | } |
Ingo Molnar | 8067794 | 2008-08-11 11:19:20 +0200 | [diff] [blame] | 295 | EXPORT_SYMBOL_GPL(is_uv_system); |
Yinghai Lu | 1b9b89e | 2008-07-21 22:08:21 -0700 | [diff] [blame] | 296 | |
Mike Travis | 3edcf2f | 2016-04-29 16:54:15 -0500 | [diff] [blame] | 297 | void **__uv_hub_info_list; |
| 298 | EXPORT_SYMBOL_GPL(__uv_hub_info_list); |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 299 | |
Mike Travis | 0045ddd | 2016-04-29 16:54:12 -0500 | [diff] [blame] | 300 | DEFINE_PER_CPU(struct uv_cpu_info_s, __uv_cpu_info); |
| 301 | EXPORT_PER_CPU_SYMBOL_GPL(__uv_cpu_info); |
| 302 | |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 303 | short uv_possible_blades; |
| 304 | EXPORT_SYMBOL_GPL(uv_possible_blades); |
| 305 | |
Russ Anderson | 7019cc2 | 2008-07-09 15:27:19 -0500 | [diff] [blame] | 306 | unsigned long sn_rtc_cycles_per_second; |
| 307 | EXPORT_SYMBOL(sn_rtc_cycles_per_second); |
| 308 | |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 309 | /* the following values are used for the per node hub info struct */ |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 310 | static __initdata unsigned short *_node_to_pnode; |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 311 | static __initdata unsigned short _min_socket, _max_socket; |
| 312 | static __initdata unsigned short _min_pnode, _max_pnode, _gr_table_len; |
| 313 | static __initdata struct uv_gam_range_entry *uv_gre_table; |
| 314 | static __initdata struct uv_gam_parameters *uv_gp_table; |
Mike Travis | 6e27b91 | 2016-04-29 16:54:20 -0500 | [diff] [blame] | 315 | static __initdata unsigned short *_socket_to_node; |
| 316 | static __initdata unsigned short *_socket_to_pnode; |
| 317 | static __initdata unsigned short *_pnode_to_socket; |
Mike Travis | c85375c | 2016-04-29 16:54:21 -0500 | [diff] [blame] | 318 | static __initdata struct uv_gam_range_s *_gr_table; |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 319 | #define SOCK_EMPTY ((unsigned short)~0) |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 320 | |
Mike Travis | 3edcf2f | 2016-04-29 16:54:15 -0500 | [diff] [blame] | 321 | extern int uv_hub_info_version(void) |
| 322 | { |
| 323 | return UV_HUB_INFO_VERSION; |
| 324 | } |
| 325 | EXPORT_SYMBOL(uv_hub_info_version); |
| 326 | |
Mike Travis | c85375c | 2016-04-29 16:54:21 -0500 | [diff] [blame] | 327 | /* Build GAM range lookup table */ |
| 328 | static __init void build_uv_gr_table(void) |
| 329 | { |
| 330 | struct uv_gam_range_entry *gre = uv_gre_table; |
| 331 | struct uv_gam_range_s *grt; |
| 332 | unsigned long last_limit = 0, ram_limit = 0; |
Mike Travis | 054f621 | 2016-08-01 13:40:50 -0500 | [diff] [blame] | 333 | int bytes, i, sid, lsid = -1, indx = 0, lindx = -1; |
Mike Travis | c85375c | 2016-04-29 16:54:21 -0500 | [diff] [blame] | 334 | |
| 335 | if (!gre) |
| 336 | return; |
| 337 | |
| 338 | bytes = _gr_table_len * sizeof(struct uv_gam_range_s); |
| 339 | grt = kzalloc(bytes, GFP_KERNEL); |
| 340 | BUG_ON(!grt); |
| 341 | _gr_table = grt; |
| 342 | |
| 343 | for (; gre->type != UV_GAM_RANGE_TYPE_UNUSED; gre++) { |
| 344 | if (gre->type == UV_GAM_RANGE_TYPE_HOLE) { |
| 345 | if (!ram_limit) { /* mark hole between ram/non-ram */ |
| 346 | ram_limit = last_limit; |
| 347 | last_limit = gre->limit; |
| 348 | lsid++; |
| 349 | continue; |
| 350 | } |
| 351 | last_limit = gre->limit; |
| 352 | pr_info("UV: extra hole in GAM RE table @%d\n", |
| 353 | (int)(gre - uv_gre_table)); |
| 354 | continue; |
| 355 | } |
| 356 | if (_max_socket < gre->sockid) { |
| 357 | pr_err("UV: GAM table sockid(%d) too large(>%d) @%d\n", |
| 358 | gre->sockid, _max_socket, |
| 359 | (int)(gre - uv_gre_table)); |
| 360 | continue; |
| 361 | } |
| 362 | sid = gre->sockid - _min_socket; |
| 363 | if (lsid < sid) { /* new range */ |
Mike Travis | 054f621 | 2016-08-01 13:40:50 -0500 | [diff] [blame] | 364 | grt = &_gr_table[indx]; |
| 365 | grt->base = lindx; |
Mike Travis | c85375c | 2016-04-29 16:54:21 -0500 | [diff] [blame] | 366 | grt->nasid = gre->nasid; |
| 367 | grt->limit = last_limit = gre->limit; |
| 368 | lsid = sid; |
Mike Travis | 054f621 | 2016-08-01 13:40:50 -0500 | [diff] [blame] | 369 | lindx = indx++; |
Mike Travis | c85375c | 2016-04-29 16:54:21 -0500 | [diff] [blame] | 370 | continue; |
| 371 | } |
| 372 | if (lsid == sid && !ram_limit) { /* update range */ |
| 373 | if (grt->limit == last_limit) { /* .. if contiguous */ |
| 374 | grt->limit = last_limit = gre->limit; |
| 375 | continue; |
| 376 | } |
| 377 | } |
| 378 | if (!ram_limit) { /* non-contiguous ram range */ |
| 379 | grt++; |
Mike Travis | 054f621 | 2016-08-01 13:40:50 -0500 | [diff] [blame] | 380 | grt->base = lindx; |
Mike Travis | c85375c | 2016-04-29 16:54:21 -0500 | [diff] [blame] | 381 | grt->nasid = gre->nasid; |
| 382 | grt->limit = last_limit = gre->limit; |
| 383 | continue; |
| 384 | } |
| 385 | grt++; /* non-contiguous/non-ram */ |
| 386 | grt->base = grt - _gr_table; /* base is this entry */ |
| 387 | grt->nasid = gre->nasid; |
| 388 | grt->limit = last_limit = gre->limit; |
| 389 | lsid++; |
| 390 | } |
| 391 | |
| 392 | /* shorten table if possible */ |
| 393 | grt++; |
| 394 | i = grt - _gr_table; |
| 395 | if (i < _gr_table_len) { |
| 396 | void *ret; |
| 397 | |
| 398 | bytes = i * sizeof(struct uv_gam_range_s); |
| 399 | ret = krealloc(_gr_table, bytes, GFP_KERNEL); |
| 400 | if (ret) { |
| 401 | _gr_table = ret; |
| 402 | _gr_table_len = i; |
| 403 | } |
| 404 | } |
| 405 | |
| 406 | /* display resultant gam range table */ |
| 407 | for (i = 0, grt = _gr_table; i < _gr_table_len; i++, grt++) { |
| 408 | int gb = grt->base; |
| 409 | unsigned long start = gb < 0 ? 0 : |
| 410 | (unsigned long)_gr_table[gb].limit << UV_GAM_RANGE_SHFT; |
| 411 | unsigned long end = |
| 412 | (unsigned long)grt->limit << UV_GAM_RANGE_SHFT; |
| 413 | |
| 414 | pr_info("UV: GAM Range %2d %04x 0x%013lx-0x%013lx (%d)\n", |
| 415 | i, grt->nasid, start, end, gb); |
| 416 | } |
| 417 | } |
| 418 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 419 | static int uv_wakeup_secondary(int phys_apicid, unsigned long start_rip) |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 420 | { |
| 421 | unsigned long val; |
Jack Steiner | 9f5314f | 2008-05-28 09:51:18 -0500 | [diff] [blame] | 422 | int pnode; |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 423 | |
Jack Steiner | 9f5314f | 2008-05-28 09:51:18 -0500 | [diff] [blame] | 424 | pnode = uv_apicid_to_pnode(phys_apicid); |
Dimitri Sivanich | 8191c9f | 2010-11-16 16:23:52 -0600 | [diff] [blame] | 425 | phys_apicid |= uv_apicid_hibits; |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 426 | val = (1UL << UVH_IPI_INT_SEND_SHFT) | |
| 427 | (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | |
Yinghai Lu | 2b6163b | 2009-02-25 20:50:49 -0800 | [diff] [blame] | 428 | ((start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | |
Jack Steiner | 34d0559 | 2008-04-16 11:45:15 -0500 | [diff] [blame] | 429 | APIC_DM_INIT; |
Jack Steiner | 9f5314f | 2008-05-28 09:51:18 -0500 | [diff] [blame] | 430 | uv_write_global_mmr64(pnode, UVH_IPI_INT, val); |
Jack Steiner | 34d0559 | 2008-04-16 11:45:15 -0500 | [diff] [blame] | 431 | |
| 432 | val = (1UL << UVH_IPI_INT_SEND_SHFT) | |
| 433 | (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | |
Yinghai Lu | 2b6163b | 2009-02-25 20:50:49 -0800 | [diff] [blame] | 434 | ((start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | |
Jack Steiner | 34d0559 | 2008-04-16 11:45:15 -0500 | [diff] [blame] | 435 | APIC_DM_STARTUP; |
Jack Steiner | 9f5314f | 2008-05-28 09:51:18 -0500 | [diff] [blame] | 436 | uv_write_global_mmr64(pnode, UVH_IPI_INT, val); |
Yinghai Lu | 2b6163b | 2009-02-25 20:50:49 -0800 | [diff] [blame] | 437 | |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 438 | return 0; |
| 439 | } |
| 440 | |
| 441 | static void uv_send_IPI_one(int cpu, int vector) |
| 442 | { |
Jack Steiner | 66666e5 | 2009-04-02 16:59:03 -0700 | [diff] [blame] | 443 | unsigned long apicid; |
Jack Steiner | 9f5314f | 2008-05-28 09:51:18 -0500 | [diff] [blame] | 444 | int pnode; |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 445 | |
Jack Steiner | 1e0b5d0 | 2008-09-29 08:45:29 -0500 | [diff] [blame] | 446 | apicid = per_cpu(x86_cpu_to_apicid, cpu); |
Jack Steiner | 9f5314f | 2008-05-28 09:51:18 -0500 | [diff] [blame] | 447 | pnode = uv_apicid_to_pnode(apicid); |
Jack Steiner | 66666e5 | 2009-04-02 16:59:03 -0700 | [diff] [blame] | 448 | uv_hub_send_ipi(pnode, apicid, vector); |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 449 | } |
| 450 | |
Mike Travis | bcda016 | 2008-12-16 17:33:59 -0800 | [diff] [blame] | 451 | static void uv_send_IPI_mask(const struct cpumask *mask, int vector) |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 452 | { |
| 453 | unsigned int cpu; |
| 454 | |
Mike Travis | bcda016 | 2008-12-16 17:33:59 -0800 | [diff] [blame] | 455 | for_each_cpu(cpu, mask) |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 456 | uv_send_IPI_one(cpu, vector); |
| 457 | } |
| 458 | |
Mike Travis | bcda016 | 2008-12-16 17:33:59 -0800 | [diff] [blame] | 459 | static void uv_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 460 | { |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 461 | unsigned int this_cpu = smp_processor_id(); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 462 | unsigned int cpu; |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 463 | |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 464 | for_each_cpu(cpu, mask) { |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 465 | if (cpu != this_cpu) |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 466 | uv_send_IPI_one(cpu, vector); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 467 | } |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 468 | } |
| 469 | |
| 470 | static void uv_send_IPI_allbutself(int vector) |
| 471 | { |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 472 | unsigned int this_cpu = smp_processor_id(); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 473 | unsigned int cpu; |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 474 | |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 475 | for_each_online_cpu(cpu) { |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 476 | if (cpu != this_cpu) |
| 477 | uv_send_IPI_one(cpu, vector); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 478 | } |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 479 | } |
| 480 | |
| 481 | static void uv_send_IPI_all(int vector) |
| 482 | { |
Mike Travis | bcda016 | 2008-12-16 17:33:59 -0800 | [diff] [blame] | 483 | uv_send_IPI_mask(cpu_online_mask, vector); |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 484 | } |
| 485 | |
Steffen Persvold | b7157ac | 2012-03-16 20:25:35 +0100 | [diff] [blame] | 486 | static int uv_apic_id_valid(int apicid) |
| 487 | { |
| 488 | return 1; |
| 489 | } |
| 490 | |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 491 | static int uv_apic_id_registered(void) |
| 492 | { |
| 493 | return 1; |
| 494 | } |
| 495 | |
Suresh Siddha | 277d1f5 | 2008-07-11 13:11:55 -0700 | [diff] [blame] | 496 | static void uv_init_apic_ldr(void) |
Suresh Siddha | 5c520a6 | 2008-07-10 11:16:55 -0700 | [diff] [blame] | 497 | { |
| 498 | } |
| 499 | |
Alexander Gordeev | ff16432 | 2012-06-07 15:15:59 +0200 | [diff] [blame] | 500 | static int |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 501 | uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask, |
Alexander Gordeev | ff16432 | 2012-06-07 15:15:59 +0200 | [diff] [blame] | 502 | const struct cpumask *andmask, |
| 503 | unsigned int *apicid) |
Mike Travis | 95d313c | 2008-12-16 17:33:54 -0800 | [diff] [blame] | 504 | { |
Alexander Gordeev | ea3807e | 2012-06-14 09:49:55 +0200 | [diff] [blame] | 505 | int unsigned cpu; |
Mike Travis | 95d313c | 2008-12-16 17:33:54 -0800 | [diff] [blame] | 506 | |
| 507 | /* |
| 508 | * We're using fixed IRQ delivery, can only return one phys APIC ID. |
| 509 | * May as well be the first. |
| 510 | */ |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 511 | for_each_cpu_and(cpu, cpumask, andmask) { |
Mike Travis | a775a38 | 2008-12-17 15:21:39 -0800 | [diff] [blame] | 512 | if (cpumask_test_cpu(cpu, cpu_online_mask)) |
| 513 | break; |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 514 | } |
Alexander Gordeev | ff16432 | 2012-06-07 15:15:59 +0200 | [diff] [blame] | 515 | |
Alexander Gordeev | ea3807e | 2012-06-14 09:49:55 +0200 | [diff] [blame] | 516 | if (likely(cpu < nr_cpu_ids)) { |
Alexander Gordeev | a5a3915 | 2012-06-14 09:49:35 +0200 | [diff] [blame] | 517 | *apicid = per_cpu(x86_cpu_to_apicid, cpu) | uv_apicid_hibits; |
| 518 | return 0; |
Alexander Gordeev | a5a3915 | 2012-06-14 09:49:35 +0200 | [diff] [blame] | 519 | } |
Alexander Gordeev | ea3807e | 2012-06-14 09:49:55 +0200 | [diff] [blame] | 520 | |
| 521 | return -EINVAL; |
Mike Travis | 95d313c | 2008-12-16 17:33:54 -0800 | [diff] [blame] | 522 | } |
| 523 | |
Ingo Molnar | ca6c8ed | 2009-01-28 14:08:38 +0100 | [diff] [blame] | 524 | static unsigned int x2apic_get_apic_id(unsigned long x) |
Suresh Siddha | 0c81c74 | 2008-07-10 11:16:48 -0700 | [diff] [blame] | 525 | { |
| 526 | unsigned int id; |
| 527 | |
| 528 | WARN_ON(preemptible() && num_online_cpus() > 1); |
Tejun Heo | 0a3aee0 | 2010-12-18 16:28:55 +0100 | [diff] [blame] | 529 | id = x | __this_cpu_read(x2apic_extra_bits); |
Suresh Siddha | 0c81c74 | 2008-07-10 11:16:48 -0700 | [diff] [blame] | 530 | |
| 531 | return id; |
| 532 | } |
| 533 | |
Yinghai Lu | 1b9b89e | 2008-07-21 22:08:21 -0700 | [diff] [blame] | 534 | static unsigned long set_apic_id(unsigned int id) |
Yinghai Lu | f910a9d | 2008-07-12 01:01:20 -0700 | [diff] [blame] | 535 | { |
Masahiro Yamada | f148b41 | 2016-09-11 14:58:21 +0900 | [diff] [blame] | 536 | /* CHECKME: Do we need to mask out the xapic extra bits? */ |
| 537 | return id; |
Yinghai Lu | f910a9d | 2008-07-12 01:01:20 -0700 | [diff] [blame] | 538 | } |
| 539 | |
| 540 | static unsigned int uv_read_apic_id(void) |
| 541 | { |
Ingo Molnar | ca6c8ed | 2009-01-28 14:08:38 +0100 | [diff] [blame] | 542 | return x2apic_get_apic_id(apic_read(APIC_ID)); |
Yinghai Lu | f910a9d | 2008-07-12 01:01:20 -0700 | [diff] [blame] | 543 | } |
| 544 | |
Ingo Molnar | d4c9a9f | 2009-01-28 13:31:22 +0100 | [diff] [blame] | 545 | static int uv_phys_pkg_id(int initial_apicid, int index_msb) |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 546 | { |
Suresh Siddha | 0c81c74 | 2008-07-10 11:16:48 -0700 | [diff] [blame] | 547 | return uv_read_apic_id() >> index_msb; |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 548 | } |
| 549 | |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 550 | static void uv_send_IPI_self(int vector) |
| 551 | { |
| 552 | apic_write(APIC_SELF_IPI, vector); |
| 553 | } |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 554 | |
Suresh Siddha | 9ebd680 | 2011-05-19 16:45:46 -0700 | [diff] [blame] | 555 | static int uv_probe(void) |
| 556 | { |
| 557 | return apic == &apic_x2apic_uv_x; |
| 558 | } |
| 559 | |
Kees Cook | 404f6aa | 2016-08-08 16:29:06 -0700 | [diff] [blame] | 560 | static struct apic apic_x2apic_uv_x __ro_after_init = { |
Ingo Molnar | c796732 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 561 | |
| 562 | .name = "UV large system", |
Suresh Siddha | 9ebd680 | 2011-05-19 16:45:46 -0700 | [diff] [blame] | 563 | .probe = uv_probe, |
Ingo Molnar | c796732 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 564 | .acpi_madt_oem_check = uv_acpi_madt_oem_check, |
Steffen Persvold | b7157ac | 2012-03-16 20:25:35 +0100 | [diff] [blame] | 565 | .apic_id_valid = uv_apic_id_valid, |
Ingo Molnar | c796732 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 566 | .apic_id_registered = uv_apic_id_registered, |
| 567 | |
Ingo Molnar | f8987a1 | 2009-01-28 04:02:31 +0100 | [diff] [blame] | 568 | .irq_delivery_mode = dest_Fixed, |
Jack Steiner | c5997fa | 2009-07-27 09:38:56 -0500 | [diff] [blame] | 569 | .irq_dest_mode = 0, /* physical */ |
Ingo Molnar | c796732 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 570 | |
Alexander Gordeev | bf721d3 | 2012-06-05 13:23:29 +0200 | [diff] [blame] | 571 | .target_cpus = online_target_cpus, |
Ingo Molnar | 08125d3 | 2009-01-28 05:08:44 +0100 | [diff] [blame] | 572 | .disable_esr = 0, |
Ingo Molnar | bdb1a9b | 2009-01-28 05:29:25 +0100 | [diff] [blame] | 573 | .dest_logical = APIC_DEST_LOGICAL, |
Ingo Molnar | c796732 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 574 | .check_apicid_used = NULL, |
Ingo Molnar | c796732 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 575 | |
Alexander Gordeev | 9d8e106 | 2012-06-07 15:14:49 +0200 | [diff] [blame] | 576 | .vector_allocation_domain = default_vector_allocation_domain, |
Ingo Molnar | c796732 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 577 | .init_apic_ldr = uv_init_apic_ldr, |
| 578 | |
| 579 | .ioapic_phys_id_map = NULL, |
| 580 | .setup_apic_routing = NULL, |
Ingo Molnar | a21769a4 | 2009-01-28 06:50:47 +0100 | [diff] [blame] | 581 | .cpu_present_to_apicid = default_cpu_present_to_apicid, |
Ingo Molnar | c796732 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 582 | .apicid_to_cpu_present = NULL, |
Ingo Molnar | a27a621 | 2009-01-28 12:43:18 +0100 | [diff] [blame] | 583 | .check_phys_apicid_present = default_check_phys_apicid_present, |
Ingo Molnar | d4c9a9f | 2009-01-28 13:31:22 +0100 | [diff] [blame] | 584 | .phys_pkg_id = uv_phys_pkg_id, |
Ingo Molnar | c796732 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 585 | |
Ingo Molnar | ca6c8ed | 2009-01-28 14:08:38 +0100 | [diff] [blame] | 586 | .get_apic_id = x2apic_get_apic_id, |
Ingo Molnar | c796732 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 587 | .set_apic_id = set_apic_id, |
Ingo Molnar | c796732 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 588 | |
Ingo Molnar | c796732 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 589 | .cpu_mask_to_apicid_and = uv_cpu_mask_to_apicid_and, |
| 590 | |
Thomas Gleixner | 8642ea9 | 2015-11-04 22:57:05 +0000 | [diff] [blame] | 591 | .send_IPI = uv_send_IPI_one, |
Ingo Molnar | c796732 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 592 | .send_IPI_mask = uv_send_IPI_mask, |
| 593 | .send_IPI_mask_allbutself = uv_send_IPI_mask_allbutself, |
| 594 | .send_IPI_allbutself = uv_send_IPI_allbutself, |
| 595 | .send_IPI_all = uv_send_IPI_all, |
| 596 | .send_IPI_self = uv_send_IPI_self, |
| 597 | |
Ingo Molnar | 1f5bcab | 2009-02-26 13:51:40 +0100 | [diff] [blame] | 598 | .wakeup_secondary_cpu = uv_wakeup_secondary, |
Ingo Molnar | c796732 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 599 | .inquire_remote_apic = NULL, |
Yinghai Lu | c1eeb2d | 2009-02-16 23:02:14 -0800 | [diff] [blame] | 600 | |
| 601 | .read = native_apic_msr_read, |
| 602 | .write = native_apic_msr_write, |
Michael S. Tsirkin | 0ab711a | 2012-05-16 19:03:58 +0300 | [diff] [blame] | 603 | .eoi_write = native_apic_msr_eoi_write, |
Yinghai Lu | c1eeb2d | 2009-02-16 23:02:14 -0800 | [diff] [blame] | 604 | .icr_read = native_x2apic_icr_read, |
| 605 | .icr_write = native_x2apic_icr_write, |
| 606 | .wait_icr_idle = native_x2apic_wait_icr_idle, |
| 607 | .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 608 | }; |
| 609 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 610 | static void set_x2apic_extra_bits(int pnode) |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 611 | { |
Linus Torvalds | 16ee8db | 2011-01-11 11:11:46 -0800 | [diff] [blame] | 612 | __this_cpu_write(x2apic_extra_bits, pnode << uvh_apicid.s.pnode_shift); |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 613 | } |
| 614 | |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 615 | #define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_LENGTH 3 |
Jack Steiner | 9f5314f | 2008-05-28 09:51:18 -0500 | [diff] [blame] | 616 | #define DEST_SHIFT UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT |
| 617 | |
Jack Steiner | 9f5314f | 2008-05-28 09:51:18 -0500 | [diff] [blame] | 618 | static __init void get_lowmem_redirect(unsigned long *base, unsigned long *size) |
| 619 | { |
Jack Steiner | 62b0cfc | 2010-11-06 15:41:04 -0500 | [diff] [blame] | 620 | union uvh_rh_gam_alias210_overlay_config_2_mmr_u alias; |
Jack Steiner | 9f5314f | 2008-05-28 09:51:18 -0500 | [diff] [blame] | 621 | union uvh_rh_gam_alias210_redirect_config_2_mmr_u redirect; |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 622 | unsigned long m_redirect; |
| 623 | unsigned long m_overlay; |
Jack Steiner | 9f5314f | 2008-05-28 09:51:18 -0500 | [diff] [blame] | 624 | int i; |
| 625 | |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 626 | for (i = 0; i < UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_LENGTH; i++) { |
| 627 | switch (i) { |
| 628 | case 0: |
| 629 | m_redirect = UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR; |
| 630 | m_overlay = UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR; |
| 631 | break; |
| 632 | case 1: |
| 633 | m_redirect = UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR; |
| 634 | m_overlay = UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR; |
| 635 | break; |
| 636 | case 2: |
| 637 | m_redirect = UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR; |
| 638 | m_overlay = UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR; |
| 639 | break; |
| 640 | } |
| 641 | alias.v = uv_read_local_mmr(m_overlay); |
Robin Holt | 036ed8b | 2009-10-15 17:40:00 -0500 | [diff] [blame] | 642 | if (alias.s.enable && alias.s.base == 0) { |
Jack Steiner | 9f5314f | 2008-05-28 09:51:18 -0500 | [diff] [blame] | 643 | *size = (1UL << alias.s.m_alias); |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 644 | redirect.v = uv_read_local_mmr(m_redirect); |
| 645 | *base = (unsigned long)redirect.s.dest_base |
| 646 | << DEST_SHIFT; |
Jack Steiner | 9f5314f | 2008-05-28 09:51:18 -0500 | [diff] [blame] | 647 | return; |
| 648 | } |
| 649 | } |
Robin Holt | 036ed8b | 2009-10-15 17:40:00 -0500 | [diff] [blame] | 650 | *base = *size = 0; |
Jack Steiner | 9f5314f | 2008-05-28 09:51:18 -0500 | [diff] [blame] | 651 | } |
| 652 | |
Jack Steiner | 83f5d89 | 2008-07-01 14:45:38 -0500 | [diff] [blame] | 653 | enum map_type {map_wb, map_uc}; |
| 654 | |
Mike Travis | fcfbb2b | 2010-01-08 12:13:54 -0800 | [diff] [blame] | 655 | static __init void map_high(char *id, unsigned long base, int pshift, |
| 656 | int bshift, int max_pnode, enum map_type map_type) |
Jack Steiner | 83f5d89 | 2008-07-01 14:45:38 -0500 | [diff] [blame] | 657 | { |
| 658 | unsigned long bytes, paddr; |
| 659 | |
Mike Travis | fcfbb2b | 2010-01-08 12:13:54 -0800 | [diff] [blame] | 660 | paddr = base << pshift; |
| 661 | bytes = (1UL << bshift) * (max_pnode + 1); |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 662 | if (!paddr) { |
| 663 | pr_info("UV: Map %s_HI base address NULL\n", id); |
| 664 | return; |
| 665 | } |
Dimitri Sivanich | 879d5ad | 2013-05-29 10:56:09 -0500 | [diff] [blame] | 666 | pr_debug("UV: Map %s_HI 0x%lx - 0x%lx\n", id, paddr, paddr + bytes); |
Jack Steiner | 83f5d89 | 2008-07-01 14:45:38 -0500 | [diff] [blame] | 667 | if (map_type == map_uc) |
| 668 | init_extra_mapping_uc(paddr, bytes); |
| 669 | else |
| 670 | init_extra_mapping_wb(paddr, bytes); |
Jack Steiner | 83f5d89 | 2008-07-01 14:45:38 -0500 | [diff] [blame] | 671 | } |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 672 | |
Dimitri Sivanich | 879d5ad | 2013-05-29 10:56:09 -0500 | [diff] [blame] | 673 | static __init void map_gru_distributed(unsigned long c) |
| 674 | { |
| 675 | union uvh_rh_gam_gru_overlay_config_mmr_u gru; |
| 676 | u64 paddr; |
| 677 | unsigned long bytes; |
| 678 | int nid; |
| 679 | |
| 680 | gru.v = c; |
| 681 | /* only base bits 42:28 relevant in dist mode */ |
| 682 | gru_dist_base = gru.v & 0x000007fff0000000UL; |
| 683 | if (!gru_dist_base) { |
| 684 | pr_info("UV: Map GRU_DIST base address NULL\n"); |
| 685 | return; |
| 686 | } |
| 687 | bytes = 1UL << UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_SHFT; |
| 688 | gru_dist_lmask = ((1UL << uv_hub_info->m_val) - 1) & ~(bytes - 1); |
| 689 | gru_dist_umask = ~((1UL << uv_hub_info->m_val) - 1); |
| 690 | gru_dist_base &= gru_dist_lmask; /* Clear bits above M */ |
| 691 | for_each_online_node(nid) { |
| 692 | paddr = ((u64)uv_node_to_pnode(nid) << uv_hub_info->m_val) | |
| 693 | gru_dist_base; |
| 694 | init_extra_mapping_wb(paddr, bytes); |
| 695 | gru_first_node_paddr = min(paddr, gru_first_node_paddr); |
| 696 | gru_last_node_paddr = max(paddr, gru_last_node_paddr); |
| 697 | } |
| 698 | /* Save upper (63:M) bits of address only for is_GRU_range */ |
| 699 | gru_first_node_paddr &= gru_dist_umask; |
| 700 | gru_last_node_paddr &= gru_dist_umask; |
| 701 | pr_debug("UV: Map GRU_DIST base 0x%016llx 0x%016llx - 0x%016llx\n", |
| 702 | gru_dist_base, gru_first_node_paddr, gru_last_node_paddr); |
| 703 | } |
| 704 | |
Jack Steiner | 83f5d89 | 2008-07-01 14:45:38 -0500 | [diff] [blame] | 705 | static __init void map_gru_high(int max_pnode) |
| 706 | { |
| 707 | union uvh_rh_gam_gru_overlay_config_mmr_u gru; |
| 708 | int shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_SHFT; |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 709 | unsigned long mask = UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_MASK; |
| 710 | unsigned long base; |
Jack Steiner | 83f5d89 | 2008-07-01 14:45:38 -0500 | [diff] [blame] | 711 | |
| 712 | gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR); |
Dimitri Sivanich | 879d5ad | 2013-05-29 10:56:09 -0500 | [diff] [blame] | 713 | if (!gru.s.enable) { |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 714 | pr_info("UV: GRU disabled\n"); |
Dimitri Sivanich | 879d5ad | 2013-05-29 10:56:09 -0500 | [diff] [blame] | 715 | return; |
Jack Steiner | fd12a0d | 2009-11-19 14:23:41 -0600 | [diff] [blame] | 716 | } |
Dimitri Sivanich | 879d5ad | 2013-05-29 10:56:09 -0500 | [diff] [blame] | 717 | |
| 718 | if (is_uv3_hub() && gru.s3.mode) { |
| 719 | map_gru_distributed(gru.v); |
| 720 | return; |
| 721 | } |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 722 | base = (gru.v & mask) >> shift; |
| 723 | map_high("GRU", base, shift, shift, max_pnode, map_wb); |
| 724 | gru_start_paddr = ((u64)base << shift); |
Dimitri Sivanich | 879d5ad | 2013-05-29 10:56:09 -0500 | [diff] [blame] | 725 | gru_end_paddr = gru_start_paddr + (1UL << shift) * (max_pnode + 1); |
Jack Steiner | 83f5d89 | 2008-07-01 14:45:38 -0500 | [diff] [blame] | 726 | } |
| 727 | |
Jack Steiner | daf7b9c | 2009-09-09 10:43:39 -0500 | [diff] [blame] | 728 | static __init void map_mmr_high(int max_pnode) |
| 729 | { |
| 730 | union uvh_rh_gam_mmr_overlay_config_mmr_u mmr; |
| 731 | int shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_BASE_SHFT; |
| 732 | |
| 733 | mmr.v = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR); |
| 734 | if (mmr.s.enable) |
Mike Travis | fcfbb2b | 2010-01-08 12:13:54 -0800 | [diff] [blame] | 735 | map_high("MMR", mmr.s.base, shift, shift, max_pnode, map_uc); |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 736 | else |
| 737 | pr_info("UV: MMR disabled\n"); |
Jack Steiner | daf7b9c | 2009-09-09 10:43:39 -0500 | [diff] [blame] | 738 | } |
| 739 | |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 740 | /* |
| 741 | * This commonality works because both 0 & 1 versions of the MMIOH OVERLAY |
| 742 | * and REDIRECT MMR regs are exactly the same on UV3. |
| 743 | */ |
| 744 | struct mmioh_config { |
| 745 | unsigned long overlay; |
| 746 | unsigned long redirect; |
| 747 | char *id; |
| 748 | }; |
| 749 | |
| 750 | static __initdata struct mmioh_config mmiohs[] = { |
| 751 | { |
| 752 | UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_MMR, |
| 753 | UV3H_RH_GAM_MMIOH_REDIRECT_CONFIG0_MMR, |
| 754 | "MMIOH0" |
| 755 | }, |
| 756 | { |
| 757 | UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG1_MMR, |
| 758 | UV3H_RH_GAM_MMIOH_REDIRECT_CONFIG1_MMR, |
| 759 | "MMIOH1" |
| 760 | }, |
| 761 | }; |
| 762 | |
Mike Travis | a2f28e6 | 2016-04-29 16:54:11 -0500 | [diff] [blame] | 763 | /* UV3 & UV4 have identical MMIOH overlay configs */ |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 764 | static __init void map_mmioh_high_uv3(int index, int min_pnode, int max_pnode) |
| 765 | { |
| 766 | union uv3h_rh_gam_mmioh_overlay_config0_mmr_u overlay; |
| 767 | unsigned long mmr; |
| 768 | unsigned long base; |
| 769 | int i, n, shift, m_io, max_io; |
| 770 | int nasid, lnasid, fi, li; |
| 771 | char *id; |
| 772 | |
| 773 | id = mmiohs[index].id; |
| 774 | overlay.v = uv_read_local_mmr(mmiohs[index].overlay); |
| 775 | pr_info("UV: %s overlay 0x%lx base:0x%x m_io:%d\n", |
| 776 | id, overlay.v, overlay.s3.base, overlay.s3.m_io); |
| 777 | if (!overlay.s3.enable) { |
| 778 | pr_info("UV: %s disabled\n", id); |
| 779 | return; |
| 780 | } |
| 781 | |
| 782 | shift = UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_MMR_BASE_SHFT; |
| 783 | base = (unsigned long)overlay.s3.base; |
| 784 | m_io = overlay.s3.m_io; |
| 785 | mmr = mmiohs[index].redirect; |
| 786 | n = UV3H_RH_GAM_MMIOH_REDIRECT_CONFIG0_MMR_DEPTH; |
| 787 | min_pnode *= 2; /* convert to NASID */ |
| 788 | max_pnode *= 2; |
| 789 | max_io = lnasid = fi = li = -1; |
| 790 | |
| 791 | for (i = 0; i < n; i++) { |
| 792 | union uv3h_rh_gam_mmioh_redirect_config0_mmr_u redirect; |
| 793 | |
| 794 | redirect.v = uv_read_local_mmr(mmr + i * 8); |
| 795 | nasid = redirect.s3.nasid; |
| 796 | if (nasid < min_pnode || max_pnode < nasid) |
| 797 | nasid = -1; /* invalid NASID */ |
| 798 | |
| 799 | if (nasid == lnasid) { |
| 800 | li = i; |
| 801 | if (i != n-1) /* last entry check */ |
| 802 | continue; |
| 803 | } |
| 804 | |
| 805 | /* check if we have a cached (or last) redirect to print */ |
| 806 | if (lnasid != -1 || (i == n-1 && nasid != -1)) { |
| 807 | unsigned long addr1, addr2; |
| 808 | int f, l; |
| 809 | |
| 810 | if (lnasid == -1) { |
| 811 | f = l = i; |
| 812 | lnasid = nasid; |
| 813 | } else { |
| 814 | f = fi; |
| 815 | l = li; |
| 816 | } |
| 817 | addr1 = (base << shift) + |
| 818 | f * (unsigned long)(1 << m_io); |
| 819 | addr2 = (base << shift) + |
| 820 | (l + 1) * (unsigned long)(1 << m_io); |
| 821 | pr_info("UV: %s[%03d..%03d] NASID 0x%04x ADDR 0x%016lx - 0x%016lx\n", |
| 822 | id, fi, li, lnasid, addr1, addr2); |
| 823 | if (max_io < l) |
| 824 | max_io = l; |
| 825 | } |
| 826 | fi = li = i; |
| 827 | lnasid = nasid; |
| 828 | } |
| 829 | |
| 830 | pr_info("UV: %s base:0x%lx shift:%d M_IO:%d MAX_IO:%d\n", |
| 831 | id, base, shift, m_io, max_io); |
| 832 | |
| 833 | if (max_io >= 0) |
| 834 | map_high(id, base, shift, m_io, max_io, map_uc); |
| 835 | } |
| 836 | |
| 837 | static __init void map_mmioh_high(int min_pnode, int max_pnode) |
Jack Steiner | 83f5d89 | 2008-07-01 14:45:38 -0500 | [diff] [blame] | 838 | { |
| 839 | union uvh_rh_gam_mmioh_overlay_config_mmr_u mmioh; |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 840 | unsigned long mmr, base; |
| 841 | int shift, enable, m_io, n_io; |
Jack Steiner | 83f5d89 | 2008-07-01 14:45:38 -0500 | [diff] [blame] | 842 | |
Mike Travis | a2f28e6 | 2016-04-29 16:54:11 -0500 | [diff] [blame] | 843 | if (is_uv3_hub() || is_uv4_hub()) { |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 844 | /* Map both MMIOH Regions */ |
| 845 | map_mmioh_high_uv3(0, min_pnode, max_pnode); |
| 846 | map_mmioh_high_uv3(1, min_pnode, max_pnode); |
| 847 | return; |
Jack Steiner | 2a91959 | 2011-05-11 12:50:28 -0500 | [diff] [blame] | 848 | } |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 849 | |
| 850 | if (is_uv1_hub()) { |
| 851 | mmr = UV1H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR; |
| 852 | shift = UV1H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT; |
| 853 | mmioh.v = uv_read_local_mmr(mmr); |
| 854 | enable = !!mmioh.s1.enable; |
| 855 | base = mmioh.s1.base; |
| 856 | m_io = mmioh.s1.m_io; |
| 857 | n_io = mmioh.s1.n_io; |
| 858 | } else if (is_uv2_hub()) { |
| 859 | mmr = UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR; |
Jack Steiner | 2a91959 | 2011-05-11 12:50:28 -0500 | [diff] [blame] | 860 | shift = UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT; |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 861 | mmioh.v = uv_read_local_mmr(mmr); |
| 862 | enable = !!mmioh.s2.enable; |
| 863 | base = mmioh.s2.base; |
| 864 | m_io = mmioh.s2.m_io; |
| 865 | n_io = mmioh.s2.n_io; |
| 866 | } else |
| 867 | return; |
| 868 | |
| 869 | if (enable) { |
| 870 | max_pnode &= (1 << n_io) - 1; |
| 871 | pr_info( |
| 872 | "UV: base:0x%lx shift:%d N_IO:%d M_IO:%d max_pnode:0x%x\n", |
| 873 | base, shift, m_io, n_io, max_pnode); |
| 874 | map_high("MMIOH", base, shift, m_io, max_pnode, map_uc); |
| 875 | } else { |
| 876 | pr_info("UV: MMIOH disabled\n"); |
Jack Steiner | 2a91959 | 2011-05-11 12:50:28 -0500 | [diff] [blame] | 877 | } |
Jack Steiner | 83f5d89 | 2008-07-01 14:45:38 -0500 | [diff] [blame] | 878 | } |
| 879 | |
Jack Steiner | 918bc96 | 2009-11-25 10:20:19 -0600 | [diff] [blame] | 880 | static __init void map_low_mmrs(void) |
| 881 | { |
| 882 | init_extra_mapping_uc(UV_GLOBAL_MMR32_BASE, UV_GLOBAL_MMR32_SIZE); |
| 883 | init_extra_mapping_uc(UV_LOCAL_MMR_BASE, UV_LOCAL_MMR_SIZE); |
| 884 | } |
| 885 | |
Russ Anderson | 7019cc2 | 2008-07-09 15:27:19 -0500 | [diff] [blame] | 886 | static __init void uv_rtc_init(void) |
| 887 | { |
Russ Anderson | 922402f | 2008-10-03 11:59:33 -0500 | [diff] [blame] | 888 | long status; |
| 889 | u64 ticks_per_sec; |
Russ Anderson | 7019cc2 | 2008-07-09 15:27:19 -0500 | [diff] [blame] | 890 | |
Russ Anderson | 922402f | 2008-10-03 11:59:33 -0500 | [diff] [blame] | 891 | status = uv_bios_freq_base(BIOS_FREQ_BASE_REALTIME_CLOCK, |
| 892 | &ticks_per_sec); |
| 893 | if (status != BIOS_STATUS_SUCCESS || ticks_per_sec < 100000) { |
Russ Anderson | 7019cc2 | 2008-07-09 15:27:19 -0500 | [diff] [blame] | 894 | printk(KERN_WARNING |
| 895 | "unable to determine platform RTC clock frequency, " |
| 896 | "guessing.\n"); |
| 897 | /* BIOS gives wrong value for clock freq. so guess */ |
| 898 | sn_rtc_cycles_per_second = 1000000000000UL / 30000UL; |
| 899 | } else |
| 900 | sn_rtc_cycles_per_second = ticks_per_sec; |
| 901 | } |
| 902 | |
Jack Steiner | 8da077d | 2008-09-23 08:42:05 -0500 | [diff] [blame] | 903 | /* |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 904 | * percpu heartbeat timer |
| 905 | */ |
| 906 | static void uv_heartbeat(unsigned long ignored) |
| 907 | { |
Mike Travis | d38bb13 | 2016-04-29 16:54:13 -0500 | [diff] [blame] | 908 | struct timer_list *timer = &uv_scir_info->timer; |
| 909 | unsigned char bits = uv_scir_info->state; |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 910 | |
| 911 | /* flip heartbeat bit */ |
| 912 | bits ^= SCIR_CPU_HEARTBEAT; |
| 913 | |
Mike Travis | 69a72a0 | 2008-10-27 07:51:20 -0700 | [diff] [blame] | 914 | /* is this cpu idle? */ |
| 915 | if (idle_cpu(raw_smp_processor_id())) |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 916 | bits &= ~SCIR_CPU_ACTIVITY; |
| 917 | else |
| 918 | bits |= SCIR_CPU_ACTIVITY; |
| 919 | |
| 920 | /* update system controller interface reg */ |
| 921 | uv_set_scir_bits(bits); |
| 922 | |
| 923 | /* enable next timer period */ |
Thomas Gleixner | 920a4a7 | 2016-07-04 09:50:16 +0000 | [diff] [blame] | 924 | mod_timer(timer, jiffies + SCIR_CPU_HB_INTERVAL); |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 925 | } |
| 926 | |
Sebastian Andrzej Siewior | b067a7b | 2016-09-06 19:04:54 +0200 | [diff] [blame] | 927 | static int uv_heartbeat_enable(unsigned int cpu) |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 928 | { |
Mike Travis | d38bb13 | 2016-04-29 16:54:13 -0500 | [diff] [blame] | 929 | while (!uv_cpu_scir_info(cpu)->enabled) { |
| 930 | struct timer_list *timer = &uv_cpu_scir_info(cpu)->timer; |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 931 | |
| 932 | uv_set_cpu_scir_bits(cpu, SCIR_CPU_HEARTBEAT|SCIR_CPU_ACTIVITY); |
Thomas Gleixner | 920a4a7 | 2016-07-04 09:50:16 +0000 | [diff] [blame] | 933 | setup_pinned_timer(timer, uv_heartbeat, cpu); |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 934 | timer->expires = jiffies + SCIR_CPU_HB_INTERVAL; |
| 935 | add_timer_on(timer, cpu); |
Mike Travis | d38bb13 | 2016-04-29 16:54:13 -0500 | [diff] [blame] | 936 | uv_cpu_scir_info(cpu)->enabled = 1; |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 937 | |
Roel Kluin | 99659a9 | 2010-01-07 15:35:42 +0100 | [diff] [blame] | 938 | /* also ensure that boot cpu is enabled */ |
| 939 | cpu = 0; |
| 940 | } |
Sebastian Andrzej Siewior | b067a7b | 2016-09-06 19:04:54 +0200 | [diff] [blame] | 941 | return 0; |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 942 | } |
| 943 | |
Richard A. Holden III | 77be80e | 2008-11-19 16:05:14 -0700 | [diff] [blame] | 944 | #ifdef CONFIG_HOTPLUG_CPU |
Sebastian Andrzej Siewior | b067a7b | 2016-09-06 19:04:54 +0200 | [diff] [blame] | 945 | static int uv_heartbeat_disable(unsigned int cpu) |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 946 | { |
Mike Travis | d38bb13 | 2016-04-29 16:54:13 -0500 | [diff] [blame] | 947 | if (uv_cpu_scir_info(cpu)->enabled) { |
| 948 | uv_cpu_scir_info(cpu)->enabled = 0; |
| 949 | del_timer(&uv_cpu_scir_info(cpu)->timer); |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 950 | } |
| 951 | uv_set_cpu_scir_bits(cpu, 0xff); |
Sebastian Andrzej Siewior | b067a7b | 2016-09-06 19:04:54 +0200 | [diff] [blame] | 952 | return 0; |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 953 | } |
| 954 | |
| 955 | static __init void uv_scir_register_cpu_notifier(void) |
| 956 | { |
Sebastian Andrzej Siewior | b067a7b | 2016-09-06 19:04:54 +0200 | [diff] [blame] | 957 | cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "x86/x2apic-uvx:online", |
| 958 | uv_heartbeat_enable, uv_heartbeat_disable); |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 959 | } |
| 960 | |
| 961 | #else /* !CONFIG_HOTPLUG_CPU */ |
| 962 | |
| 963 | static __init void uv_scir_register_cpu_notifier(void) |
| 964 | { |
| 965 | } |
| 966 | |
| 967 | static __init int uv_init_heartbeat(void) |
| 968 | { |
| 969 | int cpu; |
| 970 | |
| 971 | if (is_uv_system()) |
| 972 | for_each_online_cpu(cpu) |
| 973 | uv_heartbeat_enable(cpu); |
| 974 | return 0; |
| 975 | } |
| 976 | |
| 977 | late_initcall(uv_init_heartbeat); |
| 978 | |
| 979 | #endif /* !CONFIG_HOTPLUG_CPU */ |
| 980 | |
Mike Travis | 841582e | 2010-02-02 14:38:14 -0800 | [diff] [blame] | 981 | /* Direct Legacy VGA I/O traffic to designated IOH */ |
| 982 | int uv_set_vga_state(struct pci_dev *pdev, bool decode, |
Dave Airlie | 7ad35cf | 2011-05-25 14:00:49 +1000 | [diff] [blame] | 983 | unsigned int command_bits, u32 flags) |
Mike Travis | 841582e | 2010-02-02 14:38:14 -0800 | [diff] [blame] | 984 | { |
| 985 | int domain, bus, rc; |
| 986 | |
Dave Airlie | 7ad35cf | 2011-05-25 14:00:49 +1000 | [diff] [blame] | 987 | PR_DEVEL("devfn %x decode %d cmd %x flags %d\n", |
| 988 | pdev->devfn, decode, command_bits, flags); |
Mike Travis | 841582e | 2010-02-02 14:38:14 -0800 | [diff] [blame] | 989 | |
Dave Airlie | 7ad35cf | 2011-05-25 14:00:49 +1000 | [diff] [blame] | 990 | if (!(flags & PCI_VGA_STATE_CHANGE_BRIDGE)) |
Mike Travis | 841582e | 2010-02-02 14:38:14 -0800 | [diff] [blame] | 991 | return 0; |
| 992 | |
| 993 | if ((command_bits & PCI_COMMAND_IO) == 0) |
| 994 | return 0; |
| 995 | |
| 996 | domain = pci_domain_nr(pdev->bus); |
| 997 | bus = pdev->bus->number; |
| 998 | |
| 999 | rc = uv_bios_set_legacy_vga_target(decode, domain, bus); |
| 1000 | PR_DEVEL("vga decode %d %x:%x, rc: %d\n", decode, domain, bus, rc); |
| 1001 | |
| 1002 | return rc; |
| 1003 | } |
| 1004 | |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 1005 | /* |
Jack Steiner | 8da077d | 2008-09-23 08:42:05 -0500 | [diff] [blame] | 1006 | * Called on each cpu to initialize the per_cpu UV data area. |
Ingo Molnar | 0b1da1c | 2009-02-26 14:10:10 +0100 | [diff] [blame] | 1007 | * FIXME: hotplug not supported yet |
Jack Steiner | 8da077d | 2008-09-23 08:42:05 -0500 | [diff] [blame] | 1008 | */ |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 1009 | void uv_cpu_init(void) |
Jack Steiner | 8da077d | 2008-09-23 08:42:05 -0500 | [diff] [blame] | 1010 | { |
Adam Buchbinder | 6a6256f | 2016-02-23 15:34:30 -0800 | [diff] [blame] | 1011 | /* CPU 0 initialization will be done via uv_system_init. */ |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1012 | if (smp_processor_id() == 0) |
Jack Steiner | 8da077d | 2008-09-23 08:42:05 -0500 | [diff] [blame] | 1013 | return; |
| 1014 | |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1015 | uv_hub_info->nr_online_cpus++; |
Jack Steiner | 8da077d | 2008-09-23 08:42:05 -0500 | [diff] [blame] | 1016 | |
| 1017 | if (get_uv_system_type() == UV_NON_UNIQUE_APIC) |
| 1018 | set_x2apic_extra_bits(uv_hub_info->pnode); |
| 1019 | } |
| 1020 | |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 1021 | struct mn { |
| 1022 | unsigned char m_val; |
| 1023 | unsigned char n_val; |
| 1024 | unsigned char m_shift; |
| 1025 | unsigned char n_lshift; |
| 1026 | }; |
| 1027 | |
| 1028 | static void get_mn(struct mn *mnp) |
| 1029 | { |
| 1030 | union uvh_rh_gam_config_mmr_u m_n_config; |
| 1031 | union uv3h_gr0_gam_gr_config_u m_gr_config; |
| 1032 | |
| 1033 | m_n_config.v = uv_read_local_mmr(UVH_RH_GAM_CONFIG_MMR); |
| 1034 | mnp->n_val = m_n_config.s.n_skt; |
| 1035 | if (is_uv4_hub()) { |
| 1036 | mnp->m_val = 0; |
| 1037 | mnp->n_lshift = 0; |
| 1038 | } else if (is_uv3_hub()) { |
| 1039 | mnp->m_val = m_n_config.s3.m_skt; |
| 1040 | m_gr_config.v = uv_read_local_mmr(UV3H_GR0_GAM_GR_CONFIG); |
| 1041 | mnp->n_lshift = m_gr_config.s3.m_skt; |
| 1042 | } else if (is_uv2_hub()) { |
| 1043 | mnp->m_val = m_n_config.s2.m_skt; |
| 1044 | mnp->n_lshift = mnp->m_val == 40 ? 40 : 39; |
| 1045 | } else if (is_uv1_hub()) { |
| 1046 | mnp->m_val = m_n_config.s1.m_skt; |
| 1047 | mnp->n_lshift = mnp->m_val; |
| 1048 | } |
| 1049 | mnp->m_shift = mnp->m_val ? 64 - mnp->m_val : 0; |
| 1050 | } |
| 1051 | |
| 1052 | void __init uv_init_hub_info(struct uv_hub_info_s *hub_info) |
| 1053 | { |
| 1054 | struct mn mn = {0}; /* avoid unitialized warnings */ |
| 1055 | union uvh_node_id_u node_id; |
| 1056 | |
| 1057 | get_mn(&mn); |
| 1058 | hub_info->m_val = mn.m_val; |
| 1059 | hub_info->n_val = mn.n_val; |
| 1060 | hub_info->m_shift = mn.m_shift; |
Mike Travis | 405422d | 2016-04-29 16:54:17 -0500 | [diff] [blame] | 1061 | hub_info->n_lshift = mn.n_lshift ? mn.n_lshift : 0; |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 1062 | |
| 1063 | hub_info->hub_revision = uv_hub_info->hub_revision; |
Mike Travis | 405422d | 2016-04-29 16:54:17 -0500 | [diff] [blame] | 1064 | hub_info->pnode_mask = uv_cpuid.pnode_mask; |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 1065 | hub_info->min_pnode = _min_pnode; |
Mike Travis | 6e27b91 | 2016-04-29 16:54:20 -0500 | [diff] [blame] | 1066 | hub_info->min_socket = _min_socket; |
| 1067 | hub_info->pnode_to_socket = _pnode_to_socket; |
| 1068 | hub_info->socket_to_node = _socket_to_node; |
| 1069 | hub_info->socket_to_pnode = _socket_to_pnode; |
Mike Travis | c85375c | 2016-04-29 16:54:21 -0500 | [diff] [blame] | 1070 | hub_info->gr_table_len = _gr_table_len; |
| 1071 | hub_info->gr_table = _gr_table; |
Mike Travis | 405422d | 2016-04-29 16:54:17 -0500 | [diff] [blame] | 1072 | hub_info->gpa_mask = mn.m_val ? |
| 1073 | (1UL << (mn.m_val + mn.n_val)) - 1 : |
| 1074 | (1UL << uv_cpuid.gpa_shift) - 1; |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 1075 | |
| 1076 | node_id.v = uv_read_local_mmr(UVH_NODE_ID); |
| 1077 | hub_info->gnode_extra = |
| 1078 | (node_id.s.node_id & ~((1 << mn.n_val) - 1)) >> 1; |
| 1079 | |
| 1080 | hub_info->gnode_upper = |
| 1081 | ((unsigned long)hub_info->gnode_extra << mn.m_val); |
| 1082 | |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 1083 | if (uv_gp_table) { |
| 1084 | hub_info->global_mmr_base = uv_gp_table->mmr_base; |
| 1085 | hub_info->global_mmr_shift = uv_gp_table->mmr_shift; |
| 1086 | hub_info->global_gru_base = uv_gp_table->gru_base; |
| 1087 | hub_info->global_gru_shift = uv_gp_table->gru_shift; |
| 1088 | hub_info->gpa_shift = uv_gp_table->gpa_shift; |
| 1089 | hub_info->gpa_mask = (1UL << hub_info->gpa_shift) - 1; |
| 1090 | } else { |
| 1091 | hub_info->global_mmr_base = |
| 1092 | uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) & |
| 1093 | ~UV_MMR_ENABLE; |
| 1094 | hub_info->global_mmr_shift = _UV_GLOBAL_MMR64_PNODE_SHIFT; |
| 1095 | } |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 1096 | |
| 1097 | get_lowmem_redirect( |
| 1098 | &hub_info->lowmem_remap_base, &hub_info->lowmem_remap_top); |
| 1099 | |
Mike Travis | 405422d | 2016-04-29 16:54:17 -0500 | [diff] [blame] | 1100 | hub_info->apic_pnode_shift = uv_cpuid.socketid_shift; |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 1101 | |
| 1102 | /* show system specific info */ |
| 1103 | pr_info("UV: N:%d M:%d m_shift:%d n_lshift:%d\n", |
| 1104 | hub_info->n_val, hub_info->m_val, |
| 1105 | hub_info->m_shift, hub_info->n_lshift); |
| 1106 | |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 1107 | pr_info("UV: gpa_mask/shift:0x%lx/%d pnode_mask:0x%x apic_pns:%d\n", |
| 1108 | hub_info->gpa_mask, hub_info->gpa_shift, |
| 1109 | hub_info->pnode_mask, hub_info->apic_pnode_shift); |
| 1110 | |
| 1111 | pr_info("UV: mmr_base/shift:0x%lx/%ld gru_base/shift:0x%lx/%ld\n", |
| 1112 | hub_info->global_mmr_base, hub_info->global_mmr_shift, |
| 1113 | hub_info->global_gru_base, hub_info->global_gru_shift); |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 1114 | |
| 1115 | pr_info("UV: gnode_upper:0x%lx gnode_extra:0x%x\n", |
| 1116 | hub_info->gnode_upper, hub_info->gnode_extra); |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 1117 | } |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 1118 | |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 1119 | static void __init decode_gam_params(unsigned long ptr) |
| 1120 | { |
| 1121 | uv_gp_table = (struct uv_gam_parameters *)ptr; |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 1122 | |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 1123 | pr_info("UV: GAM Params...\n"); |
| 1124 | pr_info("UV: mmr_base/shift:0x%llx/%d gru_base/shift:0x%llx/%d gpa_shift:%d\n", |
| 1125 | uv_gp_table->mmr_base, uv_gp_table->mmr_shift, |
| 1126 | uv_gp_table->gru_base, uv_gp_table->gru_shift, |
| 1127 | uv_gp_table->gpa_shift); |
| 1128 | } |
| 1129 | |
| 1130 | static void __init decode_gam_rng_tbl(unsigned long ptr) |
| 1131 | { |
| 1132 | struct uv_gam_range_entry *gre = (struct uv_gam_range_entry *)ptr; |
| 1133 | unsigned long lgre = 0; |
| 1134 | int index = 0; |
| 1135 | int sock_min = 999999, pnode_min = 99999; |
| 1136 | int sock_max = -1, pnode_max = -1; |
| 1137 | |
| 1138 | uv_gre_table = gre; |
| 1139 | for (; gre->type != UV_GAM_RANGE_TYPE_UNUSED; gre++) { |
| 1140 | if (!index) { |
| 1141 | pr_info("UV: GAM Range Table...\n"); |
Mike Travis | 22ac2bc | 2016-08-01 13:40:52 -0500 | [diff] [blame] | 1142 | pr_info("UV: # %20s %14s %5s %4s %5s %3s %2s\n", |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 1143 | "Range", "", "Size", "Type", "NASID", |
Mike Travis | 22ac2bc | 2016-08-01 13:40:52 -0500 | [diff] [blame] | 1144 | "SID", "PN"); |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 1145 | } |
| 1146 | pr_info( |
Mike Travis | 22ac2bc | 2016-08-01 13:40:52 -0500 | [diff] [blame] | 1147 | "UV: %2d: 0x%014lx-0x%014lx %5luG %3d %04x %02x %02x\n", |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 1148 | index++, |
| 1149 | (unsigned long)lgre << UV_GAM_RANGE_SHFT, |
| 1150 | (unsigned long)gre->limit << UV_GAM_RANGE_SHFT, |
| 1151 | ((unsigned long)(gre->limit - lgre)) >> |
| 1152 | (30 - UV_GAM_RANGE_SHFT), /* 64M -> 1G */ |
Mike Travis | 22ac2bc | 2016-08-01 13:40:52 -0500 | [diff] [blame] | 1153 | gre->type, gre->nasid, gre->sockid, gre->pnode); |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 1154 | |
| 1155 | lgre = gre->limit; |
| 1156 | if (sock_min > gre->sockid) |
| 1157 | sock_min = gre->sockid; |
| 1158 | if (sock_max < gre->sockid) |
| 1159 | sock_max = gre->sockid; |
| 1160 | if (pnode_min > gre->pnode) |
| 1161 | pnode_min = gre->pnode; |
| 1162 | if (pnode_max < gre->pnode) |
| 1163 | pnode_max = gre->pnode; |
| 1164 | } |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 1165 | _min_socket = sock_min; |
| 1166 | _max_socket = sock_max; |
| 1167 | _min_pnode = pnode_min; |
| 1168 | _max_pnode = pnode_max; |
| 1169 | _gr_table_len = index; |
| 1170 | pr_info( |
| 1171 | "UV: GRT: %d entries, sockets(min:%x,max:%x) pnodes(min:%x,max:%x)\n", |
| 1172 | index, _min_socket, _max_socket, _min_pnode, _max_pnode); |
| 1173 | } |
| 1174 | |
| 1175 | static void __init decode_uv_systab(void) |
| 1176 | { |
| 1177 | struct uv_systab *st; |
| 1178 | int i; |
| 1179 | |
| 1180 | st = uv_systab; |
| 1181 | if ((!st || st->revision < UV_SYSTAB_VERSION_UV4) && !is_uv4_hub()) |
| 1182 | return; |
| 1183 | if (st->revision != UV_SYSTAB_VERSION_UV4_LATEST) { |
| 1184 | pr_crit( |
| 1185 | "UV: BIOS UVsystab version(%x) mismatch, expecting(%x)\n", |
| 1186 | st->revision, UV_SYSTAB_VERSION_UV4_LATEST); |
| 1187 | BUG(); |
| 1188 | } |
| 1189 | |
| 1190 | for (i = 0; st->entry[i].type != UV_SYSTAB_TYPE_UNUSED; i++) { |
| 1191 | unsigned long ptr = st->entry[i].offset; |
| 1192 | |
| 1193 | if (!ptr) |
| 1194 | continue; |
| 1195 | |
| 1196 | ptr = ptr + (unsigned long)st; |
| 1197 | |
| 1198 | switch (st->entry[i].type) { |
| 1199 | case UV_SYSTAB_TYPE_GAM_PARAMS: |
| 1200 | decode_gam_params(ptr); |
| 1201 | break; |
| 1202 | |
| 1203 | case UV_SYSTAB_TYPE_GAM_RNG_TBL: |
| 1204 | decode_gam_rng_tbl(ptr); |
| 1205 | break; |
| 1206 | } |
| 1207 | } |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 1208 | } |
| 1209 | |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1210 | /* |
| 1211 | * Setup physical blade translations from UVH_NODE_PRESENT_TABLE |
| 1212 | * .. NB: UVH_NODE_PRESENT_TABLE is going away, |
| 1213 | * .. being replaced by GAM Range Table |
| 1214 | */ |
| 1215 | static __init void boot_init_possible_blades(struct uv_hub_info_s *hub_info) |
| 1216 | { |
Dimitri Sivanich | f68376f | 2016-04-29 16:54:23 -0500 | [diff] [blame] | 1217 | int i, uv_pb = 0; |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1218 | |
| 1219 | pr_info("UV: NODE_PRESENT_DEPTH = %d\n", UVH_NODE_PRESENT_TABLE_DEPTH); |
| 1220 | for (i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++) { |
| 1221 | unsigned long np; |
| 1222 | |
| 1223 | np = uv_read_local_mmr(UVH_NODE_PRESENT_TABLE + i * 8); |
| 1224 | if (np) |
| 1225 | pr_info("UV: NODE_PRESENT(%d) = 0x%016lx\n", i, np); |
| 1226 | |
| 1227 | uv_pb += hweight64(np); |
| 1228 | } |
| 1229 | if (uv_possible_blades != uv_pb) |
| 1230 | uv_possible_blades = uv_pb; |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1231 | } |
| 1232 | |
Mike Travis | 6e27b91 | 2016-04-29 16:54:20 -0500 | [diff] [blame] | 1233 | static void __init build_socket_tables(void) |
| 1234 | { |
| 1235 | struct uv_gam_range_entry *gre = uv_gre_table; |
| 1236 | int num, nump; |
| 1237 | int cpu, i, lnid; |
| 1238 | int minsock = _min_socket; |
| 1239 | int maxsock = _max_socket; |
| 1240 | int minpnode = _min_pnode; |
| 1241 | int maxpnode = _max_pnode; |
| 1242 | size_t bytes; |
| 1243 | |
| 1244 | if (!gre) { |
| 1245 | if (is_uv1_hub() || is_uv2_hub() || is_uv3_hub()) { |
| 1246 | pr_info("UV: No UVsystab socket table, ignoring\n"); |
| 1247 | return; /* not required */ |
| 1248 | } |
| 1249 | pr_crit( |
| 1250 | "UV: Error: UVsystab address translations not available!\n"); |
| 1251 | BUG(); |
| 1252 | } |
| 1253 | |
| 1254 | /* build socket id -> node id, pnode */ |
| 1255 | num = maxsock - minsock + 1; |
| 1256 | bytes = num * sizeof(_socket_to_node[0]); |
| 1257 | _socket_to_node = kmalloc(bytes, GFP_KERNEL); |
| 1258 | _socket_to_pnode = kmalloc(bytes, GFP_KERNEL); |
| 1259 | |
| 1260 | nump = maxpnode - minpnode + 1; |
| 1261 | bytes = nump * sizeof(_pnode_to_socket[0]); |
| 1262 | _pnode_to_socket = kmalloc(bytes, GFP_KERNEL); |
| 1263 | BUG_ON(!_socket_to_node || !_socket_to_pnode || !_pnode_to_socket); |
| 1264 | |
| 1265 | for (i = 0; i < num; i++) |
| 1266 | _socket_to_node[i] = _socket_to_pnode[i] = SOCK_EMPTY; |
| 1267 | |
| 1268 | for (i = 0; i < nump; i++) |
| 1269 | _pnode_to_socket[i] = SOCK_EMPTY; |
| 1270 | |
| 1271 | /* fill in pnode/node/addr conversion list values */ |
Mike Travis | 22ac2bc | 2016-08-01 13:40:52 -0500 | [diff] [blame] | 1272 | pr_info("UV: GAM Building socket/pnode conversion tables\n"); |
Mike Travis | 6e27b91 | 2016-04-29 16:54:20 -0500 | [diff] [blame] | 1273 | for (; gre->type != UV_GAM_RANGE_TYPE_UNUSED; gre++) { |
| 1274 | if (gre->type == UV_GAM_RANGE_TYPE_HOLE) |
| 1275 | continue; |
| 1276 | i = gre->sockid - minsock; |
| 1277 | if (_socket_to_pnode[i] != SOCK_EMPTY) |
| 1278 | continue; /* duplicate */ |
| 1279 | _socket_to_pnode[i] = gre->pnode; |
Mike Travis | 6e27b91 | 2016-04-29 16:54:20 -0500 | [diff] [blame] | 1280 | |
| 1281 | i = gre->pnode - minpnode; |
| 1282 | _pnode_to_socket[i] = gre->sockid; |
| 1283 | |
| 1284 | pr_info( |
Mike Travis | 22ac2bc | 2016-08-01 13:40:52 -0500 | [diff] [blame] | 1285 | "UV: sid:%02x type:%d nasid:%04x pn:%02x pn2s:%2x\n", |
Mike Travis | 6e27b91 | 2016-04-29 16:54:20 -0500 | [diff] [blame] | 1286 | gre->sockid, gre->type, gre->nasid, |
| 1287 | _socket_to_pnode[gre->sockid - minsock], |
Mike Travis | 6e27b91 | 2016-04-29 16:54:20 -0500 | [diff] [blame] | 1288 | _pnode_to_socket[gre->pnode - minpnode]); |
| 1289 | } |
| 1290 | |
Mike Travis | 22ac2bc | 2016-08-01 13:40:52 -0500 | [diff] [blame] | 1291 | /* Set socket -> node values */ |
Mike Travis | 6e27b91 | 2016-04-29 16:54:20 -0500 | [diff] [blame] | 1292 | lnid = -1; |
| 1293 | for_each_present_cpu(cpu) { |
| 1294 | int nid = cpu_to_node(cpu); |
| 1295 | int apicid, sockid; |
| 1296 | |
| 1297 | if (lnid == nid) |
| 1298 | continue; |
| 1299 | lnid = nid; |
| 1300 | apicid = per_cpu(x86_cpu_to_apicid, cpu); |
| 1301 | sockid = apicid >> uv_cpuid.socketid_shift; |
Mike Travis | 22ac2bc | 2016-08-01 13:40:52 -0500 | [diff] [blame] | 1302 | _socket_to_node[sockid - minsock] = nid; |
| 1303 | pr_info("UV: sid:%02x: apicid:%04x node:%2d\n", |
| 1304 | sockid, apicid, nid); |
Mike Travis | 6e27b91 | 2016-04-29 16:54:20 -0500 | [diff] [blame] | 1305 | } |
| 1306 | |
| 1307 | /* Setup physical blade to pnode translation from GAM Range Table */ |
| 1308 | bytes = num_possible_nodes() * sizeof(_node_to_pnode[0]); |
| 1309 | _node_to_pnode = kmalloc(bytes, GFP_KERNEL); |
| 1310 | BUG_ON(!_node_to_pnode); |
| 1311 | |
| 1312 | for (lnid = 0; lnid < num_possible_nodes(); lnid++) { |
| 1313 | unsigned short sockid; |
| 1314 | |
| 1315 | for (sockid = minsock; sockid <= maxsock; sockid++) { |
| 1316 | if (lnid == _socket_to_node[sockid - minsock]) { |
| 1317 | _node_to_pnode[lnid] = |
| 1318 | _socket_to_pnode[sockid - minsock]; |
| 1319 | break; |
| 1320 | } |
| 1321 | } |
| 1322 | if (sockid > maxsock) { |
| 1323 | pr_err("UV: socket for node %d not found!\n", lnid); |
| 1324 | BUG(); |
| 1325 | } |
| 1326 | } |
| 1327 | |
| 1328 | /* |
| 1329 | * If socket id == pnode or socket id == node for all nodes, |
| 1330 | * system runs faster by removing corresponding conversion table. |
| 1331 | */ |
| 1332 | pr_info("UV: Checking socket->node/pnode for identity maps\n"); |
| 1333 | if (minsock == 0) { |
| 1334 | for (i = 0; i < num; i++) |
| 1335 | if (_socket_to_node[i] == SOCK_EMPTY || |
| 1336 | i != _socket_to_node[i]) |
| 1337 | break; |
| 1338 | if (i >= num) { |
| 1339 | kfree(_socket_to_node); |
| 1340 | _socket_to_node = NULL; |
| 1341 | pr_info("UV: 1:1 socket_to_node table removed\n"); |
| 1342 | } |
| 1343 | } |
| 1344 | if (minsock == minpnode) { |
| 1345 | for (i = 0; i < num; i++) |
| 1346 | if (_socket_to_pnode[i] != SOCK_EMPTY && |
| 1347 | _socket_to_pnode[i] != i + minpnode) |
| 1348 | break; |
| 1349 | if (i >= num) { |
| 1350 | kfree(_socket_to_pnode); |
| 1351 | _socket_to_pnode = NULL; |
| 1352 | pr_info("UV: 1:1 socket_to_pnode table removed\n"); |
| 1353 | } |
| 1354 | } |
| 1355 | } |
| 1356 | |
Marcin Slusarz | c4bd1fd | 2008-08-21 20:49:05 +0200 | [diff] [blame] | 1357 | void __init uv_system_init(void) |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 1358 | { |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 1359 | struct uv_hub_info_s hub_info = {0}; |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1360 | int bytes, cpu, nodeid; |
| 1361 | unsigned short min_pnode = 9999, max_pnode = 0; |
Mike Travis | a0ec83f | 2016-04-29 16:54:05 -0500 | [diff] [blame] | 1362 | char *hub = is_uv4_hub() ? "UV400" : |
| 1363 | is_uv3_hub() ? "UV300" : |
| 1364 | is_uv2_hub() ? "UV2000/3000" : |
| 1365 | is_uv1_hub() ? "UV100/1000" : NULL; |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 1366 | |
Mike Travis | 1912c7a | 2015-04-09 13:26:31 -0500 | [diff] [blame] | 1367 | if (!hub) { |
| 1368 | pr_err("UV: Unknown/unsupported UV hub\n"); |
| 1369 | return; |
| 1370 | } |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 1371 | pr_info("UV: Found %s hub\n", hub); |
Alex Thorlton | d394f2d | 2015-12-11 14:59:45 -0600 | [diff] [blame] | 1372 | |
Alex Thorlton | 08914f4 | 2016-05-04 17:39:52 -0500 | [diff] [blame] | 1373 | map_low_mmrs(); |
Jack Steiner | 918bc96 | 2009-11-25 10:20:19 -0600 | [diff] [blame] | 1374 | |
Mike Travis | 1de329c | 2016-04-29 16:54:19 -0500 | [diff] [blame] | 1375 | uv_bios_init(); /* get uv_systab for decoding */ |
| 1376 | decode_uv_systab(); |
Mike Travis | 6e27b91 | 2016-04-29 16:54:20 -0500 | [diff] [blame] | 1377 | build_socket_tables(); |
Mike Travis | c85375c | 2016-04-29 16:54:21 -0500 | [diff] [blame] | 1378 | build_uv_gr_table(); |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 1379 | uv_init_hub_info(&hub_info); |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1380 | uv_possible_blades = num_possible_nodes(); |
| 1381 | if (!_node_to_pnode) |
| 1382 | boot_init_possible_blades(&hub_info); |
Jack Steiner | da517a0 | 2012-01-06 13:19:00 -0600 | [diff] [blame] | 1383 | |
| 1384 | /* uv_num_possible_blades() is really the hub count */ |
Mike Travis | 0045ddd | 2016-04-29 16:54:12 -0500 | [diff] [blame] | 1385 | pr_info("UV: Found %d hubs, %d nodes, %d cpus\n", |
| 1386 | uv_num_possible_blades(), |
| 1387 | num_possible_nodes(), |
| 1388 | num_possible_cpus()); |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 1389 | |
Russ Anderson | b76365a | 2009-12-17 10:53:25 -0600 | [diff] [blame] | 1390 | uv_bios_get_sn_info(0, &uv_type, &sn_partition_id, &sn_coherency_id, |
| 1391 | &sn_region_size, &system_serial_number); |
Mike Travis | c443c03 | 2016-04-29 16:54:07 -0500 | [diff] [blame] | 1392 | hub_info.coherency_domain_number = sn_coherency_id; |
Russ Anderson | 7019cc2 | 2008-07-09 15:27:19 -0500 | [diff] [blame] | 1393 | uv_rtc_init(); |
| 1394 | |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1395 | bytes = sizeof(void *) * uv_num_possible_blades(); |
| 1396 | __uv_hub_info_list = kzalloc(bytes, GFP_KERNEL); |
| 1397 | BUG_ON(!__uv_hub_info_list); |
Mike Travis | 39d3077 | 2009-12-28 13:28:25 -0800 | [diff] [blame] | 1398 | |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1399 | bytes = sizeof(struct uv_hub_info_s); |
| 1400 | for_each_node(nodeid) { |
| 1401 | struct uv_hub_info_s *new_hub; |
Mike Travis | 3edcf2f | 2016-04-29 16:54:15 -0500 | [diff] [blame] | 1402 | |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1403 | if (__uv_hub_info_list[nodeid]) { |
| 1404 | pr_err("UV: Node %d UV HUB already initialized!?\n", |
| 1405 | nodeid); |
| 1406 | BUG(); |
Mike Travis | 3edcf2f | 2016-04-29 16:54:15 -0500 | [diff] [blame] | 1407 | } |
Jack Steiner | 9f5314f | 2008-05-28 09:51:18 -0500 | [diff] [blame] | 1408 | |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1409 | /* Allocate new per hub info list */ |
| 1410 | new_hub = (nodeid == 0) ? |
| 1411 | &uv_hub_info_node0 : |
| 1412 | kzalloc_node(bytes, GFP_KERNEL, nodeid); |
| 1413 | BUG_ON(!new_hub); |
| 1414 | __uv_hub_info_list[nodeid] = new_hub; |
| 1415 | new_hub = uv_hub_info_list(nodeid); |
| 1416 | BUG_ON(!new_hub); |
| 1417 | *new_hub = hub_info; |
Jack Steiner | 6c7184b | 2009-07-27 09:35:07 -0500 | [diff] [blame] | 1418 | |
Dimitri Sivanich | f68376f | 2016-04-29 16:54:23 -0500 | [diff] [blame] | 1419 | /* Use information from GAM table if available */ |
| 1420 | if (_node_to_pnode) |
| 1421 | new_hub->pnode = _node_to_pnode[nodeid]; |
| 1422 | else /* Fill in during cpu loop */ |
| 1423 | new_hub->pnode = 0xffff; |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1424 | new_hub->numa_blade_id = uv_node_to_blade_id(nodeid); |
| 1425 | new_hub->memory_nid = -1; |
| 1426 | new_hub->nr_possible_cpus = 0; |
| 1427 | new_hub->nr_online_cpus = 0; |
| 1428 | } |
Mike Travis | 0045ddd | 2016-04-29 16:54:12 -0500 | [diff] [blame] | 1429 | |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1430 | /* Initialize per cpu info */ |
| 1431 | for_each_possible_cpu(cpu) { |
| 1432 | int apicid = per_cpu(x86_cpu_to_apicid, cpu); |
Dimitri Sivanich | f68376f | 2016-04-29 16:54:23 -0500 | [diff] [blame] | 1433 | int numa_node_id; |
| 1434 | unsigned short pnode; |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1435 | |
| 1436 | nodeid = cpu_to_node(cpu); |
Dimitri Sivanich | f68376f | 2016-04-29 16:54:23 -0500 | [diff] [blame] | 1437 | numa_node_id = numa_cpu_node(cpu); |
| 1438 | pnode = uv_apicid_to_pnode(apicid); |
| 1439 | |
Mike Travis | 3edcf2f | 2016-04-29 16:54:15 -0500 | [diff] [blame] | 1440 | uv_cpu_info_per(cpu)->p_uv_hub_info = uv_hub_info_list(nodeid); |
Mike Travis | 3edcf2f | 2016-04-29 16:54:15 -0500 | [diff] [blame] | 1441 | uv_cpu_info_per(cpu)->blade_cpu_id = |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1442 | uv_cpu_hub_info(cpu)->nr_possible_cpus++; |
| 1443 | if (uv_cpu_hub_info(cpu)->memory_nid == -1) |
| 1444 | uv_cpu_hub_info(cpu)->memory_nid = cpu_to_node(cpu); |
Dimitri Sivanich | f68376f | 2016-04-29 16:54:23 -0500 | [diff] [blame] | 1445 | if (nodeid != numa_node_id && /* init memoryless node */ |
| 1446 | uv_hub_info_list(numa_node_id)->pnode == 0xffff) |
| 1447 | uv_hub_info_list(numa_node_id)->pnode = pnode; |
| 1448 | else if (uv_cpu_hub_info(cpu)->pnode == 0xffff) |
| 1449 | uv_cpu_hub_info(cpu)->pnode = pnode; |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1450 | uv_cpu_scir_info(cpu)->offset = uv_scir_offset(apicid); |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 1451 | } |
Jack Steiner | 83f5d89 | 2008-07-01 14:45:38 -0500 | [diff] [blame] | 1452 | |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1453 | for_each_node(nodeid) { |
Dimitri Sivanich | f68376f | 2016-04-29 16:54:23 -0500 | [diff] [blame] | 1454 | unsigned short pnode = uv_hub_info_list(nodeid)->pnode; |
| 1455 | |
| 1456 | /* Add pnode info for pre-GAM list nodes without cpus */ |
| 1457 | if (pnode == 0xffff) { |
| 1458 | unsigned long paddr; |
| 1459 | |
| 1460 | paddr = node_start_pfn(nodeid) << PAGE_SHIFT; |
| 1461 | pnode = uv_gpa_to_pnode(uv_soc_phys_ram_to_gpa(paddr)); |
| 1462 | uv_hub_info_list(nodeid)->pnode = pnode; |
| 1463 | } |
| 1464 | min_pnode = min(pnode, min_pnode); |
| 1465 | max_pnode = max(pnode, max_pnode); |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1466 | pr_info("UV: UVHUB node:%2d pn:%02x nrcpus:%d\n", |
| 1467 | nodeid, |
| 1468 | uv_hub_info_list(nodeid)->pnode, |
| 1469 | uv_hub_info_list(nodeid)->nr_possible_cpus); |
Jack Steiner | 6a891a2 | 2009-03-30 09:01:11 -0500 | [diff] [blame] | 1470 | } |
| 1471 | |
Mike Travis | 906f3b2 | 2016-04-29 16:54:16 -0500 | [diff] [blame] | 1472 | pr_info("UV: min_pnode:%02x max_pnode:%02x\n", min_pnode, max_pnode); |
Jack Steiner | 83f5d89 | 2008-07-01 14:45:38 -0500 | [diff] [blame] | 1473 | map_gru_high(max_pnode); |
Jack Steiner | daf7b9c | 2009-09-09 10:43:39 -0500 | [diff] [blame] | 1474 | map_mmr_high(max_pnode); |
Mike Travis | b15cc4a | 2013-02-11 13:45:12 -0600 | [diff] [blame] | 1475 | map_mmioh_high(min_pnode, max_pnode); |
Jack Steiner | 8da077d | 2008-09-23 08:42:05 -0500 | [diff] [blame] | 1476 | |
Mike Travis | 0d12ef0 | 2013-09-23 16:25:01 -0500 | [diff] [blame] | 1477 | uv_nmi_setup(); |
Jack Steiner | 8da077d | 2008-09-23 08:42:05 -0500 | [diff] [blame] | 1478 | uv_cpu_init(); |
Mike Travis | 7f1baa0 | 2008-10-24 15:24:29 -0700 | [diff] [blame] | 1479 | uv_scir_register_cpu_notifier(); |
Cliff Wickman | a3d732f | 2008-11-10 16:16:31 -0600 | [diff] [blame] | 1480 | proc_mkdir("sgi_uv", NULL); |
Mike Travis | 841582e | 2010-02-02 14:38:14 -0800 | [diff] [blame] | 1481 | |
| 1482 | /* register Legacy VGA I/O redirection handler */ |
| 1483 | pci_register_set_vga_state(uv_set_vga_state); |
Cliff Wickman | 818987e | 2011-03-31 09:32:02 -0500 | [diff] [blame] | 1484 | |
| 1485 | /* |
| 1486 | * For a kdump kernel the reset must be BOOT_ACPI, not BOOT_EFI, as |
| 1487 | * EFI is not enabled in the kdump kernel. |
| 1488 | */ |
| 1489 | if (is_kdump_kernel()) |
| 1490 | reboot_type = BOOT_ACPI; |
Jack Steiner | ac23d4e | 2008-03-28 14:12:16 -0500 | [diff] [blame] | 1491 | } |
Suresh Siddha | 107e0e0 | 2011-05-20 17:51:17 -0700 | [diff] [blame] | 1492 | |
| 1493 | apic_driver(apic_x2apic_uv_x); |