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Francois Romieu890e8d02005-07-30 13:08:43 +02001/*
2 sis190.c: Silicon Integrated Systems SiS190 ethernet driver
3
4 Copyright (c) 2003 K.M. Liu <kmliu@sis.com>
5 Copyright (c) 2003, 2004 Jeff Garzik <jgarzik@pobox.com>
6 Copyright (c) 2003, 2004, 2005 Francois Romieu <romieu@fr.zoreil.com>
7
Francois Romieu40292fb2005-07-30 13:12:06 +02008 Based on r8169.c, tg3.c, 8139cp.c, skge.c, epic100.c and SiS 190/191
9 genuine driver.
Francois Romieu890e8d02005-07-30 13:08:43 +020010
11 This software may be used and distributed according to the terms of
12 the GNU General Public License (GPL), incorporated herein by reference.
13 Drivers based on or derived from this code fall under the GPL and must
14 retain the authorship, copyright and license notice. This file is not
15 a complete program and may only be used when the entire operating
16 system is licensed under the GPL.
17
18 See the file COPYING in this distribution for more information.
19
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/netdevice.h>
Francois Romieu43afb942005-07-30 13:10:21 +020025#include <linux/rtnetlink.h>
Francois Romieu890e8d02005-07-30 13:08:43 +020026#include <linux/etherdevice.h>
27#include <linux/ethtool.h>
28#include <linux/pci.h>
29#include <linux/mii.h>
30#include <linux/delay.h>
31#include <linux/crc32.h>
32#include <linux/dma-mapping.h>
33#include <asm/irq.h>
34
35#define net_drv(p, arg...) if (netif_msg_drv(p)) \
36 printk(arg)
37#define net_probe(p, arg...) if (netif_msg_probe(p)) \
38 printk(arg)
39#define net_link(p, arg...) if (netif_msg_link(p)) \
40 printk(arg)
41#define net_intr(p, arg...) if (netif_msg_intr(p)) \
42 printk(arg)
43#define net_tx_err(p, arg...) if (netif_msg_tx_err(p)) \
44 printk(arg)
45
Francois Romieufcb98212005-07-30 13:15:22 +020046#define PHY_MAX_ADDR 32
47#define PHY_ID_ANY 0x1f
48#define MII_REG_ANY 0x1f
49
Riccardo Ghetta1feede02009-06-04 09:05:20 +000050#define DRV_VERSION "1.3"
Francois Romieu890e8d02005-07-30 13:08:43 +020051#define DRV_NAME "sis190"
52#define SIS190_DRIVER_NAME DRV_NAME " Gigabit Ethernet driver " DRV_VERSION
53#define PFX DRV_NAME ": "
54
Francois Romieu890e8d02005-07-30 13:08:43 +020055#define sis190_rx_skb netif_rx
56#define sis190_rx_quota(count, quota) count
Francois Romieu890e8d02005-07-30 13:08:43 +020057
58#define MAC_ADDR_LEN 6
59
Francois Romieubcad5e52005-07-30 13:13:47 +020060#define NUM_TX_DESC 64 /* [8..1024] */
61#define NUM_RX_DESC 64 /* [8..8192] */
Francois Romieu890e8d02005-07-30 13:08:43 +020062#define TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
63#define RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
64#define RX_BUF_SIZE 1536
Francois Romieu8b5641d2005-07-30 13:13:03 +020065#define RX_BUF_MASK 0xfff8
Francois Romieu890e8d02005-07-30 13:08:43 +020066
67#define SIS190_REGS_SIZE 0x80
68#define SIS190_TX_TIMEOUT (6*HZ)
69#define SIS190_PHY_TIMEOUT (10*HZ)
70#define SIS190_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | \
71 NETIF_MSG_LINK | NETIF_MSG_IFUP | \
72 NETIF_MSG_IFDOWN)
73
74/* Enhanced PHY access register bit definitions */
75#define EhnMIIread 0x0000
76#define EhnMIIwrite 0x0020
77#define EhnMIIdataShift 16
78#define EhnMIIpmdShift 6 /* 7016 only */
79#define EhnMIIregShift 11
80#define EhnMIIreq 0x0010
81#define EhnMIInotDone 0x0010
82
83/* Write/read MMIO register */
84#define SIS_W8(reg, val) writeb ((val), ioaddr + (reg))
85#define SIS_W16(reg, val) writew ((val), ioaddr + (reg))
86#define SIS_W32(reg, val) writel ((val), ioaddr + (reg))
87#define SIS_R8(reg) readb (ioaddr + (reg))
88#define SIS_R16(reg) readw (ioaddr + (reg))
89#define SIS_R32(reg) readl (ioaddr + (reg))
90
91#define SIS_PCI_COMMIT() SIS_R32(IntrControl)
92
93enum sis190_registers {
94 TxControl = 0x00,
95 TxDescStartAddr = 0x04,
Francois Romieu188f23b2005-07-30 13:11:43 +020096 rsv0 = 0x08, // reserved
97 TxSts = 0x0c, // unused (Control/Status)
Francois Romieu890e8d02005-07-30 13:08:43 +020098 RxControl = 0x10,
99 RxDescStartAddr = 0x14,
Francois Romieu188f23b2005-07-30 13:11:43 +0200100 rsv1 = 0x18, // reserved
101 RxSts = 0x1c, // unused
Francois Romieu890e8d02005-07-30 13:08:43 +0200102 IntrStatus = 0x20,
103 IntrMask = 0x24,
104 IntrControl = 0x28,
Francois Romieu188f23b2005-07-30 13:11:43 +0200105 IntrTimer = 0x2c, // unused (Interupt Timer)
106 PMControl = 0x30, // unused (Power Mgmt Control/Status)
107 rsv2 = 0x34, // reserved
Francois Romieu890e8d02005-07-30 13:08:43 +0200108 ROMControl = 0x38,
109 ROMInterface = 0x3c,
110 StationControl = 0x40,
111 GMIIControl = 0x44,
Francois Romieu188f23b2005-07-30 13:11:43 +0200112 GIoCR = 0x48, // unused (GMAC IO Compensation)
113 GIoCtrl = 0x4c, // unused (GMAC IO Control)
Francois Romieu890e8d02005-07-30 13:08:43 +0200114 TxMacControl = 0x50,
Francois Romieu188f23b2005-07-30 13:11:43 +0200115 TxLimit = 0x54, // unused (Tx MAC Timer/TryLimit)
116 RGDelay = 0x58, // unused (RGMII Tx Internal Delay)
117 rsv3 = 0x5c, // reserved
Francois Romieu890e8d02005-07-30 13:08:43 +0200118 RxMacControl = 0x60,
119 RxMacAddr = 0x62,
120 RxHashTable = 0x68,
121 // Undocumented = 0x6c,
Francois Romieu188f23b2005-07-30 13:11:43 +0200122 RxWolCtrl = 0x70,
123 RxWolData = 0x74, // unused (Rx WOL Data Access)
124 RxMPSControl = 0x78, // unused (Rx MPS Control)
125 rsv4 = 0x7c, // reserved
Francois Romieu890e8d02005-07-30 13:08:43 +0200126};
127
128enum sis190_register_content {
129 /* IntrStatus */
130 SoftInt = 0x40000000, // unused
131 Timeup = 0x20000000, // unused
132 PauseFrame = 0x00080000, // unused
133 MagicPacket = 0x00040000, // unused
134 WakeupFrame = 0x00020000, // unused
135 LinkChange = 0x00010000,
136 RxQEmpty = 0x00000080,
137 RxQInt = 0x00000040,
138 TxQ1Empty = 0x00000020, // unused
139 TxQ1Int = 0x00000010,
140 TxQ0Empty = 0x00000008, // unused
141 TxQ0Int = 0x00000004,
142 RxHalt = 0x00000002,
143 TxHalt = 0x00000001,
144
Francois Romieu890e8d02005-07-30 13:08:43 +0200145 /* {Rx/Tx}CmdBits */
146 CmdReset = 0x10,
147 CmdRxEnb = 0x08, // unused
148 CmdTxEnb = 0x01,
149 RxBufEmpty = 0x01, // unused
150
151 /* Cfg9346Bits */
152 Cfg9346_Lock = 0x00, // unused
153 Cfg9346_Unlock = 0xc0, // unused
154
155 /* RxMacControl */
156 AcceptErr = 0x20, // unused
157 AcceptRunt = 0x10, // unused
158 AcceptBroadcast = 0x0800,
159 AcceptMulticast = 0x0400,
160 AcceptMyPhys = 0x0200,
161 AcceptAllPhys = 0x0100,
162
163 /* RxConfigBits */
164 RxCfgFIFOShift = 13,
165 RxCfgDMAShift = 8, // 0x1a in RxControl ?
166
167 /* TxConfigBits */
168 TxInterFrameGapShift = 24,
169 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
170
Francois Romieu890e8d02005-07-30 13:08:43 +0200171 LinkStatus = 0x02, // unused
172 FullDup = 0x01, // unused
173
174 /* TBICSRBit */
175 TBILinkOK = 0x02000000, // unused
176};
177
178struct TxDesc {
Francois Romieu3cec93c2005-07-30 13:14:18 +0200179 __le32 PSize;
180 __le32 status;
181 __le32 addr;
182 __le32 size;
Francois Romieu890e8d02005-07-30 13:08:43 +0200183};
184
185struct RxDesc {
Francois Romieu3cec93c2005-07-30 13:14:18 +0200186 __le32 PSize;
187 __le32 status;
188 __le32 addr;
189 __le32 size;
Francois Romieu890e8d02005-07-30 13:08:43 +0200190};
191
192enum _DescStatusBit {
193 /* _Desc.status */
Francois Romieubcad5e52005-07-30 13:13:47 +0200194 OWNbit = 0x80000000, // RXOWN/TXOWN
195 INTbit = 0x40000000, // RXINT/TXINT
196 CRCbit = 0x00020000, // CRCOFF/CRCEN
197 PADbit = 0x00010000, // PREADD/PADEN
Francois Romieu890e8d02005-07-30 13:08:43 +0200198 /* _Desc.size */
Francois Romieubcad5e52005-07-30 13:13:47 +0200199 RingEnd = 0x80000000,
200 /* TxDesc.status */
201 LSEN = 0x08000000, // TSO ? -- FR
202 IPCS = 0x04000000,
203 TCPCS = 0x02000000,
204 UDPCS = 0x01000000,
205 BSTEN = 0x00800000,
206 EXTEN = 0x00400000,
207 DEFEN = 0x00200000,
208 BKFEN = 0x00100000,
209 CRSEN = 0x00080000,
210 COLEN = 0x00040000,
211 THOL3 = 0x30000000,
212 THOL2 = 0x20000000,
213 THOL1 = 0x10000000,
214 THOL0 = 0x00000000,
Francois Romieu697c2692007-11-21 22:30:37 +0100215
216 WND = 0x00080000,
217 TABRT = 0x00040000,
218 FIFO = 0x00020000,
219 LINK = 0x00010000,
220 ColCountMask = 0x0000ffff,
Francois Romieubcad5e52005-07-30 13:13:47 +0200221 /* RxDesc.status */
222 IPON = 0x20000000,
223 TCPON = 0x10000000,
224 UDPON = 0x08000000,
225 Wakup = 0x00400000,
226 Magic = 0x00200000,
227 Pause = 0x00100000,
228 DEFbit = 0x00200000,
229 BCAST = 0x000c0000,
230 MCAST = 0x00080000,
231 UCAST = 0x00040000,
232 /* RxDesc.PSize */
233 TAGON = 0x80000000,
234 RxDescCountMask = 0x7f000000, // multi-desc pkt when > 1 ? -- FR
235 ABORT = 0x00800000,
236 SHORT = 0x00400000,
237 LIMIT = 0x00200000,
238 MIIER = 0x00100000,
239 OVRUN = 0x00080000,
240 NIBON = 0x00040000,
241 COLON = 0x00020000,
242 CRCOK = 0x00010000,
Francois Romieu890e8d02005-07-30 13:08:43 +0200243 RxSizeMask = 0x0000ffff
Francois Romieubcad5e52005-07-30 13:13:47 +0200244 /*
245 * The asic could apparently do vlan, TSO, jumbo (sis191 only) and
246 * provide two (unused with Linux) Tx queues. No publically
247 * available documentation alas.
248 */
Francois Romieu890e8d02005-07-30 13:08:43 +0200249};
250
Francois Romieu40292fb2005-07-30 13:12:06 +0200251enum sis190_eeprom_access_register_bits {
252 EECS = 0x00000001, // unused
253 EECLK = 0x00000002, // unused
254 EEDO = 0x00000008, // unused
255 EEDI = 0x00000004, // unused
256 EEREQ = 0x00000080,
257 EEROP = 0x00000200,
258 EEWOP = 0x00000100 // unused
259};
260
Francois Romieu830fb7d2005-07-30 13:12:37 +0200261/* EEPROM Addresses */
262enum sis190_eeprom_address {
263 EEPROMSignature = 0x00,
264 EEPROMCLK = 0x01, // unused
265 EEPROMInfo = 0x02,
266 EEPROMMACAddr = 0x03
267};
268
Francois Romieu900eb9d2005-09-03 00:55:27 +0200269enum sis190_feature {
270 F_HAS_RGMII = 1,
Francois Romieuc3d6f1f2005-09-03 00:56:57 +0200271 F_PHY_88E1111 = 2,
272 F_PHY_BCM5461 = 4
Francois Romieu900eb9d2005-09-03 00:55:27 +0200273};
274
Francois Romieu890e8d02005-07-30 13:08:43 +0200275struct sis190_private {
276 void __iomem *mmio_addr;
277 struct pci_dev *pci_dev;
David Howellsc4028952006-11-22 14:57:56 +0000278 struct net_device *dev;
Francois Romieu890e8d02005-07-30 13:08:43 +0200279 spinlock_t lock;
280 u32 rx_buf_sz;
281 u32 cur_rx;
282 u32 cur_tx;
283 u32 dirty_rx;
284 u32 dirty_tx;
285 dma_addr_t rx_dma;
286 dma_addr_t tx_dma;
287 struct RxDesc *RxDescRing;
288 struct TxDesc *TxDescRing;
289 struct sk_buff *Rx_skbuff[NUM_RX_DESC];
290 struct sk_buff *Tx_skbuff[NUM_TX_DESC];
291 struct work_struct phy_task;
292 struct timer_list timer;
293 u32 msg_enable;
Francois Romieu43afb942005-07-30 13:10:21 +0200294 struct mii_if_info mii_if;
Francois Romieufcb98212005-07-30 13:15:22 +0200295 struct list_head first_phy;
Francois Romieu900eb9d2005-09-03 00:55:27 +0200296 u32 features;
Francois Romieufcb98212005-07-30 13:15:22 +0200297};
298
299struct sis190_phy {
300 struct list_head list;
301 int phy_id;
302 u16 id[2];
303 u16 status;
304 u8 type;
305};
306
307enum sis190_phy_type {
308 UNKNOWN = 0x00,
309 HOME = 0x01,
310 LAN = 0x02,
311 MIX = 0x03
312};
313
314static struct mii_chip_info {
315 const char *name;
316 u16 id[2];
317 unsigned int type;
Francois Romieu900eb9d2005-09-03 00:55:27 +0200318 u32 feature;
Francois Romieufcb98212005-07-30 13:15:22 +0200319} mii_chip_table[] = {
Riccardo Ghetta856f8f42009-06-04 09:05:07 +0000320 { "Atheros PHY", { 0x004d, 0xd010 }, LAN, 0 },
Francois Romieu708f6e22008-10-20 23:37:55 +0200321 { "Atheros PHY AR8012", { 0x004d, 0xd020 }, LAN, 0 },
Francois Romieuc3d6f1f2005-09-03 00:56:57 +0200322 { "Broadcom PHY BCM5461", { 0x0020, 0x60c0 }, LAN, F_PHY_BCM5461 },
Francois Romieubd7a4442007-03-29 00:18:50 +0200323 { "Broadcom PHY AC131", { 0x0143, 0xbc70 }, LAN, 0 },
Francois Romieu900eb9d2005-09-03 00:55:27 +0200324 { "Agere PHY ET1101B", { 0x0282, 0xf010 }, LAN, 0 },
325 { "Marvell PHY 88E1111", { 0x0141, 0x0cc0 }, LAN, F_PHY_88E1111 },
326 { "Realtek PHY RTL8201", { 0x0000, 0x8200 }, LAN, 0 },
Francois Romieufcb98212005-07-30 13:15:22 +0200327 { NULL, }
Francois Romieu890e8d02005-07-30 13:08:43 +0200328};
329
Jesper Juhl3c6bee12006-01-09 20:54:01 -0800330static const struct {
Francois Romieu890e8d02005-07-30 13:08:43 +0200331 const char *name;
Francois Romieu890e8d02005-07-30 13:08:43 +0200332} sis_chip_info[] = {
Francois Romieue7976372005-09-03 00:57:51 +0200333 { "SiS 190 PCI Fast Ethernet adapter" },
334 { "SiS 191 PCI Gigabit Ethernet adapter" },
Francois Romieu890e8d02005-07-30 13:08:43 +0200335};
336
Jeff Garzik8ee8e922008-01-30 04:00:40 -0500337static struct pci_device_id sis190_pci_tbl[] = {
Francois Romieu890e8d02005-07-30 13:08:43 +0200338 { PCI_DEVICE(PCI_VENDOR_ID_SI, 0x0190), 0, 0, 0 },
Francois Romieue7976372005-09-03 00:57:51 +0200339 { PCI_DEVICE(PCI_VENDOR_ID_SI, 0x0191), 0, 0, 1 },
Francois Romieu890e8d02005-07-30 13:08:43 +0200340 { 0, },
341};
342
343MODULE_DEVICE_TABLE(pci, sis190_pci_tbl);
344
345static int rx_copybreak = 200;
346
347static struct {
348 u32 msg_enable;
349} debug = { -1 };
350
Riccardo Ghettac3223d22009-06-04 09:04:55 +0000351MODULE_DESCRIPTION("SiS sis190/191 Gigabit Ethernet driver");
Francois Romieu890e8d02005-07-30 13:08:43 +0200352module_param(rx_copybreak, int, 0);
353MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
354module_param_named(debug, debug.msg_enable, int, 0);
355MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
356MODULE_AUTHOR("K.M. Liu <kmliu@sis.com>, Ueimor <romieu@fr.zoreil.com>");
357MODULE_VERSION(DRV_VERSION);
358MODULE_LICENSE("GPL");
359
360static const u32 sis190_intr_mask =
Francois Romieu21461382005-09-03 00:54:25 +0200361 RxQEmpty | RxQInt | TxQ1Int | TxQ0Int | RxHalt | TxHalt | LinkChange;
Francois Romieu890e8d02005-07-30 13:08:43 +0200362
363/*
364 * Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
365 * The chips use a 64 element hash table based on the Ethernet CRC.
366 */
Arjan van de Venf71e1302006-03-03 21:33:57 -0500367static const int multicast_filter_limit = 32;
Francois Romieu890e8d02005-07-30 13:08:43 +0200368
369static void __mdio_cmd(void __iomem *ioaddr, u32 ctl)
370{
371 unsigned int i;
372
373 SIS_W32(GMIIControl, ctl);
374
375 msleep(1);
376
377 for (i = 0; i < 100; i++) {
378 if (!(SIS_R32(GMIIControl) & EhnMIInotDone))
379 break;
380 msleep(1);
381 }
382
Francois Romieu7bf3f232007-11-17 16:56:43 +0100383 if (i > 99)
Francois Romieu890e8d02005-07-30 13:08:43 +0200384 printk(KERN_ERR PFX "PHY command failed !\n");
385}
386
Francois Romieu9ede1092005-07-30 13:14:38 +0200387static void mdio_write(void __iomem *ioaddr, int phy_id, int reg, int val)
Francois Romieu890e8d02005-07-30 13:08:43 +0200388{
Francois Romieu890e8d02005-07-30 13:08:43 +0200389 __mdio_cmd(ioaddr, EhnMIIreq | EhnMIIwrite |
Francois Romieu9ede1092005-07-30 13:14:38 +0200390 (((u32) reg) << EhnMIIregShift) | (phy_id << EhnMIIpmdShift) |
Francois Romieu890e8d02005-07-30 13:08:43 +0200391 (((u32) val) << EhnMIIdataShift));
392}
393
Francois Romieu9ede1092005-07-30 13:14:38 +0200394static int mdio_read(void __iomem *ioaddr, int phy_id, int reg)
Francois Romieu890e8d02005-07-30 13:08:43 +0200395{
Francois Romieu890e8d02005-07-30 13:08:43 +0200396 __mdio_cmd(ioaddr, EhnMIIreq | EhnMIIread |
Francois Romieu9ede1092005-07-30 13:14:38 +0200397 (((u32) reg) << EhnMIIregShift) | (phy_id << EhnMIIpmdShift));
Francois Romieu890e8d02005-07-30 13:08:43 +0200398
399 return (u16) (SIS_R32(GMIIControl) >> EhnMIIdataShift);
400}
401
Francois Romieu43afb942005-07-30 13:10:21 +0200402static void __mdio_write(struct net_device *dev, int phy_id, int reg, int val)
403{
404 struct sis190_private *tp = netdev_priv(dev);
405
Francois Romieu9ede1092005-07-30 13:14:38 +0200406 mdio_write(tp->mmio_addr, phy_id, reg, val);
Francois Romieu43afb942005-07-30 13:10:21 +0200407}
408
409static int __mdio_read(struct net_device *dev, int phy_id, int reg)
410{
411 struct sis190_private *tp = netdev_priv(dev);
412
Francois Romieu9ede1092005-07-30 13:14:38 +0200413 return mdio_read(tp->mmio_addr, phy_id, reg);
Francois Romieu43afb942005-07-30 13:10:21 +0200414}
415
Francois Romieufc10c392005-07-30 13:15:01 +0200416static u16 mdio_read_latched(void __iomem *ioaddr, int phy_id, int reg)
417{
418 mdio_read(ioaddr, phy_id, reg);
419 return mdio_read(ioaddr, phy_id, reg);
420}
421
Francois Romieu40292fb2005-07-30 13:12:06 +0200422static u16 __devinit sis190_read_eeprom(void __iomem *ioaddr, u32 reg)
Francois Romieu890e8d02005-07-30 13:08:43 +0200423{
Francois Romieu40292fb2005-07-30 13:12:06 +0200424 u16 data = 0xffff;
Francois Romieu890e8d02005-07-30 13:08:43 +0200425 unsigned int i;
Francois Romieu890e8d02005-07-30 13:08:43 +0200426
427 if (!(SIS_R32(ROMControl) & 0x0002))
428 return 0;
429
Francois Romieu40292fb2005-07-30 13:12:06 +0200430 SIS_W32(ROMInterface, EEREQ | EEROP | (reg << 10));
Francois Romieu890e8d02005-07-30 13:08:43 +0200431
432 for (i = 0; i < 200; i++) {
Francois Romieu40292fb2005-07-30 13:12:06 +0200433 if (!(SIS_R32(ROMInterface) & EEREQ)) {
434 data = (SIS_R32(ROMInterface) & 0xffff0000) >> 16;
Francois Romieu890e8d02005-07-30 13:08:43 +0200435 break;
Francois Romieu40292fb2005-07-30 13:12:06 +0200436 }
Francois Romieu890e8d02005-07-30 13:08:43 +0200437 msleep(1);
438 }
439
Francois Romieu890e8d02005-07-30 13:08:43 +0200440 return data;
441}
442
443static void sis190_irq_mask_and_ack(void __iomem *ioaddr)
444{
445 SIS_W32(IntrMask, 0x00);
446 SIS_W32(IntrStatus, 0xffffffff);
447 SIS_PCI_COMMIT();
448}
449
450static void sis190_asic_down(void __iomem *ioaddr)
451{
452 /* Stop the chip's Tx and Rx DMA processes. */
453
454 SIS_W32(TxControl, 0x1a00);
455 SIS_W32(RxControl, 0x1a00);
456
457 sis190_irq_mask_and_ack(ioaddr);
458}
459
460static void sis190_mark_as_last_descriptor(struct RxDesc *desc)
461{
462 desc->size |= cpu_to_le32(RingEnd);
463}
464
465static inline void sis190_give_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
466{
467 u32 eor = le32_to_cpu(desc->size) & RingEnd;
468
469 desc->PSize = 0x0;
Francois Romieu8b5641d2005-07-30 13:13:03 +0200470 desc->size = cpu_to_le32((rx_buf_sz & RX_BUF_MASK) | eor);
Francois Romieu890e8d02005-07-30 13:08:43 +0200471 wmb();
472 desc->status = cpu_to_le32(OWNbit | INTbit);
473}
474
475static inline void sis190_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
476 u32 rx_buf_sz)
477{
478 desc->addr = cpu_to_le32(mapping);
479 sis190_give_to_asic(desc, rx_buf_sz);
480}
481
482static inline void sis190_make_unusable_by_asic(struct RxDesc *desc)
483{
484 desc->PSize = 0x0;
Al Viro961994a2007-12-15 01:44:33 +0000485 desc->addr = cpu_to_le32(0xdeadbeef);
Francois Romieu890e8d02005-07-30 13:08:43 +0200486 desc->size &= cpu_to_le32(RingEnd);
487 wmb();
488 desc->status = 0x0;
489}
490
Stephen Hemminger35aeb782008-04-27 14:54:32 +0200491static struct sk_buff *sis190_alloc_rx_skb(struct sis190_private *tp,
492 struct RxDesc *desc)
Francois Romieu890e8d02005-07-30 13:08:43 +0200493{
Stephen Hemminger35aeb782008-04-27 14:54:32 +0200494 u32 rx_buf_sz = tp->rx_buf_sz;
Francois Romieu890e8d02005-07-30 13:08:43 +0200495 struct sk_buff *skb;
Francois Romieu890e8d02005-07-30 13:08:43 +0200496
Stephen Hemminger35aeb782008-04-27 14:54:32 +0200497 skb = netdev_alloc_skb(tp->dev, rx_buf_sz);
Stephen Hemminger4709aa52008-04-27 14:36:59 +0200498 if (likely(skb)) {
499 dma_addr_t mapping;
Francois Romieu890e8d02005-07-30 13:08:43 +0200500
Stephen Hemminger35aeb782008-04-27 14:54:32 +0200501 mapping = pci_map_single(tp->pci_dev, skb->data, tp->rx_buf_sz,
Stephen Hemminger4709aa52008-04-27 14:36:59 +0200502 PCI_DMA_FROMDEVICE);
503 sis190_map_to_asic(desc, mapping, rx_buf_sz);
504 } else
505 sis190_make_unusable_by_asic(desc);
Francois Romieu890e8d02005-07-30 13:08:43 +0200506
Stephen Hemminger4709aa52008-04-27 14:36:59 +0200507 return skb;
Francois Romieu890e8d02005-07-30 13:08:43 +0200508}
509
510static u32 sis190_rx_fill(struct sis190_private *tp, struct net_device *dev,
511 u32 start, u32 end)
512{
513 u32 cur;
514
515 for (cur = start; cur < end; cur++) {
Stephen Hemminger4709aa52008-04-27 14:36:59 +0200516 unsigned int i = cur % NUM_RX_DESC;
Francois Romieu890e8d02005-07-30 13:08:43 +0200517
518 if (tp->Rx_skbuff[i])
519 continue;
520
Stephen Hemminger35aeb782008-04-27 14:54:32 +0200521 tp->Rx_skbuff[i] = sis190_alloc_rx_skb(tp, tp->RxDescRing + i);
522
Stephen Hemminger4709aa52008-04-27 14:36:59 +0200523 if (!tp->Rx_skbuff[i])
Francois Romieu890e8d02005-07-30 13:08:43 +0200524 break;
525 }
526 return cur - start;
527}
528
Francois Romieu47e47812008-04-27 17:59:52 +0200529static bool sis190_try_rx_copy(struct sis190_private *tp,
530 struct sk_buff **sk_buff, int pkt_size,
531 dma_addr_t addr)
Francois Romieu890e8d02005-07-30 13:08:43 +0200532{
Francois Romieu47e47812008-04-27 17:59:52 +0200533 struct sk_buff *skb;
534 bool done = false;
Francois Romieu890e8d02005-07-30 13:08:43 +0200535
Francois Romieu47e47812008-04-27 17:59:52 +0200536 if (pkt_size >= rx_copybreak)
537 goto out;
Francois Romieu890e8d02005-07-30 13:08:43 +0200538
Eric Dumazet89d71a62009-10-13 05:34:20 +0000539 skb = netdev_alloc_skb_ip_align(tp->dev, pkt_size);
Francois Romieu47e47812008-04-27 17:59:52 +0200540 if (!skb)
541 goto out;
542
Riccardo Ghetta744c6b22009-06-07 19:47:58 +0000543 pci_dma_sync_single_for_cpu(tp->pci_dev, addr, tp->rx_buf_sz,
544 PCI_DMA_FROMDEVICE);
Francois Romieu47e47812008-04-27 17:59:52 +0200545 skb_copy_to_linear_data(skb, sk_buff[0]->data, pkt_size);
546 *sk_buff = skb;
547 done = true;
548out:
549 return done;
Francois Romieu890e8d02005-07-30 13:08:43 +0200550}
551
Francois Romieubcad5e52005-07-30 13:13:47 +0200552static inline int sis190_rx_pkt_err(u32 status, struct net_device_stats *stats)
553{
554#define ErrMask (OVRUN | SHORT | LIMIT | MIIER | NIBON | COLON | ABORT)
555
556 if ((status & CRCOK) && !(status & ErrMask))
557 return 0;
558
559 if (!(status & CRCOK))
560 stats->rx_crc_errors++;
561 else if (status & OVRUN)
562 stats->rx_over_errors++;
563 else if (status & (SHORT | LIMIT))
564 stats->rx_length_errors++;
565 else if (status & (MIIER | NIBON | COLON))
566 stats->rx_frame_errors++;
567
568 stats->rx_errors++;
569 return -1;
570}
571
Francois Romieu890e8d02005-07-30 13:08:43 +0200572static int sis190_rx_interrupt(struct net_device *dev,
573 struct sis190_private *tp, void __iomem *ioaddr)
574{
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700575 struct net_device_stats *stats = &dev->stats;
Francois Romieu890e8d02005-07-30 13:08:43 +0200576 u32 rx_left, cur_rx = tp->cur_rx;
577 u32 delta, count;
578
579 rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
580 rx_left = sis190_rx_quota(rx_left, (u32) dev->quota);
581
582 for (; rx_left > 0; rx_left--, cur_rx++) {
583 unsigned int entry = cur_rx % NUM_RX_DESC;
584 struct RxDesc *desc = tp->RxDescRing + entry;
585 u32 status;
586
Al Viro961994a2007-12-15 01:44:33 +0000587 if (le32_to_cpu(desc->status) & OWNbit)
Francois Romieu890e8d02005-07-30 13:08:43 +0200588 break;
589
590 status = le32_to_cpu(desc->PSize);
591
592 // net_intr(tp, KERN_INFO "%s: Rx PSize = %08x.\n", dev->name,
593 // status);
594
Francois Romieubcad5e52005-07-30 13:13:47 +0200595 if (sis190_rx_pkt_err(status, stats) < 0)
Francois Romieu890e8d02005-07-30 13:08:43 +0200596 sis190_give_to_asic(desc, tp->rx_buf_sz);
Francois Romieubcad5e52005-07-30 13:13:47 +0200597 else {
Francois Romieu890e8d02005-07-30 13:08:43 +0200598 struct sk_buff *skb = tp->Rx_skbuff[entry];
Francois Romieu47e47812008-04-27 17:59:52 +0200599 dma_addr_t addr = le32_to_cpu(desc->addr);
Francois Romieu890e8d02005-07-30 13:08:43 +0200600 int pkt_size = (status & RxSizeMask) - 4;
Francois Romieu47e47812008-04-27 17:59:52 +0200601 struct pci_dev *pdev = tp->pci_dev;
Francois Romieu890e8d02005-07-30 13:08:43 +0200602
603 if (unlikely(pkt_size > tp->rx_buf_sz)) {
604 net_intr(tp, KERN_INFO
605 "%s: (frag) status = %08x.\n",
606 dev->name, status);
607 stats->rx_dropped++;
608 stats->rx_length_errors++;
609 sis190_give_to_asic(desc, tp->rx_buf_sz);
610 continue;
611 }
612
Francois Romieu890e8d02005-07-30 13:08:43 +0200613
Francois Romieu47e47812008-04-27 17:59:52 +0200614 if (sis190_try_rx_copy(tp, &skb, pkt_size, addr)) {
615 pci_dma_sync_single_for_device(pdev, addr,
616 tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
617 sis190_give_to_asic(desc, tp->rx_buf_sz);
618 } else {
619 pci_unmap_single(pdev, addr, tp->rx_buf_sz,
620 PCI_DMA_FROMDEVICE);
Francois Romieu890e8d02005-07-30 13:08:43 +0200621 tp->Rx_skbuff[entry] = NULL;
622 sis190_make_unusable_by_asic(desc);
623 }
624
Francois Romieu890e8d02005-07-30 13:08:43 +0200625 skb_put(skb, pkt_size);
626 skb->protocol = eth_type_trans(skb, dev);
627
628 sis190_rx_skb(skb);
629
Francois Romieu890e8d02005-07-30 13:08:43 +0200630 stats->rx_packets++;
Francois Romieubcad5e52005-07-30 13:13:47 +0200631 stats->rx_bytes += pkt_size;
632 if ((status & BCAST) == MCAST)
633 stats->multicast++;
Francois Romieu890e8d02005-07-30 13:08:43 +0200634 }
635 }
636 count = cur_rx - tp->cur_rx;
637 tp->cur_rx = cur_rx;
638
639 delta = sis190_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
640 if (!delta && count && netif_msg_intr(tp))
641 printk(KERN_INFO "%s: no Rx buffer allocated.\n", dev->name);
642 tp->dirty_rx += delta;
643
644 if (((tp->dirty_rx + NUM_RX_DESC) == tp->cur_rx) && netif_msg_intr(tp))
645 printk(KERN_EMERG "%s: Rx buffers exhausted.\n", dev->name);
646
647 return count;
648}
649
650static void sis190_unmap_tx_skb(struct pci_dev *pdev, struct sk_buff *skb,
651 struct TxDesc *desc)
652{
653 unsigned int len;
654
655 len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
656
657 pci_unmap_single(pdev, le32_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
658
659 memset(desc, 0x00, sizeof(*desc));
660}
661
Francois Romieu697c2692007-11-21 22:30:37 +0100662static inline int sis190_tx_pkt_err(u32 status, struct net_device_stats *stats)
663{
664#define TxErrMask (WND | TABRT | FIFO | LINK)
665
666 if (!unlikely(status & TxErrMask))
667 return 0;
668
669 if (status & WND)
670 stats->tx_window_errors++;
671 if (status & TABRT)
672 stats->tx_aborted_errors++;
673 if (status & FIFO)
674 stats->tx_fifo_errors++;
675 if (status & LINK)
676 stats->tx_carrier_errors++;
677
678 stats->tx_errors++;
679
680 return -1;
681}
682
Francois Romieu890e8d02005-07-30 13:08:43 +0200683static void sis190_tx_interrupt(struct net_device *dev,
684 struct sis190_private *tp, void __iomem *ioaddr)
685{
Francois Romieu697c2692007-11-21 22:30:37 +0100686 struct net_device_stats *stats = &dev->stats;
Francois Romieu890e8d02005-07-30 13:08:43 +0200687 u32 pending, dirty_tx = tp->dirty_tx;
688 /*
689 * It would not be needed if queueing was allowed to be enabled
690 * again too early (hint: think preempt and unclocked smp systems).
691 */
692 unsigned int queue_stopped;
693
694 smp_rmb();
695 pending = tp->cur_tx - dirty_tx;
696 queue_stopped = (pending == NUM_TX_DESC);
697
698 for (; pending; pending--, dirty_tx++) {
699 unsigned int entry = dirty_tx % NUM_TX_DESC;
700 struct TxDesc *txd = tp->TxDescRing + entry;
Francois Romieu697c2692007-11-21 22:30:37 +0100701 u32 status = le32_to_cpu(txd->status);
Francois Romieu890e8d02005-07-30 13:08:43 +0200702 struct sk_buff *skb;
703
Francois Romieu697c2692007-11-21 22:30:37 +0100704 if (status & OWNbit)
Francois Romieu890e8d02005-07-30 13:08:43 +0200705 break;
706
707 skb = tp->Tx_skbuff[entry];
708
Francois Romieu697c2692007-11-21 22:30:37 +0100709 if (likely(sis190_tx_pkt_err(status, stats) == 0)) {
710 stats->tx_packets++;
711 stats->tx_bytes += skb->len;
712 stats->collisions += ((status & ColCountMask) - 1);
713 }
Francois Romieu890e8d02005-07-30 13:08:43 +0200714
715 sis190_unmap_tx_skb(tp->pci_dev, skb, txd);
716 tp->Tx_skbuff[entry] = NULL;
717 dev_kfree_skb_irq(skb);
718 }
719
720 if (tp->dirty_tx != dirty_tx) {
721 tp->dirty_tx = dirty_tx;
722 smp_wmb();
723 if (queue_stopped)
724 netif_wake_queue(dev);
725 }
726}
727
728/*
729 * The interrupt handler does all of the Rx thread work and cleans up after
730 * the Tx thread.
731 */
David Howells7d12e782006-10-05 14:55:46 +0100732static irqreturn_t sis190_interrupt(int irq, void *__dev)
Francois Romieu890e8d02005-07-30 13:08:43 +0200733{
734 struct net_device *dev = __dev;
735 struct sis190_private *tp = netdev_priv(dev);
736 void __iomem *ioaddr = tp->mmio_addr;
737 unsigned int handled = 0;
738 u32 status;
739
740 status = SIS_R32(IntrStatus);
741
742 if ((status == 0xffffffff) || !status)
743 goto out;
744
745 handled = 1;
746
747 if (unlikely(!netif_running(dev))) {
748 sis190_asic_down(ioaddr);
749 goto out;
750 }
751
752 SIS_W32(IntrStatus, status);
753
754 // net_intr(tp, KERN_INFO "%s: status = %08x.\n", dev->name, status);
755
756 if (status & LinkChange) {
757 net_intr(tp, KERN_INFO "%s: link change.\n", dev->name);
758 schedule_work(&tp->phy_task);
759 }
760
761 if (status & RxQInt)
762 sis190_rx_interrupt(dev, tp, ioaddr);
763
764 if (status & TxQ0Int)
765 sis190_tx_interrupt(dev, tp, ioaddr);
766out:
767 return IRQ_RETVAL(handled);
768}
769
Francois Romieu4405d3b2005-07-30 13:09:20 +0200770#ifdef CONFIG_NET_POLL_CONTROLLER
771static void sis190_netpoll(struct net_device *dev)
772{
773 struct sis190_private *tp = netdev_priv(dev);
774 struct pci_dev *pdev = tp->pci_dev;
775
776 disable_irq(pdev->irq);
David Howells7d12e782006-10-05 14:55:46 +0100777 sis190_interrupt(pdev->irq, dev);
Francois Romieu4405d3b2005-07-30 13:09:20 +0200778 enable_irq(pdev->irq);
779}
780#endif
781
Francois Romieu890e8d02005-07-30 13:08:43 +0200782static void sis190_free_rx_skb(struct sis190_private *tp,
783 struct sk_buff **sk_buff, struct RxDesc *desc)
784{
785 struct pci_dev *pdev = tp->pci_dev;
786
787 pci_unmap_single(pdev, le32_to_cpu(desc->addr), tp->rx_buf_sz,
788 PCI_DMA_FROMDEVICE);
789 dev_kfree_skb(*sk_buff);
790 *sk_buff = NULL;
791 sis190_make_unusable_by_asic(desc);
792}
793
794static void sis190_rx_clear(struct sis190_private *tp)
795{
796 unsigned int i;
797
798 for (i = 0; i < NUM_RX_DESC; i++) {
799 if (!tp->Rx_skbuff[i])
800 continue;
801 sis190_free_rx_skb(tp, tp->Rx_skbuff + i, tp->RxDescRing + i);
802 }
803}
804
805static void sis190_init_ring_indexes(struct sis190_private *tp)
806{
807 tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
808}
809
810static int sis190_init_ring(struct net_device *dev)
811{
812 struct sis190_private *tp = netdev_priv(dev);
813
814 sis190_init_ring_indexes(tp);
815
816 memset(tp->Tx_skbuff, 0x0, NUM_TX_DESC * sizeof(struct sk_buff *));
817 memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
818
819 if (sis190_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
820 goto err_rx_clear;
821
822 sis190_mark_as_last_descriptor(tp->RxDescRing + NUM_RX_DESC - 1);
823
824 return 0;
825
826err_rx_clear:
827 sis190_rx_clear(tp);
828 return -ENOMEM;
829}
830
831static void sis190_set_rx_mode(struct net_device *dev)
832{
833 struct sis190_private *tp = netdev_priv(dev);
834 void __iomem *ioaddr = tp->mmio_addr;
835 unsigned long flags;
836 u32 mc_filter[2]; /* Multicast hash filter */
837 u16 rx_mode;
838
839 if (dev->flags & IFF_PROMISC) {
Francois Romieu890e8d02005-07-30 13:08:43 +0200840 rx_mode =
841 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
842 AcceptAllPhys;
843 mc_filter[1] = mc_filter[0] = 0xffffffff;
844 } else if ((dev->mc_count > multicast_filter_limit) ||
845 (dev->flags & IFF_ALLMULTI)) {
846 /* Too many to filter perfectly -- accept all multicasts. */
847 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
848 mc_filter[1] = mc_filter[0] = 0xffffffff;
849 } else {
850 struct dev_mc_list *mclist;
851 unsigned int i;
852
853 rx_mode = AcceptBroadcast | AcceptMyPhys;
854 mc_filter[1] = mc_filter[0] = 0;
855 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
856 i++, mclist = mclist->next) {
857 int bit_nr =
Aurelien Jarno8fee5f52005-10-05 23:29:58 +0200858 ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3f;
Francois Romieu890e8d02005-07-30 13:08:43 +0200859 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
860 rx_mode |= AcceptMulticast;
861 }
862 }
863
864 spin_lock_irqsave(&tp->lock, flags);
865
866 SIS_W16(RxMacControl, rx_mode | 0x2);
867 SIS_W32(RxHashTable, mc_filter[0]);
868 SIS_W32(RxHashTable + 4, mc_filter[1]);
869
870 spin_unlock_irqrestore(&tp->lock, flags);
871}
872
873static void sis190_soft_reset(void __iomem *ioaddr)
874{
875 SIS_W32(IntrControl, 0x8000);
876 SIS_PCI_COMMIT();
Francois Romieu890e8d02005-07-30 13:08:43 +0200877 SIS_W32(IntrControl, 0x0);
878 sis190_asic_down(ioaddr);
Francois Romieu890e8d02005-07-30 13:08:43 +0200879}
880
881static void sis190_hw_start(struct net_device *dev)
882{
883 struct sis190_private *tp = netdev_priv(dev);
884 void __iomem *ioaddr = tp->mmio_addr;
885
886 sis190_soft_reset(ioaddr);
887
888 SIS_W32(TxDescStartAddr, tp->tx_dma);
889 SIS_W32(RxDescStartAddr, tp->rx_dma);
890
891 SIS_W32(IntrStatus, 0xffffffff);
892 SIS_W32(IntrMask, 0x0);
Francois Romieu890e8d02005-07-30 13:08:43 +0200893 SIS_W32(GMIIControl, 0x0);
894 SIS_W32(TxMacControl, 0x60);
895 SIS_W16(RxMacControl, 0x02);
896 SIS_W32(RxHashTable, 0x0);
897 SIS_W32(0x6c, 0x0);
Francois Romieu188f23b2005-07-30 13:11:43 +0200898 SIS_W32(RxWolCtrl, 0x0);
899 SIS_W32(RxWolData, 0x0);
Francois Romieu890e8d02005-07-30 13:08:43 +0200900
901 SIS_PCI_COMMIT();
902
903 sis190_set_rx_mode(dev);
904
905 /* Enable all known interrupts by setting the interrupt mask. */
906 SIS_W32(IntrMask, sis190_intr_mask);
907
908 SIS_W32(TxControl, 0x1a00 | CmdTxEnb);
909 SIS_W32(RxControl, 0x1a1d);
910
911 netif_start_queue(dev);
912}
913
David Howellsc4028952006-11-22 14:57:56 +0000914static void sis190_phy_task(struct work_struct *work)
Francois Romieu890e8d02005-07-30 13:08:43 +0200915{
David Howellsc4028952006-11-22 14:57:56 +0000916 struct sis190_private *tp =
917 container_of(work, struct sis190_private, phy_task);
918 struct net_device *dev = tp->dev;
Francois Romieu890e8d02005-07-30 13:08:43 +0200919 void __iomem *ioaddr = tp->mmio_addr;
Francois Romieu9ede1092005-07-30 13:14:38 +0200920 int phy_id = tp->mii_if.phy_id;
Francois Romieu890e8d02005-07-30 13:08:43 +0200921 u16 val;
922
Francois Romieu43afb942005-07-30 13:10:21 +0200923 rtnl_lock();
924
Francois Romieuc014f6c2007-02-15 23:37:29 +0100925 if (!netif_running(dev))
926 goto out_unlock;
927
Francois Romieu9ede1092005-07-30 13:14:38 +0200928 val = mdio_read(ioaddr, phy_id, MII_BMCR);
Francois Romieu890e8d02005-07-30 13:08:43 +0200929 if (val & BMCR_RESET) {
930 // FIXME: needlessly high ? -- FR 02/07/2005
931 mod_timer(&tp->timer, jiffies + HZ/10);
Francois Romieufc10c392005-07-30 13:15:01 +0200932 } else if (!(mdio_read_latched(ioaddr, phy_id, MII_BMSR) &
933 BMSR_ANEGCOMPLETE)) {
Francois Romieu21461382005-09-03 00:54:25 +0200934 netif_carrier_off(dev);
Francois Romieuc34ebba2007-11-18 22:04:05 +0100935 net_link(tp, KERN_WARNING "%s: auto-negotiating...\n",
936 dev->name);
Francois Romieu890e8d02005-07-30 13:08:43 +0200937 mod_timer(&tp->timer, jiffies + SIS190_PHY_TIMEOUT);
938 } else {
939 /* Rejoice ! */
940 struct {
941 int val;
Francois Romieu6614a6d2005-09-03 00:56:16 +0200942 u32 ctl;
Francois Romieu890e8d02005-07-30 13:08:43 +0200943 const char *msg;
Francois Romieu890e8d02005-07-30 13:08:43 +0200944 } reg31[] = {
Riccardo Ghetta1feede02009-06-04 09:05:20 +0000945 { LPA_1000FULL, 0x07000c00 | 0x00001000,
Francois Romieu6614a6d2005-09-03 00:56:16 +0200946 "1000 Mbps Full Duplex" },
Riccardo Ghetta1feede02009-06-04 09:05:20 +0000947 { LPA_1000HALF, 0x07000c00,
Francois Romieu6614a6d2005-09-03 00:56:16 +0200948 "1000 Mbps Half Duplex" },
949 { LPA_100FULL, 0x04000800 | 0x00001000,
950 "100 Mbps Full Duplex" },
951 { LPA_100HALF, 0x04000800,
952 "100 Mbps Half Duplex" },
953 { LPA_10FULL, 0x04000400 | 0x00001000,
954 "10 Mbps Full Duplex" },
955 { LPA_10HALF, 0x04000400,
956 "10 Mbps Half Duplex" },
957 { 0, 0x04000400, "unknown" }
Riccardo Ghetta1feede02009-06-04 09:05:20 +0000958 }, *p = NULL;
959 u16 adv, autoexp, gigadv, gigrec;
Francois Romieu890e8d02005-07-30 13:08:43 +0200960
Francois Romieu9ede1092005-07-30 13:14:38 +0200961 val = mdio_read(ioaddr, phy_id, 0x1f);
Francois Romieu890e8d02005-07-30 13:08:43 +0200962 net_link(tp, KERN_INFO "%s: mii ext = %04x.\n", dev->name, val);
963
Francois Romieu9ede1092005-07-30 13:14:38 +0200964 val = mdio_read(ioaddr, phy_id, MII_LPA);
Francois Romieu8348b4d2005-07-30 13:16:14 +0200965 adv = mdio_read(ioaddr, phy_id, MII_ADVERTISE);
Riccardo Ghetta1feede02009-06-04 09:05:20 +0000966 autoexp = mdio_read(ioaddr, phy_id, MII_EXPANSION);
967 net_link(tp, KERN_INFO "%s: mii lpa=%04x adv=%04x exp=%04x.\n",
968 dev->name, val, adv, autoexp);
Francois Romieu8348b4d2005-07-30 13:16:14 +0200969
Riccardo Ghetta1feede02009-06-04 09:05:20 +0000970 if (val & LPA_NPAGE && autoexp & EXPANSION_NWAY) {
971 /* check for gigabit speed */
972 gigadv = mdio_read(ioaddr, phy_id, MII_CTRL1000);
973 gigrec = mdio_read(ioaddr, phy_id, MII_STAT1000);
974 val = (gigadv & (gigrec >> 2));
975 if (val & ADVERTISE_1000FULL)
976 p = reg31;
977 else if (val & ADVERTISE_1000HALF)
978 p = reg31 + 1;
979 }
980 if (!p) {
981 val &= adv;
Francois Romieu890e8d02005-07-30 13:08:43 +0200982
Riccardo Ghetta1feede02009-06-04 09:05:20 +0000983 for (p = reg31; p->val; p++) {
984 if ((val & p->val) == p->val)
985 break;
986 }
Francois Romieu890e8d02005-07-30 13:08:43 +0200987 }
Francois Romieu6614a6d2005-09-03 00:56:16 +0200988
989 p->ctl |= SIS_R32(StationControl) & ~0x0f001c00;
990
Francois Romieuc3d6f1f2005-09-03 00:56:57 +0200991 if ((tp->features & F_HAS_RGMII) &&
992 (tp->features & F_PHY_BCM5461)) {
993 // Set Tx Delay in RGMII mode.
994 mdio_write(ioaddr, phy_id, 0x18, 0xf1c7);
995 udelay(200);
996 mdio_write(ioaddr, phy_id, 0x1c, 0x8c00);
997 p->ctl |= 0x03000000;
998 }
999
Francois Romieu6614a6d2005-09-03 00:56:16 +02001000 SIS_W32(StationControl, p->ctl);
1001
Francois Romieuc3d6f1f2005-09-03 00:56:57 +02001002 if (tp->features & F_HAS_RGMII) {
1003 SIS_W32(RGDelay, 0x0441);
1004 SIS_W32(RGDelay, 0x0440);
1005 }
1006
Francois Romieu890e8d02005-07-30 13:08:43 +02001007 net_link(tp, KERN_INFO "%s: link on %s mode.\n", dev->name,
1008 p->msg);
1009 netif_carrier_on(dev);
1010 }
Francois Romieu43afb942005-07-30 13:10:21 +02001011
Francois Romieuc014f6c2007-02-15 23:37:29 +01001012out_unlock:
Francois Romieu43afb942005-07-30 13:10:21 +02001013 rtnl_unlock();
Francois Romieu890e8d02005-07-30 13:08:43 +02001014}
1015
1016static void sis190_phy_timer(unsigned long __opaque)
1017{
1018 struct net_device *dev = (struct net_device *)__opaque;
1019 struct sis190_private *tp = netdev_priv(dev);
1020
1021 if (likely(netif_running(dev)))
1022 schedule_work(&tp->phy_task);
1023}
1024
1025static inline void sis190_delete_timer(struct net_device *dev)
1026{
1027 struct sis190_private *tp = netdev_priv(dev);
1028
1029 del_timer_sync(&tp->timer);
1030}
1031
1032static inline void sis190_request_timer(struct net_device *dev)
1033{
1034 struct sis190_private *tp = netdev_priv(dev);
1035 struct timer_list *timer = &tp->timer;
1036
1037 init_timer(timer);
1038 timer->expires = jiffies + SIS190_PHY_TIMEOUT;
1039 timer->data = (unsigned long)dev;
1040 timer->function = sis190_phy_timer;
1041 add_timer(timer);
1042}
1043
1044static void sis190_set_rxbufsize(struct sis190_private *tp,
1045 struct net_device *dev)
1046{
1047 unsigned int mtu = dev->mtu;
1048
1049 tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
Francois Romieu8b5641d2005-07-30 13:13:03 +02001050 /* RxDesc->size has a licence to kill the lower bits */
1051 if (tp->rx_buf_sz & 0x07) {
1052 tp->rx_buf_sz += 8;
1053 tp->rx_buf_sz &= RX_BUF_MASK;
1054 }
Francois Romieu890e8d02005-07-30 13:08:43 +02001055}
1056
1057static int sis190_open(struct net_device *dev)
1058{
1059 struct sis190_private *tp = netdev_priv(dev);
1060 struct pci_dev *pdev = tp->pci_dev;
1061 int rc = -ENOMEM;
1062
1063 sis190_set_rxbufsize(tp, dev);
1064
1065 /*
1066 * Rx and Tx descriptors need 256 bytes alignment.
1067 * pci_alloc_consistent() guarantees a stronger alignment.
1068 */
1069 tp->TxDescRing = pci_alloc_consistent(pdev, TX_RING_BYTES, &tp->tx_dma);
1070 if (!tp->TxDescRing)
1071 goto out;
1072
1073 tp->RxDescRing = pci_alloc_consistent(pdev, RX_RING_BYTES, &tp->rx_dma);
1074 if (!tp->RxDescRing)
1075 goto err_free_tx_0;
1076
1077 rc = sis190_init_ring(dev);
1078 if (rc < 0)
1079 goto err_free_rx_1;
1080
Francois Romieu890e8d02005-07-30 13:08:43 +02001081 sis190_request_timer(dev);
1082
Thomas Gleixner1fb9df52006-07-01 19:29:39 -07001083 rc = request_irq(dev->irq, sis190_interrupt, IRQF_SHARED, dev->name, dev);
Francois Romieu890e8d02005-07-30 13:08:43 +02001084 if (rc < 0)
1085 goto err_release_timer_2;
1086
1087 sis190_hw_start(dev);
1088out:
1089 return rc;
1090
1091err_release_timer_2:
1092 sis190_delete_timer(dev);
1093 sis190_rx_clear(tp);
1094err_free_rx_1:
1095 pci_free_consistent(tp->pci_dev, RX_RING_BYTES, tp->RxDescRing,
1096 tp->rx_dma);
1097err_free_tx_0:
1098 pci_free_consistent(tp->pci_dev, TX_RING_BYTES, tp->TxDescRing,
1099 tp->tx_dma);
1100 goto out;
1101}
1102
1103static void sis190_tx_clear(struct sis190_private *tp)
1104{
1105 unsigned int i;
1106
1107 for (i = 0; i < NUM_TX_DESC; i++) {
1108 struct sk_buff *skb = tp->Tx_skbuff[i];
1109
1110 if (!skb)
1111 continue;
1112
1113 sis190_unmap_tx_skb(tp->pci_dev, skb, tp->TxDescRing + i);
1114 tp->Tx_skbuff[i] = NULL;
1115 dev_kfree_skb(skb);
1116
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001117 tp->dev->stats.tx_dropped++;
Francois Romieu890e8d02005-07-30 13:08:43 +02001118 }
1119 tp->cur_tx = tp->dirty_tx = 0;
1120}
1121
1122static void sis190_down(struct net_device *dev)
1123{
1124 struct sis190_private *tp = netdev_priv(dev);
1125 void __iomem *ioaddr = tp->mmio_addr;
1126 unsigned int poll_locked = 0;
1127
1128 sis190_delete_timer(dev);
1129
1130 netif_stop_queue(dev);
1131
Francois Romieu890e8d02005-07-30 13:08:43 +02001132 do {
1133 spin_lock_irq(&tp->lock);
1134
1135 sis190_asic_down(ioaddr);
1136
1137 spin_unlock_irq(&tp->lock);
1138
1139 synchronize_irq(dev->irq);
1140
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001141 if (!poll_locked)
Francois Romieu890e8d02005-07-30 13:08:43 +02001142 poll_locked++;
Francois Romieu890e8d02005-07-30 13:08:43 +02001143
1144 synchronize_sched();
1145
1146 } while (SIS_R32(IntrMask));
1147
1148 sis190_tx_clear(tp);
1149 sis190_rx_clear(tp);
1150}
1151
1152static int sis190_close(struct net_device *dev)
1153{
1154 struct sis190_private *tp = netdev_priv(dev);
1155 struct pci_dev *pdev = tp->pci_dev;
1156
1157 sis190_down(dev);
1158
1159 free_irq(dev->irq, dev);
1160
Francois Romieu890e8d02005-07-30 13:08:43 +02001161 pci_free_consistent(pdev, TX_RING_BYTES, tp->TxDescRing, tp->tx_dma);
1162 pci_free_consistent(pdev, RX_RING_BYTES, tp->RxDescRing, tp->rx_dma);
1163
1164 tp->TxDescRing = NULL;
1165 tp->RxDescRing = NULL;
1166
1167 return 0;
1168}
1169
Stephen Hemminger613573252009-08-31 19:50:58 +00001170static netdev_tx_t sis190_start_xmit(struct sk_buff *skb,
1171 struct net_device *dev)
Francois Romieu890e8d02005-07-30 13:08:43 +02001172{
1173 struct sis190_private *tp = netdev_priv(dev);
1174 void __iomem *ioaddr = tp->mmio_addr;
1175 u32 len, entry, dirty_tx;
1176 struct TxDesc *desc;
1177 dma_addr_t mapping;
1178
1179 if (unlikely(skb->len < ETH_ZLEN)) {
Herbert Xu5b057c62006-06-23 02:06:41 -07001180 if (skb_padto(skb, ETH_ZLEN)) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001181 dev->stats.tx_dropped++;
Francois Romieu890e8d02005-07-30 13:08:43 +02001182 goto out;
1183 }
1184 len = ETH_ZLEN;
1185 } else {
1186 len = skb->len;
1187 }
1188
1189 entry = tp->cur_tx % NUM_TX_DESC;
1190 desc = tp->TxDescRing + entry;
1191
1192 if (unlikely(le32_to_cpu(desc->status) & OWNbit)) {
1193 netif_stop_queue(dev);
1194 net_tx_err(tp, KERN_ERR PFX
1195 "%s: BUG! Tx Ring full when queue awake!\n",
1196 dev->name);
1197 return NETDEV_TX_BUSY;
1198 }
1199
1200 mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
1201
1202 tp->Tx_skbuff[entry] = skb;
1203
1204 desc->PSize = cpu_to_le32(len);
1205 desc->addr = cpu_to_le32(mapping);
1206
1207 desc->size = cpu_to_le32(len);
1208 if (entry == (NUM_TX_DESC - 1))
1209 desc->size |= cpu_to_le32(RingEnd);
1210
1211 wmb();
1212
1213 desc->status = cpu_to_le32(OWNbit | INTbit | DEFbit | CRCbit | PADbit);
1214
1215 tp->cur_tx++;
1216
1217 smp_wmb();
1218
1219 SIS_W32(TxControl, 0x1a00 | CmdReset | CmdTxEnb);
1220
Francois Romieu890e8d02005-07-30 13:08:43 +02001221 dirty_tx = tp->dirty_tx;
1222 if ((tp->cur_tx - NUM_TX_DESC) == dirty_tx) {
1223 netif_stop_queue(dev);
1224 smp_rmb();
1225 if (dirty_tx != tp->dirty_tx)
1226 netif_wake_queue(dev);
1227 }
1228out:
1229 return NETDEV_TX_OK;
1230}
1231
Francois Romieufcb98212005-07-30 13:15:22 +02001232static void sis190_free_phy(struct list_head *first_phy)
1233{
1234 struct sis190_phy *cur, *next;
1235
1236 list_for_each_entry_safe(cur, next, first_phy, list) {
1237 kfree(cur);
1238 }
1239}
1240
1241/**
1242 * sis190_default_phy - Select default PHY for sis190 mac.
1243 * @dev: the net device to probe for
1244 *
1245 * Select first detected PHY with link as default.
1246 * If no one is link on, select PHY whose types is HOME as default.
1247 * If HOME doesn't exist, select LAN.
1248 */
1249static u16 sis190_default_phy(struct net_device *dev)
1250{
1251 struct sis190_phy *phy, *phy_home, *phy_default, *phy_lan;
1252 struct sis190_private *tp = netdev_priv(dev);
1253 struct mii_if_info *mii_if = &tp->mii_if;
1254 void __iomem *ioaddr = tp->mmio_addr;
1255 u16 status;
1256
1257 phy_home = phy_default = phy_lan = NULL;
1258
1259 list_for_each_entry(phy, &tp->first_phy, list) {
1260 status = mdio_read_latched(ioaddr, phy->phy_id, MII_BMSR);
1261
1262 // Link ON & Not select default PHY & not ghost PHY.
1263 if ((status & BMSR_LSTATUS) &&
1264 !phy_default &&
1265 (phy->type != UNKNOWN)) {
1266 phy_default = phy;
1267 } else {
1268 status = mdio_read(ioaddr, phy->phy_id, MII_BMCR);
1269 mdio_write(ioaddr, phy->phy_id, MII_BMCR,
1270 status | BMCR_ANENABLE | BMCR_ISOLATE);
1271 if (phy->type == HOME)
1272 phy_home = phy;
1273 else if (phy->type == LAN)
1274 phy_lan = phy;
1275 }
1276 }
1277
1278 if (!phy_default) {
1279 if (phy_home)
1280 phy_default = phy_home;
1281 else if (phy_lan)
1282 phy_default = phy_lan;
1283 else
françois romieuc2f3f3a2009-06-17 11:43:11 +00001284 phy_default = list_first_entry(&tp->first_phy,
Francois Romieufcb98212005-07-30 13:15:22 +02001285 struct sis190_phy, list);
1286 }
1287
1288 if (mii_if->phy_id != phy_default->phy_id) {
1289 mii_if->phy_id = phy_default->phy_id;
1290 net_probe(tp, KERN_INFO
1291 "%s: Using transceiver at address %d as default.\n",
Francois Romieu3690b6c2005-08-26 00:30:37 +02001292 pci_name(tp->pci_dev), mii_if->phy_id);
Francois Romieufcb98212005-07-30 13:15:22 +02001293 }
1294
1295 status = mdio_read(ioaddr, mii_if->phy_id, MII_BMCR);
1296 status &= (~BMCR_ISOLATE);
1297
1298 mdio_write(ioaddr, mii_if->phy_id, MII_BMCR, status);
1299 status = mdio_read_latched(ioaddr, mii_if->phy_id, MII_BMSR);
1300
1301 return status;
1302}
1303
1304static void sis190_init_phy(struct net_device *dev, struct sis190_private *tp,
1305 struct sis190_phy *phy, unsigned int phy_id,
1306 u16 mii_status)
1307{
1308 void __iomem *ioaddr = tp->mmio_addr;
1309 struct mii_chip_info *p;
1310
1311 INIT_LIST_HEAD(&phy->list);
1312 phy->status = mii_status;
1313 phy->phy_id = phy_id;
1314
1315 phy->id[0] = mdio_read(ioaddr, phy_id, MII_PHYSID1);
1316 phy->id[1] = mdio_read(ioaddr, phy_id, MII_PHYSID2);
1317
1318 for (p = mii_chip_table; p->type; p++) {
1319 if ((p->id[0] == phy->id[0]) &&
1320 (p->id[1] == (phy->id[1] & 0xfff0))) {
1321 break;
1322 }
1323 }
1324
1325 if (p->id[1]) {
1326 phy->type = (p->type == MIX) ?
1327 ((mii_status & (BMSR_100FULL | BMSR_100HALF)) ?
1328 LAN : HOME) : p->type;
Francois Romieu900eb9d2005-09-03 00:55:27 +02001329 tp->features |= p->feature;
Riccardo Ghettac3223d22009-06-04 09:04:55 +00001330 net_probe(tp, KERN_INFO "%s: %s transceiver at address %d.\n",
1331 pci_name(tp->pci_dev), p->name, phy_id);
1332 } else {
Francois Romieufcb98212005-07-30 13:15:22 +02001333 phy->type = UNKNOWN;
Riccardo Ghettac3223d22009-06-04 09:04:55 +00001334 net_probe(tp, KERN_INFO
1335 "%s: unknown PHY 0x%x:0x%x transceiver at address %d\n",
1336 pci_name(tp->pci_dev),
1337 phy->id[0], (phy->id[1] & 0xfff0), phy_id);
1338 }
Francois Romieufcb98212005-07-30 13:15:22 +02001339}
1340
Francois Romieu900eb9d2005-09-03 00:55:27 +02001341static void sis190_mii_probe_88e1111_fixup(struct sis190_private *tp)
1342{
1343 if (tp->features & F_PHY_88E1111) {
1344 void __iomem *ioaddr = tp->mmio_addr;
1345 int phy_id = tp->mii_if.phy_id;
1346 u16 reg[2][2] = {
1347 { 0x808b, 0x0ce1 },
1348 { 0x808f, 0x0c60 }
1349 }, *p;
1350
1351 p = (tp->features & F_HAS_RGMII) ? reg[0] : reg[1];
1352
1353 mdio_write(ioaddr, phy_id, 0x1b, p[0]);
1354 udelay(200);
1355 mdio_write(ioaddr, phy_id, 0x14, p[1]);
1356 udelay(200);
1357 }
1358}
1359
Francois Romieufcb98212005-07-30 13:15:22 +02001360/**
1361 * sis190_mii_probe - Probe MII PHY for sis190
1362 * @dev: the net device to probe for
1363 *
1364 * Search for total of 32 possible mii phy addresses.
1365 * Identify and set current phy if found one,
1366 * return error if it failed to found.
1367 */
1368static int __devinit sis190_mii_probe(struct net_device *dev)
1369{
1370 struct sis190_private *tp = netdev_priv(dev);
1371 struct mii_if_info *mii_if = &tp->mii_if;
1372 void __iomem *ioaddr = tp->mmio_addr;
1373 int phy_id;
1374 int rc = 0;
1375
1376 INIT_LIST_HEAD(&tp->first_phy);
1377
1378 for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
1379 struct sis190_phy *phy;
1380 u16 status;
1381
1382 status = mdio_read_latched(ioaddr, phy_id, MII_BMSR);
1383
1384 // Try next mii if the current one is not accessible.
1385 if (status == 0xffff || status == 0x0000)
1386 continue;
1387
1388 phy = kmalloc(sizeof(*phy), GFP_KERNEL);
1389 if (!phy) {
1390 sis190_free_phy(&tp->first_phy);
1391 rc = -ENOMEM;
1392 goto out;
1393 }
1394
1395 sis190_init_phy(dev, tp, phy, phy_id, status);
1396
1397 list_add(&tp->first_phy, &phy->list);
1398 }
1399
1400 if (list_empty(&tp->first_phy)) {
1401 net_probe(tp, KERN_INFO "%s: No MII transceivers found!\n",
Francois Romieu3690b6c2005-08-26 00:30:37 +02001402 pci_name(tp->pci_dev));
Francois Romieufcb98212005-07-30 13:15:22 +02001403 rc = -EIO;
1404 goto out;
1405 }
1406
1407 /* Select default PHY for mac */
1408 sis190_default_phy(dev);
1409
Francois Romieu900eb9d2005-09-03 00:55:27 +02001410 sis190_mii_probe_88e1111_fixup(tp);
1411
Francois Romieufcb98212005-07-30 13:15:22 +02001412 mii_if->dev = dev;
1413 mii_if->mdio_read = __mdio_read;
1414 mii_if->mdio_write = __mdio_write;
1415 mii_if->phy_id_mask = PHY_ID_ANY;
1416 mii_if->reg_num_mask = MII_REG_ANY;
1417out:
1418 return rc;
1419}
1420
Adrian Bunkc2b75f02007-12-11 23:23:56 +01001421static void sis190_mii_remove(struct net_device *dev)
Francois Romieufcb98212005-07-30 13:15:22 +02001422{
1423 struct sis190_private *tp = netdev_priv(dev);
1424
1425 sis190_free_phy(&tp->first_phy);
1426}
1427
Francois Romieu890e8d02005-07-30 13:08:43 +02001428static void sis190_release_board(struct pci_dev *pdev)
1429{
1430 struct net_device *dev = pci_get_drvdata(pdev);
1431 struct sis190_private *tp = netdev_priv(dev);
1432
1433 iounmap(tp->mmio_addr);
1434 pci_release_regions(pdev);
1435 pci_disable_device(pdev);
1436 free_netdev(dev);
1437}
1438
1439static struct net_device * __devinit sis190_init_board(struct pci_dev *pdev)
1440{
1441 struct sis190_private *tp;
1442 struct net_device *dev;
1443 void __iomem *ioaddr;
1444 int rc;
1445
1446 dev = alloc_etherdev(sizeof(*tp));
1447 if (!dev) {
1448 net_drv(&debug, KERN_ERR PFX "unable to alloc new ethernet\n");
1449 rc = -ENOMEM;
1450 goto err_out_0;
1451 }
1452
Francois Romieu890e8d02005-07-30 13:08:43 +02001453 SET_NETDEV_DEV(dev, &pdev->dev);
1454
1455 tp = netdev_priv(dev);
David Howellsc4028952006-11-22 14:57:56 +00001456 tp->dev = dev;
Francois Romieu890e8d02005-07-30 13:08:43 +02001457 tp->msg_enable = netif_msg_init(debug.msg_enable, SIS190_MSG_DEFAULT);
1458
1459 rc = pci_enable_device(pdev);
1460 if (rc < 0) {
1461 net_probe(tp, KERN_ERR "%s: enable failure\n", pci_name(pdev));
1462 goto err_free_dev_1;
1463 }
1464
1465 rc = -ENODEV;
1466
1467 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
1468 net_probe(tp, KERN_ERR "%s: region #0 is no MMIO resource.\n",
1469 pci_name(pdev));
1470 goto err_pci_disable_2;
1471 }
1472 if (pci_resource_len(pdev, 0) < SIS190_REGS_SIZE) {
1473 net_probe(tp, KERN_ERR "%s: invalid PCI region size(s).\n",
1474 pci_name(pdev));
1475 goto err_pci_disable_2;
1476 }
1477
1478 rc = pci_request_regions(pdev, DRV_NAME);
1479 if (rc < 0) {
1480 net_probe(tp, KERN_ERR PFX "%s: could not request regions.\n",
1481 pci_name(pdev));
1482 goto err_pci_disable_2;
1483 }
1484
Yang Hongyang284901a2009-04-06 19:01:15 -07001485 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Francois Romieu890e8d02005-07-30 13:08:43 +02001486 if (rc < 0) {
1487 net_probe(tp, KERN_ERR "%s: DMA configuration failed.\n",
1488 pci_name(pdev));
1489 goto err_free_res_3;
1490 }
1491
1492 pci_set_master(pdev);
1493
1494 ioaddr = ioremap(pci_resource_start(pdev, 0), SIS190_REGS_SIZE);
1495 if (!ioaddr) {
1496 net_probe(tp, KERN_ERR "%s: cannot remap MMIO, aborting\n",
1497 pci_name(pdev));
1498 rc = -EIO;
1499 goto err_free_res_3;
1500 }
1501
1502 tp->pci_dev = pdev;
1503 tp->mmio_addr = ioaddr;
1504
1505 sis190_irq_mask_and_ack(ioaddr);
1506
1507 sis190_soft_reset(ioaddr);
1508out:
1509 return dev;
1510
1511err_free_res_3:
1512 pci_release_regions(pdev);
1513err_pci_disable_2:
1514 pci_disable_device(pdev);
1515err_free_dev_1:
1516 free_netdev(dev);
1517err_out_0:
1518 dev = ERR_PTR(rc);
1519 goto out;
1520}
1521
1522static void sis190_tx_timeout(struct net_device *dev)
1523{
1524 struct sis190_private *tp = netdev_priv(dev);
1525 void __iomem *ioaddr = tp->mmio_addr;
1526 u8 tmp8;
1527
1528 /* Disable Tx, if not already */
1529 tmp8 = SIS_R8(TxControl);
1530 if (tmp8 & CmdTxEnb)
1531 SIS_W8(TxControl, tmp8 & ~CmdTxEnb);
1532
Francois Romieu188f23b2005-07-30 13:11:43 +02001533
1534 net_tx_err(tp, KERN_INFO "%s: Transmit timeout, status %08x %08x.\n",
1535 dev->name, SIS_R32(TxControl), SIS_R32(TxSts));
1536
Francois Romieu890e8d02005-07-30 13:08:43 +02001537 /* Disable interrupts by clearing the interrupt mask. */
1538 SIS_W32(IntrMask, 0x0000);
1539
1540 /* Stop a shared interrupt from scavenging while we are. */
1541 spin_lock_irq(&tp->lock);
1542 sis190_tx_clear(tp);
1543 spin_unlock_irq(&tp->lock);
1544
1545 /* ...and finally, reset everything. */
1546 sis190_hw_start(dev);
1547
1548 netif_wake_queue(dev);
1549}
1550
Francois Romieu900eb9d2005-09-03 00:55:27 +02001551static void sis190_set_rgmii(struct sis190_private *tp, u8 reg)
1552{
1553 tp->features |= (reg & 0x80) ? F_HAS_RGMII : 0;
1554}
1555
Francois Romieu830fb7d2005-07-30 13:12:37 +02001556static int __devinit sis190_get_mac_addr_from_eeprom(struct pci_dev *pdev,
1557 struct net_device *dev)
1558{
1559 struct sis190_private *tp = netdev_priv(dev);
1560 void __iomem *ioaddr = tp->mmio_addr;
1561 u16 sig;
1562 int i;
1563
1564 net_probe(tp, KERN_INFO "%s: Read MAC address from EEPROM\n",
1565 pci_name(pdev));
1566
1567 /* Check to see if there is a sane EEPROM */
1568 sig = (u16) sis190_read_eeprom(ioaddr, EEPROMSignature);
1569
1570 if ((sig == 0xffff) || (sig == 0x0000)) {
1571 net_probe(tp, KERN_INFO "%s: Error EEPROM read %x.\n",
1572 pci_name(pdev), sig);
1573 return -EIO;
1574 }
1575
1576 /* Get MAC address from EEPROM */
1577 for (i = 0; i < MAC_ADDR_LEN / 2; i++) {
Al Viro961994a2007-12-15 01:44:33 +00001578 u16 w = sis190_read_eeprom(ioaddr, EEPROMMACAddr + i);
Francois Romieu830fb7d2005-07-30 13:12:37 +02001579
Al Viro961994a2007-12-15 01:44:33 +00001580 ((__le16 *)dev->dev_addr)[i] = cpu_to_le16(w);
Francois Romieu830fb7d2005-07-30 13:12:37 +02001581 }
1582
Francois Romieu900eb9d2005-09-03 00:55:27 +02001583 sis190_set_rgmii(tp, sis190_read_eeprom(ioaddr, EEPROMInfo));
1584
Francois Romieu830fb7d2005-07-30 13:12:37 +02001585 return 0;
1586}
1587
1588/**
Francois Romieuebc71642007-12-04 22:58:41 +01001589 * sis190_get_mac_addr_from_apc - Get MAC address for SiS96x model
Francois Romieu830fb7d2005-07-30 13:12:37 +02001590 * @pdev: PCI device
1591 * @dev: network device to get address for
1592 *
Francois Romieuebc71642007-12-04 22:58:41 +01001593 * SiS96x model, use APC CMOS RAM to store MAC address.
Francois Romieu830fb7d2005-07-30 13:12:37 +02001594 * APC CMOS RAM is accessed through ISA bridge.
1595 * MAC address is read into @net_dev->dev_addr.
1596 */
1597static int __devinit sis190_get_mac_addr_from_apc(struct pci_dev *pdev,
1598 struct net_device *dev)
1599{
Francois Romieuebc71642007-12-04 22:58:41 +01001600 static const u16 __devinitdata ids[] = { 0x0965, 0x0966, 0x0968 };
Francois Romieu830fb7d2005-07-30 13:12:37 +02001601 struct sis190_private *tp = netdev_priv(dev);
1602 struct pci_dev *isa_bridge;
1603 u8 reg, tmp8;
Francois Romieuebc71642007-12-04 22:58:41 +01001604 unsigned int i;
Francois Romieu830fb7d2005-07-30 13:12:37 +02001605
1606 net_probe(tp, KERN_INFO "%s: Read MAC address from APC.\n",
1607 pci_name(pdev));
1608
Francois Romieuebc71642007-12-04 22:58:41 +01001609 for (i = 0; i < ARRAY_SIZE(ids); i++) {
1610 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, ids[i], NULL);
1611 if (isa_bridge)
1612 break;
1613 }
Neil Muller8eb7ad62007-08-01 17:52:04 +02001614
Francois Romieu830fb7d2005-07-30 13:12:37 +02001615 if (!isa_bridge) {
1616 net_probe(tp, KERN_INFO "%s: Can not find ISA bridge.\n",
1617 pci_name(pdev));
1618 return -EIO;
1619 }
1620
1621 /* Enable port 78h & 79h to access APC Registers. */
1622 pci_read_config_byte(isa_bridge, 0x48, &tmp8);
1623 reg = (tmp8 & ~0x02);
1624 pci_write_config_byte(isa_bridge, 0x48, reg);
1625 udelay(50);
1626 pci_read_config_byte(isa_bridge, 0x48, &reg);
1627
1628 for (i = 0; i < MAC_ADDR_LEN; i++) {
1629 outb(0x9 + i, 0x78);
1630 dev->dev_addr[i] = inb(0x79);
1631 }
1632
1633 outb(0x12, 0x78);
1634 reg = inb(0x79);
1635
Francois Romieu900eb9d2005-09-03 00:55:27 +02001636 sis190_set_rgmii(tp, reg);
1637
Francois Romieu830fb7d2005-07-30 13:12:37 +02001638 /* Restore the value to ISA Bridge */
1639 pci_write_config_byte(isa_bridge, 0x48, tmp8);
1640 pci_dev_put(isa_bridge);
1641
1642 return 0;
1643}
1644
1645/**
1646 * sis190_init_rxfilter - Initialize the Rx filter
1647 * @dev: network device to initialize
1648 *
1649 * Set receive filter address to our MAC address
1650 * and enable packet filtering.
1651 */
1652static inline void sis190_init_rxfilter(struct net_device *dev)
1653{
1654 struct sis190_private *tp = netdev_priv(dev);
1655 void __iomem *ioaddr = tp->mmio_addr;
1656 u16 ctl;
1657 int i;
1658
1659 ctl = SIS_R16(RxMacControl);
1660 /*
1661 * Disable packet filtering before setting filter.
1662 * Note: SiS's driver writes 32 bits but RxMacControl is 16 bits
1663 * only and followed by RxMacAddr (6 bytes). Strange. -- FR
1664 */
1665 SIS_W16(RxMacControl, ctl & ~0x0f00);
1666
1667 for (i = 0; i < MAC_ADDR_LEN; i++)
1668 SIS_W8(RxMacAddr + i, dev->dev_addr[i]);
1669
1670 SIS_W16(RxMacControl, ctl);
1671 SIS_PCI_COMMIT();
1672}
1673
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04001674static int __devinit sis190_get_mac_addr(struct pci_dev *pdev,
Sergio Luisd785ad72008-02-10 17:56:25 -03001675 struct net_device *dev)
Francois Romieu830fb7d2005-07-30 13:12:37 +02001676{
Francois Romieu563e0ae2008-02-18 21:20:32 +01001677 int rc;
Francois Romieu830fb7d2005-07-30 13:12:37 +02001678
Francois Romieu563e0ae2008-02-18 21:20:32 +01001679 rc = sis190_get_mac_addr_from_eeprom(pdev, dev);
1680 if (rc < 0) {
1681 u8 reg;
Francois Romieu830fb7d2005-07-30 13:12:37 +02001682
Francois Romieu563e0ae2008-02-18 21:20:32 +01001683 pci_read_config_byte(pdev, 0x73, &reg);
1684
1685 if (reg & 0x00000001)
1686 rc = sis190_get_mac_addr_from_apc(pdev, dev);
1687 }
1688 return rc;
Francois Romieu830fb7d2005-07-30 13:12:37 +02001689}
1690
Francois Romieu890e8d02005-07-30 13:08:43 +02001691static void sis190_set_speed_auto(struct net_device *dev)
1692{
1693 struct sis190_private *tp = netdev_priv(dev);
1694 void __iomem *ioaddr = tp->mmio_addr;
Francois Romieu9ede1092005-07-30 13:14:38 +02001695 int phy_id = tp->mii_if.phy_id;
Francois Romieu890e8d02005-07-30 13:08:43 +02001696 int val;
1697
1698 net_link(tp, KERN_INFO "%s: Enabling Auto-negotiation.\n", dev->name);
1699
Francois Romieu9ede1092005-07-30 13:14:38 +02001700 val = mdio_read(ioaddr, phy_id, MII_ADVERTISE);
Francois Romieu890e8d02005-07-30 13:08:43 +02001701
1702 // Enable 10/100 Full/Half Mode, leave MII_ADVERTISE bit4:0
1703 // unchanged.
Francois Romieu9ede1092005-07-30 13:14:38 +02001704 mdio_write(ioaddr, phy_id, MII_ADVERTISE, (val & ADVERTISE_SLCT) |
Francois Romieu890e8d02005-07-30 13:08:43 +02001705 ADVERTISE_100FULL | ADVERTISE_10FULL |
1706 ADVERTISE_100HALF | ADVERTISE_10HALF);
1707
1708 // Enable 1000 Full Mode.
Francois Romieu9ede1092005-07-30 13:14:38 +02001709 mdio_write(ioaddr, phy_id, MII_CTRL1000, ADVERTISE_1000FULL);
Francois Romieu890e8d02005-07-30 13:08:43 +02001710
1711 // Enable auto-negotiation and restart auto-negotiation.
Francois Romieu9ede1092005-07-30 13:14:38 +02001712 mdio_write(ioaddr, phy_id, MII_BMCR,
Francois Romieu890e8d02005-07-30 13:08:43 +02001713 BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET);
1714}
1715
Francois Romieu43afb942005-07-30 13:10:21 +02001716static int sis190_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1717{
1718 struct sis190_private *tp = netdev_priv(dev);
1719
1720 return mii_ethtool_gset(&tp->mii_if, cmd);
1721}
1722
1723static int sis190_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1724{
1725 struct sis190_private *tp = netdev_priv(dev);
1726
1727 return mii_ethtool_sset(&tp->mii_if, cmd);
1728}
1729
Francois Romieu890e8d02005-07-30 13:08:43 +02001730static void sis190_get_drvinfo(struct net_device *dev,
1731 struct ethtool_drvinfo *info)
1732{
1733 struct sis190_private *tp = netdev_priv(dev);
1734
1735 strcpy(info->driver, DRV_NAME);
1736 strcpy(info->version, DRV_VERSION);
1737 strcpy(info->bus_info, pci_name(tp->pci_dev));
1738}
1739
1740static int sis190_get_regs_len(struct net_device *dev)
1741{
1742 return SIS190_REGS_SIZE;
1743}
1744
1745static void sis190_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1746 void *p)
1747{
1748 struct sis190_private *tp = netdev_priv(dev);
1749 unsigned long flags;
1750
1751 if (regs->len > SIS190_REGS_SIZE)
1752 regs->len = SIS190_REGS_SIZE;
1753
1754 spin_lock_irqsave(&tp->lock, flags);
1755 memcpy_fromio(p, tp->mmio_addr, regs->len);
1756 spin_unlock_irqrestore(&tp->lock, flags);
1757}
1758
Francois Romieu43afb942005-07-30 13:10:21 +02001759static int sis190_nway_reset(struct net_device *dev)
1760{
1761 struct sis190_private *tp = netdev_priv(dev);
1762
1763 return mii_nway_restart(&tp->mii_if);
1764}
1765
Francois Romieu890e8d02005-07-30 13:08:43 +02001766static u32 sis190_get_msglevel(struct net_device *dev)
1767{
1768 struct sis190_private *tp = netdev_priv(dev);
1769
1770 return tp->msg_enable;
1771}
1772
1773static void sis190_set_msglevel(struct net_device *dev, u32 value)
1774{
1775 struct sis190_private *tp = netdev_priv(dev);
1776
1777 tp->msg_enable = value;
1778}
1779
Jeff Garzik7282d492006-09-13 14:30:00 -04001780static const struct ethtool_ops sis190_ethtool_ops = {
Francois Romieu43afb942005-07-30 13:10:21 +02001781 .get_settings = sis190_get_settings,
1782 .set_settings = sis190_set_settings,
Francois Romieu890e8d02005-07-30 13:08:43 +02001783 .get_drvinfo = sis190_get_drvinfo,
1784 .get_regs_len = sis190_get_regs_len,
1785 .get_regs = sis190_get_regs,
1786 .get_link = ethtool_op_get_link,
1787 .get_msglevel = sis190_get_msglevel,
1788 .set_msglevel = sis190_set_msglevel,
Francois Romieu43afb942005-07-30 13:10:21 +02001789 .nway_reset = sis190_nway_reset,
Francois Romieu890e8d02005-07-30 13:08:43 +02001790};
1791
Francois Romieu43afb942005-07-30 13:10:21 +02001792static int sis190_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1793{
1794 struct sis190_private *tp = netdev_priv(dev);
1795
1796 return !netif_running(dev) ? -EINVAL :
1797 generic_mii_ioctl(&tp->mii_if, if_mii(ifr), cmd, NULL);
1798}
1799
Stephen Hemminger97488c52009-01-07 17:35:41 -08001800static const struct net_device_ops sis190_netdev_ops = {
1801 .ndo_open = sis190_open,
1802 .ndo_stop = sis190_close,
1803 .ndo_do_ioctl = sis190_ioctl,
1804 .ndo_start_xmit = sis190_start_xmit,
1805 .ndo_tx_timeout = sis190_tx_timeout,
1806 .ndo_set_multicast_list = sis190_set_rx_mode,
1807 .ndo_change_mtu = eth_change_mtu,
1808 .ndo_set_mac_address = eth_mac_addr,
1809 .ndo_validate_addr = eth_validate_addr,
1810#ifdef CONFIG_NET_POLL_CONTROLLER
1811 .ndo_poll_controller = sis190_netpoll,
1812#endif
1813};
1814
Francois Romieu890e8d02005-07-30 13:08:43 +02001815static int __devinit sis190_init_one(struct pci_dev *pdev,
1816 const struct pci_device_id *ent)
1817{
1818 static int printed_version = 0;
1819 struct sis190_private *tp;
1820 struct net_device *dev;
1821 void __iomem *ioaddr;
Francois Romieu830fb7d2005-07-30 13:12:37 +02001822 int rc;
Francois Romieu890e8d02005-07-30 13:08:43 +02001823
1824 if (!printed_version) {
1825 net_drv(&debug, KERN_INFO SIS190_DRIVER_NAME " loaded.\n");
1826 printed_version = 1;
1827 }
1828
1829 dev = sis190_init_board(pdev);
1830 if (IS_ERR(dev)) {
1831 rc = PTR_ERR(dev);
1832 goto out;
1833 }
1834
Francois Romieu10487fb2006-02-16 22:17:00 +01001835 pci_set_drvdata(pdev, dev);
1836
Francois Romieu890e8d02005-07-30 13:08:43 +02001837 tp = netdev_priv(dev);
1838 ioaddr = tp->mmio_addr;
1839
Francois Romieu830fb7d2005-07-30 13:12:37 +02001840 rc = sis190_get_mac_addr(pdev, dev);
1841 if (rc < 0)
1842 goto err_release_board;
Francois Romieu890e8d02005-07-30 13:08:43 +02001843
Francois Romieu830fb7d2005-07-30 13:12:37 +02001844 sis190_init_rxfilter(dev);
Francois Romieu890e8d02005-07-30 13:08:43 +02001845
David Howellsc4028952006-11-22 14:57:56 +00001846 INIT_WORK(&tp->phy_task, sis190_phy_task);
Francois Romieu890e8d02005-07-30 13:08:43 +02001847
Stephen Hemminger97488c52009-01-07 17:35:41 -08001848 dev->netdev_ops = &sis190_netdev_ops;
1849
Francois Romieu890e8d02005-07-30 13:08:43 +02001850 SET_ETHTOOL_OPS(dev, &sis190_ethtool_ops);
1851 dev->irq = pdev->irq;
1852 dev->base_addr = (unsigned long) 0xdead;
Stephen Hemminger97488c52009-01-07 17:35:41 -08001853 dev->watchdog_timeo = SIS190_TX_TIMEOUT;
Francois Romieu890e8d02005-07-30 13:08:43 +02001854
1855 spin_lock_init(&tp->lock);
Francois Romieu890e8d02005-07-30 13:08:43 +02001856
Francois Romieufcb98212005-07-30 13:15:22 +02001857 rc = sis190_mii_probe(dev);
1858 if (rc < 0)
Francois Romieu3690b6c2005-08-26 00:30:37 +02001859 goto err_release_board;
1860
1861 rc = register_netdev(dev);
1862 if (rc < 0)
1863 goto err_remove_mii;
1864
Johannes Berge1749612008-10-27 15:59:26 -07001865 net_probe(tp, KERN_INFO "%s: %s at %p (IRQ: %d), %pM\n",
Joe Perches0795af52007-10-03 17:59:30 -07001866 pci_name(pdev), sis_chip_info[ent->driver_data].name,
Johannes Berge1749612008-10-27 15:59:26 -07001867 ioaddr, dev->irq, dev->dev_addr);
Francois Romieu890e8d02005-07-30 13:08:43 +02001868
Francois Romieu900eb9d2005-09-03 00:55:27 +02001869 net_probe(tp, KERN_INFO "%s: %s mode.\n", dev->name,
1870 (tp->features & F_HAS_RGMII) ? "RGMII" : "GMII");
1871
Francois Romieu890e8d02005-07-30 13:08:43 +02001872 netif_carrier_off(dev);
1873
1874 sis190_set_speed_auto(dev);
1875out:
1876 return rc;
Francois Romieu830fb7d2005-07-30 13:12:37 +02001877
Francois Romieu3690b6c2005-08-26 00:30:37 +02001878err_remove_mii:
1879 sis190_mii_remove(dev);
Francois Romieu830fb7d2005-07-30 13:12:37 +02001880err_release_board:
1881 sis190_release_board(pdev);
1882 goto out;
Francois Romieu890e8d02005-07-30 13:08:43 +02001883}
1884
1885static void __devexit sis190_remove_one(struct pci_dev *pdev)
1886{
1887 struct net_device *dev = pci_get_drvdata(pdev);
1888
Francois Romieufcb98212005-07-30 13:15:22 +02001889 sis190_mii_remove(dev);
Francois Romieuc014f6c2007-02-15 23:37:29 +01001890 flush_scheduled_work();
Francois Romieu890e8d02005-07-30 13:08:43 +02001891 unregister_netdev(dev);
1892 sis190_release_board(pdev);
1893 pci_set_drvdata(pdev, NULL);
1894}
1895
1896static struct pci_driver sis190_pci_driver = {
1897 .name = DRV_NAME,
1898 .id_table = sis190_pci_tbl,
1899 .probe = sis190_init_one,
1900 .remove = __devexit_p(sis190_remove_one),
1901};
1902
1903static int __init sis190_init_module(void)
1904{
Jeff Garzik29917622006-08-19 17:48:59 -04001905 return pci_register_driver(&sis190_pci_driver);
Francois Romieu890e8d02005-07-30 13:08:43 +02001906}
1907
1908static void __exit sis190_cleanup_module(void)
1909{
1910 pci_unregister_driver(&sis190_pci_driver);
1911}
1912
1913module_init(sis190_init_module);
1914module_exit(sis190_cleanup_module);