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Ralf Baechle38b18f722005-02-03 14:28:23 +00001config SIBYTE_SB1250
2 bool
Ralf Baechle217dd112007-11-01 01:57:55 +00003 select CEVT_SB1250
4 select CSRC_SB1250
Ralf Baechle38b18f722005-02-03 14:28:23 +00005 select HW_HAS_PCI
Ralf Baechle7bcf7712007-10-11 23:46:09 +01006 select IRQ_CPU
Ralf Baechleca6f5492007-03-09 12:17:32 +00007 select SIBYTE_ENABLE_LDT_IF_PCI
Mark Masond619f382007-03-29 11:39:56 -07008 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +00009 select SIBYTE_SB1xxx_SOC
Ralf Baechlee73ea272006-06-04 11:51:46 +010010 select SYS_SUPPORTS_SMP
Ralf Baechle38b18f722005-02-03 14:28:23 +000011
12config SIBYTE_BCM1120
13 bool
Ralf Baechle217dd112007-11-01 01:57:55 +000014 select CEVT_SB1250
15 select CSRC_SB1250
Ralf Baechle7bcf7712007-10-11 23:46:09 +010016 select IRQ_CPU
Ralf Baechle38b18f722005-02-03 14:28:23 +000017 select SIBYTE_BCM112X
Ralf Baechlebb9b8132007-03-09 15:59:56 +000018 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +000019 select SIBYTE_SB1xxx_SOC
20
21config SIBYTE_BCM1125
22 bool
Ralf Baechle217dd112007-11-01 01:57:55 +000023 select CEVT_SB1250
24 select CSRC_SB1250
Ralf Baechle38b18f722005-02-03 14:28:23 +000025 select HW_HAS_PCI
Ralf Baechle7bcf7712007-10-11 23:46:09 +010026 select IRQ_CPU
Ralf Baechle38b18f722005-02-03 14:28:23 +000027 select SIBYTE_BCM112X
Ralf Baechlebb9b8132007-03-09 15:59:56 +000028 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +000029 select SIBYTE_SB1xxx_SOC
30
31config SIBYTE_BCM1125H
32 bool
Ralf Baechle217dd112007-11-01 01:57:55 +000033 select CEVT_SB1250
34 select CSRC_SB1250
Ralf Baechle38b18f722005-02-03 14:28:23 +000035 select HW_HAS_PCI
Ralf Baechle7bcf7712007-10-11 23:46:09 +010036 select IRQ_CPU
Ralf Baechle38b18f722005-02-03 14:28:23 +000037 select SIBYTE_BCM112X
Ralf Baechleca6f5492007-03-09 12:17:32 +000038 select SIBYTE_ENABLE_LDT_IF_PCI
Ralf Baechlebb9b8132007-03-09 15:59:56 +000039 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +000040 select SIBYTE_SB1xxx_SOC
41
42config SIBYTE_BCM112X
43 bool
Ralf Baechle217dd112007-11-01 01:57:55 +000044 select CEVT_SB1250
45 select CSRC_SB1250
Ralf Baechle7bcf7712007-10-11 23:46:09 +010046 select IRQ_CPU
Ralf Baechle38b18f722005-02-03 14:28:23 +000047 select SIBYTE_SB1xxx_SOC
Ralf Baechlebb9b8132007-03-09 15:59:56 +000048 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +000049
Andrew Isaacsonf137e462005-10-19 23:56:38 -070050config SIBYTE_BCM1x80
51 bool
Ralf Baechle217dd112007-11-01 01:57:55 +000052 select CEVT_BCM1480
53 select CSRC_BCM1480
Andrew Isaacsonf137e462005-10-19 23:56:38 -070054 select HW_HAS_PCI
Ralf Baechle7bcf7712007-10-11 23:46:09 +010055 select IRQ_CPU
Mark Masond619f382007-03-29 11:39:56 -070056 select SIBYTE_HAS_ZBUS_PROFILING
Andrew Isaacsonf137e462005-10-19 23:56:38 -070057 select SIBYTE_SB1xxx_SOC
Ralf Baechlee73ea272006-06-04 11:51:46 +010058 select SYS_SUPPORTS_SMP
Andrew Isaacsonf137e462005-10-19 23:56:38 -070059
60config SIBYTE_BCM1x55
61 bool
Ralf Baechle217dd112007-11-01 01:57:55 +000062 select CEVT_BCM1480
63 select CSRC_BCM1480
Andrew Isaacsonf137e462005-10-19 23:56:38 -070064 select HW_HAS_PCI
Ralf Baechle7bcf7712007-10-11 23:46:09 +010065 select IRQ_CPU
Andrew Isaacsonf137e462005-10-19 23:56:38 -070066 select SIBYTE_SB1xxx_SOC
Ralf Baechlebb9b8132007-03-09 15:59:56 +000067 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechlee73ea272006-06-04 11:51:46 +010068 select SYS_SUPPORTS_SMP
Andrew Isaacsonf137e462005-10-19 23:56:38 -070069
Ralf Baechle38b18f722005-02-03 14:28:23 +000070config SIBYTE_SB1xxx_SOC
71 bool
Ralf Baechle38b18f722005-02-03 14:28:23 +000072 select DMA_COHERENT
Ralf Baechle7bcf7712007-10-11 23:46:09 +010073 select IRQ_CPU
Ralf Baechle38b18f722005-02-03 14:28:23 +000074 select SWAP_IO_SPACE
75 select SYS_SUPPORTS_32BIT_KERNEL
76 select SYS_SUPPORTS_64BIT_KERNEL
Ralf Baechle0e2794b2012-11-15 20:48:50 +010077 select FW_CFE
Imre Kaloz05f94ee2009-06-02 14:22:06 +020078 select SYS_HAS_EARLY_PRINTK
Ralf Baechle38b18f722005-02-03 14:28:23 +000079
80choice
81 prompt "SiByte SOC Stepping"
82 depends on SIBYTE_SB1xxx_SOC
83
84config CPU_SB1_PASS_1
85 bool "1250 Pass1"
86 depends on SIBYTE_SB1250
87 select CPU_HAS_PREFETCH
88
89config CPU_SB1_PASS_2_1250
90 bool "1250 An"
91 depends on SIBYTE_SB1250
92 select CPU_SB1_PASS_2
93 help
94 Also called BCM1250 Pass 2
95
96config CPU_SB1_PASS_2_2
97 bool "1250 Bn"
98 depends on SIBYTE_SB1250
99 select CPU_HAS_PREFETCH
100 help
101 Also called BCM1250 Pass 2.2
102
103config CPU_SB1_PASS_4
104 bool "1250 Cn"
105 depends on SIBYTE_SB1250
106 select CPU_HAS_PREFETCH
107 help
108 Also called BCM1250 Pass 3
109
110config CPU_SB1_PASS_2_112x
111 bool "112x Hybrid"
112 depends on SIBYTE_BCM112X
113 select CPU_SB1_PASS_2
114
115config CPU_SB1_PASS_3
116 bool "112x An"
117 depends on SIBYTE_BCM112X
118 select CPU_HAS_PREFETCH
119
120endchoice
121
122config CPU_SB1_PASS_2
123 bool
124
125config SIBYTE_HAS_LDT
126 bool
Ralf Baechleca6f5492007-03-09 12:17:32 +0000127
128config SIBYTE_ENABLE_LDT_IF_PCI
129 bool
130 select SIBYTE_HAS_LDT if PCI
Ralf Baechle38b18f722005-02-03 14:28:23 +0000131
Ralf Baechle77607632005-11-10 16:32:14 +0000132config SB1_CEX_ALWAYS_FATAL
Andrew Isaacsona4b5bd92005-10-19 23:57:40 -0700133 bool "All cache exceptions considered fatal (no recovery attempted)"
134 depends on SIBYTE_SB1xxx_SOC
135
Ralf Baechle77607632005-11-10 16:32:14 +0000136config SB1_CERR_STALL
Andrew Isaacsona4b5bd92005-10-19 23:57:40 -0700137 bool "Stall (rather than panic) on fatal cache error"
138 depends on SIBYTE_SB1xxx_SOC
139
Ralf Baechle38b18f722005-02-03 14:28:23 +0000140config SIBYTE_CFE_CONSOLE
141 bool "Use firmware console"
Imre Kaloz05f94ee2009-06-02 14:22:06 +0200142 depends on SIBYTE_SB1xxx_SOC
Ralf Baechle38b18f722005-02-03 14:28:23 +0000143 help
144 Use the CFE API's console write routines during boot. Other console
145 options (VT console, sb1250 duart console, etc.) should not be
146 configured.
147
Ralf Baechle38b18f722005-02-03 14:28:23 +0000148config SIBYTE_BUS_WATCHER
149 bool "Support for Bus Watcher statistics"
Markos Chandras6793f552013-06-17 13:00:38 +0000150 depends on SIBYTE_SB1xxx_SOC && \
151 (SIBYTE_BCM112X || SIBYTE_SB1250)
Ralf Baechle38b18f722005-02-03 14:28:23 +0000152 help
153 Handle and keep statistics on the bus error interrupts (COR_ECC,
154 BAD_ECC, IO_BUS).
155
156config SIBYTE_BW_TRACE
157 bool "Capture bus trace before bus error"
158 depends on SIBYTE_BUS_WATCHER
159 help
160 Run a continuous bus trace, dumping the raw data as soon as
161 a ZBbus error is detected. Cannot work if ZBbus profiling
162 is turned on, and also will interfere with JTAG-based trace
163 buffer activity. Raw buffer data is dumped to console, and
164 must be processed off-line.
165
Ralf Baechle38b18f722005-02-03 14:28:23 +0000166config SIBYTE_TBPROF
Ralf Baechlebb9b8132007-03-09 15:59:56 +0000167 tristate "Support for ZBbus profiling"
168 depends on SIBYTE_HAS_ZBUS_PROFILING
169
170config SIBYTE_HAS_ZBUS_PROFILING
171 bool