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Misael Lopez Cruzf19b2822011-04-27 02:14:07 -05001/*
2 * MFD driver for TWL6040 audio device
3 *
4 * Authors: Misael Lopez Cruz <misael.lopez@ti.com>
5 * Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
6 * Peter Ujfalusi <peter.ujfalusi@ti.com>
7 *
8 * Copyright: (C) 2011 Texas Instruments, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * 02110-1301 USA
23 *
24 */
25
26#include <linux/module.h>
27#include <linux/types.h>
28#include <linux/slab.h>
29#include <linux/kernel.h>
Peter Ujfalusi5af7df62012-05-02 16:54:42 +030030#include <linux/err.h>
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -050031#include <linux/platform_device.h>
Peter Ujfalusi37e13ce2012-05-16 14:11:58 +030032#include <linux/of.h>
33#include <linux/of_irq.h>
34#include <linux/of_gpio.h>
35#include <linux/of_platform.h>
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -050036#include <linux/gpio.h>
37#include <linux/delay.h>
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +030038#include <linux/i2c.h>
39#include <linux/regmap.h>
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -050040#include <linux/mfd/core.h>
41#include <linux/mfd/twl6040.h>
Peter Ujfalusi5af7df62012-05-02 16:54:42 +030042#include <linux/regulator/consumer.h>
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -050043
Peter Ujfalusi31b402e2011-10-12 11:57:54 +030044#define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)
Peter Ujfalusi5af7df62012-05-02 16:54:42 +030045#define TWL6040_NUM_SUPPLIES (2)
Peter Ujfalusi31b402e2011-10-12 11:57:54 +030046
Krzysztof Kozlowskide1e23f2015-01-05 10:01:33 +010047static const struct reg_default twl6040_defaults[] = {
Peter Ujfalusic7f91292013-11-29 16:03:45 +020048 { 0x01, 0x4B }, /* REG_ASICID (ro) */
49 { 0x02, 0x00 }, /* REG_ASICREV (ro) */
50 { 0x03, 0x00 }, /* REG_INTID */
51 { 0x04, 0x00 }, /* REG_INTMR */
52 { 0x05, 0x00 }, /* REG_NCPCTRL */
53 { 0x06, 0x00 }, /* REG_LDOCTL */
54 { 0x07, 0x60 }, /* REG_HPPLLCTL */
55 { 0x08, 0x00 }, /* REG_LPPLLCTL */
56 { 0x09, 0x4A }, /* REG_LPPLLDIV */
57 { 0x0A, 0x00 }, /* REG_AMICBCTL */
58 { 0x0B, 0x00 }, /* REG_DMICBCTL */
59 { 0x0C, 0x00 }, /* REG_MICLCTL */
60 { 0x0D, 0x00 }, /* REG_MICRCTL */
61 { 0x0E, 0x00 }, /* REG_MICGAIN */
62 { 0x0F, 0x1B }, /* REG_LINEGAIN */
63 { 0x10, 0x00 }, /* REG_HSLCTL */
64 { 0x11, 0x00 }, /* REG_HSRCTL */
65 { 0x12, 0x00 }, /* REG_HSGAIN */
66 { 0x13, 0x00 }, /* REG_EARCTL */
67 { 0x14, 0x00 }, /* REG_HFLCTL */
68 { 0x15, 0x00 }, /* REG_HFLGAIN */
69 { 0x16, 0x00 }, /* REG_HFRCTL */
70 { 0x17, 0x00 }, /* REG_HFRGAIN */
71 { 0x18, 0x00 }, /* REG_VIBCTLL */
72 { 0x19, 0x00 }, /* REG_VIBDATL */
73 { 0x1A, 0x00 }, /* REG_VIBCTLR */
74 { 0x1B, 0x00 }, /* REG_VIBDATR */
75 { 0x1C, 0x00 }, /* REG_HKCTL1 */
76 { 0x1D, 0x00 }, /* REG_HKCTL2 */
77 { 0x1E, 0x00 }, /* REG_GPOCTL */
78 { 0x1F, 0x00 }, /* REG_ALB */
79 { 0x20, 0x00 }, /* REG_DLB */
80 /* 0x28, REG_TRIM1 */
81 /* 0x29, REG_TRIM2 */
82 /* 0x2A, REG_TRIM3 */
83 /* 0x2B, REG_HSOTRIM */
84 /* 0x2C, REG_HFOTRIM */
85 { 0x2D, 0x08 }, /* REG_ACCCTL */
86 { 0x2E, 0x00 }, /* REG_STATUS (ro) */
87};
88
Nariman Poushin8019ff62015-07-16 16:36:21 +010089static struct reg_sequence twl6040_patch[] = {
Peter Ujfalusi11e38e12014-04-01 16:44:59 +030090 /*
91 * Select I2C bus access to dual access registers
92 * Interrupt register is cleared on read
93 * Select fast mode for i2c (400KHz)
94 */
95 { TWL6040_REG_ACCCTL,
96 TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) },
Peter Ujfalusic7f91292013-11-29 16:03:45 +020097};
98
99
Peter Ujfalusidf04b622013-07-12 13:32:02 +0200100static bool twl6040_has_vibra(struct device_node *node)
Samuel Ortizca2cad62012-05-23 16:23:21 +0200101{
Samuel Ortizca2cad62012-05-23 16:23:21 +0200102#ifdef CONFIG_OF
103 if (of_find_node_by_name(node, "vibra"))
104 return true;
105#endif
Samuel Ortizca2cad62012-05-23 16:23:21 +0200106 return false;
107}
108
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500109int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg)
110{
111 int ret;
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300112 unsigned int val;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500113
Mark Brownc6f39252013-08-31 17:48:19 +0100114 ret = regmap_read(twl6040->regmap, reg, &val);
115 if (ret < 0)
116 return ret;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500117
118 return val;
119}
120EXPORT_SYMBOL(twl6040_reg_read);
121
122int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val)
123{
124 int ret;
125
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300126 ret = regmap_write(twl6040->regmap, reg, val);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500127
128 return ret;
129}
130EXPORT_SYMBOL(twl6040_reg_write);
131
132int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
133{
Axel Linc6000402012-07-11 10:06:34 +0800134 return regmap_update_bits(twl6040->regmap, reg, mask, mask);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500135}
136EXPORT_SYMBOL(twl6040_set_bits);
137
138int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
139{
Axel Linc6000402012-07-11 10:06:34 +0800140 return regmap_update_bits(twl6040->regmap, reg, mask, 0);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500141}
142EXPORT_SYMBOL(twl6040_clear_bits);
143
144/* twl6040 codec manual power-up sequence */
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200145static int twl6040_power_up_manual(struct twl6040 *twl6040)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500146{
147 u8 ldoctl, ncpctl, lppllctl;
148 int ret;
149
150 /* enable high-side LDO, reference system and internal oscillator */
151 ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA;
152 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
153 if (ret)
154 return ret;
155 usleep_range(10000, 10500);
156
157 /* enable negative charge pump */
158 ncpctl = TWL6040_NCPENA;
159 ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
160 if (ret)
161 goto ncp_err;
162 usleep_range(1000, 1500);
163
164 /* enable low-side LDO */
165 ldoctl |= TWL6040_LSLDOENA;
166 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
167 if (ret)
168 goto lsldo_err;
169 usleep_range(1000, 1500);
170
171 /* enable low-power PLL */
172 lppllctl = TWL6040_LPLLENA;
173 ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
174 if (ret)
175 goto lppll_err;
176 usleep_range(5000, 5500);
177
178 /* disable internal oscillator */
179 ldoctl &= ~TWL6040_OSCENA;
180 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
181 if (ret)
182 goto osc_err;
183
184 return 0;
185
186osc_err:
187 lppllctl &= ~TWL6040_LPLLENA;
188 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
189lppll_err:
190 ldoctl &= ~TWL6040_LSLDOENA;
191 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
192lsldo_err:
193 ncpctl &= ~TWL6040_NCPENA;
194 twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
195ncp_err:
196 ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
197 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
198
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200199 dev_err(twl6040->dev, "manual power-up failed\n");
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500200 return ret;
201}
202
203/* twl6040 manual power-down sequence */
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200204static void twl6040_power_down_manual(struct twl6040 *twl6040)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500205{
206 u8 ncpctl, ldoctl, lppllctl;
207
208 ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL);
209 ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL);
210 lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
211
212 /* enable internal oscillator */
213 ldoctl |= TWL6040_OSCENA;
214 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
215 usleep_range(1000, 1500);
216
217 /* disable low-power PLL */
218 lppllctl &= ~TWL6040_LPLLENA;
219 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
220
221 /* disable low-side LDO */
222 ldoctl &= ~TWL6040_LSLDOENA;
223 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
224
225 /* disable negative charge pump */
226 ncpctl &= ~TWL6040_NCPENA;
227 twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
228
229 /* disable high-side LDO, reference system and internal oscillator */
230 ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
231 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
232}
233
Peter Ujfalusi1ac96262012-10-11 13:55:31 +0200234static irqreturn_t twl6040_readyint_handler(int irq, void *data)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500235{
236 struct twl6040 *twl6040 = data;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500237
Peter Ujfalusi1ac96262012-10-11 13:55:31 +0200238 complete(&twl6040->ready);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500239
Peter Ujfalusi1ac96262012-10-11 13:55:31 +0200240 return IRQ_HANDLED;
241}
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500242
Peter Ujfalusi1ac96262012-10-11 13:55:31 +0200243static irqreturn_t twl6040_thint_handler(int irq, void *data)
244{
245 struct twl6040 *twl6040 = data;
246 u8 status;
247
248 status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
249 if (status & TWL6040_TSHUTDET) {
250 dev_warn(twl6040->dev, "Thermal shutdown, powering-off");
251 twl6040_power(twl6040, 0);
252 } else {
253 dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on");
254 twl6040_power(twl6040, 1);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500255 }
256
257 return IRQ_HANDLED;
258}
259
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200260static int twl6040_power_up_automatic(struct twl6040 *twl6040)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500261{
262 int time_left;
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200263
264 gpio_set_value(twl6040->audpwron, 1);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500265
266 time_left = wait_for_completion_timeout(&twl6040->ready,
267 msecs_to_jiffies(144));
268 if (!time_left) {
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200269 u8 intid;
270
271 dev_warn(twl6040->dev, "timeout waiting for READYINT\n");
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500272 intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
273 if (!(intid & TWL6040_READYINT)) {
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200274 dev_err(twl6040->dev, "automatic power-up failed\n");
275 gpio_set_value(twl6040->audpwron, 0);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500276 return -ETIMEDOUT;
277 }
278 }
279
280 return 0;
281}
282
283int twl6040_power(struct twl6040 *twl6040, int on)
284{
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500285 int ret = 0;
286
287 mutex_lock(&twl6040->mutex);
288
289 if (on) {
290 /* already powered-up */
291 if (twl6040->power_count++)
292 goto out;
293
Javier Martinez Canillas32852bc2016-04-20 11:16:38 -0400294 ret = clk_prepare_enable(twl6040->clk32k);
295 if (ret) {
296 twl6040->power_count = 0;
297 goto out;
298 }
Peter Ujfalusi68bab862014-04-03 13:54:41 +0300299
Peter Ujfalusic7f91292013-11-29 16:03:45 +0200300 /* Allow writes to the chip */
301 regcache_cache_only(twl6040->regmap, false);
302
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200303 if (gpio_is_valid(twl6040->audpwron)) {
304 /* use automatic power-up sequence */
305 ret = twl6040_power_up_automatic(twl6040);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500306 if (ret) {
Javier Martinez Canillasd6441dc2016-04-20 11:16:37 -0400307 clk_disable_unprepare(twl6040->clk32k);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500308 twl6040->power_count = 0;
309 goto out;
310 }
311 } else {
312 /* use manual power-up sequence */
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200313 ret = twl6040_power_up_manual(twl6040);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500314 if (ret) {
Javier Martinez Canillasd6441dc2016-04-20 11:16:37 -0400315 clk_disable_unprepare(twl6040->clk32k);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500316 twl6040->power_count = 0;
317 goto out;
318 }
319 }
Peter Ujfalusic7f91292013-11-29 16:03:45 +0200320
321 /* Sync with the HW */
322 regcache_sync(twl6040->regmap);
323
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300324 /* Default PLL configuration after power up */
325 twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL;
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300326 twl6040->sysclk_rate = 19200000;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500327 } else {
328 /* already powered-down */
329 if (!twl6040->power_count) {
Peter Ujfalusi2d7c9572011-09-15 15:39:23 +0300330 dev_err(twl6040->dev,
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500331 "device is already powered-off\n");
332 ret = -EPERM;
333 goto out;
334 }
335
336 if (--twl6040->power_count)
337 goto out;
338
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200339 if (gpio_is_valid(twl6040->audpwron)) {
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500340 /* use AUDPWRON line */
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200341 gpio_set_value(twl6040->audpwron, 0);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500342
343 /* power-down sequence latency */
344 usleep_range(500, 700);
345 } else {
346 /* use manual power-down sequence */
Peter Ujfalusif9be1342012-10-11 13:55:30 +0200347 twl6040_power_down_manual(twl6040);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500348 }
Peter Ujfalusic7f91292013-11-29 16:03:45 +0200349
350 /* Set regmap to cache only and mark it as dirty */
351 regcache_cache_only(twl6040->regmap, true);
352 regcache_mark_dirty(twl6040->regmap);
353
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300354 twl6040->sysclk_rate = 0;
355
356 if (twl6040->pll == TWL6040_SYSCLK_SEL_HPPLL) {
357 clk_disable_unprepare(twl6040->mclk);
358 twl6040->mclk_rate = 0;
359 }
Peter Ujfalusi68bab862014-04-03 13:54:41 +0300360
361 clk_disable_unprepare(twl6040->clk32k);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500362 }
363
364out:
365 mutex_unlock(&twl6040->mutex);
366 return ret;
367}
368EXPORT_SYMBOL(twl6040_power);
369
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300370int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500371 unsigned int freq_in, unsigned int freq_out)
372{
373 u8 hppllctl, lppllctl;
374 int ret = 0;
375
376 mutex_lock(&twl6040->mutex);
377
378 hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL);
379 lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
380
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100381 /* Force full reconfiguration when switching between PLL */
382 if (pll_id != twl6040->pll) {
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300383 twl6040->sysclk_rate = 0;
384 twl6040->mclk_rate = 0;
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100385 }
386
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300387 switch (pll_id) {
388 case TWL6040_SYSCLK_SEL_LPPLL:
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500389 /* low-power PLL divider */
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100390 /* Change the sysclk configuration only if it has been canged */
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300391 if (twl6040->sysclk_rate != freq_out) {
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100392 switch (freq_out) {
393 case 17640000:
394 lppllctl |= TWL6040_LPLLFIN;
395 break;
396 case 19200000:
397 lppllctl &= ~TWL6040_LPLLFIN;
398 break;
399 default:
400 dev_err(twl6040->dev,
401 "freq_out %d not supported\n",
402 freq_out);
403 ret = -EINVAL;
404 goto pll_out;
405 }
406 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
407 lppllctl);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500408 }
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100409
410 /* The PLL in use has not been change, we can exit */
411 if (twl6040->pll == pll_id)
412 break;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500413
414 switch (freq_in) {
415 case 32768:
416 lppllctl |= TWL6040_LPLLENA;
417 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
418 lppllctl);
419 mdelay(5);
420 lppllctl &= ~TWL6040_HPLLSEL;
421 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
422 lppllctl);
423 hppllctl &= ~TWL6040_HPLLENA;
424 twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
425 hppllctl);
426 break;
427 default:
Peter Ujfalusi2d7c9572011-09-15 15:39:23 +0300428 dev_err(twl6040->dev,
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500429 "freq_in %d not supported\n", freq_in);
430 ret = -EINVAL;
431 goto pll_out;
432 }
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300433
434 clk_disable_unprepare(twl6040->mclk);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500435 break;
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300436 case TWL6040_SYSCLK_SEL_HPPLL:
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500437 /* high-performance PLL can provide only 19.2 MHz */
438 if (freq_out != 19200000) {
Peter Ujfalusi2d7c9572011-09-15 15:39:23 +0300439 dev_err(twl6040->dev,
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500440 "freq_out %d not supported\n", freq_out);
441 ret = -EINVAL;
442 goto pll_out;
443 }
444
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300445 if (twl6040->mclk_rate != freq_in) {
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100446 hppllctl &= ~TWL6040_MCLK_MSK;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500447
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100448 switch (freq_in) {
449 case 12000000:
450 /* PLL enabled, active mode */
451 hppllctl |= TWL6040_MCLK_12000KHZ |
452 TWL6040_HPLLENA;
453 break;
454 case 19200000:
Peter Ujfalusiac8320c2014-05-06 11:46:10 +0300455 /* PLL enabled, bypass mode */
456 hppllctl |= TWL6040_MCLK_19200KHZ |
457 TWL6040_HPLLBP | TWL6040_HPLLENA;
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100458 break;
459 case 26000000:
460 /* PLL enabled, active mode */
461 hppllctl |= TWL6040_MCLK_26000KHZ |
462 TWL6040_HPLLENA;
463 break;
464 case 38400000:
Peter Ujfalusiac8320c2014-05-06 11:46:10 +0300465 /* PLL enabled, bypass mode */
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100466 hppllctl |= TWL6040_MCLK_38400KHZ |
Peter Ujfalusiac8320c2014-05-06 11:46:10 +0300467 TWL6040_HPLLBP | TWL6040_HPLLENA;
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100468 break;
469 default:
470 dev_err(twl6040->dev,
471 "freq_in %d not supported\n", freq_in);
472 ret = -EINVAL;
473 goto pll_out;
474 }
475
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300476 /* When switching to HPPLL, enable the mclk first */
477 if (pll_id != twl6040->pll)
478 clk_prepare_enable(twl6040->mclk);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500479 /*
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100480 * enable clock slicer to ensure input waveform is
481 * square
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500482 */
Peter Ujfalusi2bd05db2012-01-14 20:58:44 +0100483 hppllctl |= TWL6040_HPLLSQRENA;
484
485 twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
486 hppllctl);
487 usleep_range(500, 700);
488 lppllctl |= TWL6040_HPLLSEL;
489 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
490 lppllctl);
491 lppllctl &= ~TWL6040_LPLLENA;
492 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
493 lppllctl);
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300494
495 twl6040->mclk_rate = freq_in;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500496 }
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500497 break;
498 default:
Peter Ujfalusi2d7c9572011-09-15 15:39:23 +0300499 dev_err(twl6040->dev, "unknown pll id %d\n", pll_id);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500500 ret = -EINVAL;
501 goto pll_out;
502 }
503
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300504 twl6040->sysclk_rate = freq_out;
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300505 twl6040->pll = pll_id;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500506
507pll_out:
508 mutex_unlock(&twl6040->mutex);
509 return ret;
510}
511EXPORT_SYMBOL(twl6040_set_pll);
512
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300513int twl6040_get_pll(struct twl6040 *twl6040)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500514{
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300515 if (twl6040->power_count)
516 return twl6040->pll;
517 else
518 return -ENODEV;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500519}
520EXPORT_SYMBOL(twl6040_get_pll);
521
522unsigned int twl6040_get_sysclk(struct twl6040 *twl6040)
523{
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300524 return twl6040->sysclk_rate;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500525}
526EXPORT_SYMBOL(twl6040_get_sysclk);
527
Peter Ujfalusi70601ec2011-10-12 11:57:55 +0300528/* Get the combined status of the vibra control register */
529int twl6040_get_vibralr_status(struct twl6040 *twl6040)
530{
Mark Brownc6f39252013-08-31 17:48:19 +0100531 unsigned int reg;
532 int ret;
Peter Ujfalusi70601ec2011-10-12 11:57:55 +0300533 u8 status;
534
Mark Brownc6f39252013-08-31 17:48:19 +0100535 ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLL, &reg);
536 if (ret != 0)
537 return ret;
538 status = reg;
539
540 ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLR, &reg);
541 if (ret != 0)
542 return ret;
543 status |= reg;
544
Peter Ujfalusi70601ec2011-10-12 11:57:55 +0300545 status &= (TWL6040_VIBENA | TWL6040_VIBSEL);
546
547 return status;
548}
549EXPORT_SYMBOL(twl6040_get_vibralr_status);
550
Peter Ujfalusi0f962ae2011-07-05 11:40:33 +0300551static struct resource twl6040_vibra_rsrc[] = {
552 {
553 .flags = IORESOURCE_IRQ,
554 },
555};
556
557static struct resource twl6040_codec_rsrc[] = {
558 {
559 .flags = IORESOURCE_IRQ,
560 },
561};
562
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300563static bool twl6040_readable_reg(struct device *dev, unsigned int reg)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500564{
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300565 /* Register 0 is not readable */
566 if (!reg)
567 return false;
568 return true;
569}
570
Mark Brownc6f39252013-08-31 17:48:19 +0100571static bool twl6040_volatile_reg(struct device *dev, unsigned int reg)
572{
573 switch (reg) {
Peter Ujfalusic7f91292013-11-29 16:03:45 +0200574 case TWL6040_REG_ASICID:
575 case TWL6040_REG_ASICREV:
576 case TWL6040_REG_INTID:
577 case TWL6040_REG_LPPLLCTL:
578 case TWL6040_REG_HPPLLCTL:
579 case TWL6040_REG_STATUS:
580 return true;
581 default:
582 return false;
583 }
584}
585
586static bool twl6040_writeable_reg(struct device *dev, unsigned int reg)
587{
588 switch (reg) {
589 case TWL6040_REG_ASICID:
590 case TWL6040_REG_ASICREV:
591 case TWL6040_REG_STATUS:
Mark Brownc6f39252013-08-31 17:48:19 +0100592 return false;
593 default:
594 return true;
595 }
596}
597
Krzysztof Kozlowskide1e23f2015-01-05 10:01:33 +0100598static const struct regmap_config twl6040_regmap_config = {
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300599 .reg_bits = 8,
600 .val_bits = 8,
Peter Ujfalusic7f91292013-11-29 16:03:45 +0200601
602 .reg_defaults = twl6040_defaults,
603 .num_reg_defaults = ARRAY_SIZE(twl6040_defaults),
604
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300605 .max_register = TWL6040_REG_STATUS, /* 0x2e */
606
607 .readable_reg = twl6040_readable_reg,
Mark Brownc6f39252013-08-31 17:48:19 +0100608 .volatile_reg = twl6040_volatile_reg,
Peter Ujfalusic7f91292013-11-29 16:03:45 +0200609 .writeable_reg = twl6040_writeable_reg,
Mark Brownc6f39252013-08-31 17:48:19 +0100610
611 .cache_type = REGCACHE_RBTREE,
Peter Ujfalusic78cb172016-08-31 14:46:20 +0300612 .use_single_rw = true,
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300613};
614
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200615static const struct regmap_irq twl6040_irqs[] = {
616 { .reg_offset = 0, .mask = TWL6040_THINT, },
617 { .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, },
618 { .reg_offset = 0, .mask = TWL6040_HOOKINT, },
619 { .reg_offset = 0, .mask = TWL6040_HFINT, },
620 { .reg_offset = 0, .mask = TWL6040_VIBINT, },
621 { .reg_offset = 0, .mask = TWL6040_READYINT, },
622};
623
624static struct regmap_irq_chip twl6040_irq_chip = {
625 .name = "twl6040",
626 .irqs = twl6040_irqs,
627 .num_irqs = ARRAY_SIZE(twl6040_irqs),
628
629 .num_regs = 1,
630 .status_base = TWL6040_REG_INTID,
631 .mask_base = TWL6040_REG_INTMR,
632};
633
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800634static int twl6040_probe(struct i2c_client *client,
635 const struct i2c_device_id *id)
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300636{
Peter Ujfalusi37e13ce2012-05-16 14:11:58 +0300637 struct device_node *node = client->dev.of_node;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500638 struct twl6040 *twl6040;
639 struct mfd_cell *cell = NULL;
Peter Ujfalusi1f01d602012-05-16 14:11:57 +0300640 int irq, ret, children = 0;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500641
Peter Ujfalusidf04b622013-07-12 13:32:02 +0200642 if (!node) {
643 dev_err(&client->dev, "of node is missing\n");
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500644 return -EINVAL;
645 }
646
Peter Ujfalusid20e1d22011-07-04 20:15:19 +0300647 /* In order to operate correctly we need valid interrupt config */
Peter Ujfalusi67124192012-05-16 14:11:56 +0300648 if (!client->irq) {
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300649 dev_err(&client->dev, "Invalid IRQ configuration\n");
Peter Ujfalusid20e1d22011-07-04 20:15:19 +0300650 return -EINVAL;
651 }
652
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300653 twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040),
654 GFP_KERNEL);
Peter Ujfalusiecc8fa12013-07-12 13:32:04 +0200655 if (!twl6040)
656 return -ENOMEM;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500657
Axel Linbbf6adc2012-04-25 10:09:46 +0800658 twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config);
Peter Ujfalusiecc8fa12013-07-12 13:32:04 +0200659 if (IS_ERR(twl6040->regmap))
660 return PTR_ERR(twl6040->regmap);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500661
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300662 i2c_set_clientdata(client, twl6040);
663
Peter Ujfalusi68bab862014-04-03 13:54:41 +0300664 twl6040->clk32k = devm_clk_get(&client->dev, "clk32k");
665 if (IS_ERR(twl6040->clk32k)) {
Tony Lindgren75c08f12015-09-18 09:29:04 -0700666 if (PTR_ERR(twl6040->clk32k) == -EPROBE_DEFER)
667 return -EPROBE_DEFER;
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300668 dev_dbg(&client->dev, "clk32k is not handled\n");
Peter Ujfalusi68bab862014-04-03 13:54:41 +0300669 twl6040->clk32k = NULL;
670 }
671
Peter Ujfalusi0a58da12016-06-20 17:07:18 +0300672 twl6040->mclk = devm_clk_get(&client->dev, "mclk");
673 if (IS_ERR(twl6040->mclk)) {
674 if (PTR_ERR(twl6040->mclk) == -EPROBE_DEFER)
675 return -EPROBE_DEFER;
676 dev_dbg(&client->dev, "mclk is not handled\n");
677 twl6040->mclk = NULL;
678 }
679
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300680 twl6040->supplies[0].supply = "vio";
681 twl6040->supplies[1].supply = "v2v1";
Jingoo Han990810b2013-02-20 18:30:21 +0900682 ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES,
Peter Ujfalusi37aefe92013-07-12 13:32:03 +0200683 twl6040->supplies);
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300684 if (ret != 0) {
685 dev_err(&client->dev, "Failed to get supplies: %d\n", ret);
Wolfram Sang501d6092013-10-13 18:06:12 +0200686 return ret;
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300687 }
688
689 ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
690 if (ret != 0) {
691 dev_err(&client->dev, "Failed to enable supplies: %d\n", ret);
Wolfram Sang501d6092013-10-13 18:06:12 +0200692 return ret;
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300693 }
694
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300695 twl6040->dev = &client->dev;
696 twl6040->irq = client->irq;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500697
698 mutex_init(&twl6040->mutex);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500699 init_completion(&twl6040->ready);
700
Peter Ujfalusi006cea32014-04-01 16:45:00 +0300701 regmap_register_patch(twl6040->regmap, twl6040_patch,
702 ARRAY_SIZE(twl6040_patch));
703
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500704 twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV);
Florian Vaussard89d68992014-02-25 14:28:19 +0100705 if (twl6040->rev < 0) {
706 dev_err(&client->dev, "Failed to read revision register: %d\n",
707 twl6040->rev);
Julia Lawallf2b86782014-08-06 22:12:15 +0200708 ret = twl6040->rev;
Florian Vaussard89d68992014-02-25 14:28:19 +0100709 goto gpio_err;
710 }
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500711
Peter Ujfalusi77f63e02011-09-15 15:39:26 +0300712 /* ERRATA: Automatic power-up is not possible in ES1.0 */
Peter Ujfalusidf04b622013-07-12 13:32:02 +0200713 if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0)
714 twl6040->audpwron = of_get_named_gpio(node,
715 "ti,audpwron-gpio", 0);
716 else
Peter Ujfalusi77f63e02011-09-15 15:39:26 +0300717 twl6040->audpwron = -EINVAL;
718
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500719 if (gpio_is_valid(twl6040->audpwron)) {
Jingoo Han990810b2013-02-20 18:30:21 +0900720 ret = devm_gpio_request_one(&client->dev, twl6040->audpwron,
Peter Ujfalusi37aefe92013-07-12 13:32:03 +0200721 GPIOF_OUT_INIT_LOW, "audpwron");
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500722 if (ret)
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300723 goto gpio_err;
Peter Ujfalusi02d02722014-04-01 16:45:01 +0300724
725 /* Clear any pending interrupt */
726 twl6040_reg_read(twl6040, TWL6040_REG_INTID);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500727 }
728
Peter Ujfalusi37aefe92013-07-12 13:32:03 +0200729 ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq, IRQF_ONESHOT,
Lee Jonesc06f3082014-07-21 13:13:48 +0100730 0, &twl6040_irq_chip, &twl6040->irq_data);
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200731 if (ret < 0)
Jingoo Han990810b2013-02-20 18:30:21 +0900732 goto gpio_err;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500733
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200734 twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data,
Peter Ujfalusi37aefe92013-07-12 13:32:03 +0200735 TWL6040_IRQ_READY);
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200736 twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data,
Peter Ujfalusi37aefe92013-07-12 13:32:03 +0200737 TWL6040_IRQ_TH);
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200738
Jingoo Han990810b2013-02-20 18:30:21 +0900739 ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL,
Peter Ujfalusi37aefe92013-07-12 13:32:03 +0200740 twl6040_readyint_handler, IRQF_ONESHOT,
741 "twl6040_irq_ready", twl6040);
Peter Ujfalusid20e1d22011-07-04 20:15:19 +0300742 if (ret) {
Peter Ujfalusi1ac96262012-10-11 13:55:31 +0200743 dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret);
744 goto readyirq_err;
745 }
746
Jingoo Han990810b2013-02-20 18:30:21 +0900747 ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL,
Peter Ujfalusi37aefe92013-07-12 13:32:03 +0200748 twl6040_thint_handler, IRQF_ONESHOT,
749 "twl6040_irq_th", twl6040);
Peter Ujfalusi1ac96262012-10-11 13:55:31 +0200750 if (ret) {
751 dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret);
Wei Yongjunfc5ee962013-09-25 15:37:15 +0800752 goto readyirq_err;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500753 }
754
Peter Ujfalusi1f01d602012-05-16 14:11:57 +0300755 /*
756 * The main functionality of twl6040 to provide audio on OMAP4+ systems.
757 * We can add the ASoC codec child whenever this driver has been loaded.
Peter Ujfalusi1f01d602012-05-16 14:11:57 +0300758 */
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200759 irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG);
Peter Ujfalusi1f01d602012-05-16 14:11:57 +0300760 cell = &twl6040->cells[children];
761 cell->name = "twl6040-codec";
762 twl6040_codec_rsrc[0].start = irq;
763 twl6040_codec_rsrc[0].end = irq;
764 cell->resources = twl6040_codec_rsrc;
765 cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc);
Peter Ujfalusi1f01d602012-05-16 14:11:57 +0300766 children++;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500767
Peter Ujfalusidf04b622013-07-12 13:32:02 +0200768 /* Vibra input driver support */
769 if (twl6040_has_vibra(node)) {
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200770 irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB);
Peter Ujfalusi0f962ae2011-07-05 11:40:33 +0300771
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500772 cell = &twl6040->cells[children];
773 cell->name = "twl6040-vibra";
Peter Ujfalusi0f962ae2011-07-05 11:40:33 +0300774 twl6040_vibra_rsrc[0].start = irq;
775 twl6040_vibra_rsrc[0].end = irq;
776 cell->resources = twl6040_vibra_rsrc;
777 cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500778 children++;
779 }
780
Peter Ujfalusidf04b622013-07-12 13:32:02 +0200781 /* GPO support */
782 cell = &twl6040->cells[children];
783 cell->name = "twl6040-gpo";
784 children++;
Peter Ujfalusi5cbe7862012-08-16 15:13:14 +0300785
Peter Ujfalusi0133d322016-08-31 14:46:21 +0300786 /* PDM clock support */
787 cell = &twl6040->cells[children];
788 cell->name = "twl6040-pdmclk";
789 children++;
790
Peter Ujfalusic7f91292013-11-29 16:03:45 +0200791 /* The chip is powered down so mark regmap to cache only and dirty */
792 regcache_cache_only(twl6040->regmap, true);
793 regcache_mark_dirty(twl6040->regmap);
794
Peter Ujfalusi1f01d602012-05-16 14:11:57 +0300795 ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children,
Mark Brown55692af2012-09-11 15:16:36 +0800796 NULL, 0, NULL);
Peter Ujfalusi1f01d602012-05-16 14:11:57 +0300797 if (ret)
Wei Yongjunfc5ee962013-09-25 15:37:15 +0800798 goto readyirq_err;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500799
800 return 0;
801
Peter Ujfalusi1ac96262012-10-11 13:55:31 +0200802readyirq_err:
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200803 regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300804gpio_err:
805 regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500806 return ret;
807}
808
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800809static int twl6040_remove(struct i2c_client *client)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500810{
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300811 struct twl6040 *twl6040 = i2c_get_clientdata(client);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500812
813 if (twl6040->power_count)
814 twl6040_power(twl6040, 0);
815
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200816 regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500817
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300818 mfd_remove_devices(&client->dev);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500819
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300820 regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300821
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500822 return 0;
823}
824
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300825static const struct i2c_device_id twl6040_i2c_id[] = {
826 { "twl6040", 0, },
Peter Ujfalusi1fc74ae2012-07-16 11:49:44 +0200827 { "twl6041", 0, },
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300828 { },
829};
830MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id);
831
832static struct i2c_driver twl6040_driver = {
833 .driver = {
834 .name = "twl6040",
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300835 },
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500836 .probe = twl6040_probe,
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800837 .remove = twl6040_remove,
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300838 .id_table = twl6040_i2c_id,
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500839};
840
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300841module_i2c_driver(twl6040_driver);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500842
843MODULE_DESCRIPTION("TWL6040 MFD");
844MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
845MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
846MODULE_LICENSE("GPL");