Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * sata_promise.c - Promise SATA |
| 3 | * |
| 4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> |
| 5 | * Please ALWAYS copy linux-ide@vger.kernel.org |
| 6 | * on emails. |
| 7 | * |
| 8 | * Copyright 2003-2004 Red Hat, Inc. |
| 9 | * |
| 10 | * The contents of this file are subject to the Open |
| 11 | * Software License version 1.1 that can be found at |
| 12 | * http://www.opensource.org/licenses/osl-1.1.txt and is included herein |
| 13 | * by reference. |
| 14 | * |
| 15 | * Alternatively, the contents of this file may be used under the terms |
| 16 | * of the GNU General Public License version 2 (the "GPL") as distributed |
| 17 | * in the kernel source COPYING file, in which case the provisions of |
| 18 | * the GPL are applicable instead of the above. If you wish to allow |
| 19 | * the use of your version of this file only under the terms of the |
| 20 | * GPL and not to allow others to use your version of this file under |
| 21 | * the OSL, indicate your decision by deleting the provisions above and |
| 22 | * replace them with the notice and other provisions required by the GPL. |
| 23 | * If you do not delete the provisions above, a recipient may use your |
| 24 | * version of this file under either the OSL or the GPL. |
| 25 | * |
| 26 | */ |
| 27 | |
| 28 | #include <linux/kernel.h> |
| 29 | #include <linux/module.h> |
| 30 | #include <linux/pci.h> |
| 31 | #include <linux/init.h> |
| 32 | #include <linux/blkdev.h> |
| 33 | #include <linux/delay.h> |
| 34 | #include <linux/interrupt.h> |
| 35 | #include <linux/sched.h> |
| 36 | #include "scsi.h" |
| 37 | #include <scsi/scsi_host.h> |
| 38 | #include <linux/libata.h> |
| 39 | #include <asm/io.h> |
| 40 | #include "sata_promise.h" |
| 41 | |
| 42 | #define DRV_NAME "sata_promise" |
Jeff Garzik | 6885433 | 2005-08-23 02:53:51 -0400 | [diff] [blame^] | 43 | #define DRV_VERSION "1.02" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | |
| 45 | |
| 46 | enum { |
| 47 | PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */ |
| 48 | PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */ |
| 49 | PDC_TBG_MODE = 0x41, /* TBG mode */ |
| 50 | PDC_FLASH_CTL = 0x44, /* Flash control register */ |
| 51 | PDC_PCI_CTL = 0x48, /* PCI control and status register */ |
| 52 | PDC_GLOBAL_CTL = 0x48, /* Global control/status (per port) */ |
| 53 | PDC_CTLSTAT = 0x60, /* IDE control and status (per port) */ |
| 54 | PDC_SATA_PLUG_CSR = 0x6C, /* SATA Plug control/status reg */ |
| 55 | PDC_SLEW_CTL = 0x470, /* slew rate control reg */ |
| 56 | |
| 57 | PDC_ERR_MASK = (1<<19) | (1<<20) | (1<<21) | (1<<22) | |
| 58 | (1<<8) | (1<<9) | (1<<10), |
| 59 | |
| 60 | board_2037x = 0, /* FastTrak S150 TX2plus */ |
| 61 | board_20319 = 1, /* FastTrak S150 TX4 */ |
Tobias Lorenz | f497ba7 | 2005-05-12 15:51:01 -0400 | [diff] [blame] | 62 | board_20619 = 2, /* FastTrak TX4000 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | |
| 64 | PDC_HAS_PATA = (1 << 1), /* PDC20375 has PATA */ |
| 65 | |
| 66 | PDC_RESET = (1 << 11), /* HDMA reset */ |
| 67 | }; |
| 68 | |
| 69 | |
| 70 | struct pdc_port_priv { |
| 71 | u8 *pkt; |
| 72 | dma_addr_t pkt_dma; |
| 73 | }; |
| 74 | |
| 75 | static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg); |
| 76 | static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); |
| 77 | static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); |
| 78 | static irqreturn_t pdc_interrupt (int irq, void *dev_instance, struct pt_regs *regs); |
| 79 | static void pdc_eng_timeout(struct ata_port *ap); |
| 80 | static int pdc_port_start(struct ata_port *ap); |
| 81 | static void pdc_port_stop(struct ata_port *ap); |
| 82 | static void pdc_phy_reset(struct ata_port *ap); |
| 83 | static void pdc_qc_prep(struct ata_queued_cmd *qc); |
| 84 | static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf); |
| 85 | static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf); |
| 86 | static void pdc_irq_clear(struct ata_port *ap); |
| 87 | static int pdc_qc_issue_prot(struct ata_queued_cmd *qc); |
| 88 | |
| 89 | static Scsi_Host_Template pdc_ata_sht = { |
| 90 | .module = THIS_MODULE, |
| 91 | .name = DRV_NAME, |
| 92 | .ioctl = ata_scsi_ioctl, |
| 93 | .queuecommand = ata_scsi_queuecmd, |
| 94 | .eh_strategy_handler = ata_scsi_error, |
| 95 | .can_queue = ATA_DEF_QUEUE, |
| 96 | .this_id = ATA_SHT_THIS_ID, |
| 97 | .sg_tablesize = LIBATA_MAX_PRD, |
| 98 | .max_sectors = ATA_MAX_SECTORS, |
| 99 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
| 100 | .emulated = ATA_SHT_EMULATED, |
| 101 | .use_clustering = ATA_SHT_USE_CLUSTERING, |
| 102 | .proc_name = DRV_NAME, |
| 103 | .dma_boundary = ATA_DMA_BOUNDARY, |
| 104 | .slave_configure = ata_scsi_slave_config, |
| 105 | .bios_param = ata_std_bios_param, |
| 106 | .ordered_flush = 1, |
| 107 | }; |
| 108 | |
| 109 | static struct ata_port_operations pdc_ata_ops = { |
| 110 | .port_disable = ata_port_disable, |
| 111 | .tf_load = pdc_tf_load_mmio, |
| 112 | .tf_read = ata_tf_read, |
| 113 | .check_status = ata_check_status, |
| 114 | .exec_command = pdc_exec_command_mmio, |
| 115 | .dev_select = ata_std_dev_select, |
| 116 | .phy_reset = pdc_phy_reset, |
| 117 | .qc_prep = pdc_qc_prep, |
| 118 | .qc_issue = pdc_qc_issue_prot, |
| 119 | .eng_timeout = pdc_eng_timeout, |
| 120 | .irq_handler = pdc_interrupt, |
| 121 | .irq_clear = pdc_irq_clear, |
| 122 | .scr_read = pdc_sata_scr_read, |
| 123 | .scr_write = pdc_sata_scr_write, |
| 124 | .port_start = pdc_port_start, |
| 125 | .port_stop = pdc_port_stop, |
Jeff Garzik | aa8f0dc | 2005-05-26 21:54:27 -0400 | [diff] [blame] | 126 | .host_stop = ata_host_stop, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | }; |
| 128 | |
| 129 | static struct ata_port_info pdc_port_info[] = { |
| 130 | /* board_2037x */ |
| 131 | { |
| 132 | .sht = &pdc_ata_sht, |
| 133 | .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | |
| 134 | ATA_FLAG_SRST | ATA_FLAG_MMIO, |
| 135 | .pio_mask = 0x1f, /* pio0-4 */ |
| 136 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
| 137 | .udma_mask = 0x7f, /* udma0-6 ; FIXME */ |
| 138 | .port_ops = &pdc_ata_ops, |
| 139 | }, |
| 140 | |
| 141 | /* board_20319 */ |
| 142 | { |
| 143 | .sht = &pdc_ata_sht, |
| 144 | .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | |
| 145 | ATA_FLAG_SRST | ATA_FLAG_MMIO, |
| 146 | .pio_mask = 0x1f, /* pio0-4 */ |
| 147 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
| 148 | .udma_mask = 0x7f, /* udma0-6 ; FIXME */ |
| 149 | .port_ops = &pdc_ata_ops, |
| 150 | }, |
Tobias Lorenz | f497ba7 | 2005-05-12 15:51:01 -0400 | [diff] [blame] | 151 | |
| 152 | /* board_20619 */ |
| 153 | { |
| 154 | .sht = &pdc_ata_sht, |
| 155 | .host_flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SRST | |
| 156 | ATA_FLAG_MMIO | ATA_FLAG_SLAVE_POSS, |
| 157 | .pio_mask = 0x1f, /* pio0-4 */ |
| 158 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
| 159 | .udma_mask = 0x7f, /* udma0-6 ; FIXME */ |
| 160 | .port_ops = &pdc_ata_ops, |
| 161 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 | }; |
| 163 | |
| 164 | static struct pci_device_id pdc_ata_pci_tbl[] = { |
| 165 | { PCI_VENDOR_ID_PROMISE, 0x3371, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 166 | board_2037x }, |
Francisco Javier | 4c3a53d | 2005-05-25 19:29:37 -0400 | [diff] [blame] | 167 | { PCI_VENDOR_ID_PROMISE, 0x3571, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 168 | board_2037x }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | { PCI_VENDOR_ID_PROMISE, 0x3373, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 170 | board_2037x }, |
| 171 | { PCI_VENDOR_ID_PROMISE, 0x3375, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 172 | board_2037x }, |
| 173 | { PCI_VENDOR_ID_PROMISE, 0x3376, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 174 | board_2037x }, |
| 175 | { PCI_VENDOR_ID_PROMISE, 0x3574, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 176 | board_2037x }, |
| 177 | { PCI_VENDOR_ID_PROMISE, 0x3d75, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 178 | board_2037x }, |
| 179 | |
| 180 | { PCI_VENDOR_ID_PROMISE, 0x3318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 181 | board_20319 }, |
| 182 | { PCI_VENDOR_ID_PROMISE, 0x3319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 183 | board_20319 }, |
| 184 | { PCI_VENDOR_ID_PROMISE, 0x3d18, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 185 | board_20319 }, |
| 186 | |
Tobias Lorenz | f497ba7 | 2005-05-12 15:51:01 -0400 | [diff] [blame] | 187 | { PCI_VENDOR_ID_PROMISE, 0x6629, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 188 | board_20619 }, |
| 189 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | { } /* terminate list */ |
| 191 | }; |
| 192 | |
| 193 | |
| 194 | static struct pci_driver pdc_ata_pci_driver = { |
| 195 | .name = DRV_NAME, |
| 196 | .id_table = pdc_ata_pci_tbl, |
| 197 | .probe = pdc_ata_init_one, |
| 198 | .remove = ata_pci_remove_one, |
| 199 | }; |
| 200 | |
| 201 | |
| 202 | static int pdc_port_start(struct ata_port *ap) |
| 203 | { |
| 204 | struct device *dev = ap->host_set->dev; |
| 205 | struct pdc_port_priv *pp; |
| 206 | int rc; |
| 207 | |
| 208 | rc = ata_port_start(ap); |
| 209 | if (rc) |
| 210 | return rc; |
| 211 | |
| 212 | pp = kmalloc(sizeof(*pp), GFP_KERNEL); |
| 213 | if (!pp) { |
| 214 | rc = -ENOMEM; |
| 215 | goto err_out; |
| 216 | } |
| 217 | memset(pp, 0, sizeof(*pp)); |
| 218 | |
| 219 | pp->pkt = dma_alloc_coherent(dev, 128, &pp->pkt_dma, GFP_KERNEL); |
| 220 | if (!pp->pkt) { |
| 221 | rc = -ENOMEM; |
| 222 | goto err_out_kfree; |
| 223 | } |
| 224 | |
| 225 | ap->private_data = pp; |
| 226 | |
| 227 | return 0; |
| 228 | |
| 229 | err_out_kfree: |
| 230 | kfree(pp); |
| 231 | err_out: |
| 232 | ata_port_stop(ap); |
| 233 | return rc; |
| 234 | } |
| 235 | |
| 236 | |
| 237 | static void pdc_port_stop(struct ata_port *ap) |
| 238 | { |
| 239 | struct device *dev = ap->host_set->dev; |
| 240 | struct pdc_port_priv *pp = ap->private_data; |
| 241 | |
| 242 | ap->private_data = NULL; |
| 243 | dma_free_coherent(dev, 128, pp->pkt, pp->pkt_dma); |
| 244 | kfree(pp); |
| 245 | ata_port_stop(ap); |
| 246 | } |
| 247 | |
| 248 | |
| 249 | static void pdc_reset_port(struct ata_port *ap) |
| 250 | { |
| 251 | void *mmio = (void *) ap->ioaddr.cmd_addr + PDC_CTLSTAT; |
| 252 | unsigned int i; |
| 253 | u32 tmp; |
| 254 | |
| 255 | for (i = 11; i > 0; i--) { |
| 256 | tmp = readl(mmio); |
| 257 | if (tmp & PDC_RESET) |
| 258 | break; |
| 259 | |
| 260 | udelay(100); |
| 261 | |
| 262 | tmp |= PDC_RESET; |
| 263 | writel(tmp, mmio); |
| 264 | } |
| 265 | |
| 266 | tmp &= ~PDC_RESET; |
| 267 | writel(tmp, mmio); |
| 268 | readl(mmio); /* flush */ |
| 269 | } |
| 270 | |
| 271 | static void pdc_phy_reset(struct ata_port *ap) |
| 272 | { |
| 273 | pdc_reset_port(ap); |
| 274 | sata_phy_reset(ap); |
| 275 | } |
| 276 | |
| 277 | static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg) |
| 278 | { |
| 279 | if (sc_reg > SCR_CONTROL) |
| 280 | return 0xffffffffU; |
| 281 | return readl((void *) ap->ioaddr.scr_addr + (sc_reg * 4)); |
| 282 | } |
| 283 | |
| 284 | |
| 285 | static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, |
| 286 | u32 val) |
| 287 | { |
| 288 | if (sc_reg > SCR_CONTROL) |
| 289 | return; |
| 290 | writel(val, (void *) ap->ioaddr.scr_addr + (sc_reg * 4)); |
| 291 | } |
| 292 | |
| 293 | static void pdc_qc_prep(struct ata_queued_cmd *qc) |
| 294 | { |
| 295 | struct pdc_port_priv *pp = qc->ap->private_data; |
| 296 | unsigned int i; |
| 297 | |
| 298 | VPRINTK("ENTER\n"); |
| 299 | |
| 300 | switch (qc->tf.protocol) { |
| 301 | case ATA_PROT_DMA: |
| 302 | ata_qc_prep(qc); |
| 303 | /* fall through */ |
| 304 | |
| 305 | case ATA_PROT_NODATA: |
| 306 | i = pdc_pkt_header(&qc->tf, qc->ap->prd_dma, |
| 307 | qc->dev->devno, pp->pkt); |
| 308 | |
| 309 | if (qc->tf.flags & ATA_TFLAG_LBA48) |
| 310 | i = pdc_prep_lba48(&qc->tf, pp->pkt, i); |
| 311 | else |
| 312 | i = pdc_prep_lba28(&qc->tf, pp->pkt, i); |
| 313 | |
| 314 | pdc_pkt_footer(&qc->tf, pp->pkt, i); |
| 315 | break; |
| 316 | |
| 317 | default: |
| 318 | break; |
| 319 | } |
| 320 | } |
| 321 | |
| 322 | static void pdc_eng_timeout(struct ata_port *ap) |
| 323 | { |
| 324 | u8 drv_stat; |
| 325 | struct ata_queued_cmd *qc; |
| 326 | |
| 327 | DPRINTK("ENTER\n"); |
| 328 | |
| 329 | qc = ata_qc_from_tag(ap, ap->active_tag); |
| 330 | if (!qc) { |
| 331 | printk(KERN_ERR "ata%u: BUG: timeout without command\n", |
| 332 | ap->id); |
| 333 | goto out; |
| 334 | } |
| 335 | |
| 336 | /* hack alert! We cannot use the supplied completion |
| 337 | * function from inside the ->eh_strategy_handler() thread. |
| 338 | * libata is the only user of ->eh_strategy_handler() in |
| 339 | * any kernel, so the default scsi_done() assumes it is |
| 340 | * not being called from the SCSI EH. |
| 341 | */ |
| 342 | qc->scsidone = scsi_finish_command; |
| 343 | |
| 344 | switch (qc->tf.protocol) { |
| 345 | case ATA_PROT_DMA: |
| 346 | case ATA_PROT_NODATA: |
| 347 | printk(KERN_ERR "ata%u: command timeout\n", ap->id); |
| 348 | ata_qc_complete(qc, ata_wait_idle(ap) | ATA_ERR); |
| 349 | break; |
| 350 | |
| 351 | default: |
| 352 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); |
| 353 | |
| 354 | printk(KERN_ERR "ata%u: unknown timeout, cmd 0x%x stat 0x%x\n", |
| 355 | ap->id, qc->tf.command, drv_stat); |
| 356 | |
| 357 | ata_qc_complete(qc, drv_stat); |
| 358 | break; |
| 359 | } |
| 360 | |
| 361 | out: |
| 362 | DPRINTK("EXIT\n"); |
| 363 | } |
| 364 | |
| 365 | static inline unsigned int pdc_host_intr( struct ata_port *ap, |
| 366 | struct ata_queued_cmd *qc) |
| 367 | { |
| 368 | u8 status; |
| 369 | unsigned int handled = 0, have_err = 0; |
| 370 | u32 tmp; |
| 371 | void *mmio = (void *) ap->ioaddr.cmd_addr + PDC_GLOBAL_CTL; |
| 372 | |
| 373 | tmp = readl(mmio); |
| 374 | if (tmp & PDC_ERR_MASK) { |
| 375 | have_err = 1; |
| 376 | pdc_reset_port(ap); |
| 377 | } |
| 378 | |
| 379 | switch (qc->tf.protocol) { |
| 380 | case ATA_PROT_DMA: |
| 381 | case ATA_PROT_NODATA: |
| 382 | status = ata_wait_idle(ap); |
| 383 | if (have_err) |
| 384 | status |= ATA_ERR; |
| 385 | ata_qc_complete(qc, status); |
| 386 | handled = 1; |
| 387 | break; |
| 388 | |
| 389 | default: |
| 390 | ap->stats.idle_irq++; |
| 391 | break; |
| 392 | } |
| 393 | |
| 394 | return handled; |
| 395 | } |
| 396 | |
| 397 | static void pdc_irq_clear(struct ata_port *ap) |
| 398 | { |
| 399 | struct ata_host_set *host_set = ap->host_set; |
| 400 | void *mmio = host_set->mmio_base; |
| 401 | |
| 402 | readl(mmio + PDC_INT_SEQMASK); |
| 403 | } |
| 404 | |
| 405 | static irqreturn_t pdc_interrupt (int irq, void *dev_instance, struct pt_regs *regs) |
| 406 | { |
| 407 | struct ata_host_set *host_set = dev_instance; |
| 408 | struct ata_port *ap; |
| 409 | u32 mask = 0; |
| 410 | unsigned int i, tmp; |
| 411 | unsigned int handled = 0; |
| 412 | void *mmio_base; |
| 413 | |
| 414 | VPRINTK("ENTER\n"); |
| 415 | |
| 416 | if (!host_set || !host_set->mmio_base) { |
| 417 | VPRINTK("QUICK EXIT\n"); |
| 418 | return IRQ_NONE; |
| 419 | } |
| 420 | |
| 421 | mmio_base = host_set->mmio_base; |
| 422 | |
| 423 | /* reading should also clear interrupts */ |
| 424 | mask = readl(mmio_base + PDC_INT_SEQMASK); |
| 425 | |
| 426 | if (mask == 0xffffffff) { |
| 427 | VPRINTK("QUICK EXIT 2\n"); |
| 428 | return IRQ_NONE; |
| 429 | } |
| 430 | mask &= 0xffff; /* only 16 tags possible */ |
| 431 | if (!mask) { |
| 432 | VPRINTK("QUICK EXIT 3\n"); |
| 433 | return IRQ_NONE; |
| 434 | } |
| 435 | |
| 436 | spin_lock(&host_set->lock); |
| 437 | |
| 438 | writel(mask, mmio_base + PDC_INT_SEQMASK); |
| 439 | |
| 440 | for (i = 0; i < host_set->n_ports; i++) { |
| 441 | VPRINTK("port %u\n", i); |
| 442 | ap = host_set->ports[i]; |
| 443 | tmp = mask & (1 << (i + 1)); |
| 444 | if (tmp && ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { |
| 445 | struct ata_queued_cmd *qc; |
| 446 | |
| 447 | qc = ata_qc_from_tag(ap, ap->active_tag); |
| 448 | if (qc && (!(qc->tf.ctl & ATA_NIEN))) |
| 449 | handled += pdc_host_intr(ap, qc); |
| 450 | } |
| 451 | } |
| 452 | |
| 453 | spin_unlock(&host_set->lock); |
| 454 | |
| 455 | VPRINTK("EXIT\n"); |
| 456 | |
| 457 | return IRQ_RETVAL(handled); |
| 458 | } |
| 459 | |
| 460 | static inline void pdc_packet_start(struct ata_queued_cmd *qc) |
| 461 | { |
| 462 | struct ata_port *ap = qc->ap; |
| 463 | struct pdc_port_priv *pp = ap->private_data; |
| 464 | unsigned int port_no = ap->port_no; |
| 465 | u8 seq = (u8) (port_no + 1); |
| 466 | |
| 467 | VPRINTK("ENTER, ap %p\n", ap); |
| 468 | |
| 469 | writel(0x00000001, ap->host_set->mmio_base + (seq * 4)); |
| 470 | readl(ap->host_set->mmio_base + (seq * 4)); /* flush */ |
| 471 | |
| 472 | pp->pkt[2] = seq; |
| 473 | wmb(); /* flush PRD, pkt writes */ |
| 474 | writel(pp->pkt_dma, (void *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); |
| 475 | readl((void *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); /* flush */ |
| 476 | } |
| 477 | |
| 478 | static int pdc_qc_issue_prot(struct ata_queued_cmd *qc) |
| 479 | { |
| 480 | switch (qc->tf.protocol) { |
| 481 | case ATA_PROT_DMA: |
| 482 | case ATA_PROT_NODATA: |
| 483 | pdc_packet_start(qc); |
| 484 | return 0; |
| 485 | |
| 486 | case ATA_PROT_ATAPI_DMA: |
| 487 | BUG(); |
| 488 | break; |
| 489 | |
| 490 | default: |
| 491 | break; |
| 492 | } |
| 493 | |
| 494 | return ata_qc_issue_prot(qc); |
| 495 | } |
| 496 | |
| 497 | static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf) |
| 498 | { |
| 499 | WARN_ON (tf->protocol == ATA_PROT_DMA || |
| 500 | tf->protocol == ATA_PROT_NODATA); |
| 501 | ata_tf_load(ap, tf); |
| 502 | } |
| 503 | |
| 504 | |
| 505 | static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf) |
| 506 | { |
| 507 | WARN_ON (tf->protocol == ATA_PROT_DMA || |
| 508 | tf->protocol == ATA_PROT_NODATA); |
| 509 | ata_exec_command(ap, tf); |
| 510 | } |
| 511 | |
| 512 | |
| 513 | static void pdc_ata_setup_port(struct ata_ioports *port, unsigned long base) |
| 514 | { |
| 515 | port->cmd_addr = base; |
| 516 | port->data_addr = base; |
| 517 | port->feature_addr = |
| 518 | port->error_addr = base + 0x4; |
| 519 | port->nsect_addr = base + 0x8; |
| 520 | port->lbal_addr = base + 0xc; |
| 521 | port->lbam_addr = base + 0x10; |
| 522 | port->lbah_addr = base + 0x14; |
| 523 | port->device_addr = base + 0x18; |
| 524 | port->command_addr = |
| 525 | port->status_addr = base + 0x1c; |
| 526 | port->altstatus_addr = |
| 527 | port->ctl_addr = base + 0x38; |
| 528 | } |
| 529 | |
| 530 | |
| 531 | static void pdc_host_init(unsigned int chip_id, struct ata_probe_ent *pe) |
| 532 | { |
| 533 | void *mmio = pe->mmio_base; |
| 534 | u32 tmp; |
| 535 | |
| 536 | /* |
| 537 | * Except for the hotplug stuff, this is voodoo from the |
| 538 | * Promise driver. Label this entire section |
| 539 | * "TODO: figure out why we do this" |
| 540 | */ |
| 541 | |
| 542 | /* change FIFO_SHD to 8 dwords, enable BMR_BURST */ |
| 543 | tmp = readl(mmio + PDC_FLASH_CTL); |
| 544 | tmp |= 0x12000; /* bit 16 (fifo 8 dw) and 13 (bmr burst?) */ |
| 545 | writel(tmp, mmio + PDC_FLASH_CTL); |
| 546 | |
| 547 | /* clear plug/unplug flags for all ports */ |
| 548 | tmp = readl(mmio + PDC_SATA_PLUG_CSR); |
| 549 | writel(tmp | 0xff, mmio + PDC_SATA_PLUG_CSR); |
| 550 | |
| 551 | /* mask plug/unplug ints */ |
| 552 | tmp = readl(mmio + PDC_SATA_PLUG_CSR); |
| 553 | writel(tmp | 0xff0000, mmio + PDC_SATA_PLUG_CSR); |
| 554 | |
| 555 | /* reduce TBG clock to 133 Mhz. */ |
| 556 | tmp = readl(mmio + PDC_TBG_MODE); |
| 557 | tmp &= ~0x30000; /* clear bit 17, 16*/ |
| 558 | tmp |= 0x10000; /* set bit 17:16 = 0:1 */ |
| 559 | writel(tmp, mmio + PDC_TBG_MODE); |
| 560 | |
| 561 | readl(mmio + PDC_TBG_MODE); /* flush */ |
| 562 | msleep(10); |
| 563 | |
| 564 | /* adjust slew rate control register. */ |
| 565 | tmp = readl(mmio + PDC_SLEW_CTL); |
| 566 | tmp &= 0xFFFFF03F; /* clear bit 11 ~ 6 */ |
| 567 | tmp |= 0x00000900; /* set bit 11-9 = 100b , bit 8-6 = 100 */ |
| 568 | writel(tmp, mmio + PDC_SLEW_CTL); |
| 569 | } |
| 570 | |
| 571 | static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) |
| 572 | { |
| 573 | static int printed_version; |
| 574 | struct ata_probe_ent *probe_ent = NULL; |
| 575 | unsigned long base; |
| 576 | void *mmio_base; |
| 577 | unsigned int board_idx = (unsigned int) ent->driver_data; |
| 578 | int pci_dev_busy = 0; |
| 579 | int rc; |
| 580 | |
| 581 | if (!printed_version++) |
| 582 | printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n"); |
| 583 | |
| 584 | /* |
| 585 | * If this driver happens to only be useful on Apple's K2, then |
| 586 | * we should check that here as it has a normal Serverworks ID |
| 587 | */ |
| 588 | rc = pci_enable_device(pdev); |
| 589 | if (rc) |
| 590 | return rc; |
| 591 | |
| 592 | rc = pci_request_regions(pdev, DRV_NAME); |
| 593 | if (rc) { |
| 594 | pci_dev_busy = 1; |
| 595 | goto err_out; |
| 596 | } |
| 597 | |
| 598 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); |
| 599 | if (rc) |
| 600 | goto err_out_regions; |
| 601 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); |
| 602 | if (rc) |
| 603 | goto err_out_regions; |
| 604 | |
| 605 | probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL); |
| 606 | if (probe_ent == NULL) { |
| 607 | rc = -ENOMEM; |
| 608 | goto err_out_regions; |
| 609 | } |
| 610 | |
| 611 | memset(probe_ent, 0, sizeof(*probe_ent)); |
| 612 | probe_ent->dev = pci_dev_to_dev(pdev); |
| 613 | INIT_LIST_HEAD(&probe_ent->node); |
| 614 | |
| 615 | mmio_base = ioremap(pci_resource_start(pdev, 3), |
| 616 | pci_resource_len(pdev, 3)); |
| 617 | if (mmio_base == NULL) { |
| 618 | rc = -ENOMEM; |
| 619 | goto err_out_free_ent; |
| 620 | } |
| 621 | base = (unsigned long) mmio_base; |
| 622 | |
| 623 | probe_ent->sht = pdc_port_info[board_idx].sht; |
| 624 | probe_ent->host_flags = pdc_port_info[board_idx].host_flags; |
| 625 | probe_ent->pio_mask = pdc_port_info[board_idx].pio_mask; |
| 626 | probe_ent->mwdma_mask = pdc_port_info[board_idx].mwdma_mask; |
| 627 | probe_ent->udma_mask = pdc_port_info[board_idx].udma_mask; |
| 628 | probe_ent->port_ops = pdc_port_info[board_idx].port_ops; |
| 629 | |
| 630 | probe_ent->irq = pdev->irq; |
| 631 | probe_ent->irq_flags = SA_SHIRQ; |
| 632 | probe_ent->mmio_base = mmio_base; |
| 633 | |
| 634 | pdc_ata_setup_port(&probe_ent->port[0], base + 0x200); |
| 635 | pdc_ata_setup_port(&probe_ent->port[1], base + 0x280); |
| 636 | |
| 637 | probe_ent->port[0].scr_addr = base + 0x400; |
| 638 | probe_ent->port[1].scr_addr = base + 0x500; |
| 639 | |
| 640 | /* notice 4-port boards */ |
| 641 | switch (board_idx) { |
| 642 | case board_20319: |
| 643 | probe_ent->n_ports = 4; |
| 644 | |
| 645 | pdc_ata_setup_port(&probe_ent->port[2], base + 0x300); |
| 646 | pdc_ata_setup_port(&probe_ent->port[3], base + 0x380); |
| 647 | |
| 648 | probe_ent->port[2].scr_addr = base + 0x600; |
| 649 | probe_ent->port[3].scr_addr = base + 0x700; |
| 650 | break; |
| 651 | case board_2037x: |
| 652 | probe_ent->n_ports = 2; |
| 653 | break; |
Tobias Lorenz | f497ba7 | 2005-05-12 15:51:01 -0400 | [diff] [blame] | 654 | case board_20619: |
| 655 | probe_ent->n_ports = 4; |
| 656 | |
| 657 | pdc_ata_setup_port(&probe_ent->port[2], base + 0x300); |
| 658 | pdc_ata_setup_port(&probe_ent->port[3], base + 0x380); |
| 659 | |
| 660 | probe_ent->port[2].scr_addr = base + 0x600; |
| 661 | probe_ent->port[3].scr_addr = base + 0x700; |
| 662 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 663 | default: |
| 664 | BUG(); |
| 665 | break; |
| 666 | } |
| 667 | |
| 668 | pci_set_master(pdev); |
| 669 | |
| 670 | /* initialize adapter */ |
| 671 | pdc_host_init(board_idx, probe_ent); |
| 672 | |
| 673 | /* FIXME: check ata_device_add return value */ |
| 674 | ata_device_add(probe_ent); |
| 675 | kfree(probe_ent); |
| 676 | |
| 677 | return 0; |
| 678 | |
| 679 | err_out_free_ent: |
| 680 | kfree(probe_ent); |
| 681 | err_out_regions: |
| 682 | pci_release_regions(pdev); |
| 683 | err_out: |
| 684 | if (!pci_dev_busy) |
| 685 | pci_disable_device(pdev); |
| 686 | return rc; |
| 687 | } |
| 688 | |
| 689 | |
| 690 | static int __init pdc_ata_init(void) |
| 691 | { |
| 692 | return pci_module_init(&pdc_ata_pci_driver); |
| 693 | } |
| 694 | |
| 695 | |
| 696 | static void __exit pdc_ata_exit(void) |
| 697 | { |
| 698 | pci_unregister_driver(&pdc_ata_pci_driver); |
| 699 | } |
| 700 | |
| 701 | |
| 702 | MODULE_AUTHOR("Jeff Garzik"); |
Tobias Lorenz | f497ba7 | 2005-05-12 15:51:01 -0400 | [diff] [blame] | 703 | MODULE_DESCRIPTION("Promise ATA TX2/TX4/TX4000 low-level driver"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 704 | MODULE_LICENSE("GPL"); |
| 705 | MODULE_DEVICE_TABLE(pci, pdc_ata_pci_tbl); |
| 706 | MODULE_VERSION(DRV_VERSION); |
| 707 | |
| 708 | module_init(pdc_ata_init); |
| 709 | module_exit(pdc_ata_exit); |