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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __PPC64_ELF_H
2#define __PPC64_ELF_H
3
4#include <asm/types.h>
5#include <asm/ptrace.h>
6#include <asm/cputable.h>
H. J. Lu36d57ac2005-09-06 15:16:49 -07007#include <asm/auxvec.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07008
9/* PowerPC relocations defined by the ABIs */
10#define R_PPC_NONE 0
11#define R_PPC_ADDR32 1 /* 32bit absolute address */
12#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
13#define R_PPC_ADDR16 3 /* 16bit absolute address */
14#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
15#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
16#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
17#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
18#define R_PPC_ADDR14_BRTAKEN 8
19#define R_PPC_ADDR14_BRNTAKEN 9
20#define R_PPC_REL24 10 /* PC relative 26 bit */
21#define R_PPC_REL14 11 /* PC relative 16 bit */
22#define R_PPC_REL14_BRTAKEN 12
23#define R_PPC_REL14_BRNTAKEN 13
24#define R_PPC_GOT16 14
25#define R_PPC_GOT16_LO 15
26#define R_PPC_GOT16_HI 16
27#define R_PPC_GOT16_HA 17
28#define R_PPC_PLTREL24 18
29#define R_PPC_COPY 19
30#define R_PPC_GLOB_DAT 20
31#define R_PPC_JMP_SLOT 21
32#define R_PPC_RELATIVE 22
33#define R_PPC_LOCAL24PC 23
34#define R_PPC_UADDR32 24
35#define R_PPC_UADDR16 25
36#define R_PPC_REL32 26
37#define R_PPC_PLT32 27
38#define R_PPC_PLTREL32 28
39#define R_PPC_PLT16_LO 29
40#define R_PPC_PLT16_HI 30
41#define R_PPC_PLT16_HA 31
42#define R_PPC_SDAREL16 32
43#define R_PPC_SECTOFF 33
44#define R_PPC_SECTOFF_LO 34
45#define R_PPC_SECTOFF_HI 35
46#define R_PPC_SECTOFF_HA 36
47
48/* PowerPC relocations defined for the TLS access ABI. */
49#define R_PPC_TLS 67 /* none (sym+add)@tls */
50#define R_PPC_DTPMOD32 68 /* word32 (sym+add)@dtpmod */
51#define R_PPC_TPREL16 69 /* half16* (sym+add)@tprel */
52#define R_PPC_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */
53#define R_PPC_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */
54#define R_PPC_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */
55#define R_PPC_TPREL32 73 /* word32 (sym+add)@tprel */
56#define R_PPC_DTPREL16 74 /* half16* (sym+add)@dtprel */
57#define R_PPC_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */
58#define R_PPC_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */
59#define R_PPC_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */
60#define R_PPC_DTPREL32 78 /* word32 (sym+add)@dtprel */
61#define R_PPC_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */
62#define R_PPC_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */
63#define R_PPC_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */
64#define R_PPC_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */
65#define R_PPC_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */
66#define R_PPC_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */
67#define R_PPC_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */
68#define R_PPC_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */
69#define R_PPC_GOT_TPREL16 87 /* half16* (sym+add)@got@tprel */
70#define R_PPC_GOT_TPREL16_LO 88 /* half16 (sym+add)@got@tprel@l */
71#define R_PPC_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */
72#define R_PPC_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */
73#define R_PPC_GOT_DTPREL16 91 /* half16* (sym+add)@got@dtprel */
74#define R_PPC_GOT_DTPREL16_LO 92 /* half16* (sym+add)@got@dtprel@l */
75#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */
76#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */
77
78/* Keep this the last entry. */
79#define R_PPC_NUM 95
80
81/*
82 * ELF register definitions..
83 *
84 * This program is free software; you can redistribute it and/or
85 * modify it under the terms of the GNU General Public License
86 * as published by the Free Software Foundation; either version
87 * 2 of the License, or (at your option) any later version.
88 */
89#include <asm/ptrace.h>
90
91#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
92#define ELF_NFPREG 33 /* includes fpscr */
93#define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */
94#define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */
95
96typedef unsigned long elf_greg_t64;
97typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
98
99typedef unsigned int elf_greg_t32;
100typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
101
102/*
103 * These are used to set parameters in the core dumps.
104 */
105#ifndef ELF_ARCH
106# define ELF_ARCH EM_PPC64
107# define ELF_CLASS ELFCLASS64
108# define ELF_DATA ELFDATA2MSB
109 typedef elf_greg_t64 elf_greg_t;
110 typedef elf_gregset_t64 elf_gregset_t;
111# define elf_addr_t unsigned long
112#else
113 /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */
114 typedef elf_greg_t32 elf_greg_t;
115 typedef elf_gregset_t32 elf_gregset_t;
116# define elf_addr_t u32
117#endif
118
119typedef double elf_fpreg_t;
120typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
121
122/* Altivec registers */
123/*
124 * The entries with indexes 0-31 contain the corresponding vector registers.
125 * The entry with index 32 contains the vscr as the last word (offset 12)
126 * within the quadword. This allows the vscr to be stored as either a
127 * quadword (since it must be copied via a vector register to/from storage)
128 * or as a word. The entry with index 33 contains the vrsave as the first
129 * word (offset 0) within the quadword.
130 *
131 * This definition of the VMX state is compatible with the current PPC32
132 * ptrace interface. This allows signal handling and ptrace to use the same
133 * structures. This also simplifies the implementation of a bi-arch
134 * (combined (32- and 64-bit) gdb.
135 *
136 * Note that it's _not_ compatible with 32 bits ucontext which stuffs the
137 * vrsave along with vscr and so only uses 33 vectors for the register set
138 */
139typedef __vector128 elf_vrreg_t;
140typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
141typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
142
143/*
144 * This is used to ensure we don't load something for the wrong architecture.
145 */
146#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
147
148#define USE_ELF_CORE_DUMP
149#define ELF_EXEC_PAGESIZE 4096
150
151/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
152 use of this is to invoke "./ld.so someprog" to test out a new version of
153 the loader. We need to make sure that it is out of the way of the program
154 that it will "exec", and that there is sufficient room for the brk. */
155
156#define ELF_ET_DYN_BASE (0x08000000)
157
158#ifdef __KERNEL__
159
160/* Common routine for both 32-bit and 64-bit processes */
161static inline void ppc64_elf_core_copy_regs(elf_gregset_t elf_regs,
162 struct pt_regs *regs)
163{
164 int i;
165 int gprs = sizeof(struct pt_regs)/sizeof(elf_greg_t64);
166
167 if (gprs > ELF_NGREG)
168 gprs = ELF_NGREG;
169
170 for (i=0; i < gprs; i++)
171 elf_regs[i] = (elf_greg_t)((elf_greg_t64 *)regs)[i];
172}
173#define ELF_CORE_COPY_REGS(gregs, regs) ppc64_elf_core_copy_regs(gregs, regs);
174
175static inline int dump_task_regs(struct task_struct *tsk,
176 elf_gregset_t *elf_regs)
177{
178 struct pt_regs *regs = tsk->thread.regs;
179 if (regs)
180 ppc64_elf_core_copy_regs(*elf_regs, regs);
181
182 return 1;
183}
184#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
185
186extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
187#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
188
189/* XXX Should we define the XFPREGS using altivec ??? */
190
191#endif
192
193/* This yields a mask that user programs can use to figure out what
194 instruction set this cpu supports. This could be done in userspace,
195 but it's not easy, and we've already done it here. */
196
197#define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
198
199/* This yields a string that ld.so will use to load implementation
200 specific libraries for optimization. This is more specific in
201 intent than poking at uname or /proc/cpuinfo.
202
203 For the moment, we have only optimizations for the Intel generations,
204 but that could change... */
205
206#define ELF_PLATFORM (NULL)
207
208#define ELF_PLAT_INIT(_r, load_addr) do { \
209 memset(_r->gpr, 0, sizeof(_r->gpr)); \
210 _r->ctr = _r->link = _r->xer = _r->ccr = 0; \
211 _r->gpr[2] = load_addr; \
212} while (0)
213
214#ifdef __KERNEL__
215#define SET_PERSONALITY(ex, ibcs2) \
216do { \
217 unsigned long new_flags = 0; \
218 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
219 new_flags = _TIF_32BIT; \
220 if ((current_thread_info()->flags & _TIF_32BIT) \
221 != new_flags) \
222 set_thread_flag(TIF_ABI_PENDING); \
223 else \
224 clear_thread_flag(TIF_ABI_PENDING); \
Paul Mackerrasce10d972005-06-08 21:59:15 +1000225 if (personality(current->personality) != PER_LINUX32) \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226 set_personality(PER_LINUX); \
227} while (0)
228
229/*
230 * An executable for which elf_read_implies_exec() returns TRUE will
Anton Blancharda2f95a52005-05-01 08:58:45 -0700231 * have the READ_IMPLIES_EXEC personality flag set automatically. This
232 * is only required to work around bugs in old 32bit toolchains. Since
233 * the 64bit ABI has never had these issues dont enable the workaround
234 * even if we have an executable stack.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235 */
Anton Blancharda2f95a52005-05-01 08:58:45 -0700236#define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \
237 (exec_stk != EXSTACK_DISABLE_X) : 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238
239#endif
240
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241extern int dcache_bsize;
242extern int icache_bsize;
243extern int ucache_bsize;
244
245/* We do have an arch_setup_additional_pages for vDSO matters */
246#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
247struct linux_binprm;
248extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack);
249
250/*
251 * The requirements here are:
252 * - keep the final alignment of sp (sp & 0xf)
253 * - make sure the 32-bit value at the first 16 byte aligned position of
254 * AUXV is greater than 16 for glibc compatibility.
255 * AT_IGNOREPPC is used for that.
256 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
257 * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
258 */
259#define ARCH_DLINFO \
260do { \
261 /* Handle glibc compatibility. */ \
262 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
263 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
264 /* Cache size items */ \
265 NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
266 NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
267 NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
268 /* vDSO base */ \
269 NEW_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base); \
270 } while (0)
271
272/* PowerPC64 relocations defined by the ABIs */
273#define R_PPC64_NONE R_PPC_NONE
274#define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address. */
275#define R_PPC64_ADDR24 R_PPC_ADDR24 /* 26bit address, word aligned. */
276#define R_PPC64_ADDR16 R_PPC_ADDR16 /* 16bit absolute address. */
277#define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of abs. address. */
278#define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of abs. address. */
279#define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits. */
280#define R_PPC64_ADDR14 R_PPC_ADDR14 /* 16bit address, word aligned. */
281#define R_PPC64_ADDR14_BRTAKEN R_PPC_ADDR14_BRTAKEN
282#define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN
283#define R_PPC64_REL24 R_PPC_REL24 /* PC relative 26 bit, word aligned. */
284#define R_PPC64_REL14 R_PPC_REL14 /* PC relative 16 bit. */
285#define R_PPC64_REL14_BRTAKEN R_PPC_REL14_BRTAKEN
286#define R_PPC64_REL14_BRNTAKEN R_PPC_REL14_BRNTAKEN
287#define R_PPC64_GOT16 R_PPC_GOT16
288#define R_PPC64_GOT16_LO R_PPC_GOT16_LO
289#define R_PPC64_GOT16_HI R_PPC_GOT16_HI
290#define R_PPC64_GOT16_HA R_PPC_GOT16_HA
291
292#define R_PPC64_COPY R_PPC_COPY
293#define R_PPC64_GLOB_DAT R_PPC_GLOB_DAT
294#define R_PPC64_JMP_SLOT R_PPC_JMP_SLOT
295#define R_PPC64_RELATIVE R_PPC_RELATIVE
296
297#define R_PPC64_UADDR32 R_PPC_UADDR32
298#define R_PPC64_UADDR16 R_PPC_UADDR16
299#define R_PPC64_REL32 R_PPC_REL32
300#define R_PPC64_PLT32 R_PPC_PLT32
301#define R_PPC64_PLTREL32 R_PPC_PLTREL32
302#define R_PPC64_PLT16_LO R_PPC_PLT16_LO
303#define R_PPC64_PLT16_HI R_PPC_PLT16_HI
304#define R_PPC64_PLT16_HA R_PPC_PLT16_HA
305
306#define R_PPC64_SECTOFF R_PPC_SECTOFF
307#define R_PPC64_SECTOFF_LO R_PPC_SECTOFF_LO
308#define R_PPC64_SECTOFF_HI R_PPC_SECTOFF_HI
309#define R_PPC64_SECTOFF_HA R_PPC_SECTOFF_HA
310#define R_PPC64_ADDR30 37 /* word30 (S + A - P) >> 2. */
311#define R_PPC64_ADDR64 38 /* doubleword64 S + A. */
312#define R_PPC64_ADDR16_HIGHER 39 /* half16 #higher(S + A). */
313#define R_PPC64_ADDR16_HIGHERA 40 /* half16 #highera(S + A). */
314#define R_PPC64_ADDR16_HIGHEST 41 /* half16 #highest(S + A). */
315#define R_PPC64_ADDR16_HIGHESTA 42 /* half16 #highesta(S + A). */
316#define R_PPC64_UADDR64 43 /* doubleword64 S + A. */
317#define R_PPC64_REL64 44 /* doubleword64 S + A - P. */
318#define R_PPC64_PLT64 45 /* doubleword64 L + A. */
319#define R_PPC64_PLTREL64 46 /* doubleword64 L + A - P. */
320#define R_PPC64_TOC16 47 /* half16* S + A - .TOC. */
321#define R_PPC64_TOC16_LO 48 /* half16 #lo(S + A - .TOC.). */
322#define R_PPC64_TOC16_HI 49 /* half16 #hi(S + A - .TOC.). */
323#define R_PPC64_TOC16_HA 50 /* half16 #ha(S + A - .TOC.). */
324#define R_PPC64_TOC 51 /* doubleword64 .TOC. */
325#define R_PPC64_PLTGOT16 52 /* half16* M + A. */
326#define R_PPC64_PLTGOT16_LO 53 /* half16 #lo(M + A). */
327#define R_PPC64_PLTGOT16_HI 54 /* half16 #hi(M + A). */
328#define R_PPC64_PLTGOT16_HA 55 /* half16 #ha(M + A). */
329
330#define R_PPC64_ADDR16_DS 56 /* half16ds* (S + A) >> 2. */
331#define R_PPC64_ADDR16_LO_DS 57 /* half16ds #lo(S + A) >> 2. */
332#define R_PPC64_GOT16_DS 58 /* half16ds* (G + A) >> 2. */
333#define R_PPC64_GOT16_LO_DS 59 /* half16ds #lo(G + A) >> 2. */
334#define R_PPC64_PLT16_LO_DS 60 /* half16ds #lo(L + A) >> 2. */
335#define R_PPC64_SECTOFF_DS 61 /* half16ds* (R + A) >> 2. */
336#define R_PPC64_SECTOFF_LO_DS 62 /* half16ds #lo(R + A) >> 2. */
337#define R_PPC64_TOC16_DS 63 /* half16ds* (S + A - .TOC.) >> 2. */
338#define R_PPC64_TOC16_LO_DS 64 /* half16ds #lo(S + A - .TOC.) >> 2. */
339#define R_PPC64_PLTGOT16_DS 65 /* half16ds* (M + A) >> 2. */
340#define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds #lo(M + A) >> 2. */
341
342/* PowerPC64 relocations defined for the TLS access ABI. */
343#define R_PPC64_TLS 67 /* none (sym+add)@tls */
344#define R_PPC64_DTPMOD64 68 /* doubleword64 (sym+add)@dtpmod */
345#define R_PPC64_TPREL16 69 /* half16* (sym+add)@tprel */
346#define R_PPC64_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */
347#define R_PPC64_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */
348#define R_PPC64_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */
349#define R_PPC64_TPREL64 73 /* doubleword64 (sym+add)@tprel */
350#define R_PPC64_DTPREL16 74 /* half16* (sym+add)@dtprel */
351#define R_PPC64_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */
352#define R_PPC64_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */
353#define R_PPC64_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */
354#define R_PPC64_DTPREL64 78 /* doubleword64 (sym+add)@dtprel */
355#define R_PPC64_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */
356#define R_PPC64_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */
357#define R_PPC64_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */
358#define R_PPC64_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */
359#define R_PPC64_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */
360#define R_PPC64_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */
361#define R_PPC64_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */
362#define R_PPC64_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */
363#define R_PPC64_GOT_TPREL16_DS 87 /* half16ds* (sym+add)@got@tprel */
364#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
365#define R_PPC64_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */
366#define R_PPC64_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */
367#define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */
368#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
369#define R_PPC64_GOT_DTPREL16_HI 93 /* half16 (sym+add)@got@dtprel@h */
370#define R_PPC64_GOT_DTPREL16_HA 94 /* half16 (sym+add)@got@dtprel@ha */
371#define R_PPC64_TPREL16_DS 95 /* half16ds* (sym+add)@tprel */
372#define R_PPC64_TPREL16_LO_DS 96 /* half16ds (sym+add)@tprel@l */
373#define R_PPC64_TPREL16_HIGHER 97 /* half16 (sym+add)@tprel@higher */
374#define R_PPC64_TPREL16_HIGHERA 98 /* half16 (sym+add)@tprel@highera */
375#define R_PPC64_TPREL16_HIGHEST 99 /* half16 (sym+add)@tprel@highest */
376#define R_PPC64_TPREL16_HIGHESTA 100 /* half16 (sym+add)@tprel@highesta */
377#define R_PPC64_DTPREL16_DS 101 /* half16ds* (sym+add)@dtprel */
378#define R_PPC64_DTPREL16_LO_DS 102 /* half16ds (sym+add)@dtprel@l */
379#define R_PPC64_DTPREL16_HIGHER 103 /* half16 (sym+add)@dtprel@higher */
380#define R_PPC64_DTPREL16_HIGHERA 104 /* half16 (sym+add)@dtprel@highera */
381#define R_PPC64_DTPREL16_HIGHEST 105 /* half16 (sym+add)@dtprel@highest */
382#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */
383
384/* Keep this the last entry. */
385#define R_PPC64_NUM 107
386
387#endif /* __PPC64_ELF_H */