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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* linux/arch/arm/mach-s3c2410/devs.c
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Base S3C2410 platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Modifications:
13 * 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ}
14 * 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv
15 * 29-Aug-2004 BJD Added timers 0 through 3
16 * 29-Aug-2004 BJD Changed index of devices we only have one of to -1
17 * 21-Aug-2004 BJD Added IRQ_TICK to RTC resources
18 * 18-Aug-2004 BJD Created initial version
19*/
20
21#include <linux/kernel.h>
22#include <linux/types.h>
23#include <linux/interrupt.h>
24#include <linux/list.h>
25#include <linux/timer.h>
26#include <linux/init.h>
27#include <linux/device.h>
28
29#include <asm/mach/arch.h>
30#include <asm/mach/map.h>
31#include <asm/mach/irq.h>
32
33#include <asm/hardware.h>
34#include <asm/io.h>
35#include <asm/irq.h>
36
37#include <asm/arch/regs-serial.h>
38
39#include "devs.h"
40
41/* Serial port registrations */
42
43struct platform_device *s3c24xx_uart_devs[3];
44
45/* USB Host Controller */
46
47static struct resource s3c_usb_resource[] = {
48 [0] = {
49 .start = S3C2410_PA_USBHOST,
50 .end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST,
51 .flags = IORESOURCE_MEM,
52 },
53 [1] = {
54 .start = IRQ_USBH,
55 .end = IRQ_USBH,
56 .flags = IORESOURCE_IRQ,
57 }
58};
59
60static u64 s3c_device_usb_dmamask = 0xffffffffUL;
61
62struct platform_device s3c_device_usb = {
63 .name = "s3c2410-ohci",
64 .id = -1,
65 .num_resources = ARRAY_SIZE(s3c_usb_resource),
66 .resource = s3c_usb_resource,
67 .dev = {
68 .dma_mask = &s3c_device_usb_dmamask,
69 .coherent_dma_mask = 0xffffffffUL
70 }
71};
72
73EXPORT_SYMBOL(s3c_device_usb);
74
75/* LCD Controller */
76
77static struct resource s3c_lcd_resource[] = {
78 [0] = {
79 .start = S3C2410_PA_LCD,
80 .end = S3C2410_PA_LCD + S3C24XX_SZ_LCD,
81 .flags = IORESOURCE_MEM,
82 },
83 [1] = {
84 .start = IRQ_LCD,
85 .end = IRQ_LCD,
86 .flags = IORESOURCE_IRQ,
87 }
88
89};
90
91static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
92
93struct platform_device s3c_device_lcd = {
94 .name = "s3c2410-lcd",
95 .id = -1,
96 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
97 .resource = s3c_lcd_resource,
98 .dev = {
Ben Dooks6904b242005-06-29 11:09:15 +010099 .dma_mask = &s3c_device_lcd_dmamask,
100 .coherent_dma_mask = 0xffffffffUL
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101 }
102};
103
104EXPORT_SYMBOL(s3c_device_lcd);
105
106/* NAND Controller */
107
108static struct resource s3c_nand_resource[] = {
109 [0] = {
110 .start = S3C2410_PA_NAND,
111 .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND,
112 .flags = IORESOURCE_MEM,
113 }
114};
115
116struct platform_device s3c_device_nand = {
117 .name = "s3c2410-nand",
118 .id = -1,
119 .num_resources = ARRAY_SIZE(s3c_nand_resource),
120 .resource = s3c_nand_resource,
121};
122
123EXPORT_SYMBOL(s3c_device_nand);
124
125/* USB Device (Gadget)*/
126
127static struct resource s3c_usbgadget_resource[] = {
128 [0] = {
129 .start = S3C2410_PA_USBDEV,
130 .end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV,
131 .flags = IORESOURCE_MEM,
132 },
133 [1] = {
134 .start = IRQ_USBD,
135 .end = IRQ_USBD,
136 .flags = IORESOURCE_IRQ,
137 }
138
139};
140
141struct platform_device s3c_device_usbgadget = {
142 .name = "s3c2410-usbgadget",
143 .id = -1,
144 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
145 .resource = s3c_usbgadget_resource,
146};
147
148EXPORT_SYMBOL(s3c_device_usbgadget);
149
150/* Watchdog */
151
152static struct resource s3c_wdt_resource[] = {
153 [0] = {
154 .start = S3C2410_PA_WATCHDOG,
155 .end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG,
156 .flags = IORESOURCE_MEM,
157 },
158 [1] = {
159 .start = IRQ_WDT,
160 .end = IRQ_WDT,
161 .flags = IORESOURCE_IRQ,
162 }
163
164};
165
166struct platform_device s3c_device_wdt = {
167 .name = "s3c2410-wdt",
168 .id = -1,
169 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
170 .resource = s3c_wdt_resource,
171};
172
173EXPORT_SYMBOL(s3c_device_wdt);
174
175/* I2C */
176
177static struct resource s3c_i2c_resource[] = {
178 [0] = {
179 .start = S3C2410_PA_IIC,
180 .end = S3C2410_PA_IIC + S3C24XX_SZ_IIC,
181 .flags = IORESOURCE_MEM,
182 },
183 [1] = {
184 .start = IRQ_IIC,
185 .end = IRQ_IIC,
186 .flags = IORESOURCE_IRQ,
187 }
188
189};
190
191struct platform_device s3c_device_i2c = {
192 .name = "s3c2410-i2c",
193 .id = -1,
194 .num_resources = ARRAY_SIZE(s3c_i2c_resource),
195 .resource = s3c_i2c_resource,
196};
197
198EXPORT_SYMBOL(s3c_device_i2c);
199
200/* IIS */
201
202static struct resource s3c_iis_resource[] = {
203 [0] = {
204 .start = S3C2410_PA_IIS,
205 .end = S3C2410_PA_IIS + S3C24XX_SZ_IIS,
206 .flags = IORESOURCE_MEM,
207 }
208};
209
210static u64 s3c_device_iis_dmamask = 0xffffffffUL;
211
212struct platform_device s3c_device_iis = {
213 .name = "s3c2410-iis",
214 .id = -1,
215 .num_resources = ARRAY_SIZE(s3c_iis_resource),
216 .resource = s3c_iis_resource,
217 .dev = {
218 .dma_mask = &s3c_device_iis_dmamask,
219 .coherent_dma_mask = 0xffffffffUL
220 }
221};
222
223EXPORT_SYMBOL(s3c_device_iis);
224
225/* RTC */
226
227static struct resource s3c_rtc_resource[] = {
228 [0] = {
229 .start = S3C2410_PA_RTC,
230 .end = S3C2410_PA_RTC + 0xff,
231 .flags = IORESOURCE_MEM,
232 },
233 [1] = {
234 .start = IRQ_RTC,
235 .end = IRQ_RTC,
236 .flags = IORESOURCE_IRQ,
237 },
238 [2] = {
239 .start = IRQ_TICK,
240 .end = IRQ_TICK,
241 .flags = IORESOURCE_IRQ
242 }
243};
244
245struct platform_device s3c_device_rtc = {
246 .name = "s3c2410-rtc",
247 .id = -1,
248 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
249 .resource = s3c_rtc_resource,
250};
251
252EXPORT_SYMBOL(s3c_device_rtc);
253
254/* ADC */
255
256static struct resource s3c_adc_resource[] = {
257 [0] = {
258 .start = S3C2410_PA_ADC,
259 .end = S3C2410_PA_ADC + S3C24XX_SZ_ADC,
260 .flags = IORESOURCE_MEM,
261 },
262 [1] = {
263 .start = IRQ_TC,
264 .end = IRQ_ADC,
265 .flags = IORESOURCE_IRQ,
266 }
267
268};
269
270struct platform_device s3c_device_adc = {
271 .name = "s3c2410-adc",
272 .id = -1,
273 .num_resources = ARRAY_SIZE(s3c_adc_resource),
274 .resource = s3c_adc_resource,
275};
276
277/* SDI */
278
279static struct resource s3c_sdi_resource[] = {
280 [0] = {
281 .start = S3C2410_PA_SDI,
282 .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI,
283 .flags = IORESOURCE_MEM,
284 },
285 [1] = {
286 .start = IRQ_SDI,
287 .end = IRQ_SDI,
288 .flags = IORESOURCE_IRQ,
289 }
290
291};
292
293struct platform_device s3c_device_sdi = {
294 .name = "s3c2410-sdi",
295 .id = -1,
296 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
297 .resource = s3c_sdi_resource,
298};
299
300EXPORT_SYMBOL(s3c_device_sdi);
301
302/* SPI (0) */
303
304static struct resource s3c_spi0_resource[] = {
305 [0] = {
306 .start = S3C2410_PA_SPI,
307 .end = S3C2410_PA_SPI + 0x1f,
308 .flags = IORESOURCE_MEM,
309 },
310 [1] = {
311 .start = IRQ_SPI0,
312 .end = IRQ_SPI0,
313 .flags = IORESOURCE_IRQ,
314 }
315
316};
317
318struct platform_device s3c_device_spi0 = {
319 .name = "s3c2410-spi",
320 .id = 0,
321 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
322 .resource = s3c_spi0_resource,
323};
324
325EXPORT_SYMBOL(s3c_device_spi0);
326
327/* SPI (1) */
328
329static struct resource s3c_spi1_resource[] = {
330 [0] = {
331 .start = S3C2410_PA_SPI + 0x20,
332 .end = S3C2410_PA_SPI + 0x20 + 0x1f,
333 .flags = IORESOURCE_MEM,
334 },
335 [1] = {
336 .start = IRQ_SPI1,
337 .end = IRQ_SPI1,
338 .flags = IORESOURCE_IRQ,
339 }
340
341};
342
343struct platform_device s3c_device_spi1 = {
344 .name = "s3c2410-spi",
345 .id = 1,
346 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
347 .resource = s3c_spi1_resource,
348};
349
350EXPORT_SYMBOL(s3c_device_spi1);
351
352/* pwm timer blocks */
353
354static struct resource s3c_timer0_resource[] = {
355 [0] = {
356 .start = S3C2410_PA_TIMER + 0x0C,
357 .end = S3C2410_PA_TIMER + 0x0C + 0xB,
358 .flags = IORESOURCE_MEM,
359 },
360 [1] = {
361 .start = IRQ_TIMER0,
362 .end = IRQ_TIMER0,
363 .flags = IORESOURCE_IRQ,
364 }
365
366};
367
368struct platform_device s3c_device_timer0 = {
369 .name = "s3c2410-timer",
370 .id = 0,
371 .num_resources = ARRAY_SIZE(s3c_timer0_resource),
372 .resource = s3c_timer0_resource,
373};
374
375EXPORT_SYMBOL(s3c_device_timer0);
376
377/* timer 1 */
378
379static struct resource s3c_timer1_resource[] = {
380 [0] = {
381 .start = S3C2410_PA_TIMER + 0x18,
382 .end = S3C2410_PA_TIMER + 0x23,
383 .flags = IORESOURCE_MEM,
384 },
385 [1] = {
386 .start = IRQ_TIMER1,
387 .end = IRQ_TIMER1,
388 .flags = IORESOURCE_IRQ,
389 }
390
391};
392
393struct platform_device s3c_device_timer1 = {
394 .name = "s3c2410-timer",
395 .id = 1,
396 .num_resources = ARRAY_SIZE(s3c_timer1_resource),
397 .resource = s3c_timer1_resource,
398};
399
400EXPORT_SYMBOL(s3c_device_timer1);
401
402/* timer 2 */
403
404static struct resource s3c_timer2_resource[] = {
405 [0] = {
406 .start = S3C2410_PA_TIMER + 0x24,
407 .end = S3C2410_PA_TIMER + 0x2F,
408 .flags = IORESOURCE_MEM,
409 },
410 [1] = {
411 .start = IRQ_TIMER2,
412 .end = IRQ_TIMER2,
413 .flags = IORESOURCE_IRQ,
414 }
415
416};
417
418struct platform_device s3c_device_timer2 = {
419 .name = "s3c2410-timer",
420 .id = 2,
421 .num_resources = ARRAY_SIZE(s3c_timer2_resource),
422 .resource = s3c_timer2_resource,
423};
424
425EXPORT_SYMBOL(s3c_device_timer2);
426
427/* timer 3 */
428
429static struct resource s3c_timer3_resource[] = {
430 [0] = {
431 .start = S3C2410_PA_TIMER + 0x30,
432 .end = S3C2410_PA_TIMER + 0x3B,
433 .flags = IORESOURCE_MEM,
434 },
435 [1] = {
436 .start = IRQ_TIMER3,
437 .end = IRQ_TIMER3,
438 .flags = IORESOURCE_IRQ,
439 }
440
441};
442
443struct platform_device s3c_device_timer3 = {
444 .name = "s3c2410-timer",
445 .id = 3,
446 .num_resources = ARRAY_SIZE(s3c_timer3_resource),
447 .resource = s3c_timer3_resource,
448};
449
450EXPORT_SYMBOL(s3c_device_timer3);
451
452#ifdef CONFIG_CPU_S3C2440
453
454/* Camif Controller */
455
456static struct resource s3c_camif_resource[] = {
457 [0] = {
458 .start = S3C2440_PA_CAMIF,
459 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF,
460 .flags = IORESOURCE_MEM,
461 },
462 [1] = {
463 .start = IRQ_CAM,
464 .end = IRQ_CAM,
465 .flags = IORESOURCE_IRQ,
466 }
467
468};
469
470static u64 s3c_device_camif_dmamask = 0xffffffffUL;
471
472struct platform_device s3c_device_camif = {
473 .name = "s3c2440-camif",
474 .id = -1,
475 .num_resources = ARRAY_SIZE(s3c_camif_resource),
476 .resource = s3c_camif_resource,
477 .dev = {
478 .dma_mask = &s3c_device_camif_dmamask,
479 .coherent_dma_mask = 0xffffffffUL
480 }
481};
482
483EXPORT_SYMBOL(s3c_device_camif);
484
485#endif // CONFIG_CPU_S32440