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Daniel Vetter55310002014-01-23 15:52:20 +01001/*
2 * Copyright © 2006 Keith Packard
3 * Copyright © 2007-2008 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 * Jesse Barnes <jesse.barnes@intel.com>
6 * Copyright © 2014 Intel Corporation
7 * Daniel Vetter <daniel.vetter@ffwll.ch>
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 */
27#ifndef __DRM_MODES_H__
28#define __DRM_MODES_H__
29
30/*
31 * Note on terminology: here, for brevity and convenience, we refer to connector
32 * control chips as 'CRTCs'. They can control any type of connector, VGA, LVDS,
33 * DVI, etc. And 'screen' refers to the whole of the visible display, which
34 * may span multiple monitors (and therefore multiple CRTC and connector
35 * structures).
36 */
37
Daniel Vetter30ecad72015-12-09 09:29:36 +010038/**
39 * enum drm_mode_status - hardware support status of a mode
40 * @MODE_OK: Mode OK
41 * @MODE_HSYNC: hsync out of range
42 * @MODE_VSYNC: vsync out of range
43 * @MODE_H_ILLEGAL: mode has illegal horizontal timings
44 * @MODE_V_ILLEGAL: mode has illegal horizontal timings
45 * @MODE_BAD_WIDTH: requires an unsupported linepitch
46 * @MODE_NOMODE: no mode with a matching name
47 * @MODE_NO_INTERLACE: interlaced mode not supported
48 * @MODE_NO_DBLESCAN: doublescan mode not supported
49 * @MODE_NO_VSCAN: multiscan mode not supported
50 * @MODE_MEM: insufficient video memory
51 * @MODE_VIRTUAL_X: mode width too large for specified virtual size
52 * @MODE_VIRTUAL_Y: mode height too large for specified virtual size
53 * @MODE_MEM_VIRT: insufficient video memory given virtual size
54 * @MODE_NOCLOCK: no fixed clock available
55 * @MODE_CLOCK_HIGH: clock required is too high
56 * @MODE_CLOCK_LOW: clock required is too low
57 * @MODE_CLOCK_RANGE: clock/mode isn't in a ClockRange
58 * @MODE_BAD_HVALUE: horizontal timing was out of range
59 * @MODE_BAD_VVALUE: vertical timing was out of range
60 * @MODE_BAD_VSCAN: VScan value out of range
61 * @MODE_HSYNC_NARROW: horizontal sync too narrow
62 * @MODE_HSYNC_WIDE: horizontal sync too wide
63 * @MODE_HBLANK_NARROW: horizontal blanking too narrow
64 * @MODE_HBLANK_WIDE: horizontal blanking too wide
65 * @MODE_VSYNC_NARROW: vertical sync too narrow
66 * @MODE_VSYNC_WIDE: vertical sync too wide
67 * @MODE_VBLANK_NARROW: vertical blanking too narrow
68 * @MODE_VBLANK_WIDE: vertical blanking too wide
69 * @MODE_PANEL: exceeds panel dimensions
70 * @MODE_INTERLACE_WIDTH: width too large for interlaced mode
71 * @MODE_ONE_WIDTH: only one width is supported
72 * @MODE_ONE_HEIGHT: only one height is supported
73 * @MODE_ONE_SIZE: only one resolution is supported
74 * @MODE_NO_REDUCED: monitor doesn't accept reduced blanking
75 * @MODE_NO_STEREO: stereo modes not supported
Ville Syrjälä5ba89402015-12-10 22:39:08 +020076 * @MODE_STALE: mode has become stale
Daniel Vetter30ecad72015-12-09 09:29:36 +010077 * @MODE_BAD: unspecified reason
78 * @MODE_ERROR: error condition
79 *
80 * This enum is used to filter out modes not supported by the driver/hardware
81 * combination.
82 */
Daniel Vetter55310002014-01-23 15:52:20 +010083enum drm_mode_status {
Daniel Vetter30ecad72015-12-09 09:29:36 +010084 MODE_OK = 0,
85 MODE_HSYNC,
86 MODE_VSYNC,
87 MODE_H_ILLEGAL,
88 MODE_V_ILLEGAL,
89 MODE_BAD_WIDTH,
90 MODE_NOMODE,
91 MODE_NO_INTERLACE,
92 MODE_NO_DBLESCAN,
93 MODE_NO_VSCAN,
94 MODE_MEM,
95 MODE_VIRTUAL_X,
96 MODE_VIRTUAL_Y,
97 MODE_MEM_VIRT,
98 MODE_NOCLOCK,
99 MODE_CLOCK_HIGH,
100 MODE_CLOCK_LOW,
101 MODE_CLOCK_RANGE,
102 MODE_BAD_HVALUE,
103 MODE_BAD_VVALUE,
104 MODE_BAD_VSCAN,
105 MODE_HSYNC_NARROW,
106 MODE_HSYNC_WIDE,
107 MODE_HBLANK_NARROW,
108 MODE_HBLANK_WIDE,
109 MODE_VSYNC_NARROW,
110 MODE_VSYNC_WIDE,
111 MODE_VBLANK_NARROW,
112 MODE_VBLANK_WIDE,
113 MODE_PANEL,
114 MODE_INTERLACE_WIDTH,
115 MODE_ONE_WIDTH,
116 MODE_ONE_HEIGHT,
117 MODE_ONE_SIZE,
118 MODE_NO_REDUCED,
119 MODE_NO_STEREO,
Ville Syrjälä5ba89402015-12-10 22:39:08 +0200120 MODE_STALE = -3,
Daniel Vetter30ecad72015-12-09 09:29:36 +0100121 MODE_BAD = -2,
122 MODE_ERROR = -1
Daniel Vetter55310002014-01-23 15:52:20 +0100123};
124
125#define DRM_MODE_TYPE_CLOCK_CRTC_C (DRM_MODE_TYPE_CLOCK_C | \
126 DRM_MODE_TYPE_CRTC_C)
127
128#define DRM_MODE(nm, t, c, hd, hss, hse, ht, hsk, vd, vss, vse, vt, vs, f) \
129 .name = nm, .status = 0, .type = (t), .clock = (c), \
130 .hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
131 .htotal = (ht), .hskew = (hsk), .vdisplay = (vd), \
132 .vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
133 .vscan = (vs), .flags = (f), \
134 .base.type = DRM_MODE_OBJECT_MODE
135
136#define CRTC_INTERLACE_HALVE_V (1 << 0) /* halve V values for interlacing */
137#define CRTC_STEREO_DOUBLE (1 << 1) /* adjust timings for stereo modes */
Gustavo Padovanecb7e162014-12-01 15:40:09 -0800138#define CRTC_NO_DBLSCAN (1 << 2) /* don't adjust doublescan */
139#define CRTC_NO_VSCAN (1 << 3) /* don't adjust doublescan */
Damien Lespiau498b8732015-02-16 15:12:31 +0000140#define CRTC_STEREO_DOUBLE_ONLY (CRTC_STEREO_DOUBLE | CRTC_NO_DBLSCAN | CRTC_NO_VSCAN)
Daniel Vetter55310002014-01-23 15:52:20 +0100141
142#define DRM_MODE_FLAG_3D_MAX DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
143
Daniel Vetter30ecad72015-12-09 09:29:36 +0100144/**
145 * struct drm_display_mode - DRM kernel-internal display mode structure
146 * @hdisplay: horizontal display size
147 * @hsync_start: horizontal sync start
148 * @hsync_end: horizontal sync end
149 * @htotal: horizontal total size
150 * @hskew: horizontal skew?!
151 * @vdisplay: vertical display size
152 * @vsync_start: vertical sync start
153 * @vsync_end: vertical sync end
154 * @vtotal: vertical total size
155 * @vscan: vertical scan?!
156 * @crtc_hdisplay: hardware mode horizontal display size
157 * @crtc_hblank_start: hardware mode horizontal blank start
158 * @crtc_hblank_end: hardware mode horizontal blank end
159 * @crtc_hsync_start: hardware mode horizontal sync start
160 * @crtc_hsync_end: hardware mode horizontal sync end
161 * @crtc_htotal: hardware mode horizontal total size
162 * @crtc_hskew: hardware mode horizontal skew?!
163 * @crtc_vdisplay: hardware mode vertical display size
164 * @crtc_vblank_start: hardware mode vertical blank start
165 * @crtc_vblank_end: hardware mode vertical blank end
166 * @crtc_vsync_start: hardware mode vertical sync start
167 * @crtc_vsync_end: hardware mode vertical sync end
168 * @crtc_vtotal: hardware mode vertical total size
169 *
170 * The horizontal and vertical timings are defined per the following diagram.
171 *
Daniel Vetterda5335b2016-05-31 22:55:13 +0200172 * ::
173 *
Daniel Vetter30ecad72015-12-09 09:29:36 +0100174 *
175 * Active Front Sync Back
176 * Region Porch Porch
177 * <-----------------------><----------------><-------------><-------------->
178 * //////////////////////|
179 * ////////////////////// |
180 * ////////////////////// |.................. ................
181 * _______________
182 * <----- [hv]display ----->
183 * <------------- [hv]sync_start ------------>
184 * <--------------------- [hv]sync_end --------------------->
185 * <-------------------------------- [hv]total ----------------------------->*
186 *
187 * This structure contains two copies of timings. First are the plain timings,
188 * which specify the logical mode, as it would be for a progressive 1:1 scanout
189 * at the refresh rate userspace can observe through vblank timestamps. Then
190 * there's the hardware timings, which are corrected for interlacing,
191 * double-clocking and similar things. They are provided as a convenience, and
192 * can be appropriately computed using drm_mode_set_crtcinfo().
193 */
Daniel Vetter55310002014-01-23 15:52:20 +0100194struct drm_display_mode {
Daniel Vetter30ecad72015-12-09 09:29:36 +0100195 /**
196 * @head:
197 *
198 * struct list_head for mode lists.
199 */
Daniel Vetter55310002014-01-23 15:52:20 +0100200 struct list_head head;
Daniel Vetter30ecad72015-12-09 09:29:36 +0100201
202 /**
203 * @base:
204 *
205 * A display mode is a normal modeset object, possibly including public
206 * userspace id.
207 *
208 * FIXME:
209 *
210 * This can probably be removed since the entire concept of userspace
211 * managing modes explicitly has never landed in upstream kernel mode
212 * setting support.
213 */
Daniel Vetter55310002014-01-23 15:52:20 +0100214 struct drm_mode_object base;
215
Daniel Vetter30ecad72015-12-09 09:29:36 +0100216 /**
217 * @name:
218 *
219 * Human-readable name of the mode, filled out with drm_mode_set_name().
220 */
Daniel Vetter55310002014-01-23 15:52:20 +0100221 char name[DRM_DISPLAY_MODE_LEN];
222
Daniel Vetter30ecad72015-12-09 09:29:36 +0100223 /**
224 * @status:
225 *
226 * Status of the mode, used to filter out modes not supported by the
227 * hardware. See enum &drm_mode_status.
228 */
Daniel Vetter55310002014-01-23 15:52:20 +0100229 enum drm_mode_status status;
Daniel Vetter30ecad72015-12-09 09:29:36 +0100230
231 /**
232 * @type:
233 *
234 * A bitmask of flags, mostly about the source of a mode. Possible flags
235 * are:
236 *
237 * - DRM_MODE_TYPE_BUILTIN: Meant for hard-coded modes, effectively
238 * unused.
239 * - DRM_MODE_TYPE_PREFERRED: Preferred mode, usually the native
240 * resolution of an LCD panel. There should only be one preferred
241 * mode per connector at any given time.
242 * - DRM_MODE_TYPE_DRIVER: Mode created by the driver, which is all of
243 * them really. Drivers must set this bit for all modes they create
244 * and expose to userspace.
245 *
246 * Plus a big list of flags which shouldn't be used at all, but are
247 * still around since these flags are also used in the userspace ABI:
248 *
249 * - DRM_MODE_TYPE_DEFAULT: Again a leftover, use
250 * DRM_MODE_TYPE_PREFERRED instead.
251 * - DRM_MODE_TYPE_CLOCK_C and DRM_MODE_TYPE_CRTC_C: Define leftovers
252 * which are stuck around for hysterical raisins only. No one has an
253 * idea what they were meant for. Don't use.
254 * - DRM_MODE_TYPE_USERDEF: Mode defined by userspace, again a vestige
255 * from older kms designs where userspace had to first add a custom
256 * mode to the kernel's mode list before it could use it. Don't use.
257 */
Daniel Vetter55310002014-01-23 15:52:20 +0100258 unsigned int type;
259
Daniel Vetter30ecad72015-12-09 09:29:36 +0100260 /**
261 * @clock:
262 *
263 * Pixel clock in kHz.
264 */
Daniel Vetter55310002014-01-23 15:52:20 +0100265 int clock; /* in kHz */
266 int hdisplay;
267 int hsync_start;
268 int hsync_end;
269 int htotal;
270 int hskew;
271 int vdisplay;
272 int vsync_start;
273 int vsync_end;
274 int vtotal;
275 int vscan;
Daniel Vetter30ecad72015-12-09 09:29:36 +0100276 /**
277 * @flags:
278 *
279 * Sync and timing flags:
280 *
281 * - DRM_MODE_FLAG_PHSYNC: horizontal sync is active high.
282 * - DRM_MODE_FLAG_NHSYNC: horizontal sync is active low.
283 * - DRM_MODE_FLAG_PVSYNC: vertical sync is active high.
284 * - DRM_MODE_FLAG_NVSYNC: vertical sync is active low.
285 * - DRM_MODE_FLAG_INTERLACE: mode is interlaced.
286 * - DRM_MODE_FLAG_DBLSCAN: mode uses doublescan.
287 * - DRM_MODE_FLAG_CSYNC: mode uses composite sync.
288 * - DRM_MODE_FLAG_PCSYNC: composite sync is active high.
289 * - DRM_MODE_FLAG_NCSYNC: composite sync is active low.
290 * - DRM_MODE_FLAG_HSKEW: hskew provided (not used?).
291 * - DRM_MODE_FLAG_BCAST: not used?
292 * - DRM_MODE_FLAG_PIXMUX: not used?
293 * - DRM_MODE_FLAG_DBLCLK: double-clocked mode.
294 * - DRM_MODE_FLAG_CLKDIV2: half-clocked mode.
295 *
296 * Additionally there's flags to specify how 3D modes are packed:
297 *
298 * - DRM_MODE_FLAG_3D_NONE: normal, non-3D mode.
299 * - DRM_MODE_FLAG_3D_FRAME_PACKING: 2 full frames for left and right.
300 * - DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE: interleaved like fields.
301 * - DRM_MODE_FLAG_3D_LINE_ALTERNATIVE: interleaved lines.
302 * - DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL: side-by-side full frames.
303 * - DRM_MODE_FLAG_3D_L_DEPTH: ?
304 * - DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH: ?
305 * - DRM_MODE_FLAG_3D_TOP_AND_BOTTOM: frame split into top and bottom
306 * parts.
307 * - DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF: frame split into left and
308 * right parts.
309 */
Daniel Vetter55310002014-01-23 15:52:20 +0100310 unsigned int flags;
311
Daniel Vetter30ecad72015-12-09 09:29:36 +0100312 /**
313 * @width_mm:
314 *
315 * Addressable size of the output in mm, projectors should set this to
316 * 0.
317 */
Daniel Vetter55310002014-01-23 15:52:20 +0100318 int width_mm;
Daniel Vetter30ecad72015-12-09 09:29:36 +0100319
320 /**
321 * @height_mm:
322 *
323 * Addressable size of the output in mm, projectors should set this to
324 * 0.
325 */
Daniel Vetter55310002014-01-23 15:52:20 +0100326 int height_mm;
327
Daniel Vetter30ecad72015-12-09 09:29:36 +0100328 /**
329 * @crtc_clock:
330 *
331 * Actual pixel or dot clock in the hardware. This differs from the
332 * logical @clock when e.g. using interlacing, double-clocking, stereo
333 * modes or other fancy stuff that changes the timings and signals
334 * actually sent over the wire.
335 *
336 * This is again in kHz.
337 *
338 * Note that with digital outputs like HDMI or DP there's usually a
339 * massive confusion between the dot clock and the signal clock at the
340 * bit encoding level. Especially when a 8b/10b encoding is used and the
341 * difference is exactly a factor of 10.
342 */
343 int crtc_clock;
Daniel Vetter55310002014-01-23 15:52:20 +0100344 int crtc_hdisplay;
345 int crtc_hblank_start;
346 int crtc_hblank_end;
347 int crtc_hsync_start;
348 int crtc_hsync_end;
349 int crtc_htotal;
350 int crtc_hskew;
351 int crtc_vdisplay;
352 int crtc_vblank_start;
353 int crtc_vblank_end;
354 int crtc_vsync_start;
355 int crtc_vsync_end;
356 int crtc_vtotal;
357
Daniel Vetter30ecad72015-12-09 09:29:36 +0100358 /**
359 * @private:
360 *
361 * Pointer for driver private data. This can only be used for mode
362 * objects passed to drivers in modeset operations. It shouldn't be used
363 * by atomic drivers since they can store any additional data by
364 * subclassing state structures.
365 */
Daniel Vetter55310002014-01-23 15:52:20 +0100366 int *private;
Daniel Vetter30ecad72015-12-09 09:29:36 +0100367
368 /**
369 * @private_flags:
370 *
371 * Similar to @private, but just an integer.
372 */
Daniel Vetter55310002014-01-23 15:52:20 +0100373 int private_flags;
374
Daniel Vetter30ecad72015-12-09 09:29:36 +0100375 /**
376 * @vrefresh:
377 *
378 * Vertical refresh rate, for debug output in human readable form. Not
379 * used in a functional way.
380 *
381 * This value is in Hz.
382 */
383 int vrefresh;
384
385 /**
386 * @hsync:
387 *
388 * Horizontal refresh rate, for debug output in human readable form. Not
389 * used in a functional way.
390 *
391 * This value is in kHz.
392 */
393 int hsync;
394
395 /**
396 * @picture_aspect_ratio:
397 *
398 * Field for setting the HDMI picture aspect ratio of a mode.
399 */
Daniel Vetter55310002014-01-23 15:52:20 +0100400 enum hdmi_picture_aspect picture_aspect_ratio;
401};
402
403/* mode specified on the command line */
404struct drm_cmdline_mode {
405 bool specified;
406 bool refresh_specified;
407 bool bpp_specified;
408 int xres, yres;
409 int bpp;
410 int refresh;
411 bool rb;
412 bool interlace;
413 bool cvt;
414 bool margins;
415 enum drm_connector_force force;
416};
417
Daniel Vetterf5aabb92014-01-23 20:05:00 +0100418/**
419 * drm_mode_is_stereo - check for stereo mode flags
420 * @mode: drm_display_mode to check
421 *
422 * Returns:
423 * True if the mode is one of the stereo modes (like side-by-side), false if
424 * not.
425 */
Daniel Vetter55310002014-01-23 15:52:20 +0100426static inline bool drm_mode_is_stereo(const struct drm_display_mode *mode)
427{
428 return mode->flags & DRM_MODE_FLAG_3D_MASK;
429}
430
431struct drm_connector;
432struct drm_cmdline_mode;
433
434struct drm_display_mode *drm_mode_create(struct drm_device *dev);
435void drm_mode_destroy(struct drm_device *dev, struct drm_display_mode *mode);
Daniel Stone934a8a82015-05-22 13:34:48 +0100436void drm_mode_convert_to_umode(struct drm_mode_modeinfo *out,
437 const struct drm_display_mode *in);
438int drm_mode_convert_umode(struct drm_display_mode *out,
439 const struct drm_mode_modeinfo *in);
Daniel Vetter55310002014-01-23 15:52:20 +0100440void drm_mode_probed_add(struct drm_connector *connector, struct drm_display_mode *mode);
441void drm_mode_debug_printmodeline(const struct drm_display_mode *mode);
442
443struct drm_display_mode *drm_cvt_mode(struct drm_device *dev,
444 int hdisplay, int vdisplay, int vrefresh,
445 bool reduced, bool interlaced,
446 bool margins);
447struct drm_display_mode *drm_gtf_mode(struct drm_device *dev,
448 int hdisplay, int vdisplay, int vrefresh,
449 bool interlaced, int margins);
450struct drm_display_mode *drm_gtf_mode_complex(struct drm_device *dev,
451 int hdisplay, int vdisplay,
452 int vrefresh, bool interlaced,
453 int margins,
454 int GTF_M, int GTF_2C,
455 int GTF_K, int GTF_2J);
Daniel Vetterba0c2422014-01-23 16:28:50 +0100456void drm_display_mode_from_videomode(const struct videomode *vm,
457 struct drm_display_mode *dmode);
Steve Longerbeamd490f452014-12-18 18:00:22 -0800458void drm_display_mode_to_videomode(const struct drm_display_mode *dmode,
459 struct videomode *vm);
Daniel Vetter55310002014-01-23 15:52:20 +0100460int of_get_drm_display_mode(struct device_node *np,
461 struct drm_display_mode *dmode,
462 int index);
463
464void drm_mode_set_name(struct drm_display_mode *mode);
Daniel Vetter55310002014-01-23 15:52:20 +0100465int drm_mode_hsync(const struct drm_display_mode *mode);
466int drm_mode_vrefresh(const struct drm_display_mode *mode);
467
468void drm_mode_set_crtcinfo(struct drm_display_mode *p,
469 int adjust_flags);
470void drm_mode_copy(struct drm_display_mode *dst,
471 const struct drm_display_mode *src);
472struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
473 const struct drm_display_mode *mode);
474bool drm_mode_equal(const struct drm_display_mode *mode1,
475 const struct drm_display_mode *mode2);
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +0200476bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1,
477 const struct drm_display_mode *mode2);
Daniel Vetter55310002014-01-23 15:52:20 +0100478bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1,
479 const struct drm_display_mode *mode2);
480
481/* for use by the crtc helper probe functions */
Ville Syrjäläabc0b142014-12-17 13:56:23 +0200482enum drm_mode_status drm_mode_validate_basic(const struct drm_display_mode *mode);
Ville Syrjälä05acaec2014-12-17 13:56:22 +0200483enum drm_mode_status drm_mode_validate_size(const struct drm_display_mode *mode,
484 int maxX, int maxY);
Daniel Vetter55310002014-01-23 15:52:20 +0100485void drm_mode_prune_invalid(struct drm_device *dev,
486 struct list_head *mode_list, bool verbose);
487void drm_mode_sort(struct list_head *mode_list);
Ville Syrjälä6af3e652015-12-03 23:14:14 +0200488void drm_mode_connector_list_update(struct drm_connector *connector);
Daniel Vetter55310002014-01-23 15:52:20 +0100489
490/* parsing cmdline modes */
491bool
492drm_mode_parse_command_line_for_connector(const char *mode_option,
493 struct drm_connector *connector,
494 struct drm_cmdline_mode *mode);
495struct drm_display_mode *
496drm_mode_create_from_cmdline_mode(struct drm_device *dev,
497 struct drm_cmdline_mode *cmd);
498
499#endif /* __DRM_MODES_H__ */