blob: 7cd63788d546d885e70ef2b543c3f1ef93dffe43 [file] [log] [blame]
Viresh Kumar55b8fd42012-04-10 09:02:35 +05301/*
2 * Copyright (C) 2012 ST Microelectronics
Viresh Kumar10d89352012-06-20 12:53:02 -07003 * Viresh Kumar <viresh.linux@gmail.com>
Viresh Kumar55b8fd42012-04-10 09:02:35 +05304 *
5 * This file is licensed under the terms of the GNU General Public
6 * License version 2. This program is licensed "as is" without any
7 * warranty of any kind, whether express or implied.
8 *
9 * SPEAr clk - Common routines
10 */
11
12#include <linux/clk-provider.h>
13#include <linux/types.h>
14#include "clk.h"
15
16long clk_round_rate_index(struct clk_hw *hw, unsigned long drate,
17 unsigned long parent_rate, clk_calc_rate calc_rate, u8 rtbl_cnt,
18 int *index)
19{
20 unsigned long prev_rate, rate = 0;
21
22 for (*index = 0; *index < rtbl_cnt; (*index)++) {
23 prev_rate = rate;
24 rate = calc_rate(hw, parent_rate, *index);
25 if (drate < rate) {
26 /* previous clock was best */
27 if (*index) {
28 rate = prev_rate;
29 (*index)--;
30 }
31 break;
32 }
33 }
34
35 return rate;
36}