blob: a697a8585ddc346a72de6e30cdb77785a5688e71 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Driver for 8250/16550-type serial ports
3 *
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
5 *
6 * Copyright (C) 2001 Russell King.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 */
13
Russell Kingbc49a662005-09-01 15:56:26 +010014#include <linux/serial_8250.h>
Yoshihiro YUNOMAEaef9a7b2014-07-16 01:19:36 +000015#include <linux/serial_reg.h>
Heikki Krogerus9ee4b832013-01-10 11:25:11 +020016#include <linux/dmaengine.h>
17
18struct uart_8250_dma {
Sebastian Andrzej Siewiorf1a297b2014-09-29 20:06:42 +020019 int (*tx_dma)(struct uart_8250_port *p);
Peter Hurley33d9b8b22016-04-09 22:14:36 -070020 int (*rx_dma)(struct uart_8250_port *p);
Sebastian Andrzej Siewiorf1a297b2014-09-29 20:06:42 +020021
Andy Shevchenko9a1870c2014-08-19 20:29:22 +030022 /* Filter function */
Heikki Krogerus9ee4b832013-01-10 11:25:11 +020023 dma_filter_fn fn;
Andy Shevchenko9a1870c2014-08-19 20:29:22 +030024 /* Parameter to the filter function */
Heikki Krogerus9ee4b832013-01-10 11:25:11 +020025 void *rx_param;
26 void *tx_param;
27
Heikki Krogerus9ee4b832013-01-10 11:25:11 +020028 struct dma_slave_config rxconf;
29 struct dma_slave_config txconf;
30
31 struct dma_chan *rxchan;
32 struct dma_chan *txchan;
33
Andy Shevchenkod1834ba2016-08-17 19:20:25 +030034 /* Device address base for DMA operations */
35 phys_addr_t rx_dma_addr;
36 phys_addr_t tx_dma_addr;
37
38 /* DMA address of the buffer in memory */
Heikki Krogerus9ee4b832013-01-10 11:25:11 +020039 dma_addr_t rx_addr;
40 dma_addr_t tx_addr;
41
42 dma_cookie_t rx_cookie;
43 dma_cookie_t tx_cookie;
44
45 void *rx_buf;
46
47 size_t rx_size;
48 size_t tx_size;
49
John Ognesseafb9ee2015-08-14 18:01:02 +020050 unsigned char tx_running;
51 unsigned char tx_err;
52 unsigned char rx_running;
Heikki Krogerus9ee4b832013-01-10 11:25:11 +020053};
Linus Torvalds1da177e2005-04-16 15:20:36 -070054
55struct old_serial_port {
56 unsigned int uart;
57 unsigned int baud_base;
58 unsigned int port;
59 unsigned int irq;
Andy Shevchenko079119a2015-03-11 13:52:53 +020060 upf_t flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -070061 unsigned char io_type;
Sudip Mukherjee7f1dc2f2014-10-16 14:16:22 +053062 unsigned char __iomem *iomem_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -070063 unsigned short iomem_reg_shift;
64};
65
Linus Torvalds1da177e2005-04-16 15:20:36 -070066struct serial8250_config {
67 const char *name;
68 unsigned short fifo_size;
69 unsigned short tx_loadsz;
70 unsigned char fcr;
Yoshihiro YUNOMAEaef9a7b2014-07-16 01:19:36 +000071 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
Linus Torvalds1da177e2005-04-16 15:20:36 -070072 unsigned int flags;
73};
74
75#define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
76#define UART_CAP_EFR (1 << 9) /* UART has EFR */
77#define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
78#define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
79#define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
Stephen Warren4539c242011-05-17 16:12:36 -060080#define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
Stephen Hurdebebd492013-01-17 14:14:53 -080081#define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
Sebastian Andrzej Siewiord74d5d12014-09-10 21:29:57 +020082#define UART_CAP_RPM (1 << 15) /* Runtime PM is active while idle */
Linus Torvalds1da177e2005-04-16 15:20:36 -070083
Russell King4ba5e352005-06-23 10:43:04 +010084#define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
Russell King55d3b282005-06-23 15:05:41 +010085#define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
Pantelis Antoniou21c614a2005-11-06 09:07:03 +000086#define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
Will Newton363f66f2008-09-02 14:35:44 -070087#define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
Alan Coxeb26dfe2012-07-12 13:00:31 +010088#define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
Russell King4ba5e352005-06-23 10:43:04 +010089
Linus Torvalds1da177e2005-04-16 15:20:36 -070090
91#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
92#define SERIAL8250_SHARE_IRQS 1
93#else
94#define SERIAL8250_SHARE_IRQS 0
95#endif
96
Anton Wuerfelb3bd6662016-01-14 16:08:24 +010097#define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
98 { \
99 .iobase = _base, \
100 .irq = _irq, \
101 .uartclk = 1843200, \
102 .iotype = UPIO_PORT, \
103 .flags = UPF_BOOT_AUTOCONF | (_flags), \
104 }
105
106#define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
107
108
Paul Gortmaker3f0ab322012-03-08 19:12:09 -0500109static inline int serial_in(struct uart_8250_port *up, int offset)
110{
111 return up->port.serial_in(&up->port, offset);
112}
113
114static inline void serial_out(struct uart_8250_port *up, int offset, int value)
115{
116 up->port.serial_out(&up->port, offset, value);
117}
118
Sudhakar Mamillapalli0ad372b2012-04-10 14:10:58 -0700119void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
120
Magnus Dammcc419fa02012-05-02 21:46:51 +0900121static inline int serial_dl_read(struct uart_8250_port *up)
122{
123 return up->dl_read(up);
124}
125
126static inline void serial_dl_write(struct uart_8250_port *up, int value)
127{
128 up->dl_write(up, value);
129}
130
Sebastian Andrzej Siewiorae14a792014-09-05 21:02:36 +0200131struct uart_8250_port *serial8250_get_port(int line);
Sebastian Andrzej Siewior77285242014-09-29 20:06:48 +0200132void serial8250_rpm_get(struct uart_8250_port *p);
133void serial8250_rpm_put(struct uart_8250_port *p);
Matwey V. Kornilove490c912016-02-01 21:09:21 +0300134int serial8250_em485_init(struct uart_8250_port *p);
135void serial8250_em485_destroy(struct uart_8250_port *p);
Sebastian Andrzej Siewiorae14a792014-09-05 21:02:36 +0200136
Yegor Yefremov36fd95b2016-05-31 10:59:15 +0200137static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
138{
139 serial_out(up, UART_MCR, value);
140}
141
142static inline int serial8250_in_MCR(struct uart_8250_port *up)
143{
Andy Shevchenko5db4f7f2016-08-16 15:06:54 +0300144 return serial_in(up, UART_MCR);
Yegor Yefremov36fd95b2016-05-31 10:59:15 +0200145}
146
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147#if defined(__alpha__) && !defined(CONFIG_PCI)
148/*
149 * Digital did something really horribly wrong with the OUT1 and OUT2
150 * lines on at least some ALPHA's. The failure mode is that if either
151 * is cleared, the machine locks up with endless interrupts.
152 */
153#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700154#else
155#define ALPHA_KLUDGE_MCR 0
156#endif
Sean Young835d8442012-09-07 19:06:23 +0100157
158#ifdef CONFIG_SERIAL_8250_PNP
159int serial8250_pnp_init(void);
160void serial8250_pnp_exit(void);
161#else
162static inline int serial8250_pnp_init(void) { return 0; }
163static inline void serial8250_pnp_exit(void) { }
164#endif
165
Ricardo Ribalda Delgadofa01e2c2016-04-27 10:40:10 +0200166#ifdef CONFIG_SERIAL_8250_FINTEK
167int fintek_8250_probe(struct uart_8250_port *uart);
168#else
169static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
170#endif
171
Tony Lindgren54ec52b2012-10-03 15:31:58 -0700172#ifdef CONFIG_ARCH_OMAP1
173static inline int is_omap1_8250(struct uart_8250_port *pt)
174{
175 int res;
176
177 switch (pt->port.mapbase) {
178 case OMAP1_UART1_BASE:
179 case OMAP1_UART2_BASE:
180 case OMAP1_UART3_BASE:
181 res = 1;
182 break;
183 default:
184 res = 0;
185 break;
186 }
187
188 return res;
189}
190
191static inline int is_omap1510_8250(struct uart_8250_port *pt)
192{
193 if (!cpu_is_omap1510())
194 return 0;
195
196 return is_omap1_8250(pt);
197}
198#else
199static inline int is_omap1_8250(struct uart_8250_port *pt)
200{
201 return 0;
202}
203static inline int is_omap1510_8250(struct uart_8250_port *pt)
204{
205 return 0;
206}
207#endif
Heikki Krogerus9ee4b832013-01-10 11:25:11 +0200208
209#ifdef CONFIG_SERIAL_8250_DMA
210extern int serial8250_tx_dma(struct uart_8250_port *);
Peter Hurley33d9b8b22016-04-09 22:14:36 -0700211extern int serial8250_rx_dma(struct uart_8250_port *);
212extern void serial8250_rx_dma_flush(struct uart_8250_port *);
Heikki Krogerus9ee4b832013-01-10 11:25:11 +0200213extern int serial8250_request_dma(struct uart_8250_port *);
214extern void serial8250_release_dma(struct uart_8250_port *);
215#else
216static inline int serial8250_tx_dma(struct uart_8250_port *p)
217{
218 return -1;
219}
Peter Hurley33d9b8b22016-04-09 22:14:36 -0700220static inline int serial8250_rx_dma(struct uart_8250_port *p)
Heikki Krogerus9ee4b832013-01-10 11:25:11 +0200221{
222 return -1;
223}
Peter Hurley33d9b8b22016-04-09 22:14:36 -0700224static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
Heikki Krogerus9ee4b832013-01-10 11:25:11 +0200225static inline int serial8250_request_dma(struct uart_8250_port *p)
226{
227 return -1;
228}
229static inline void serial8250_release_dma(struct uart_8250_port *p) { }
230#endif
Peter Hurleyd81e50f2015-02-24 14:25:04 -0500231
232static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
233{
234 unsigned char status;
235
236 status = serial_in(up, 0x04); /* EXCR2 */
237#define PRESL(x) ((x) & 0x30)
238 if (PRESL(status) == 0x10) {
239 /* already in high speed mode */
240 return 0;
241 } else {
242 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
243 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
244 serial_out(up, 0x04, status);
245 }
246 return 1;
247}
Peter Hurleyb6830f62015-06-27 09:19:00 -0400248
249static inline int serial_index(struct uart_port *port)
250{
251 return port->minor - 64;
252}