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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file contains the routines for TLB flushing.
3 * On machines where the MMU uses a hash table to store virtual to
4 * physical translations, these routines flush entries from the
5 * hash table also.
6 * -- paulus
7 *
8 * Derived from arch/ppc/mm/init.c:
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10 *
11 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
12 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
13 * Copyright (C) 1996 Paul Mackerras
14 * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
15 *
16 * Derived from "arch/i386/mm/init.c"
17 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
18 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
23 *
24 */
25
Linus Torvalds1da177e2005-04-16 15:20:36 -070026#include <linux/kernel.h>
27#include <linux/mm.h>
28#include <linux/init.h>
29#include <linux/highmem.h>
30#include <asm/tlbflush.h>
31#include <asm/tlb.h>
32
33#include "mmu_decl.h"
34
35/*
36 * Called when unmapping pages to flush entries from the TLB/hash table.
37 */
38void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, unsigned long addr)
39{
40 unsigned long ptephys;
41
42 if (Hash != 0) {
43 ptephys = __pa(ptep) & PAGE_MASK;
Paul Mackerras31925322006-06-13 13:43:00 +100044 flush_hash_pages(mm->context.id, addr, ptephys, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -070045 }
46}
47
48/*
49 * Called by ptep_set_access_flags, must flush on CPUs for which the
50 * DSI handler can't just "fixup" the TLB on a write fault
51 */
52void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr)
53{
54 if (Hash != 0)
55 return;
56 _tlbie(addr);
57}
58
59/*
60 * Called at the end of a mmu_gather operation to make sure the
61 * TLB flush is completely done.
62 */
63void tlb_flush(struct mmu_gather *tlb)
64{
65 if (Hash == 0) {
66 /*
67 * 603 needs to flush the whole TLB here since
68 * it doesn't use a hash table.
69 */
70 _tlbia();
71 }
72}
73
74/*
75 * TLB flushing:
76 *
77 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
78 * - flush_tlb_page(vma, vmaddr) flushes one page
79 * - flush_tlb_range(vma, start, end) flushes a range of pages
80 * - flush_tlb_kernel_range(start, end) flushes kernel pages
81 *
82 * since the hardware hash table functions as an extension of the
83 * tlb as far as the linux tables are concerned, flush it too.
84 * -- Cort
85 */
86
87/*
88 * 750 SMP is a Bad Idea because the 750 doesn't broadcast all
89 * the cache operations on the bus. Hence we need to use an IPI
90 * to get the other CPU(s) to invalidate their TLBs.
91 */
92#ifdef CONFIG_SMP_750
93#define FINISH_FLUSH smp_send_tlb_invalidate(0)
94#else
95#define FINISH_FLUSH do { } while (0)
96#endif
97
98static void flush_range(struct mm_struct *mm, unsigned long start,
99 unsigned long end)
100{
101 pmd_t *pmd;
102 unsigned long pmd_end;
103 int count;
Paul Mackerras31925322006-06-13 13:43:00 +1000104 unsigned int ctx = mm->context.id;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105
106 if (Hash == 0) {
107 _tlbia();
108 return;
109 }
110 start &= PAGE_MASK;
111 if (start >= end)
112 return;
113 end = (end - 1) | ~PAGE_MASK;
114 pmd = pmd_offset(pgd_offset(mm, start), start);
115 for (;;) {
116 pmd_end = ((start + PGDIR_SIZE) & PGDIR_MASK) - 1;
117 if (pmd_end > end)
118 pmd_end = end;
119 if (!pmd_none(*pmd)) {
120 count = ((pmd_end - start) >> PAGE_SHIFT) + 1;
121 flush_hash_pages(ctx, start, pmd_val(*pmd), count);
122 }
123 if (pmd_end == end)
124 break;
125 start = pmd_end + 1;
126 ++pmd;
127 }
128}
129
130/*
131 * Flush kernel TLB entries in the given range
132 */
133void flush_tlb_kernel_range(unsigned long start, unsigned long end)
134{
135 flush_range(&init_mm, start, end);
136 FINISH_FLUSH;
137}
138
139/*
140 * Flush all the (user) entries for the address space described by mm.
141 */
142void flush_tlb_mm(struct mm_struct *mm)
143{
144 struct vm_area_struct *mp;
145
146 if (Hash == 0) {
147 _tlbia();
148 return;
149 }
150
151 for (mp = mm->mmap; mp != NULL; mp = mp->vm_next)
152 flush_range(mp->vm_mm, mp->vm_start, mp->vm_end);
153 FINISH_FLUSH;
154}
155
156void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
157{
158 struct mm_struct *mm;
159 pmd_t *pmd;
160
161 if (Hash == 0) {
162 _tlbie(vmaddr);
163 return;
164 }
165 mm = (vmaddr < TASK_SIZE)? vma->vm_mm: &init_mm;
166 pmd = pmd_offset(pgd_offset(mm, vmaddr), vmaddr);
167 if (!pmd_none(*pmd))
Paul Mackerras31925322006-06-13 13:43:00 +1000168 flush_hash_pages(mm->context.id, vmaddr, pmd_val(*pmd), 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169 FINISH_FLUSH;
170}
171
172/*
173 * For each address in the range, find the pte for the address
174 * and check _PAGE_HASHPTE bit; if it is set, find and destroy
175 * the corresponding HPTE.
176 */
177void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
178 unsigned long end)
179{
180 flush_range(vma->vm_mm, start, end);
181 FINISH_FLUSH;
182}