Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * WindRiver PowerQUICC III SBC85xx board common routines |
| 3 | * |
| 4 | * Copyright 2002, 2003 Motorola Inc. |
| 5 | * Copyright 2004 Red Hat, Inc. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License as published by the |
| 9 | * Free Software Foundation; either version 2 of the License, or (at your |
| 10 | * option) any later version. |
| 11 | */ |
| 12 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | #include <linux/stddef.h> |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/errno.h> |
| 17 | #include <linux/reboot.h> |
| 18 | #include <linux/pci.h> |
| 19 | #include <linux/kdev_t.h> |
| 20 | #include <linux/major.h> |
| 21 | #include <linux/console.h> |
| 22 | #include <linux/delay.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | #include <linux/seq_file.h> |
| 24 | #include <linux/serial.h> |
| 25 | #include <linux/module.h> |
| 26 | |
| 27 | #include <asm/system.h> |
| 28 | #include <asm/pgtable.h> |
| 29 | #include <asm/page.h> |
| 30 | #include <asm/atomic.h> |
| 31 | #include <asm/time.h> |
| 32 | #include <asm/io.h> |
| 33 | #include <asm/machdep.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #include <asm/open_pic.h> |
| 35 | #include <asm/bootinfo.h> |
| 36 | #include <asm/pci-bridge.h> |
| 37 | #include <asm/mpc85xx.h> |
| 38 | #include <asm/irq.h> |
| 39 | #include <asm/immap_85xx.h> |
| 40 | #include <asm/ppc_sys.h> |
| 41 | |
| 42 | #include <mm/mmu_decl.h> |
| 43 | |
| 44 | #include <platforms/85xx/sbc85xx.h> |
| 45 | |
| 46 | unsigned char __res[sizeof (bd_t)]; |
| 47 | |
| 48 | #ifndef CONFIG_PCI |
| 49 | unsigned long isa_io_base = 0; |
| 50 | unsigned long isa_mem_base = 0; |
| 51 | unsigned long pci_dram_offset = 0; |
| 52 | #endif |
| 53 | |
| 54 | extern unsigned long total_memory; /* in mm/init */ |
| 55 | |
| 56 | /* Internal interrupts are all Level Sensitive, and Positive Polarity */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 57 | static u_char sbc8560_openpic_initsenses[] __initdata = { |
Kumar Gala | 65145e0 | 2005-06-21 17:15:25 -0700 | [diff] [blame] | 58 | MPC85XX_INTERNAL_IRQ_SENSES, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | 0x0, /* External 0: */ |
| 60 | 0x0, /* External 1: */ |
| 61 | #if defined(CONFIG_PCI) |
| 62 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 2: PCI slot 0 */ |
| 63 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 3: PCI slot 1 */ |
| 64 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 4: PCI slot 2 */ |
| 65 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PCI slot 3 */ |
| 66 | #else |
| 67 | 0x0, /* External 2: */ |
| 68 | 0x0, /* External 3: */ |
| 69 | 0x0, /* External 4: */ |
| 70 | 0x0, /* External 5: */ |
| 71 | #endif |
| 72 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 6: PHY */ |
| 73 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 7: PHY */ |
| 74 | 0x0, /* External 8: */ |
| 75 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* External 9: PHY */ |
| 76 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* External 10: PHY */ |
| 77 | 0x0, /* External 11: */ |
| 78 | }; |
| 79 | |
| 80 | /* ************************************************************************ */ |
| 81 | int |
| 82 | sbc8560_show_cpuinfo(struct seq_file *m) |
| 83 | { |
| 84 | uint pvid, svid, phid1; |
| 85 | uint memsize = total_memory; |
| 86 | bd_t *binfo = (bd_t *) __res; |
| 87 | unsigned int freq; |
| 88 | |
| 89 | /* get the core frequency */ |
| 90 | freq = binfo->bi_intfreq; |
| 91 | |
| 92 | pvid = mfspr(SPRN_PVR); |
| 93 | svid = mfspr(SPRN_SVR); |
| 94 | |
| 95 | seq_printf(m, "Vendor\t\t: Wind River\n"); |
| 96 | seq_printf(m, "Machine\t\t: SBC%s\n", cur_ppc_sys_spec->ppc_sys_name); |
| 97 | seq_printf(m, "clock\t\t: %dMHz\n", freq / 1000000); |
| 98 | seq_printf(m, "PVR\t\t: 0x%x\n", pvid); |
| 99 | seq_printf(m, "SVR\t\t: 0x%x\n", svid); |
| 100 | |
| 101 | /* Display cpu Pll setting */ |
| 102 | phid1 = mfspr(SPRN_HID1); |
| 103 | seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); |
| 104 | |
| 105 | /* Display the amount of memory */ |
| 106 | seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024)); |
| 107 | |
| 108 | return 0; |
| 109 | } |
| 110 | |
| 111 | void __init |
| 112 | sbc8560_init_IRQ(void) |
| 113 | { |
| 114 | bd_t *binfo = (bd_t *) __res; |
| 115 | /* Determine the Physical Address of the OpenPIC regs */ |
| 116 | phys_addr_t OpenPIC_PAddr = |
| 117 | binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET; |
| 118 | OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE); |
| 119 | OpenPIC_InitSenses = sbc8560_openpic_initsenses; |
| 120 | OpenPIC_NumInitSenses = sizeof (sbc8560_openpic_initsenses); |
| 121 | |
| 122 | /* Skip reserved space and internal sources */ |
| 123 | openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200); |
| 124 | /* Map PIC IRQs 0-11 */ |
Kumar Gala | 65145e0 | 2005-06-21 17:15:25 -0700 | [diff] [blame] | 125 | openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 126 | |
| 127 | /* we let openpic interrupts starting from an offset, to |
| 128 | * leave space for cascading interrupts underneath. |
| 129 | */ |
| 130 | openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET); |
| 131 | |
| 132 | return; |
| 133 | } |
| 134 | |
| 135 | /* |
| 136 | * interrupt routing |
| 137 | */ |
| 138 | |
| 139 | #ifdef CONFIG_PCI |
| 140 | int mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, |
| 141 | unsigned char pin) |
| 142 | { |
| 143 | static char pci_irq_table[][4] = |
| 144 | /* |
| 145 | * PCI IDSEL/INTPIN->INTLINE |
| 146 | * A B C D |
| 147 | */ |
| 148 | { |
| 149 | {PIRQA, PIRQB, PIRQC, PIRQD}, |
| 150 | {PIRQD, PIRQA, PIRQB, PIRQC}, |
| 151 | {PIRQC, PIRQD, PIRQA, PIRQB}, |
| 152 | {PIRQB, PIRQC, PIRQD, PIRQA}, |
| 153 | }; |
| 154 | |
| 155 | const long min_idsel = 12, max_idsel = 15, irqs_per_slot = 4; |
| 156 | return PCI_IRQ_TABLE_LOOKUP; |
| 157 | } |
| 158 | |
| 159 | int mpc85xx_exclude_device(u_char bus, u_char devfn) |
| 160 | { |
| 161 | if (bus == 0 && PCI_SLOT(devfn) == 0) |
| 162 | return PCIBIOS_DEVICE_NOT_FOUND; |
| 163 | else |
| 164 | return PCIBIOS_SUCCESSFUL; |
| 165 | } |
| 166 | #endif /* CONFIG_PCI */ |