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Patil, Rachna01636eb2012-10-16 12:55:43 +05301/*
2 * TI Touch Screen / ADC MFD driver
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/module.h>
Patil, Rachna01636eb2012-10-16 12:55:43 +053017#include <linux/slab.h>
18#include <linux/err.h>
19#include <linux/io.h>
20#include <linux/clk.h>
21#include <linux/regmap.h>
22#include <linux/mfd/core.h>
23#include <linux/pm_runtime.h>
Patil, Rachnaa6543a12013-01-24 03:45:09 +000024#include <linux/of.h>
25#include <linux/of_device.h>
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010026#include <linux/sched.h>
Patil, Rachna01636eb2012-10-16 12:55:43 +053027
28#include <linux/mfd/ti_am335x_tscadc.h>
29
30static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg)
31{
32 unsigned int val;
33
34 regmap_read(tsadc->regmap_tscadc, reg, &val);
35 return val;
36}
37
38static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg,
39 unsigned int val)
40{
41 regmap_write(tsadc->regmap_tscadc, reg, val);
42}
43
44static const struct regmap_config tscadc_regmap_config = {
45 .name = "ti_tscadc",
46 .reg_bits = 32,
47 .reg_stride = 4,
48 .val_bits = 32,
49};
50
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010051void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tsadc, u32 val)
Patil, Rachnaabeccee2013-01-24 03:45:05 +000052{
Sebastian Andrzej Siewior317b2092013-10-22 16:12:39 +020053 unsigned long flags;
54
55 spin_lock_irqsave(&tsadc->reg_lock, flags);
Vignesh R6ac734d2014-09-01 12:01:06 +053056 tsadc->reg_se_cache |= val;
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010057 if (tsadc->adc_waiting)
58 wake_up(&tsadc->reg_se_wait);
59 else if (!tsadc->adc_in_use)
60 tscadc_writel(tsadc, REG_SE, val);
61
Sebastian Andrzej Siewior317b2092013-10-22 16:12:39 +020062 spin_unlock_irqrestore(&tsadc->reg_lock, flags);
Patil, Rachnaabeccee2013-01-24 03:45:05 +000063}
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010064EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache);
65
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010066static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tsadc)
67{
68 DEFINE_WAIT(wait);
69 u32 reg;
70
71 /*
72 * disable TSC steps so it does not run while the ADC is using it. If
73 * write 0 while it is running (it just started or was already running)
74 * then it completes all steps that were enabled and stops then.
75 */
76 tscadc_writel(tsadc, REG_SE, 0);
77 reg = tscadc_readl(tsadc, REG_ADCFSM);
78 if (reg & SEQ_STATUS) {
79 tsadc->adc_waiting = true;
80 prepare_to_wait(&tsadc->reg_se_wait, &wait,
81 TASK_UNINTERRUPTIBLE);
82 spin_unlock_irq(&tsadc->reg_lock);
83
84 schedule();
85
86 spin_lock_irq(&tsadc->reg_lock);
87 finish_wait(&tsadc->reg_se_wait, &wait);
88
89 reg = tscadc_readl(tsadc, REG_ADCFSM);
90 WARN_ON(reg & SEQ_STATUS);
91 tsadc->adc_waiting = false;
92 }
93 tsadc->adc_in_use = true;
94}
95
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +010096void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val)
97{
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +010098 spin_lock_irq(&tsadc->reg_lock);
Vignesh R6ac734d2014-09-01 12:01:06 +053099 tsadc->reg_se_cache |= val;
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +0100100 am335x_tscadc_need_adc(tsadc);
101
102 tscadc_writel(tsadc, REG_SE, val);
103 spin_unlock_irq(&tsadc->reg_lock);
104}
105EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once);
106
107void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tsadc)
108{
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +0100109 unsigned long flags;
110
111 spin_lock_irqsave(&tsadc->reg_lock, flags);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +0100112 tsadc->adc_in_use = false;
113 tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
Sebastian Andrzej Siewior7e170c62013-12-19 16:28:29 +0100114 spin_unlock_irqrestore(&tsadc->reg_lock, flags);
115}
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +0100116EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done);
Patil, Rachnaabeccee2013-01-24 03:45:05 +0000117
118void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val)
119{
Sebastian Andrzej Siewior317b2092013-10-22 16:12:39 +0200120 unsigned long flags;
121
122 spin_lock_irqsave(&tsadc->reg_lock, flags);
Patil, Rachnaabeccee2013-01-24 03:45:05 +0000123 tsadc->reg_se_cache &= ~val;
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +0100124 tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
Sebastian Andrzej Siewior317b2092013-10-22 16:12:39 +0200125 spin_unlock_irqrestore(&tsadc->reg_lock, flags);
Patil, Rachnaabeccee2013-01-24 03:45:05 +0000126}
127EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
128
Patil, Rachna01636eb2012-10-16 12:55:43 +0530129static void tscadc_idle_config(struct ti_tscadc_dev *config)
130{
131 unsigned int idleconfig;
132
133 idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
134 STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;
135
136 tscadc_writel(config, REG_IDLECONFIG, idleconfig);
137}
138
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800139static int ti_tscadc_probe(struct platform_device *pdev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530140{
141 struct ti_tscadc_dev *tscadc;
142 struct resource *res;
143 struct clk *clk;
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000144 struct device_node *node = pdev->dev.of_node;
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530145 struct mfd_cell *cell;
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200146 struct property *prop;
147 const __be32 *cur;
148 u32 val;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530149 int err, ctrl;
Matthias Kaehlckee90f8752013-09-23 22:43:29 +0200150 int clock_rate;
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000151 int tsc_wires = 0, adc_channels = 0, total_channels;
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200152 int readouts = 0;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530153
Sebastian Andrzej Siewior9e5775f2013-05-21 17:56:49 +0200154 if (!pdev->dev.of_node) {
155 dev_err(&pdev->dev, "Could not find valid DT data.\n");
Patil, Rachna01636eb2012-10-16 12:55:43 +0530156 return -EINVAL;
157 }
158
Sebastian Andrzej Siewior9e5775f2013-05-21 17:56:49 +0200159 node = of_get_child_by_name(pdev->dev.of_node, "tsc");
160 of_property_read_u32(node, "ti,wires", &tsc_wires);
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200161 of_property_read_u32(node, "ti,coordiante-readouts", &readouts);
Patil, Rachna5e53a692012-10-16 12:55:45 +0530162
Sebastian Andrzej Siewior9e5775f2013-05-21 17:56:49 +0200163 node = of_get_child_by_name(pdev->dev.of_node, "adc");
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200164 of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
165 adc_channels++;
166 if (val > 7) {
167 dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n",
168 val);
169 return -EINVAL;
170 }
171 }
Patil, Rachna5e53a692012-10-16 12:55:45 +0530172 total_channels = tsc_wires + adc_channels;
Patil, Rachna5e53a692012-10-16 12:55:45 +0530173 if (total_channels > 8) {
174 dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
175 return -EINVAL;
176 }
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300177 if (total_channels == 0) {
178 dev_err(&pdev->dev, "Need atleast one channel.\n");
179 return -EINVAL;
180 }
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530181
Sebastian Andrzej Siewior18926ed2013-05-29 17:39:02 +0200182 if (readouts * 2 + 2 + adc_channels > 16) {
183 dev_err(&pdev->dev, "Too many step configurations requested\n");
184 return -EINVAL;
185 }
186
Patil, Rachna01636eb2012-10-16 12:55:43 +0530187 /* Allocate memory for device */
188 tscadc = devm_kzalloc(&pdev->dev,
189 sizeof(struct ti_tscadc_dev), GFP_KERNEL);
190 if (!tscadc) {
191 dev_err(&pdev->dev, "failed to allocate memory.\n");
192 return -ENOMEM;
193 }
194 tscadc->dev = &pdev->dev;
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530195
196 err = platform_get_irq(pdev, 0);
197 if (err < 0) {
198 dev_err(&pdev->dev, "no irq ID is specified.\n");
199 goto ret;
200 } else
201 tscadc->irq = err;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530202
Jingoo Han924ff912014-02-12 14:31:49 +0900203 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
204 tscadc->tscadc_base = devm_ioremap_resource(&pdev->dev, res);
205 if (IS_ERR(tscadc->tscadc_base))
206 return PTR_ERR(tscadc->tscadc_base);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530207
208 tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev,
209 tscadc->tscadc_base, &tscadc_regmap_config);
210 if (IS_ERR(tscadc->regmap_tscadc)) {
211 dev_err(&pdev->dev, "regmap init failed\n");
212 err = PTR_ERR(tscadc->regmap_tscadc);
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530213 goto ret;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530214 }
215
Patil, Rachnaabeccee2013-01-24 03:45:05 +0000216 spin_lock_init(&tscadc->reg_lock);
Sebastian Andrzej Siewior7ca67402013-12-19 16:28:31 +0100217 init_waitqueue_head(&tscadc->reg_se_wait);
218
Patil, Rachna01636eb2012-10-16 12:55:43 +0530219 pm_runtime_enable(&pdev->dev);
220 pm_runtime_get_sync(&pdev->dev);
221
222 /*
223 * The TSC_ADC_Subsystem has 2 clock domains
224 * OCP_CLK and ADC_CLK.
225 * The ADC clock is expected to run at target of 3MHz,
226 * and expected to capture 12-bit data at a rate of 200 KSPS.
227 * The TSC_ADC_SS controller design assumes the OCP clock is
228 * at least 6x faster than the ADC clock.
229 */
230 clk = clk_get(&pdev->dev, "adc_tsc_fck");
231 if (IS_ERR(clk)) {
232 dev_err(&pdev->dev, "failed to get TSC fck\n");
233 err = PTR_ERR(clk);
234 goto err_disable_clk;
235 }
236 clock_rate = clk_get_rate(clk);
237 clk_put(clk);
Matthias Kaehlckee90f8752013-09-23 22:43:29 +0200238 tscadc->clk_div = clock_rate / ADC_CLK;
Patil, Rachnaefe31262013-07-20 17:27:35 +0100239
Patil, Rachna01636eb2012-10-16 12:55:43 +0530240 /* TSCADC_CLKDIV needs to be configured to the value minus 1 */
Matthias Kaehlckee90f8752013-09-23 22:43:29 +0200241 tscadc->clk_div--;
242 tscadc_writel(tscadc, REG_CLKDIV, tscadc->clk_div);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530243
244 /* Set the control register bits */
245 ctrl = CNTRLREG_STEPCONFIGWRT |
Patil, Rachnab5f8b762013-07-20 17:27:34 +0100246 CNTRLREG_STEPID;
247 if (tsc_wires > 0)
248 ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530249 tscadc_writel(tscadc, REG_CTRL, ctrl);
250
251 /* Set register bits for Idle Config Mode */
Patil, Rachnab5f8b762013-07-20 17:27:34 +0100252 if (tsc_wires > 0)
253 tscadc_idle_config(tscadc);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530254
255 /* Enable the TSC module enable bit */
256 ctrl = tscadc_readl(tscadc, REG_CTRL);
257 ctrl |= CNTRLREG_TSCSSENB;
258 tscadc_writel(tscadc, REG_CTRL, ctrl);
259
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300260 tscadc->used_cells = 0;
261 tscadc->tsc_cell = -1;
262 tscadc->adc_cell = -1;
263
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530264 /* TSC Cell */
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300265 if (tsc_wires > 0) {
266 tscadc->tsc_cell = tscadc->used_cells;
267 cell = &tscadc->cells[tscadc->used_cells++];
Sebastian Andrzej Siewior5f184e62013-05-27 17:08:28 +0200268 cell->name = "TI-am335x-tsc";
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300269 cell->of_compatible = "ti,am3359-tsc";
270 cell->platform_data = &tscadc;
271 cell->pdata_size = sizeof(tscadc);
272 }
Patil, Rachna2b99baf2012-10-16 12:55:44 +0530273
Patil, Rachna5e53a692012-10-16 12:55:45 +0530274 /* ADC Cell */
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300275 if (adc_channels > 0) {
276 tscadc->adc_cell = tscadc->used_cells;
277 cell = &tscadc->cells[tscadc->used_cells++];
Sebastian Andrzej Siewior9f999282013-05-27 17:12:52 +0200278 cell->name = "TI-am335x-adc";
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300279 cell->of_compatible = "ti,am3359-adc";
280 cell->platform_data = &tscadc;
281 cell->pdata_size = sizeof(tscadc);
282 }
Patil, Rachna5e53a692012-10-16 12:55:45 +0530283
Patil, Rachna01636eb2012-10-16 12:55:43 +0530284 err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells,
Pantelis Antoniou24d5c822012-10-13 16:37:24 +0300285 tscadc->used_cells, NULL, 0, NULL);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530286 if (err < 0)
287 goto err_disable_clk;
288
289 device_init_wakeup(&pdev->dev, true);
290 platform_set_drvdata(pdev, tscadc);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530291 return 0;
292
293err_disable_clk:
294 pm_runtime_put_sync(&pdev->dev);
295 pm_runtime_disable(&pdev->dev);
Patil, Rachna3c39c9c2012-11-06 13:39:03 +0530296ret:
Patil, Rachna01636eb2012-10-16 12:55:43 +0530297 return err;
298}
299
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800300static int ti_tscadc_remove(struct platform_device *pdev)
Patil, Rachna01636eb2012-10-16 12:55:43 +0530301{
302 struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
303
304 tscadc_writel(tscadc, REG_SE, 0x00);
305
306 pm_runtime_put_sync(&pdev->dev);
307 pm_runtime_disable(&pdev->dev);
308
309 mfd_remove_devices(tscadc->dev);
310
311 return 0;
312}
313
314#ifdef CONFIG_PM
315static int tscadc_suspend(struct device *dev)
316{
317 struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
318
319 tscadc_writel(tscadc_dev, REG_SE, 0x00);
320 pm_runtime_put_sync(dev);
321
322 return 0;
323}
324
325static int tscadc_resume(struct device *dev)
326{
327 struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
328 unsigned int restore, ctrl;
329
330 pm_runtime_get_sync(dev);
331
332 /* context restore */
Patil, Rachnab5f8b762013-07-20 17:27:34 +0100333 ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
334 if (tscadc_dev->tsc_cell != -1)
335 ctrl |= CNTRLREG_TSCENB | CNTRLREG_4WIRE;
Patil, Rachna01636eb2012-10-16 12:55:43 +0530336 tscadc_writel(tscadc_dev, REG_CTRL, ctrl);
Patil, Rachnab5f8b762013-07-20 17:27:34 +0100337
338 if (tscadc_dev->tsc_cell != -1)
339 tscadc_idle_config(tscadc_dev);
Patil, Rachna01636eb2012-10-16 12:55:43 +0530340 restore = tscadc_readl(tscadc_dev, REG_CTRL);
341 tscadc_writel(tscadc_dev, REG_CTRL,
342 (restore | CNTRLREG_TSCSSENB));
343
Matthias Kaehlckee90f8752013-09-23 22:43:29 +0200344 tscadc_writel(tscadc_dev, REG_CLKDIV, tscadc_dev->clk_div);
345
Patil, Rachna01636eb2012-10-16 12:55:43 +0530346 return 0;
347}
348
349static const struct dev_pm_ops tscadc_pm_ops = {
350 .suspend = tscadc_suspend,
351 .resume = tscadc_resume,
352};
353#define TSCADC_PM_OPS (&tscadc_pm_ops)
354#else
355#define TSCADC_PM_OPS NULL
356#endif
357
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000358static const struct of_device_id ti_tscadc_dt_ids[] = {
359 { .compatible = "ti,am3359-tscadc", },
360 { }
361};
362MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
363
Patil, Rachna01636eb2012-10-16 12:55:43 +0530364static struct platform_driver ti_tscadc_driver = {
365 .driver = {
Patil, Rachnaa6543a12013-01-24 03:45:09 +0000366 .name = "ti_am3359-tscadc",
Patil, Rachna01636eb2012-10-16 12:55:43 +0530367 .owner = THIS_MODULE,
368 .pm = TSCADC_PM_OPS,
Sachin Kamat131221b2013-10-15 09:18:49 +0530369 .of_match_table = ti_tscadc_dt_ids,
Patil, Rachna01636eb2012-10-16 12:55:43 +0530370 },
371 .probe = ti_tscadc_probe,
Greg Kroah-Hartman612b95c2012-12-21 15:03:15 -0800372 .remove = ti_tscadc_remove,
Patil, Rachna01636eb2012-10-16 12:55:43 +0530373
374};
375
376module_platform_driver(ti_tscadc_driver);
377
378MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
379MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
380MODULE_LICENSE("GPL");