Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree Source for AM43xx clock data |
| 3 | * |
| 4 | * Copyright (C) 2013 Texas Instruments, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
Tero Kristo | 83a5d6c | 2015-02-12 10:25:40 +0200 | [diff] [blame] | 10 | &scm_clocks { |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 11 | sys_clkin_ck: sys_clkin_ck@40 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 12 | #clock-cells = <0>; |
| 13 | compatible = "ti,mux-clock"; |
Afzal Mohammed | f7c66b7 | 2014-05-14 17:06:37 +0530 | [diff] [blame] | 14 | clocks = <&sysboot_freq_sel_ck>, <&crystal_freq_sel_ck>; |
| 15 | ti,bit-shift = <31>; |
| 16 | reg = <0x0040>; |
| 17 | }; |
| 18 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 19 | crystal_freq_sel_ck: crystal_freq_sel_ck@40 { |
Afzal Mohammed | f7c66b7 | 2014-05-14 17:06:37 +0530 | [diff] [blame] | 20 | #clock-cells = <0>; |
| 21 | compatible = "ti,mux-clock"; |
| 22 | clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>; |
| 23 | ti,bit-shift = <29>; |
| 24 | reg = <0x0040>; |
| 25 | }; |
| 26 | |
| 27 | sysboot_freq_sel_ck: sysboot_freq_sel_ck@44e10040 { |
| 28 | #clock-cells = <0>; |
| 29 | compatible = "ti,mux-clock"; |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 30 | clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>; |
| 31 | ti,bit-shift = <22>; |
| 32 | reg = <0x0040>; |
| 33 | }; |
| 34 | |
| 35 | adc_tsc_fck: adc_tsc_fck { |
| 36 | #clock-cells = <0>; |
| 37 | compatible = "fixed-factor-clock"; |
| 38 | clocks = <&sys_clkin_ck>; |
| 39 | clock-mult = <1>; |
| 40 | clock-div = <1>; |
| 41 | }; |
| 42 | |
| 43 | dcan0_fck: dcan0_fck { |
| 44 | #clock-cells = <0>; |
| 45 | compatible = "fixed-factor-clock"; |
| 46 | clocks = <&sys_clkin_ck>; |
| 47 | clock-mult = <1>; |
| 48 | clock-div = <1>; |
| 49 | }; |
| 50 | |
| 51 | dcan1_fck: dcan1_fck { |
| 52 | #clock-cells = <0>; |
| 53 | compatible = "fixed-factor-clock"; |
| 54 | clocks = <&sys_clkin_ck>; |
| 55 | clock-mult = <1>; |
| 56 | clock-div = <1>; |
| 57 | }; |
| 58 | |
| 59 | mcasp0_fck: mcasp0_fck { |
| 60 | #clock-cells = <0>; |
| 61 | compatible = "fixed-factor-clock"; |
| 62 | clocks = <&sys_clkin_ck>; |
| 63 | clock-mult = <1>; |
| 64 | clock-div = <1>; |
| 65 | }; |
| 66 | |
| 67 | mcasp1_fck: mcasp1_fck { |
| 68 | #clock-cells = <0>; |
| 69 | compatible = "fixed-factor-clock"; |
| 70 | clocks = <&sys_clkin_ck>; |
| 71 | clock-mult = <1>; |
| 72 | clock-div = <1>; |
| 73 | }; |
| 74 | |
| 75 | smartreflex0_fck: smartreflex0_fck { |
| 76 | #clock-cells = <0>; |
| 77 | compatible = "fixed-factor-clock"; |
| 78 | clocks = <&sys_clkin_ck>; |
| 79 | clock-mult = <1>; |
| 80 | clock-div = <1>; |
| 81 | }; |
| 82 | |
| 83 | smartreflex1_fck: smartreflex1_fck { |
| 84 | #clock-cells = <0>; |
| 85 | compatible = "fixed-factor-clock"; |
| 86 | clocks = <&sys_clkin_ck>; |
| 87 | clock-mult = <1>; |
| 88 | clock-div = <1>; |
| 89 | }; |
| 90 | |
| 91 | sha0_fck: sha0_fck { |
| 92 | #clock-cells = <0>; |
| 93 | compatible = "fixed-factor-clock"; |
| 94 | clocks = <&sys_clkin_ck>; |
| 95 | clock-mult = <1>; |
| 96 | clock-div = <1>; |
| 97 | }; |
| 98 | |
| 99 | aes0_fck: aes0_fck { |
| 100 | #clock-cells = <0>; |
| 101 | compatible = "fixed-factor-clock"; |
| 102 | clocks = <&sys_clkin_ck>; |
| 103 | clock-mult = <1>; |
| 104 | clock-div = <1>; |
| 105 | }; |
Poddar, Sourav | 4da1c67 | 2014-04-29 19:45:46 +0530 | [diff] [blame] | 106 | |
Lokesh Vutla | 8ed607a | 2016-06-01 12:06:45 +0300 | [diff] [blame] | 107 | rng_fck: rng_fck { |
| 108 | #clock-cells = <0>; |
| 109 | compatible = "fixed-factor-clock"; |
| 110 | clocks = <&sys_clkin_ck>; |
| 111 | clock-mult = <1>; |
| 112 | clock-div = <1>; |
| 113 | }; |
| 114 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 115 | ehrpwm0_tbclk: ehrpwm0_tbclk@664 { |
Poddar, Sourav | 4da1c67 | 2014-04-29 19:45:46 +0530 | [diff] [blame] | 116 | #clock-cells = <0>; |
| 117 | compatible = "ti,gate-clock"; |
Vignesh R | 7d53d25 | 2015-02-10 11:05:42 +0530 | [diff] [blame] | 118 | clocks = <&l4ls_gclk>; |
Poddar, Sourav | 4da1c67 | 2014-04-29 19:45:46 +0530 | [diff] [blame] | 119 | ti,bit-shift = <0>; |
| 120 | reg = <0x0664>; |
| 121 | }; |
| 122 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 123 | ehrpwm1_tbclk: ehrpwm1_tbclk@664 { |
Poddar, Sourav | 4da1c67 | 2014-04-29 19:45:46 +0530 | [diff] [blame] | 124 | #clock-cells = <0>; |
| 125 | compatible = "ti,gate-clock"; |
Vignesh R | 7d53d25 | 2015-02-10 11:05:42 +0530 | [diff] [blame] | 126 | clocks = <&l4ls_gclk>; |
Poddar, Sourav | 4da1c67 | 2014-04-29 19:45:46 +0530 | [diff] [blame] | 127 | ti,bit-shift = <1>; |
| 128 | reg = <0x0664>; |
| 129 | }; |
| 130 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 131 | ehrpwm2_tbclk: ehrpwm2_tbclk@664 { |
Poddar, Sourav | 4da1c67 | 2014-04-29 19:45:46 +0530 | [diff] [blame] | 132 | #clock-cells = <0>; |
| 133 | compatible = "ti,gate-clock"; |
Vignesh R | 7d53d25 | 2015-02-10 11:05:42 +0530 | [diff] [blame] | 134 | clocks = <&l4ls_gclk>; |
Poddar, Sourav | 4da1c67 | 2014-04-29 19:45:46 +0530 | [diff] [blame] | 135 | ti,bit-shift = <2>; |
| 136 | reg = <0x0664>; |
| 137 | }; |
| 138 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 139 | ehrpwm3_tbclk: ehrpwm3_tbclk@664 { |
Poddar, Sourav | 4da1c67 | 2014-04-29 19:45:46 +0530 | [diff] [blame] | 140 | #clock-cells = <0>; |
| 141 | compatible = "ti,gate-clock"; |
Vignesh R | 7d53d25 | 2015-02-10 11:05:42 +0530 | [diff] [blame] | 142 | clocks = <&l4ls_gclk>; |
Poddar, Sourav | 4da1c67 | 2014-04-29 19:45:46 +0530 | [diff] [blame] | 143 | ti,bit-shift = <4>; |
| 144 | reg = <0x0664>; |
| 145 | }; |
| 146 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 147 | ehrpwm4_tbclk: ehrpwm4_tbclk@664 { |
Poddar, Sourav | 4da1c67 | 2014-04-29 19:45:46 +0530 | [diff] [blame] | 148 | #clock-cells = <0>; |
| 149 | compatible = "ti,gate-clock"; |
Vignesh R | 7d53d25 | 2015-02-10 11:05:42 +0530 | [diff] [blame] | 150 | clocks = <&l4ls_gclk>; |
Poddar, Sourav | 4da1c67 | 2014-04-29 19:45:46 +0530 | [diff] [blame] | 151 | ti,bit-shift = <5>; |
| 152 | reg = <0x0664>; |
| 153 | }; |
| 154 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 155 | ehrpwm5_tbclk: ehrpwm5_tbclk@664 { |
Poddar, Sourav | 4da1c67 | 2014-04-29 19:45:46 +0530 | [diff] [blame] | 156 | #clock-cells = <0>; |
| 157 | compatible = "ti,gate-clock"; |
Vignesh R | 7d53d25 | 2015-02-10 11:05:42 +0530 | [diff] [blame] | 158 | clocks = <&l4ls_gclk>; |
Poddar, Sourav | 4da1c67 | 2014-04-29 19:45:46 +0530 | [diff] [blame] | 159 | ti,bit-shift = <6>; |
| 160 | reg = <0x0664>; |
| 161 | }; |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 162 | }; |
| 163 | &prcm_clocks { |
| 164 | clk_32768_ck: clk_32768_ck { |
| 165 | #clock-cells = <0>; |
| 166 | compatible = "fixed-clock"; |
| 167 | clock-frequency = <32768>; |
| 168 | }; |
| 169 | |
| 170 | clk_rc32k_ck: clk_rc32k_ck { |
| 171 | #clock-cells = <0>; |
| 172 | compatible = "fixed-clock"; |
| 173 | clock-frequency = <32768>; |
| 174 | }; |
| 175 | |
| 176 | virt_19200000_ck: virt_19200000_ck { |
| 177 | #clock-cells = <0>; |
| 178 | compatible = "fixed-clock"; |
| 179 | clock-frequency = <19200000>; |
| 180 | }; |
| 181 | |
| 182 | virt_24000000_ck: virt_24000000_ck { |
| 183 | #clock-cells = <0>; |
| 184 | compatible = "fixed-clock"; |
| 185 | clock-frequency = <24000000>; |
| 186 | }; |
| 187 | |
| 188 | virt_25000000_ck: virt_25000000_ck { |
| 189 | #clock-cells = <0>; |
| 190 | compatible = "fixed-clock"; |
| 191 | clock-frequency = <25000000>; |
| 192 | }; |
| 193 | |
| 194 | virt_26000000_ck: virt_26000000_ck { |
| 195 | #clock-cells = <0>; |
| 196 | compatible = "fixed-clock"; |
| 197 | clock-frequency = <26000000>; |
| 198 | }; |
| 199 | |
| 200 | tclkin_ck: tclkin_ck { |
| 201 | #clock-cells = <0>; |
| 202 | compatible = "fixed-clock"; |
| 203 | clock-frequency = <26000000>; |
| 204 | }; |
| 205 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 206 | dpll_core_ck: dpll_core_ck@2d20 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 207 | #clock-cells = <0>; |
| 208 | compatible = "ti,am3-dpll-core-clock"; |
| 209 | clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; |
| 210 | reg = <0x2d20>, <0x2d24>, <0x2d2c>; |
| 211 | }; |
| 212 | |
| 213 | dpll_core_x2_ck: dpll_core_x2_ck { |
| 214 | #clock-cells = <0>; |
| 215 | compatible = "ti,am3-dpll-x2-clock"; |
| 216 | clocks = <&dpll_core_ck>; |
| 217 | }; |
| 218 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 219 | dpll_core_m4_ck: dpll_core_m4_ck@2d38 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 220 | #clock-cells = <0>; |
| 221 | compatible = "ti,divider-clock"; |
| 222 | clocks = <&dpll_core_x2_ck>; |
| 223 | ti,max-div = <31>; |
| 224 | ti,autoidle-shift = <8>; |
| 225 | reg = <0x2d38>; |
| 226 | ti,index-starts-at-one; |
| 227 | ti,invert-autoidle-bit; |
| 228 | }; |
| 229 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 230 | dpll_core_m5_ck: dpll_core_m5_ck@2d3c { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 231 | #clock-cells = <0>; |
| 232 | compatible = "ti,divider-clock"; |
| 233 | clocks = <&dpll_core_x2_ck>; |
| 234 | ti,max-div = <31>; |
| 235 | ti,autoidle-shift = <8>; |
| 236 | reg = <0x2d3c>; |
| 237 | ti,index-starts-at-one; |
| 238 | ti,invert-autoidle-bit; |
| 239 | }; |
| 240 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 241 | dpll_core_m6_ck: dpll_core_m6_ck@2d40 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 242 | #clock-cells = <0>; |
| 243 | compatible = "ti,divider-clock"; |
| 244 | clocks = <&dpll_core_x2_ck>; |
| 245 | ti,max-div = <31>; |
| 246 | ti,autoidle-shift = <8>; |
| 247 | reg = <0x2d40>; |
| 248 | ti,index-starts-at-one; |
| 249 | ti,invert-autoidle-bit; |
| 250 | }; |
| 251 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 252 | dpll_mpu_ck: dpll_mpu_ck@2d60 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 253 | #clock-cells = <0>; |
| 254 | compatible = "ti,am3-dpll-clock"; |
| 255 | clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; |
| 256 | reg = <0x2d60>, <0x2d64>, <0x2d6c>; |
| 257 | }; |
| 258 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 259 | dpll_mpu_m2_ck: dpll_mpu_m2_ck@2d70 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 260 | #clock-cells = <0>; |
| 261 | compatible = "ti,divider-clock"; |
| 262 | clocks = <&dpll_mpu_ck>; |
| 263 | ti,max-div = <31>; |
| 264 | ti,autoidle-shift = <8>; |
| 265 | reg = <0x2d70>; |
| 266 | ti,index-starts-at-one; |
| 267 | ti,invert-autoidle-bit; |
| 268 | }; |
| 269 | |
Grygorii Strashko | 14054fb | 2015-11-30 17:56:38 +0200 | [diff] [blame] | 270 | mpu_periphclk: mpu_periphclk { |
| 271 | #clock-cells = <0>; |
| 272 | compatible = "fixed-factor-clock"; |
| 273 | clocks = <&dpll_mpu_m2_ck>; |
| 274 | clock-mult = <1>; |
| 275 | clock-div = <2>; |
| 276 | }; |
| 277 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 278 | dpll_ddr_ck: dpll_ddr_ck@2da0 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 279 | #clock-cells = <0>; |
| 280 | compatible = "ti,am3-dpll-clock"; |
| 281 | clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; |
| 282 | reg = <0x2da0>, <0x2da4>, <0x2dac>; |
| 283 | }; |
| 284 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 285 | dpll_ddr_m2_ck: dpll_ddr_m2_ck@2db0 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 286 | #clock-cells = <0>; |
| 287 | compatible = "ti,divider-clock"; |
| 288 | clocks = <&dpll_ddr_ck>; |
| 289 | ti,max-div = <31>; |
| 290 | ti,autoidle-shift = <8>; |
| 291 | reg = <0x2db0>; |
| 292 | ti,index-starts-at-one; |
| 293 | ti,invert-autoidle-bit; |
| 294 | }; |
| 295 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 296 | dpll_disp_ck: dpll_disp_ck@2e20 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 297 | #clock-cells = <0>; |
| 298 | compatible = "ti,am3-dpll-clock"; |
| 299 | clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; |
| 300 | reg = <0x2e20>, <0x2e24>, <0x2e2c>; |
| 301 | }; |
| 302 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 303 | dpll_disp_m2_ck: dpll_disp_m2_ck@2e30 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 304 | #clock-cells = <0>; |
| 305 | compatible = "ti,divider-clock"; |
| 306 | clocks = <&dpll_disp_ck>; |
| 307 | ti,max-div = <31>; |
| 308 | ti,autoidle-shift = <8>; |
| 309 | reg = <0x2e30>; |
| 310 | ti,index-starts-at-one; |
| 311 | ti,invert-autoidle-bit; |
Tomi Valkeinen | 10a6e18 | 2014-05-21 15:16:11 +0300 | [diff] [blame] | 312 | ti,set-rate-parent; |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 313 | }; |
| 314 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 315 | dpll_per_ck: dpll_per_ck@2de0 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 316 | #clock-cells = <0>; |
| 317 | compatible = "ti,am3-dpll-j-type-clock"; |
| 318 | clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; |
| 319 | reg = <0x2de0>, <0x2de4>, <0x2dec>; |
| 320 | }; |
| 321 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 322 | dpll_per_m2_ck: dpll_per_m2_ck@2df0 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 323 | #clock-cells = <0>; |
| 324 | compatible = "ti,divider-clock"; |
| 325 | clocks = <&dpll_per_ck>; |
| 326 | ti,max-div = <127>; |
| 327 | ti,autoidle-shift = <8>; |
| 328 | reg = <0x2df0>; |
| 329 | ti,index-starts-at-one; |
| 330 | ti,invert-autoidle-bit; |
| 331 | }; |
| 332 | |
| 333 | dpll_per_m2_div4_wkupdm_ck: dpll_per_m2_div4_wkupdm_ck { |
| 334 | #clock-cells = <0>; |
| 335 | compatible = "fixed-factor-clock"; |
| 336 | clocks = <&dpll_per_m2_ck>; |
| 337 | clock-mult = <1>; |
| 338 | clock-div = <4>; |
| 339 | }; |
| 340 | |
| 341 | dpll_per_m2_div4_ck: dpll_per_m2_div4_ck { |
| 342 | #clock-cells = <0>; |
| 343 | compatible = "fixed-factor-clock"; |
| 344 | clocks = <&dpll_per_m2_ck>; |
| 345 | clock-mult = <1>; |
| 346 | clock-div = <4>; |
| 347 | }; |
| 348 | |
| 349 | clk_24mhz: clk_24mhz { |
| 350 | #clock-cells = <0>; |
| 351 | compatible = "fixed-factor-clock"; |
| 352 | clocks = <&dpll_per_m2_ck>; |
| 353 | clock-mult = <1>; |
| 354 | clock-div = <8>; |
| 355 | }; |
| 356 | |
| 357 | clkdiv32k_ck: clkdiv32k_ck { |
| 358 | #clock-cells = <0>; |
| 359 | compatible = "fixed-factor-clock"; |
| 360 | clocks = <&clk_24mhz>; |
| 361 | clock-mult = <1>; |
| 362 | clock-div = <732>; |
| 363 | }; |
| 364 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 365 | clkdiv32k_ick: clkdiv32k_ick@2a38 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 366 | #clock-cells = <0>; |
| 367 | compatible = "ti,gate-clock"; |
| 368 | clocks = <&clkdiv32k_ck>; |
| 369 | ti,bit-shift = <8>; |
| 370 | reg = <0x2a38>; |
| 371 | }; |
| 372 | |
| 373 | sysclk_div: sysclk_div { |
| 374 | #clock-cells = <0>; |
| 375 | compatible = "fixed-factor-clock"; |
| 376 | clocks = <&dpll_core_m4_ck>; |
| 377 | clock-mult = <1>; |
| 378 | clock-div = <1>; |
| 379 | }; |
| 380 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 381 | pruss_ocp_gclk: pruss_ocp_gclk@4248 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 382 | #clock-cells = <0>; |
| 383 | compatible = "ti,mux-clock"; |
| 384 | clocks = <&sysclk_div>, <&dpll_disp_m2_ck>; |
| 385 | reg = <0x4248>; |
| 386 | }; |
| 387 | |
| 388 | clk_32k_tpm_ck: clk_32k_tpm_ck { |
| 389 | #clock-cells = <0>; |
| 390 | compatible = "fixed-clock"; |
| 391 | clock-frequency = <32768>; |
| 392 | }; |
| 393 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 394 | timer1_fck: timer1_fck@4200 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 395 | #clock-cells = <0>; |
| 396 | compatible = "ti,mux-clock"; |
| 397 | clocks = <&sys_clkin_ck>, <&clkdiv32k_ick>, <&tclkin_ck>, <&clk_rc32k_ck>, <&clk_32768_ck>, <&clk_32k_tpm_ck>; |
| 398 | reg = <0x4200>; |
| 399 | }; |
| 400 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 401 | timer2_fck: timer2_fck@4204 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 402 | #clock-cells = <0>; |
| 403 | compatible = "ti,mux-clock"; |
| 404 | clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; |
| 405 | reg = <0x4204>; |
| 406 | }; |
| 407 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 408 | timer3_fck: timer3_fck@4208 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 409 | #clock-cells = <0>; |
| 410 | compatible = "ti,mux-clock"; |
| 411 | clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; |
| 412 | reg = <0x4208>; |
| 413 | }; |
| 414 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 415 | timer4_fck: timer4_fck@420c { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 416 | #clock-cells = <0>; |
| 417 | compatible = "ti,mux-clock"; |
| 418 | clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; |
| 419 | reg = <0x420c>; |
| 420 | }; |
| 421 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 422 | timer5_fck: timer5_fck@4210 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 423 | #clock-cells = <0>; |
| 424 | compatible = "ti,mux-clock"; |
| 425 | clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; |
| 426 | reg = <0x4210>; |
| 427 | }; |
| 428 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 429 | timer6_fck: timer6_fck@4214 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 430 | #clock-cells = <0>; |
| 431 | compatible = "ti,mux-clock"; |
| 432 | clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; |
| 433 | reg = <0x4214>; |
| 434 | }; |
| 435 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 436 | timer7_fck: timer7_fck@4218 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 437 | #clock-cells = <0>; |
| 438 | compatible = "ti,mux-clock"; |
| 439 | clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; |
| 440 | reg = <0x4218>; |
| 441 | }; |
| 442 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 443 | wdt1_fck: wdt1_fck@422c { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 444 | #clock-cells = <0>; |
| 445 | compatible = "ti,mux-clock"; |
| 446 | clocks = <&clk_rc32k_ck>, <&clkdiv32k_ick>; |
| 447 | reg = <0x422c>; |
| 448 | }; |
| 449 | |
| 450 | l3_gclk: l3_gclk { |
| 451 | #clock-cells = <0>; |
| 452 | compatible = "fixed-factor-clock"; |
| 453 | clocks = <&dpll_core_m4_ck>; |
| 454 | clock-mult = <1>; |
| 455 | clock-div = <1>; |
| 456 | }; |
| 457 | |
| 458 | dpll_core_m4_div2_ck: dpll_core_m4_div2_ck { |
| 459 | #clock-cells = <0>; |
| 460 | compatible = "fixed-factor-clock"; |
| 461 | clocks = <&sysclk_div>; |
| 462 | clock-mult = <1>; |
| 463 | clock-div = <2>; |
| 464 | }; |
| 465 | |
| 466 | l4hs_gclk: l4hs_gclk { |
| 467 | #clock-cells = <0>; |
| 468 | compatible = "fixed-factor-clock"; |
| 469 | clocks = <&dpll_core_m4_ck>; |
| 470 | clock-mult = <1>; |
| 471 | clock-div = <1>; |
| 472 | }; |
| 473 | |
| 474 | l3s_gclk: l3s_gclk { |
| 475 | #clock-cells = <0>; |
| 476 | compatible = "fixed-factor-clock"; |
| 477 | clocks = <&dpll_core_m4_div2_ck>; |
| 478 | clock-mult = <1>; |
| 479 | clock-div = <1>; |
| 480 | }; |
| 481 | |
| 482 | l4ls_gclk: l4ls_gclk { |
| 483 | #clock-cells = <0>; |
| 484 | compatible = "fixed-factor-clock"; |
| 485 | clocks = <&dpll_core_m4_div2_ck>; |
| 486 | clock-mult = <1>; |
| 487 | clock-div = <1>; |
| 488 | }; |
| 489 | |
| 490 | cpsw_125mhz_gclk: cpsw_125mhz_gclk { |
| 491 | #clock-cells = <0>; |
| 492 | compatible = "fixed-factor-clock"; |
| 493 | clocks = <&dpll_core_m5_ck>; |
| 494 | clock-mult = <1>; |
| 495 | clock-div = <2>; |
| 496 | }; |
| 497 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 498 | cpsw_cpts_rft_clk: cpsw_cpts_rft_clk@4238 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 499 | #clock-cells = <0>; |
| 500 | compatible = "ti,mux-clock"; |
| 501 | clocks = <&sysclk_div>, <&dpll_core_m5_ck>, <&dpll_disp_m2_ck>; |
| 502 | reg = <0x4238>; |
| 503 | }; |
| 504 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 505 | dpll_clksel_mac_clk: dpll_clksel_mac_clk@4234 { |
Keerthy | 93c03a2 | 2015-06-18 13:31:12 +0530 | [diff] [blame] | 506 | #clock-cells = <0>; |
| 507 | compatible = "ti,divider-clock"; |
| 508 | clocks = <&dpll_core_m5_ck>; |
| 509 | reg = <0x4234>; |
| 510 | ti,bit-shift = <2>; |
| 511 | ti,dividers = <2>, <5>; |
| 512 | }; |
| 513 | |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 514 | clk_32k_mosc_ck: clk_32k_mosc_ck { |
| 515 | #clock-cells = <0>; |
| 516 | compatible = "fixed-clock"; |
| 517 | clock-frequency = <32768>; |
| 518 | }; |
| 519 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 520 | gpio0_dbclk_mux_ck: gpio0_dbclk_mux_ck@4240 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 521 | #clock-cells = <0>; |
| 522 | compatible = "ti,mux-clock"; |
| 523 | clocks = <&clk_rc32k_ck>, <&clk_32768_ck>, <&clkdiv32k_ick>, <&clk_32k_mosc_ck>, <&clk_32k_tpm_ck>; |
| 524 | reg = <0x4240>; |
| 525 | }; |
| 526 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 527 | gpio0_dbclk: gpio0_dbclk@2b68 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 528 | #clock-cells = <0>; |
| 529 | compatible = "ti,gate-clock"; |
| 530 | clocks = <&gpio0_dbclk_mux_ck>; |
| 531 | ti,bit-shift = <8>; |
| 532 | reg = <0x2b68>; |
| 533 | }; |
| 534 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 535 | gpio1_dbclk: gpio1_dbclk@8c78 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 536 | #clock-cells = <0>; |
| 537 | compatible = "ti,gate-clock"; |
| 538 | clocks = <&clkdiv32k_ick>; |
| 539 | ti,bit-shift = <8>; |
| 540 | reg = <0x8c78>; |
| 541 | }; |
| 542 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 543 | gpio2_dbclk: gpio2_dbclk@8c80 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 544 | #clock-cells = <0>; |
| 545 | compatible = "ti,gate-clock"; |
| 546 | clocks = <&clkdiv32k_ick>; |
| 547 | ti,bit-shift = <8>; |
| 548 | reg = <0x8c80>; |
| 549 | }; |
| 550 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 551 | gpio3_dbclk: gpio3_dbclk@8c88 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 552 | #clock-cells = <0>; |
| 553 | compatible = "ti,gate-clock"; |
| 554 | clocks = <&clkdiv32k_ick>; |
| 555 | ti,bit-shift = <8>; |
| 556 | reg = <0x8c88>; |
| 557 | }; |
| 558 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 559 | gpio4_dbclk: gpio4_dbclk@8c90 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 560 | #clock-cells = <0>; |
| 561 | compatible = "ti,gate-clock"; |
| 562 | clocks = <&clkdiv32k_ick>; |
| 563 | ti,bit-shift = <8>; |
| 564 | reg = <0x8c90>; |
| 565 | }; |
| 566 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 567 | gpio5_dbclk: gpio5_dbclk@8c98 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 568 | #clock-cells = <0>; |
| 569 | compatible = "ti,gate-clock"; |
| 570 | clocks = <&clkdiv32k_ick>; |
| 571 | ti,bit-shift = <8>; |
| 572 | reg = <0x8c98>; |
| 573 | }; |
| 574 | |
| 575 | mmc_clk: mmc_clk { |
| 576 | #clock-cells = <0>; |
| 577 | compatible = "fixed-factor-clock"; |
| 578 | clocks = <&dpll_per_m2_ck>; |
| 579 | clock-mult = <1>; |
| 580 | clock-div = <2>; |
| 581 | }; |
| 582 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 583 | gfx_fclk_clksel_ck: gfx_fclk_clksel_ck@423c { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 584 | #clock-cells = <0>; |
| 585 | compatible = "ti,mux-clock"; |
| 586 | clocks = <&sysclk_div>, <&dpll_per_m2_ck>; |
| 587 | ti,bit-shift = <1>; |
| 588 | reg = <0x423c>; |
| 589 | }; |
| 590 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 591 | gfx_fck_div_ck: gfx_fck_div_ck@423c { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 592 | #clock-cells = <0>; |
| 593 | compatible = "ti,divider-clock"; |
| 594 | clocks = <&gfx_fclk_clksel_ck>; |
| 595 | reg = <0x423c>; |
| 596 | ti,max-div = <2>; |
| 597 | }; |
| 598 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 599 | disp_clk: disp_clk@4244 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 600 | #clock-cells = <0>; |
| 601 | compatible = "ti,mux-clock"; |
| 602 | clocks = <&dpll_disp_m2_ck>, <&dpll_core_m5_ck>, <&dpll_per_m2_ck>; |
| 603 | reg = <0x4244>; |
Tomi Valkeinen | 10a6e18 | 2014-05-21 15:16:11 +0300 | [diff] [blame] | 604 | ti,set-rate-parent; |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 605 | }; |
| 606 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 607 | dpll_extdev_ck: dpll_extdev_ck@2e60 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 608 | #clock-cells = <0>; |
| 609 | compatible = "ti,am3-dpll-clock"; |
| 610 | clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; |
| 611 | reg = <0x2e60>, <0x2e64>, <0x2e6c>; |
| 612 | }; |
| 613 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 614 | dpll_extdev_m2_ck: dpll_extdev_m2_ck@2e70 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 615 | #clock-cells = <0>; |
| 616 | compatible = "ti,divider-clock"; |
| 617 | clocks = <&dpll_extdev_ck>; |
| 618 | ti,max-div = <127>; |
| 619 | ti,autoidle-shift = <8>; |
| 620 | reg = <0x2e70>; |
| 621 | ti,index-starts-at-one; |
| 622 | ti,invert-autoidle-bit; |
| 623 | }; |
| 624 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 625 | mux_synctimer32k_ck: mux_synctimer32k_ck@4230 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 626 | #clock-cells = <0>; |
| 627 | compatible = "ti,mux-clock"; |
| 628 | clocks = <&clk_32768_ck>, <&clk_32k_tpm_ck>, <&clkdiv32k_ick>; |
| 629 | reg = <0x4230>; |
| 630 | }; |
| 631 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 632 | synctimer_32kclk: synctimer_32kclk@2a30 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 633 | #clock-cells = <0>; |
| 634 | compatible = "ti,gate-clock"; |
| 635 | clocks = <&mux_synctimer32k_ck>; |
| 636 | ti,bit-shift = <8>; |
| 637 | reg = <0x2a30>; |
| 638 | }; |
| 639 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 640 | timer8_fck: timer8_fck@421c { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 641 | #clock-cells = <0>; |
| 642 | compatible = "ti,mux-clock"; |
| 643 | clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>, <&clk_32k_tpm_ck>; |
| 644 | reg = <0x421c>; |
| 645 | }; |
| 646 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 647 | timer9_fck: timer9_fck@4220 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 648 | #clock-cells = <0>; |
| 649 | compatible = "ti,mux-clock"; |
| 650 | clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>, <&clk_32k_tpm_ck>; |
| 651 | reg = <0x4220>; |
| 652 | }; |
| 653 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 654 | timer10_fck: timer10_fck@4224 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 655 | #clock-cells = <0>; |
| 656 | compatible = "ti,mux-clock"; |
| 657 | clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>, <&clk_32k_tpm_ck>; |
| 658 | reg = <0x4224>; |
| 659 | }; |
| 660 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 661 | timer11_fck: timer11_fck@4228 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 662 | #clock-cells = <0>; |
| 663 | compatible = "ti,mux-clock"; |
| 664 | clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>, <&clk_32k_tpm_ck>; |
| 665 | reg = <0x4228>; |
| 666 | }; |
| 667 | |
| 668 | cpsw_50m_clkdiv: cpsw_50m_clkdiv { |
| 669 | #clock-cells = <0>; |
| 670 | compatible = "fixed-factor-clock"; |
| 671 | clocks = <&dpll_core_m5_ck>; |
| 672 | clock-mult = <1>; |
| 673 | clock-div = <1>; |
| 674 | }; |
| 675 | |
| 676 | cpsw_5m_clkdiv: cpsw_5m_clkdiv { |
| 677 | #clock-cells = <0>; |
| 678 | compatible = "fixed-factor-clock"; |
| 679 | clocks = <&cpsw_50m_clkdiv>; |
| 680 | clock-mult = <1>; |
| 681 | clock-div = <10>; |
| 682 | }; |
| 683 | |
| 684 | dpll_ddr_x2_ck: dpll_ddr_x2_ck { |
| 685 | #clock-cells = <0>; |
| 686 | compatible = "ti,am3-dpll-x2-clock"; |
| 687 | clocks = <&dpll_ddr_ck>; |
| 688 | }; |
| 689 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 690 | dpll_ddr_m4_ck: dpll_ddr_m4_ck@2db8 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 691 | #clock-cells = <0>; |
| 692 | compatible = "ti,divider-clock"; |
| 693 | clocks = <&dpll_ddr_x2_ck>; |
| 694 | ti,max-div = <31>; |
| 695 | ti,autoidle-shift = <8>; |
| 696 | reg = <0x2db8>; |
| 697 | ti,index-starts-at-one; |
| 698 | ti,invert-autoidle-bit; |
| 699 | }; |
| 700 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 701 | dpll_per_clkdcoldo: dpll_per_clkdcoldo@2e14 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 702 | #clock-cells = <0>; |
Dave Gerlach | 50b9689 | 2014-03-28 15:54:31 -0500 | [diff] [blame] | 703 | compatible = "ti,fixed-factor-clock"; |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 704 | clocks = <&dpll_per_ck>; |
Dave Gerlach | 50b9689 | 2014-03-28 15:54:31 -0500 | [diff] [blame] | 705 | ti,clock-mult = <1>; |
| 706 | ti,clock-div = <1>; |
| 707 | ti,autoidle-shift = <8>; |
| 708 | reg = <0x2e14>; |
| 709 | ti,invert-autoidle-bit; |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 710 | }; |
| 711 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 712 | dll_aging_clk_div: dll_aging_clk_div@4250 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 713 | #clock-cells = <0>; |
| 714 | compatible = "ti,divider-clock"; |
| 715 | clocks = <&sys_clkin_ck>; |
| 716 | reg = <0x4250>; |
| 717 | ti,dividers = <8>, <16>, <32>; |
| 718 | }; |
| 719 | |
| 720 | div_core_25m_ck: div_core_25m_ck { |
| 721 | #clock-cells = <0>; |
| 722 | compatible = "fixed-factor-clock"; |
| 723 | clocks = <&sysclk_div>; |
| 724 | clock-mult = <1>; |
| 725 | clock-div = <8>; |
| 726 | }; |
| 727 | |
| 728 | func_12m_clk: func_12m_clk { |
| 729 | #clock-cells = <0>; |
| 730 | compatible = "fixed-factor-clock"; |
| 731 | clocks = <&dpll_per_m2_ck>; |
| 732 | clock-mult = <1>; |
| 733 | clock-div = <16>; |
| 734 | }; |
| 735 | |
| 736 | vtp_clk_div: vtp_clk_div { |
| 737 | #clock-cells = <0>; |
| 738 | compatible = "fixed-factor-clock"; |
| 739 | clocks = <&sys_clkin_ck>; |
| 740 | clock-mult = <1>; |
| 741 | clock-div = <2>; |
| 742 | }; |
| 743 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 744 | usbphy_32khz_clkmux: usbphy_32khz_clkmux@4260 { |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 745 | #clock-cells = <0>; |
| 746 | compatible = "ti,mux-clock"; |
| 747 | clocks = <&clk_32768_ck>, <&clk_32k_tpm_ck>; |
| 748 | reg = <0x4260>; |
| 749 | }; |
George Cherian | eac1cd3 | 2014-03-19 15:40:00 +0530 | [diff] [blame] | 750 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 751 | usb_phy0_always_on_clk32k: usb_phy0_always_on_clk32k@2a40 { |
George Cherian | eac1cd3 | 2014-03-19 15:40:00 +0530 | [diff] [blame] | 752 | #clock-cells = <0>; |
| 753 | compatible = "ti,gate-clock"; |
| 754 | clocks = <&usbphy_32khz_clkmux>; |
| 755 | ti,bit-shift = <8>; |
| 756 | reg = <0x2a40>; |
| 757 | }; |
| 758 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 759 | usb_phy1_always_on_clk32k: usb_phy1_always_on_clk32k@2a48 { |
George Cherian | eac1cd3 | 2014-03-19 15:40:00 +0530 | [diff] [blame] | 760 | #clock-cells = <0>; |
| 761 | compatible = "ti,gate-clock"; |
| 762 | clocks = <&usbphy_32khz_clkmux>; |
| 763 | ti,bit-shift = <8>; |
| 764 | reg = <0x2a48>; |
| 765 | }; |
| 766 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 767 | usb_otg_ss0_refclk960m: usb_otg_ss0_refclk960m@8a60 { |
George Cherian | eac1cd3 | 2014-03-19 15:40:00 +0530 | [diff] [blame] | 768 | #clock-cells = <0>; |
| 769 | compatible = "ti,gate-clock"; |
| 770 | clocks = <&dpll_per_clkdcoldo>; |
| 771 | ti,bit-shift = <8>; |
| 772 | reg = <0x8a60>; |
| 773 | }; |
| 774 | |
Tero Kristo | c567048 | 2016-04-04 18:16:10 +0300 | [diff] [blame] | 775 | usb_otg_ss1_refclk960m: usb_otg_ss1_refclk960m@8a68 { |
George Cherian | eac1cd3 | 2014-03-19 15:40:00 +0530 | [diff] [blame] | 776 | #clock-cells = <0>; |
| 777 | compatible = "ti,gate-clock"; |
| 778 | clocks = <&dpll_per_clkdcoldo>; |
| 779 | ti,bit-shift = <8>; |
| 780 | reg = <0x8a68>; |
| 781 | }; |
Tero Kristo | 8010f13 | 2016-03-16 21:54:57 +0200 | [diff] [blame] | 782 | |
| 783 | clkout1_osc_div_ck: clkout1_osc_div_ck { |
| 784 | #clock-cells = <0>; |
| 785 | compatible = "ti,divider-clock"; |
| 786 | clocks = <&sys_clkin_ck>; |
| 787 | ti,bit-shift = <20>; |
| 788 | ti,max-div = <4>; |
| 789 | reg = <0x4100>; |
| 790 | }; |
| 791 | |
| 792 | clkout1_src2_mux_ck: clkout1_src2_mux_ck { |
| 793 | #clock-cells = <0>; |
| 794 | compatible = "ti,mux-clock"; |
| 795 | clocks = <&clk_rc32k_ck>, <&sysclk_div>, <&dpll_ddr_m2_ck>, |
| 796 | <&dpll_per_m2_ck>, <&dpll_disp_m2_ck>, |
| 797 | <&dpll_mpu_m2_ck>; |
| 798 | reg = <0x4100>; |
| 799 | }; |
| 800 | |
| 801 | clkout1_src2_pre_div_ck: clkout1_src2_pre_div_ck { |
| 802 | #clock-cells = <0>; |
| 803 | compatible = "ti,divider-clock"; |
| 804 | clocks = <&clkout1_src2_mux_ck>; |
| 805 | ti,bit-shift = <4>; |
| 806 | ti,max-div = <8>; |
| 807 | reg = <0x4100>; |
| 808 | }; |
| 809 | |
| 810 | clkout1_src2_post_div_ck: clkout1_src2_post_div_ck { |
| 811 | #clock-cells = <0>; |
| 812 | compatible = "ti,divider-clock"; |
| 813 | clocks = <&clkout1_src2_pre_div_ck>; |
| 814 | ti,bit-shift = <8>; |
| 815 | ti,max-div = <32>; |
| 816 | ti,index-power-of-two; |
| 817 | reg = <0x4100>; |
| 818 | }; |
| 819 | |
| 820 | clkout1_mux_ck: clkout1_mux_ck { |
| 821 | #clock-cells = <0>; |
| 822 | compatible = "ti,mux-clock"; |
| 823 | clocks = <&clkout1_osc_div_ck>, <&clk_rc32k_ck>, |
| 824 | <&clkout1_src2_post_div_ck>, <&dpll_extdev_m2_ck>; |
| 825 | ti,bit-shift = <16>; |
| 826 | reg = <0x4100>; |
| 827 | }; |
| 828 | |
| 829 | clkout1_ck: clkout1_ck { |
| 830 | #clock-cells = <0>; |
| 831 | compatible = "ti,gate-clock"; |
| 832 | clocks = <&clkout1_mux_ck>; |
| 833 | ti,bit-shift = <23>; |
| 834 | reg = <0x4100>; |
| 835 | }; |
Tero Kristo | 6a67920 | 2013-08-02 19:12:04 +0300 | [diff] [blame] | 836 | }; |