blob: d78dd813bff978d87f9bedd38f403f816db73e76 [file] [log] [blame]
Dong Aishengae75ff82012-04-27 20:26:16 +08001/*
2 * Core driver for the imx pin controller
3 *
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
5 * Copyright (C) 2012 Linaro Ltd.
6 *
7 * Author: Dong Aisheng <dong.aisheng@linaro.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#include <linux/err.h>
16#include <linux/init.h>
17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/pinctrl/machine.h>
22#include <linux/pinctrl/pinconf.h>
23#include <linux/pinctrl/pinctrl.h>
24#include <linux/pinctrl/pinmux.h>
25#include <linux/slab.h>
26
27#include "core.h"
28#include "pinctrl-imx.h"
29
Dong Aishengae75ff82012-04-27 20:26:16 +080030/* The bits in CONFIG cell defined in binding doc*/
31#define IMX_NO_PAD_CTL 0x80000000 /* no pin config need */
32#define IMX_PAD_SION 0x40000000 /* set SION */
33
34/**
35 * @dev: a pointer back to containing device
36 * @base: the offset to the controller in virtual memory
37 */
38struct imx_pinctrl {
39 struct device *dev;
40 struct pinctrl_dev *pctl;
41 void __iomem *base;
42 const struct imx_pinctrl_soc_info *info;
43};
44
Dong Aishengae75ff82012-04-27 20:26:16 +080045static const inline struct imx_pin_group *imx_pinctrl_find_group_by_name(
46 const struct imx_pinctrl_soc_info *info,
47 const char *name)
48{
49 const struct imx_pin_group *grp = NULL;
50 int i;
51
52 for (i = 0; i < info->ngroups; i++) {
53 if (!strcmp(info->groups[i].name, name)) {
54 grp = &info->groups[i];
55 break;
56 }
57 }
58
59 return grp;
60}
61
62static int imx_get_groups_count(struct pinctrl_dev *pctldev)
63{
64 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
65 const struct imx_pinctrl_soc_info *info = ipctl->info;
66
67 return info->ngroups;
68}
69
70static const char *imx_get_group_name(struct pinctrl_dev *pctldev,
71 unsigned selector)
72{
73 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
74 const struct imx_pinctrl_soc_info *info = ipctl->info;
75
76 return info->groups[selector].name;
77}
78
79static int imx_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
80 const unsigned **pins,
81 unsigned *npins)
82{
83 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
84 const struct imx_pinctrl_soc_info *info = ipctl->info;
85
86 if (selector >= info->ngroups)
87 return -EINVAL;
88
Sascha Hauer8f903f82013-07-28 16:29:22 +020089 *pins = info->groups[selector].pin_ids;
Dong Aishengae75ff82012-04-27 20:26:16 +080090 *npins = info->groups[selector].npins;
91
92 return 0;
93}
94
95static void imx_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
96 unsigned offset)
97{
98 seq_printf(s, "%s", dev_name(pctldev->dev));
99}
100
101static int imx_dt_node_to_map(struct pinctrl_dev *pctldev,
102 struct device_node *np,
103 struct pinctrl_map **map, unsigned *num_maps)
104{
105 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
106 const struct imx_pinctrl_soc_info *info = ipctl->info;
107 const struct imx_pin_group *grp;
108 struct pinctrl_map *new_map;
109 struct device_node *parent;
110 int map_num = 1;
Hui Wang18071612012-06-20 18:13:47 +0800111 int i, j;
Dong Aishengae75ff82012-04-27 20:26:16 +0800112
113 /*
114 * first find the group of this node and check if we need create
115 * config maps for pins
116 */
117 grp = imx_pinctrl_find_group_by_name(info, np->name);
118 if (!grp) {
119 dev_err(info->dev, "unable to find group for node %s\n",
120 np->name);
121 return -EINVAL;
122 }
123
124 for (i = 0; i < grp->npins; i++) {
Sascha Hauer8f903f82013-07-28 16:29:22 +0200125 if (!(grp->pins[i].config & IMX_NO_PAD_CTL))
Dong Aishengae75ff82012-04-27 20:26:16 +0800126 map_num++;
127 }
128
129 new_map = kmalloc(sizeof(struct pinctrl_map) * map_num, GFP_KERNEL);
130 if (!new_map)
131 return -ENOMEM;
132
133 *map = new_map;
134 *num_maps = map_num;
135
136 /* create mux map */
137 parent = of_get_parent(np);
Devendra Nagac71157c2012-06-07 22:19:26 +0530138 if (!parent) {
139 kfree(new_map);
Dong Aishengae75ff82012-04-27 20:26:16 +0800140 return -EINVAL;
Devendra Nagac71157c2012-06-07 22:19:26 +0530141 }
Dong Aishengae75ff82012-04-27 20:26:16 +0800142 new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;
143 new_map[0].data.mux.function = parent->name;
144 new_map[0].data.mux.group = np->name;
145 of_node_put(parent);
146
147 /* create config map */
148 new_map++;
Hui Wang18071612012-06-20 18:13:47 +0800149 for (i = j = 0; i < grp->npins; i++) {
Sascha Hauer8f903f82013-07-28 16:29:22 +0200150 if (!(grp->pins[i].config & IMX_NO_PAD_CTL)) {
Hui Wang18071612012-06-20 18:13:47 +0800151 new_map[j].type = PIN_MAP_TYPE_CONFIGS_PIN;
152 new_map[j].data.configs.group_or_pin =
Sascha Hauer8f903f82013-07-28 16:29:22 +0200153 pin_get_name(pctldev, grp->pins[i].pin);
154 new_map[j].data.configs.configs = &grp->pins[i].config;
Hui Wang18071612012-06-20 18:13:47 +0800155 new_map[j].data.configs.num_configs = 1;
156 j++;
Dong Aishengae75ff82012-04-27 20:26:16 +0800157 }
158 }
159
160 dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n",
Dong Aisheng67695f22012-06-08 21:33:12 +0800161 (*map)->data.mux.function, (*map)->data.mux.group, map_num);
Dong Aishengae75ff82012-04-27 20:26:16 +0800162
163 return 0;
164}
165
166static void imx_dt_free_map(struct pinctrl_dev *pctldev,
167 struct pinctrl_map *map, unsigned num_maps)
168{
Devendra Naga3a86a5f2012-06-09 00:52:11 +0530169 kfree(map);
Dong Aishengae75ff82012-04-27 20:26:16 +0800170}
171
Laurent Pinchart022ab142013-02-16 10:25:07 +0100172static const struct pinctrl_ops imx_pctrl_ops = {
Dong Aishengae75ff82012-04-27 20:26:16 +0800173 .get_groups_count = imx_get_groups_count,
174 .get_group_name = imx_get_group_name,
175 .get_group_pins = imx_get_group_pins,
176 .pin_dbg_show = imx_pin_dbg_show,
177 .dt_node_to_map = imx_dt_node_to_map,
178 .dt_free_map = imx_dt_free_map,
179
180};
181
182static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
183 unsigned group)
184{
185 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
186 const struct imx_pinctrl_soc_info *info = ipctl->info;
187 const struct imx_pin_reg *pin_reg;
Dong Aishengae75ff82012-04-27 20:26:16 +0800188 unsigned int npins, pin_id;
189 int i;
Sascha Hauer8f903f82013-07-28 16:29:22 +0200190 struct imx_pin_group *grp;
Dong Aishengae75ff82012-04-27 20:26:16 +0800191
192 /*
193 * Configure the mux mode for each pin in the group for a specific
194 * function.
195 */
Sascha Hauer8f903f82013-07-28 16:29:22 +0200196 grp = &info->groups[group];
197 npins = grp->npins;
Dong Aishengae75ff82012-04-27 20:26:16 +0800198
199 dev_dbg(ipctl->dev, "enable function %s group %s\n",
Sascha Hauer8f903f82013-07-28 16:29:22 +0200200 info->functions[selector].name, grp->name);
Dong Aishengae75ff82012-04-27 20:26:16 +0800201
202 for (i = 0; i < npins; i++) {
Sascha Hauer8f903f82013-07-28 16:29:22 +0200203 struct imx_pin *pin = &grp->pins[i];
204 pin_id = pin->pin;
Shawn Guoe1641532013-02-20 10:32:52 +0800205 pin_reg = &info->pin_regs[pin_id];
Dong Aishengae75ff82012-04-27 20:26:16 +0800206
Jingchang Lubf5a5302013-05-28 17:32:07 +0800207 if (!(info->flags & ZERO_OFFSET_VALID) && !pin_reg->mux_reg) {
Dong Aishengae75ff82012-04-27 20:26:16 +0800208 dev_err(ipctl->dev, "Pin(%s) does not support mux function\n",
209 info->pins[pin_id].name);
210 return -EINVAL;
211 }
212
Jingchang Lubf5a5302013-05-28 17:32:07 +0800213 if (info->flags & SHARE_MUX_CONF_REG) {
214 u32 reg;
215 reg = readl(ipctl->base + pin_reg->mux_reg);
216 reg &= ~(0x7 << 20);
Sascha Hauer8f903f82013-07-28 16:29:22 +0200217 reg |= (pin->mux_mode << 20);
Jingchang Lubf5a5302013-05-28 17:32:07 +0800218 writel(reg, ipctl->base + pin_reg->mux_reg);
219 } else {
Sascha Hauer8f903f82013-07-28 16:29:22 +0200220 writel(pin->mux_mode, ipctl->base + pin_reg->mux_reg);
Jingchang Lubf5a5302013-05-28 17:32:07 +0800221 }
Dong Aishengae75ff82012-04-27 20:26:16 +0800222 dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
Sascha Hauer8f903f82013-07-28 16:29:22 +0200223 pin_reg->mux_reg, pin->mux_mode);
Dong Aishengae75ff82012-04-27 20:26:16 +0800224
Shawn Guo94176fa2013-08-04 21:39:23 +0800225 /*
226 * If the select input value begins with 0xff, it's a quirky
227 * select input and the value should be interpreted as below.
228 * 31 23 15 7 0
229 * | 0xff | shift | width | select |
230 * It's used to work around the problem that the select
231 * input for some pin is not implemented in the select
232 * input register but in some general purpose register.
233 * We encode the select input value, width and shift of
234 * the bit field into input_val cell of pin function ID
235 * in device tree, and then decode them here for setting
236 * up the select input bits in general purpose register.
237 */
Sascha Hauer8f903f82013-07-28 16:29:22 +0200238 if (pin->input_val >> 24 == 0xff) {
239 u32 val = pin->input_val;
Shawn Guo94176fa2013-08-04 21:39:23 +0800240 u8 select = val & 0xff;
241 u8 width = (val >> 8) & 0xff;
242 u8 shift = (val >> 16) & 0xff;
243 u32 mask = ((1 << width) - 1) << shift;
244 /*
245 * The input_reg[i] here is actually some IOMUXC general
246 * purpose register, not regular select input register.
247 */
Sascha Hauer8f903f82013-07-28 16:29:22 +0200248 val = readl(ipctl->base + pin->input_val);
Shawn Guo94176fa2013-08-04 21:39:23 +0800249 val &= ~mask;
250 val |= select << shift;
Sascha Hauer8f903f82013-07-28 16:29:22 +0200251 writel(val, ipctl->base + pin->input_val);
252 } else if (pin->input_val) {
Shawn Guo94176fa2013-08-04 21:39:23 +0800253 /*
254 * Regular select input register can never be at offset
255 * 0, and we only print register value for regular case.
256 */
Sascha Hauer8f903f82013-07-28 16:29:22 +0200257 writel(pin->input_val, ipctl->base + pin->input_reg);
Dong Aishengae75ff82012-04-27 20:26:16 +0800258 dev_dbg(ipctl->dev,
259 "==>select_input: offset 0x%x val 0x%x\n",
Sascha Hauer8f903f82013-07-28 16:29:22 +0200260 pin->input_reg, pin->input_val);
Dong Aishengae75ff82012-04-27 20:26:16 +0800261 }
262 }
263
264 return 0;
265}
266
Dong Aishengae75ff82012-04-27 20:26:16 +0800267static int imx_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
268{
269 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
270 const struct imx_pinctrl_soc_info *info = ipctl->info;
271
272 return info->nfunctions;
273}
274
275static const char *imx_pmx_get_func_name(struct pinctrl_dev *pctldev,
276 unsigned selector)
277{
278 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
279 const struct imx_pinctrl_soc_info *info = ipctl->info;
280
281 return info->functions[selector].name;
282}
283
284static int imx_pmx_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
285 const char * const **groups,
286 unsigned * const num_groups)
287{
288 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
289 const struct imx_pinctrl_soc_info *info = ipctl->info;
290
291 *groups = info->functions[selector].groups;
292 *num_groups = info->functions[selector].num_groups;
293
294 return 0;
295}
296
Laurent Pinchart022ab142013-02-16 10:25:07 +0100297static const struct pinmux_ops imx_pmx_ops = {
Dong Aishengae75ff82012-04-27 20:26:16 +0800298 .get_functions_count = imx_pmx_get_funcs_count,
299 .get_function_name = imx_pmx_get_func_name,
300 .get_function_groups = imx_pmx_get_groups,
301 .enable = imx_pmx_enable,
Dong Aishengae75ff82012-04-27 20:26:16 +0800302};
303
304static int imx_pinconf_get(struct pinctrl_dev *pctldev,
305 unsigned pin_id, unsigned long *config)
306{
307 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
308 const struct imx_pinctrl_soc_info *info = ipctl->info;
Shawn Guoe1641532013-02-20 10:32:52 +0800309 const struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
Dong Aishengae75ff82012-04-27 20:26:16 +0800310
Jingchang Lubf5a5302013-05-28 17:32:07 +0800311 if (!(info->flags & ZERO_OFFSET_VALID) && !pin_reg->conf_reg) {
Dong Aishengae75ff82012-04-27 20:26:16 +0800312 dev_err(info->dev, "Pin(%s) does not support config function\n",
313 info->pins[pin_id].name);
314 return -EINVAL;
315 }
316
317 *config = readl(ipctl->base + pin_reg->conf_reg);
318
Jingchang Lubf5a5302013-05-28 17:32:07 +0800319 if (info->flags & SHARE_MUX_CONF_REG)
320 *config &= 0xffff;
321
Dong Aishengae75ff82012-04-27 20:26:16 +0800322 return 0;
323}
324
325static int imx_pinconf_set(struct pinctrl_dev *pctldev,
Sherman Yin03b054e2013-08-27 11:32:12 -0700326 unsigned pin_id, unsigned long *configs,
327 unsigned num_configs)
Dong Aishengae75ff82012-04-27 20:26:16 +0800328{
329 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
330 const struct imx_pinctrl_soc_info *info = ipctl->info;
Shawn Guoe1641532013-02-20 10:32:52 +0800331 const struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
Sherman Yin03b054e2013-08-27 11:32:12 -0700332 int i;
Dong Aishengae75ff82012-04-27 20:26:16 +0800333
Jingchang Lubf5a5302013-05-28 17:32:07 +0800334 if (!(info->flags & ZERO_OFFSET_VALID) && !pin_reg->conf_reg) {
Dong Aishengae75ff82012-04-27 20:26:16 +0800335 dev_err(info->dev, "Pin(%s) does not support config function\n",
336 info->pins[pin_id].name);
337 return -EINVAL;
338 }
339
340 dev_dbg(ipctl->dev, "pinconf set pin %s\n",
341 info->pins[pin_id].name);
342
Sherman Yin03b054e2013-08-27 11:32:12 -0700343 for (i = 0; i < num_configs; i++) {
344 if (info->flags & SHARE_MUX_CONF_REG) {
345 u32 reg;
346 reg = readl(ipctl->base + pin_reg->conf_reg);
347 reg &= ~0xffff;
348 reg |= configs[i];
349 writel(reg, ipctl->base + pin_reg->conf_reg);
350 } else {
351 writel(configs[i], ipctl->base + pin_reg->conf_reg);
352 }
353 dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%lx\n",
354 pin_reg->conf_reg, configs[i]);
355 } /* for each config */
Dong Aishengae75ff82012-04-27 20:26:16 +0800356
357 return 0;
358}
359
360static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
361 struct seq_file *s, unsigned pin_id)
362{
363 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
364 const struct imx_pinctrl_soc_info *info = ipctl->info;
Shawn Guoe1641532013-02-20 10:32:52 +0800365 const struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
Dong Aishengae75ff82012-04-27 20:26:16 +0800366 unsigned long config;
367
Dong Aishengae75ff82012-04-27 20:26:16 +0800368 if (!pin_reg || !pin_reg->conf_reg) {
369 seq_printf(s, "N/A");
370 return;
371 }
372
373 config = readl(ipctl->base + pin_reg->conf_reg);
374 seq_printf(s, "0x%lx", config);
375}
376
377static void imx_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
378 struct seq_file *s, unsigned group)
379{
380 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
381 const struct imx_pinctrl_soc_info *info = ipctl->info;
382 struct imx_pin_group *grp;
383 unsigned long config;
384 const char *name;
385 int i, ret;
386
387 if (group > info->ngroups)
388 return;
389
390 seq_printf(s, "\n");
391 grp = &info->groups[group];
392 for (i = 0; i < grp->npins; i++) {
Sascha Hauer8f903f82013-07-28 16:29:22 +0200393 struct imx_pin *pin = &grp->pins[i];
394 name = pin_get_name(pctldev, pin->pin);
395 ret = imx_pinconf_get(pctldev, pin->pin, &config);
Dong Aishengae75ff82012-04-27 20:26:16 +0800396 if (ret)
397 return;
398 seq_printf(s, "%s: 0x%lx", name, config);
399 }
400}
401
Laurent Pinchart022ab142013-02-16 10:25:07 +0100402static const struct pinconf_ops imx_pinconf_ops = {
Dong Aishengae75ff82012-04-27 20:26:16 +0800403 .pin_config_get = imx_pinconf_get,
404 .pin_config_set = imx_pinconf_set,
405 .pin_config_dbg_show = imx_pinconf_dbg_show,
406 .pin_config_group_dbg_show = imx_pinconf_group_dbg_show,
407};
408
409static struct pinctrl_desc imx_pinctrl_desc = {
410 .pctlops = &imx_pctrl_ops,
411 .pmxops = &imx_pmx_ops,
412 .confops = &imx_pinconf_ops,
413 .owner = THIS_MODULE,
414};
415
Shawn Guoe1641532013-02-20 10:32:52 +0800416/*
417 * Each pin represented in fsl,pins consists of 5 u32 PIN_FUNC_ID and
418 * 1 u32 CONFIG, so 24 types in total for each pin.
419 */
420#define FSL_PIN_SIZE 24
Jingchang Lubf5a5302013-05-28 17:32:07 +0800421#define SHARE_FSL_PIN_SIZE 20
Dong Aishengae75ff82012-04-27 20:26:16 +0800422
Greg Kroah-Hartman150632b2012-12-21 13:10:23 -0800423static int imx_pinctrl_parse_groups(struct device_node *np,
424 struct imx_pin_group *grp,
425 struct imx_pinctrl_soc_info *info,
426 u32 index)
Dong Aishengae75ff82012-04-27 20:26:16 +0800427{
Jingchang Lubf5a5302013-05-28 17:32:07 +0800428 int size, pin_size;
Richard Zhaoa6951452012-09-18 14:54:00 +0800429 const __be32 *list;
Shawn Guoe1641532013-02-20 10:32:52 +0800430 int i;
Dong Aishengae75ff82012-04-27 20:26:16 +0800431 u32 config;
432
433 dev_dbg(info->dev, "group(%d): %s\n", index, np->name);
434
Jingchang Lubf5a5302013-05-28 17:32:07 +0800435 if (info->flags & SHARE_MUX_CONF_REG)
436 pin_size = SHARE_FSL_PIN_SIZE;
437 else
438 pin_size = FSL_PIN_SIZE;
Dong Aishengae75ff82012-04-27 20:26:16 +0800439 /* Initialise group */
440 grp->name = np->name;
441
442 /*
443 * the binding format is fsl,pins = <PIN_FUNC_ID CONFIG ...>,
444 * do sanity check and calculate pins number
445 */
446 list = of_get_property(np, "fsl,pins", &size);
Sascha Hauer1bf1fea92013-08-09 14:20:51 +0200447 if (!list) {
448 dev_err(info->dev, "no fsl,pins property in node %s\n", np->full_name);
449 return -EINVAL;
450 }
451
Dong Aishengae75ff82012-04-27 20:26:16 +0800452 /* we do not check return since it's safe node passed down */
Jingchang Lubf5a5302013-05-28 17:32:07 +0800453 if (!size || size % pin_size) {
Sascha Hauer01312512013-08-09 14:20:50 +0200454 dev_err(info->dev, "Invalid fsl,pins property in node %s\n", np->full_name);
Dong Aishengae75ff82012-04-27 20:26:16 +0800455 return -EINVAL;
456 }
457
Jingchang Lubf5a5302013-05-28 17:32:07 +0800458 grp->npins = size / pin_size;
Sascha Hauer8f903f82013-07-28 16:29:22 +0200459 grp->pins = devm_kzalloc(info->dev, grp->npins * sizeof(struct imx_pin),
Dong Aishengae75ff82012-04-27 20:26:16 +0800460 GFP_KERNEL);
Sascha Hauer8f903f82013-07-28 16:29:22 +0200461 grp->pin_ids = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
Dong Aishengae75ff82012-04-27 20:26:16 +0800462 GFP_KERNEL);
Sascha Hauer8f903f82013-07-28 16:29:22 +0200463 if (!grp->pins || ! grp->pin_ids)
464 return -ENOMEM;
465
Shawn Guoe1641532013-02-20 10:32:52 +0800466 for (i = 0; i < grp->npins; i++) {
467 u32 mux_reg = be32_to_cpu(*list++);
Jingchang Lubf5a5302013-05-28 17:32:07 +0800468 u32 conf_reg;
469 unsigned int pin_id;
470 struct imx_pin_reg *pin_reg;
Sascha Hauer8f903f82013-07-28 16:29:22 +0200471 struct imx_pin *pin = &grp->pins[i];
Shawn Guoe1641532013-02-20 10:32:52 +0800472
Jingchang Lubf5a5302013-05-28 17:32:07 +0800473 if (info->flags & SHARE_MUX_CONF_REG)
474 conf_reg = mux_reg;
475 else
476 conf_reg = be32_to_cpu(*list++);
477
478 pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
479 pin_reg = &info->pin_regs[pin_id];
Sascha Hauer8f903f82013-07-28 16:29:22 +0200480 pin->pin = pin_id;
481 grp->pin_ids[i] = pin_id;
Shawn Guoe1641532013-02-20 10:32:52 +0800482 pin_reg->mux_reg = mux_reg;
483 pin_reg->conf_reg = conf_reg;
Sascha Hauer8f903f82013-07-28 16:29:22 +0200484 pin->input_reg = be32_to_cpu(*list++);
485 pin->mux_mode = be32_to_cpu(*list++);
486 pin->input_val = be32_to_cpu(*list++);
Shawn Guoe1641532013-02-20 10:32:52 +0800487
Dong Aishengae75ff82012-04-27 20:26:16 +0800488 /* SION bit is in mux register */
489 config = be32_to_cpu(*list++);
490 if (config & IMX_PAD_SION)
Sascha Hauer8f903f82013-07-28 16:29:22 +0200491 pin->mux_mode |= IOMUXC_CONFIG_SION;
492 pin->config = config & ~IMX_PAD_SION;
Dong Aishengae75ff82012-04-27 20:26:16 +0800493
Sascha Hauer40604462013-08-23 10:38:57 +0200494 dev_dbg(info->dev, "%s: %d 0x%08lx", info->pins[i].name,
495 pin->mux_mode, pin->config);
496 }
Devendra Naga3a86a5f2012-06-09 00:52:11 +0530497
Dong Aishengae75ff82012-04-27 20:26:16 +0800498 return 0;
499}
500
Greg Kroah-Hartman150632b2012-12-21 13:10:23 -0800501static int imx_pinctrl_parse_functions(struct device_node *np,
502 struct imx_pinctrl_soc_info *info,
503 u32 index)
Dong Aishengae75ff82012-04-27 20:26:16 +0800504{
505 struct device_node *child;
506 struct imx_pmx_func *func;
507 struct imx_pin_group *grp;
Dong Aishengae75ff82012-04-27 20:26:16 +0800508 static u32 grp_index;
509 u32 i = 0;
510
511 dev_dbg(info->dev, "parse function(%d): %s\n", index, np->name);
512
513 func = &info->functions[index];
514
515 /* Initialise function */
516 func->name = np->name;
517 func->num_groups = of_get_child_count(np);
518 if (func->num_groups <= 0) {
Sascha Hauer01312512013-08-09 14:20:50 +0200519 dev_err(info->dev, "no groups defined in %s\n", np->full_name);
Dong Aishengae75ff82012-04-27 20:26:16 +0800520 return -EINVAL;
521 }
522 func->groups = devm_kzalloc(info->dev,
523 func->num_groups * sizeof(char *), GFP_KERNEL);
524
525 for_each_child_of_node(np, child) {
526 func->groups[i] = child->name;
527 grp = &info->groups[grp_index++];
Sascha Hauer5e13762c2013-08-09 14:20:52 +0200528 imx_pinctrl_parse_groups(child, grp, info, i++);
Dong Aishengae75ff82012-04-27 20:26:16 +0800529 }
530
531 return 0;
532}
533
Greg Kroah-Hartman150632b2012-12-21 13:10:23 -0800534static int imx_pinctrl_probe_dt(struct platform_device *pdev,
Dong Aishengae75ff82012-04-27 20:26:16 +0800535 struct imx_pinctrl_soc_info *info)
536{
537 struct device_node *np = pdev->dev.of_node;
538 struct device_node *child;
Dong Aishengae75ff82012-04-27 20:26:16 +0800539 u32 nfuncs = 0;
540 u32 i = 0;
541
542 if (!np)
543 return -ENODEV;
544
545 nfuncs = of_get_child_count(np);
546 if (nfuncs <= 0) {
547 dev_err(&pdev->dev, "no functions defined\n");
548 return -EINVAL;
549 }
550
551 info->nfunctions = nfuncs;
552 info->functions = devm_kzalloc(&pdev->dev, nfuncs * sizeof(struct imx_pmx_func),
553 GFP_KERNEL);
554 if (!info->functions)
555 return -ENOMEM;
556
557 info->ngroups = 0;
558 for_each_child_of_node(np, child)
559 info->ngroups += of_get_child_count(child);
560 info->groups = devm_kzalloc(&pdev->dev, info->ngroups * sizeof(struct imx_pin_group),
561 GFP_KERNEL);
562 if (!info->groups)
563 return -ENOMEM;
564
Sascha Hauer7ea46e02013-08-09 14:20:53 +0200565 for_each_child_of_node(np, child)
566 imx_pinctrl_parse_functions(child, info, i++);
Dong Aishengae75ff82012-04-27 20:26:16 +0800567
568 return 0;
569}
570
Greg Kroah-Hartman150632b2012-12-21 13:10:23 -0800571int imx_pinctrl_probe(struct platform_device *pdev,
572 struct imx_pinctrl_soc_info *info)
Dong Aishengae75ff82012-04-27 20:26:16 +0800573{
574 struct imx_pinctrl *ipctl;
575 struct resource *res;
576 int ret;
577
Shawn Guoe1641532013-02-20 10:32:52 +0800578 if (!info || !info->pins || !info->npins) {
Dong Aishengae75ff82012-04-27 20:26:16 +0800579 dev_err(&pdev->dev, "wrong pinctrl info\n");
580 return -EINVAL;
581 }
582 info->dev = &pdev->dev;
583
584 /* Create state holders etc for this driver */
585 ipctl = devm_kzalloc(&pdev->dev, sizeof(*ipctl), GFP_KERNEL);
586 if (!ipctl)
587 return -ENOMEM;
588
Shawn Guoe1641532013-02-20 10:32:52 +0800589 info->pin_regs = devm_kzalloc(&pdev->dev, sizeof(*info->pin_regs) *
590 info->npins, GFP_KERNEL);
591 if (!info->pin_regs)
592 return -ENOMEM;
593
Dong Aishengae75ff82012-04-27 20:26:16 +0800594 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Thierry Reding9e0c1fb2013-01-21 11:09:14 +0100595 ipctl->base = devm_ioremap_resource(&pdev->dev, res);
596 if (IS_ERR(ipctl->base))
597 return PTR_ERR(ipctl->base);
Dong Aishengae75ff82012-04-27 20:26:16 +0800598
599 imx_pinctrl_desc.name = dev_name(&pdev->dev);
600 imx_pinctrl_desc.pins = info->pins;
601 imx_pinctrl_desc.npins = info->npins;
602
603 ret = imx_pinctrl_probe_dt(pdev, info);
604 if (ret) {
605 dev_err(&pdev->dev, "fail to probe dt properties\n");
606 return ret;
607 }
608
609 ipctl->info = info;
610 ipctl->dev = info->dev;
611 platform_set_drvdata(pdev, ipctl);
612 ipctl->pctl = pinctrl_register(&imx_pinctrl_desc, &pdev->dev, ipctl);
613 if (!ipctl->pctl) {
614 dev_err(&pdev->dev, "could not register IMX pinctrl driver\n");
615 return -EINVAL;
616 }
617
618 dev_info(&pdev->dev, "initialized IMX pinctrl driver\n");
619
620 return 0;
621}
622
Bill Pembertonf90f54b2012-11-19 13:26:06 -0500623int imx_pinctrl_remove(struct platform_device *pdev)
Dong Aishengae75ff82012-04-27 20:26:16 +0800624{
625 struct imx_pinctrl *ipctl = platform_get_drvdata(pdev);
626
627 pinctrl_unregister(ipctl->pctl);
628
629 return 0;
630}