Johannes Berg | 8ca151b | 2013-01-24 14:25:36 +0100 | [diff] [blame] | 1 | /****************************************************************************** |
| 2 | * |
| 3 | * This file is provided under a dual BSD/GPLv2 license. When using or |
| 4 | * redistributing this file, you may do so under either license. |
| 5 | * |
| 6 | * GPL LICENSE SUMMARY |
| 7 | * |
| 8 | * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of version 2 of the GNU General Public License as |
| 12 | * published by the Free Software Foundation. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, but |
| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 17 | * General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, |
| 22 | * USA |
| 23 | * |
| 24 | * The full GNU General Public License is included in this distribution |
Emmanuel Grumbach | 410dc5a | 2013-02-18 09:22:28 +0200 | [diff] [blame] | 25 | * in the file called COPYING. |
Johannes Berg | 8ca151b | 2013-01-24 14:25:36 +0100 | [diff] [blame] | 26 | * |
| 27 | * Contact Information: |
| 28 | * Intel Linux Wireless <ilw@linux.intel.com> |
| 29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 30 | * |
| 31 | * BSD LICENSE |
| 32 | * |
| 33 | * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved. |
| 34 | * All rights reserved. |
| 35 | * |
| 36 | * Redistribution and use in source and binary forms, with or without |
| 37 | * modification, are permitted provided that the following conditions |
| 38 | * are met: |
| 39 | * |
| 40 | * * Redistributions of source code must retain the above copyright |
| 41 | * notice, this list of conditions and the following disclaimer. |
| 42 | * * Redistributions in binary form must reproduce the above copyright |
| 43 | * notice, this list of conditions and the following disclaimer in |
| 44 | * the documentation and/or other materials provided with the |
| 45 | * distribution. |
| 46 | * * Neither the name Intel Corporation nor the names of its |
| 47 | * contributors may be used to endorse or promote products derived |
| 48 | * from this software without specific prior written permission. |
| 49 | * |
| 50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 61 | * |
| 62 | *****************************************************************************/ |
| 63 | |
| 64 | #ifndef __fw_api_h__ |
| 65 | #define __fw_api_h__ |
| 66 | |
| 67 | #include "fw-api-rs.h" |
| 68 | #include "fw-api-tx.h" |
| 69 | #include "fw-api-sta.h" |
| 70 | #include "fw-api-mac.h" |
| 71 | #include "fw-api-power.h" |
| 72 | #include "fw-api-d3.h" |
Emmanuel Grumbach | fb3ceb8 | 2013-01-14 15:04:01 +0200 | [diff] [blame] | 73 | #include "fw-api-bt-coex.h" |
Johannes Berg | 8ca151b | 2013-01-24 14:25:36 +0100 | [diff] [blame] | 74 | |
| 75 | /* queue and FIFO numbers by usage */ |
| 76 | enum { |
| 77 | IWL_MVM_OFFCHANNEL_QUEUE = 8, |
| 78 | IWL_MVM_CMD_QUEUE = 9, |
| 79 | IWL_MVM_AUX_QUEUE = 15, |
| 80 | IWL_MVM_FIRST_AGG_QUEUE = 16, |
| 81 | IWL_MVM_NUM_QUEUES = 20, |
| 82 | IWL_MVM_LAST_AGG_QUEUE = IWL_MVM_NUM_QUEUES - 1, |
| 83 | IWL_MVM_CMD_FIFO = 7 |
| 84 | }; |
| 85 | |
| 86 | #define IWL_MVM_STATION_COUNT 16 |
| 87 | |
| 88 | /* commands */ |
| 89 | enum { |
| 90 | MVM_ALIVE = 0x1, |
| 91 | REPLY_ERROR = 0x2, |
| 92 | |
| 93 | INIT_COMPLETE_NOTIF = 0x4, |
| 94 | |
| 95 | /* PHY context commands */ |
| 96 | PHY_CONTEXT_CMD = 0x8, |
| 97 | DBG_CFG = 0x9, |
| 98 | |
| 99 | /* station table */ |
| 100 | ADD_STA = 0x18, |
| 101 | REMOVE_STA = 0x19, |
| 102 | |
| 103 | /* TX */ |
| 104 | TX_CMD = 0x1c, |
| 105 | TXPATH_FLUSH = 0x1e, |
| 106 | MGMT_MCAST_KEY = 0x1f, |
| 107 | |
| 108 | /* global key */ |
| 109 | WEP_KEY = 0x20, |
| 110 | |
| 111 | /* MAC and Binding commands */ |
| 112 | MAC_CONTEXT_CMD = 0x28, |
| 113 | TIME_EVENT_CMD = 0x29, /* both CMD and response */ |
| 114 | TIME_EVENT_NOTIFICATION = 0x2a, |
| 115 | BINDING_CONTEXT_CMD = 0x2b, |
| 116 | TIME_QUOTA_CMD = 0x2c, |
| 117 | |
| 118 | LQ_CMD = 0x4e, |
| 119 | |
| 120 | /* Calibration */ |
| 121 | TEMPERATURE_NOTIFICATION = 0x62, |
| 122 | CALIBRATION_CFG_CMD = 0x65, |
| 123 | CALIBRATION_RES_NOTIFICATION = 0x66, |
| 124 | CALIBRATION_COMPLETE_NOTIFICATION = 0x67, |
| 125 | RADIO_VERSION_NOTIFICATION = 0x68, |
| 126 | |
| 127 | /* Scan offload */ |
| 128 | SCAN_OFFLOAD_REQUEST_CMD = 0x51, |
| 129 | SCAN_OFFLOAD_ABORT_CMD = 0x52, |
| 130 | SCAN_OFFLOAD_COMPLETE = 0x6D, |
| 131 | SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E, |
| 132 | SCAN_OFFLOAD_CONFIG_CMD = 0x6f, |
| 133 | |
| 134 | /* Phy */ |
| 135 | PHY_CONFIGURATION_CMD = 0x6a, |
| 136 | CALIB_RES_NOTIF_PHY_DB = 0x6b, |
| 137 | /* PHY_DB_CMD = 0x6c, */ |
| 138 | |
| 139 | /* Power */ |
| 140 | POWER_TABLE_CMD = 0x77, |
| 141 | |
| 142 | /* Scanning */ |
| 143 | SCAN_REQUEST_CMD = 0x80, |
| 144 | SCAN_ABORT_CMD = 0x81, |
| 145 | SCAN_START_NOTIFICATION = 0x82, |
| 146 | SCAN_RESULTS_NOTIFICATION = 0x83, |
| 147 | SCAN_COMPLETE_NOTIFICATION = 0x84, |
| 148 | |
| 149 | /* NVM */ |
| 150 | NVM_ACCESS_CMD = 0x88, |
| 151 | |
| 152 | SET_CALIB_DEFAULT_CMD = 0x8e, |
| 153 | |
| 154 | BEACON_TEMPLATE_CMD = 0x91, |
| 155 | TX_ANT_CONFIGURATION_CMD = 0x98, |
Emmanuel Grumbach | fb3ceb8 | 2013-01-14 15:04:01 +0200 | [diff] [blame] | 156 | BT_CONFIG = 0x9b, |
Johannes Berg | 8ca151b | 2013-01-24 14:25:36 +0100 | [diff] [blame] | 157 | STATISTICS_NOTIFICATION = 0x9d, |
| 158 | |
| 159 | /* RF-KILL commands and notifications */ |
| 160 | CARD_STATE_CMD = 0xa0, |
| 161 | CARD_STATE_NOTIFICATION = 0xa1, |
| 162 | |
| 163 | REPLY_RX_PHY_CMD = 0xc0, |
| 164 | REPLY_RX_MPDU_CMD = 0xc1, |
| 165 | BA_NOTIF = 0xc5, |
| 166 | |
Emmanuel Grumbach | fb3ceb8 | 2013-01-14 15:04:01 +0200 | [diff] [blame] | 167 | /* BT Coex */ |
| 168 | BT_COEX_PRIO_TABLE = 0xcc, |
| 169 | BT_COEX_PROT_ENV = 0xcd, |
| 170 | BT_PROFILE_NOTIFICATION = 0xce, |
| 171 | |
Johannes Berg | 8ca151b | 2013-01-24 14:25:36 +0100 | [diff] [blame] | 172 | REPLY_DEBUG_CMD = 0xf0, |
| 173 | DEBUG_LOG_MSG = 0xf7, |
| 174 | |
| 175 | /* D3 commands/notifications */ |
| 176 | D3_CONFIG_CMD = 0xd3, |
| 177 | PROT_OFFLOAD_CONFIG_CMD = 0xd4, |
| 178 | OFFLOADS_QUERY_CMD = 0xd5, |
| 179 | REMOTE_WAKE_CONFIG_CMD = 0xd6, |
| 180 | |
| 181 | /* for WoWLAN in particular */ |
| 182 | WOWLAN_PATTERNS = 0xe0, |
| 183 | WOWLAN_CONFIGURATION = 0xe1, |
| 184 | WOWLAN_TSC_RSC_PARAM = 0xe2, |
| 185 | WOWLAN_TKIP_PARAM = 0xe3, |
| 186 | WOWLAN_KEK_KCK_MATERIAL = 0xe4, |
| 187 | WOWLAN_GET_STATUSES = 0xe5, |
| 188 | WOWLAN_TX_POWER_PER_DB = 0xe6, |
| 189 | |
| 190 | /* and for NetDetect */ |
| 191 | NET_DETECT_CONFIG_CMD = 0x54, |
| 192 | NET_DETECT_PROFILES_QUERY_CMD = 0x56, |
| 193 | NET_DETECT_PROFILES_CMD = 0x57, |
| 194 | NET_DETECT_HOTSPOTS_CMD = 0x58, |
| 195 | NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59, |
| 196 | |
| 197 | REPLY_MAX = 0xff, |
| 198 | }; |
| 199 | |
| 200 | /** |
| 201 | * struct iwl_cmd_response - generic response struct for most commands |
| 202 | * @status: status of the command asked, changes for each one |
| 203 | */ |
| 204 | struct iwl_cmd_response { |
| 205 | __le32 status; |
| 206 | }; |
| 207 | |
| 208 | /* |
| 209 | * struct iwl_tx_ant_cfg_cmd |
| 210 | * @valid: valid antenna configuration |
| 211 | */ |
| 212 | struct iwl_tx_ant_cfg_cmd { |
| 213 | __le32 valid; |
| 214 | } __packed; |
| 215 | |
| 216 | /* |
| 217 | * Calibration control struct. |
| 218 | * Sent as part of the phy configuration command. |
| 219 | * @flow_trigger: bitmap for which calibrations to perform according to |
| 220 | * flow triggers. |
| 221 | * @event_trigger: bitmap for which calibrations to perform according to |
| 222 | * event triggers. |
| 223 | */ |
| 224 | struct iwl_calib_ctrl { |
| 225 | __le32 flow_trigger; |
| 226 | __le32 event_trigger; |
| 227 | } __packed; |
| 228 | |
| 229 | /* This enum defines the bitmap of various calibrations to enable in both |
| 230 | * init ucode and runtime ucode through CALIBRATION_CFG_CMD. |
| 231 | */ |
| 232 | enum iwl_calib_cfg { |
| 233 | IWL_CALIB_CFG_XTAL_IDX = BIT(0), |
| 234 | IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1), |
| 235 | IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2), |
| 236 | IWL_CALIB_CFG_PAPD_IDX = BIT(3), |
| 237 | IWL_CALIB_CFG_TX_PWR_IDX = BIT(4), |
| 238 | IWL_CALIB_CFG_DC_IDX = BIT(5), |
| 239 | IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6), |
| 240 | IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7), |
| 241 | IWL_CALIB_CFG_TX_IQ_IDX = BIT(8), |
| 242 | IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9), |
| 243 | IWL_CALIB_CFG_RX_IQ_IDX = BIT(10), |
| 244 | IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11), |
| 245 | IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12), |
| 246 | IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13), |
| 247 | IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14), |
| 248 | IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15), |
| 249 | IWL_CALIB_CFG_DAC_IDX = BIT(16), |
| 250 | IWL_CALIB_CFG_ABS_IDX = BIT(17), |
| 251 | IWL_CALIB_CFG_AGC_IDX = BIT(18), |
| 252 | }; |
| 253 | |
| 254 | /* |
| 255 | * Phy configuration command. |
| 256 | */ |
| 257 | struct iwl_phy_cfg_cmd { |
| 258 | __le32 phy_cfg; |
| 259 | struct iwl_calib_ctrl calib_control; |
| 260 | } __packed; |
| 261 | |
| 262 | #define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1)) |
| 263 | #define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3)) |
| 264 | #define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5)) |
| 265 | #define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7)) |
| 266 | #define PHY_CFG_TX_CHAIN_A BIT(8) |
| 267 | #define PHY_CFG_TX_CHAIN_B BIT(9) |
| 268 | #define PHY_CFG_TX_CHAIN_C BIT(10) |
| 269 | #define PHY_CFG_RX_CHAIN_A BIT(12) |
| 270 | #define PHY_CFG_RX_CHAIN_B BIT(13) |
| 271 | #define PHY_CFG_RX_CHAIN_C BIT(14) |
| 272 | |
| 273 | |
| 274 | /* Target of the NVM_ACCESS_CMD */ |
| 275 | enum { |
| 276 | NVM_ACCESS_TARGET_CACHE = 0, |
| 277 | NVM_ACCESS_TARGET_OTP = 1, |
| 278 | NVM_ACCESS_TARGET_EEPROM = 2, |
| 279 | }; |
| 280 | |
| 281 | /** |
| 282 | * struct iwl_nvm_access_cmd_ver1 - Request the device to send the NVM. |
| 283 | * @op_code: 0 - read, 1 - write. |
| 284 | * @target: NVM_ACCESS_TARGET_*. should be 0 for read. |
| 285 | * @cache_refresh: 0 - None, 1- NVM. |
| 286 | * @offset: offset in the nvm data. |
| 287 | * @length: of the chunk. |
| 288 | * @data: empty on read, the NVM chunk on write |
| 289 | */ |
| 290 | struct iwl_nvm_access_cmd_ver1 { |
| 291 | u8 op_code; |
| 292 | u8 target; |
| 293 | u8 cache_refresh; |
| 294 | u8 reserved; |
| 295 | __le16 offset; |
| 296 | __le16 length; |
| 297 | u8 data[]; |
| 298 | } __packed; /* NVM_ACCESS_CMD_API_S_VER_1 */ |
| 299 | |
| 300 | /** |
| 301 | * struct iwl_nvm_access_resp_ver1 - response to NVM_ACCESS_CMD |
| 302 | * @offset: the offset in the nvm data |
| 303 | * @length: of the chunk |
| 304 | * @data: the nvm chunk on when NVM_ACCESS_CMD was read, nothing on write |
| 305 | */ |
| 306 | struct iwl_nvm_access_resp_ver1 { |
| 307 | __le16 offset; |
| 308 | __le16 length; |
| 309 | u8 data[]; |
| 310 | } __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_1 */ |
| 311 | |
| 312 | /* Section types for NVM_ACCESS_CMD version 2 */ |
| 313 | enum { |
| 314 | NVM_SECTION_TYPE_HW = 0, |
| 315 | NVM_SECTION_TYPE_SW, |
| 316 | NVM_SECTION_TYPE_PAPD, |
| 317 | NVM_SECTION_TYPE_BT, |
| 318 | NVM_SECTION_TYPE_CALIBRATION, |
| 319 | NVM_SECTION_TYPE_PRODUCTION, |
| 320 | NVM_SECTION_TYPE_POST_FCS_CALIB, |
| 321 | NVM_NUM_OF_SECTIONS, |
| 322 | }; |
| 323 | |
| 324 | /** |
| 325 | * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section |
| 326 | * @op_code: 0 - read, 1 - write |
| 327 | * @target: NVM_ACCESS_TARGET_* |
| 328 | * @type: NVM_SECTION_TYPE_* |
| 329 | * @offset: offset in bytes into the section |
| 330 | * @length: in bytes, to read/write |
| 331 | * @data: if write operation, the data to write. On read its empty |
| 332 | */ |
| 333 | struct iwl_nvm_access_cmd_ver2 { |
| 334 | u8 op_code; |
| 335 | u8 target; |
| 336 | __le16 type; |
| 337 | __le16 offset; |
| 338 | __le16 length; |
| 339 | u8 data[]; |
| 340 | } __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */ |
| 341 | |
| 342 | /** |
| 343 | * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD |
| 344 | * @offset: offset in bytes into the section |
| 345 | * @length: in bytes, either how much was written or read |
| 346 | * @type: NVM_SECTION_TYPE_* |
| 347 | * @status: 0 for success, fail otherwise |
| 348 | * @data: if read operation, the data returned. Empty on write. |
| 349 | */ |
| 350 | struct iwl_nvm_access_resp_ver2 { |
| 351 | __le16 offset; |
| 352 | __le16 length; |
| 353 | __le16 type; |
| 354 | __le16 status; |
| 355 | u8 data[]; |
| 356 | } __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */ |
| 357 | |
| 358 | /* MVM_ALIVE 0x1 */ |
| 359 | |
| 360 | /* alive response is_valid values */ |
| 361 | #define ALIVE_RESP_UCODE_OK BIT(0) |
| 362 | #define ALIVE_RESP_RFKILL BIT(1) |
| 363 | |
| 364 | /* alive response ver_type values */ |
| 365 | enum { |
| 366 | FW_TYPE_HW = 0, |
| 367 | FW_TYPE_PROT = 1, |
| 368 | FW_TYPE_AP = 2, |
| 369 | FW_TYPE_WOWLAN = 3, |
| 370 | FW_TYPE_TIMING = 4, |
| 371 | FW_TYPE_WIPAN = 5 |
| 372 | }; |
| 373 | |
| 374 | /* alive response ver_subtype values */ |
| 375 | enum { |
| 376 | FW_SUBTYPE_FULL_FEATURE = 0, |
| 377 | FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */ |
| 378 | FW_SUBTYPE_REDUCED = 2, |
| 379 | FW_SUBTYPE_ALIVE_ONLY = 3, |
| 380 | FW_SUBTYPE_WOWLAN = 4, |
| 381 | FW_SUBTYPE_AP_SUBTYPE = 5, |
| 382 | FW_SUBTYPE_WIPAN = 6, |
| 383 | FW_SUBTYPE_INITIALIZE = 9 |
| 384 | }; |
| 385 | |
| 386 | #define IWL_ALIVE_STATUS_ERR 0xDEAD |
| 387 | #define IWL_ALIVE_STATUS_OK 0xCAFE |
| 388 | |
| 389 | #define IWL_ALIVE_FLG_RFKILL BIT(0) |
| 390 | |
| 391 | struct mvm_alive_resp { |
| 392 | __le16 status; |
| 393 | __le16 flags; |
| 394 | u8 ucode_minor; |
| 395 | u8 ucode_major; |
| 396 | __le16 id; |
| 397 | u8 api_minor; |
| 398 | u8 api_major; |
| 399 | u8 ver_subtype; |
| 400 | u8 ver_type; |
| 401 | u8 mac; |
| 402 | u8 opt; |
| 403 | __le16 reserved2; |
| 404 | __le32 timestamp; |
| 405 | __le32 error_event_table_ptr; /* SRAM address for error log */ |
| 406 | __le32 log_event_table_ptr; /* SRAM address for event log */ |
| 407 | __le32 cpu_register_ptr; |
| 408 | __le32 dbgm_config_ptr; |
| 409 | __le32 alive_counter_ptr; |
| 410 | __le32 scd_base_ptr; /* SRAM address for SCD */ |
| 411 | } __packed; /* ALIVE_RES_API_S_VER_1 */ |
| 412 | |
| 413 | /* Error response/notification */ |
| 414 | enum { |
| 415 | FW_ERR_UNKNOWN_CMD = 0x0, |
| 416 | FW_ERR_INVALID_CMD_PARAM = 0x1, |
| 417 | FW_ERR_SERVICE = 0x2, |
| 418 | FW_ERR_ARC_MEMORY = 0x3, |
| 419 | FW_ERR_ARC_CODE = 0x4, |
| 420 | FW_ERR_WATCH_DOG = 0x5, |
| 421 | FW_ERR_WEP_GRP_KEY_INDX = 0x10, |
| 422 | FW_ERR_WEP_KEY_SIZE = 0x11, |
| 423 | FW_ERR_OBSOLETE_FUNC = 0x12, |
| 424 | FW_ERR_UNEXPECTED = 0xFE, |
| 425 | FW_ERR_FATAL = 0xFF |
| 426 | }; |
| 427 | |
| 428 | /** |
| 429 | * struct iwl_error_resp - FW error indication |
| 430 | * ( REPLY_ERROR = 0x2 ) |
| 431 | * @error_type: one of FW_ERR_* |
| 432 | * @cmd_id: the command ID for which the error occured |
| 433 | * @bad_cmd_seq_num: sequence number of the erroneous command |
| 434 | * @error_service: which service created the error, applicable only if |
| 435 | * error_type = 2, otherwise 0 |
| 436 | * @timestamp: TSF in usecs. |
| 437 | */ |
| 438 | struct iwl_error_resp { |
| 439 | __le32 error_type; |
| 440 | u8 cmd_id; |
| 441 | u8 reserved1; |
| 442 | __le16 bad_cmd_seq_num; |
| 443 | __le32 error_service; |
| 444 | __le64 timestamp; |
| 445 | } __packed; |
| 446 | |
| 447 | |
| 448 | /* Common PHY, MAC and Bindings definitions */ |
| 449 | |
| 450 | #define MAX_MACS_IN_BINDING (3) |
| 451 | #define MAX_BINDINGS (4) |
| 452 | #define AUX_BINDING_INDEX (3) |
| 453 | #define MAX_PHYS (4) |
| 454 | |
| 455 | /* Used to extract ID and color from the context dword */ |
| 456 | #define FW_CTXT_ID_POS (0) |
| 457 | #define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS) |
| 458 | #define FW_CTXT_COLOR_POS (8) |
| 459 | #define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS) |
| 460 | #define FW_CTXT_INVALID (0xffffffff) |
| 461 | |
| 462 | #define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\ |
| 463 | (_color << FW_CTXT_COLOR_POS)) |
| 464 | |
| 465 | /* Possible actions on PHYs, MACs and Bindings */ |
| 466 | enum { |
| 467 | FW_CTXT_ACTION_STUB = 0, |
| 468 | FW_CTXT_ACTION_ADD, |
| 469 | FW_CTXT_ACTION_MODIFY, |
| 470 | FW_CTXT_ACTION_REMOVE, |
| 471 | FW_CTXT_ACTION_NUM |
| 472 | }; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */ |
| 473 | |
| 474 | /* Time Events */ |
| 475 | |
| 476 | /* Time Event types, according to MAC type */ |
| 477 | enum iwl_time_event_type { |
| 478 | /* BSS Station Events */ |
| 479 | TE_BSS_STA_AGGRESSIVE_ASSOC, |
| 480 | TE_BSS_STA_ASSOC, |
| 481 | TE_BSS_EAP_DHCP_PROT, |
| 482 | TE_BSS_QUIET_PERIOD, |
| 483 | |
| 484 | /* P2P Device Events */ |
| 485 | TE_P2P_DEVICE_DISCOVERABLE, |
| 486 | TE_P2P_DEVICE_LISTEN, |
| 487 | TE_P2P_DEVICE_ACTION_SCAN, |
| 488 | TE_P2P_DEVICE_FULL_SCAN, |
| 489 | |
| 490 | /* P2P Client Events */ |
| 491 | TE_P2P_CLIENT_AGGRESSIVE_ASSOC, |
| 492 | TE_P2P_CLIENT_ASSOC, |
| 493 | TE_P2P_CLIENT_QUIET_PERIOD, |
| 494 | |
| 495 | /* P2P GO Events */ |
| 496 | TE_P2P_GO_ASSOC_PROT, |
| 497 | TE_P2P_GO_REPETITIVE_NOA, |
| 498 | TE_P2P_GO_CT_WINDOW, |
| 499 | |
| 500 | /* WiDi Sync Events */ |
| 501 | TE_WIDI_TX_SYNC, |
| 502 | |
| 503 | TE_MAX |
| 504 | }; /* MAC_EVENT_TYPE_API_E_VER_1 */ |
| 505 | |
| 506 | /* Time Event dependencies: none, on another TE, or in a specific time */ |
| 507 | enum { |
| 508 | TE_INDEPENDENT = 0, |
| 509 | TE_DEP_OTHER = 1, |
| 510 | TE_DEP_TSF = 2, |
| 511 | TE_EVENT_SOCIOPATHIC = 4, |
| 512 | }; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */ |
| 513 | |
| 514 | /* When to send Time Event notifications and to whom (internal = FW) */ |
| 515 | enum { |
| 516 | TE_NOTIF_NONE = 0, |
| 517 | TE_NOTIF_HOST_START = 0x1, |
| 518 | TE_NOTIF_HOST_END = 0x2, |
| 519 | TE_NOTIF_INTERNAL_START = 0x4, |
| 520 | TE_NOTIF_INTERNAL_END = 0x8 |
| 521 | }; /* MAC_EVENT_ACTION_API_E_VER_1 */ |
| 522 | |
| 523 | /* |
| 524 | * @TE_FRAG_NONE: fragmentation of the time event is NOT allowed. |
| 525 | * @TE_FRAG_SINGLE: fragmentation of the time event is allowed, but only |
| 526 | * the first fragment is scheduled. |
| 527 | * @TE_FRAG_DUAL: fragmentation of the time event is allowed, but only |
| 528 | * the first 2 fragments are scheduled. |
| 529 | * @TE_FRAG_ENDLESS: fragmentation of the time event is allowed, and any number |
| 530 | * of fragments are valid. |
| 531 | * |
| 532 | * Other than the constant defined above, specifying a fragmentation value 'x' |
| 533 | * means that the event can be fragmented but only the first 'x' will be |
| 534 | * scheduled. |
| 535 | */ |
| 536 | enum { |
| 537 | TE_FRAG_NONE = 0, |
| 538 | TE_FRAG_SINGLE = 1, |
| 539 | TE_FRAG_DUAL = 2, |
| 540 | TE_FRAG_ENDLESS = 0xffffffff |
| 541 | }; |
| 542 | |
| 543 | /* Repeat the time event endlessly (until removed) */ |
| 544 | #define TE_REPEAT_ENDLESS (0xffffffff) |
| 545 | /* If a Time Event has bounded repetitions, this is the maximal value */ |
| 546 | #define TE_REPEAT_MAX_MSK (0x0fffffff) |
| 547 | /* If a Time Event can be fragmented, this is the max number of fragments */ |
| 548 | #define TE_FRAG_MAX_MSK (0x0fffffff) |
| 549 | |
| 550 | /** |
| 551 | * struct iwl_time_event_cmd - configuring Time Events |
| 552 | * ( TIME_EVENT_CMD = 0x29 ) |
| 553 | * @id_and_color: ID and color of the relevant MAC |
| 554 | * @action: action to perform, one of FW_CTXT_ACTION_* |
| 555 | * @id: this field has two meanings, depending on the action: |
| 556 | * If the action is ADD, then it means the type of event to add. |
| 557 | * For all other actions it is the unique event ID assigned when the |
| 558 | * event was added by the FW. |
| 559 | * @apply_time: When to start the Time Event (in GP2) |
| 560 | * @max_delay: maximum delay to event's start (apply time), in TU |
| 561 | * @depends_on: the unique ID of the event we depend on (if any) |
| 562 | * @interval: interval between repetitions, in TU |
| 563 | * @interval_reciprocal: 2^32 / interval |
| 564 | * @duration: duration of event in TU |
| 565 | * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS |
| 566 | * @dep_policy: one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF |
| 567 | * @is_present: 0 or 1, are we present or absent during the Time Event |
| 568 | * @max_frags: maximal number of fragments the Time Event can be divided to |
| 569 | * @notify: notifications using TE_NOTIF_* (whom to notify when) |
| 570 | */ |
| 571 | struct iwl_time_event_cmd { |
| 572 | /* COMMON_INDEX_HDR_API_S_VER_1 */ |
| 573 | __le32 id_and_color; |
| 574 | __le32 action; |
| 575 | __le32 id; |
| 576 | /* MAC_TIME_EVENT_DATA_API_S_VER_1 */ |
| 577 | __le32 apply_time; |
| 578 | __le32 max_delay; |
| 579 | __le32 dep_policy; |
| 580 | __le32 depends_on; |
| 581 | __le32 is_present; |
| 582 | __le32 max_frags; |
| 583 | __le32 interval; |
| 584 | __le32 interval_reciprocal; |
| 585 | __le32 duration; |
| 586 | __le32 repeat; |
| 587 | __le32 notify; |
| 588 | } __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_1 */ |
| 589 | |
| 590 | /** |
| 591 | * struct iwl_time_event_resp - response structure to iwl_time_event_cmd |
| 592 | * @status: bit 0 indicates success, all others specify errors |
| 593 | * @id: the Time Event type |
| 594 | * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE |
| 595 | * @id_and_color: ID and color of the relevant MAC |
| 596 | */ |
| 597 | struct iwl_time_event_resp { |
| 598 | __le32 status; |
| 599 | __le32 id; |
| 600 | __le32 unique_id; |
| 601 | __le32 id_and_color; |
| 602 | } __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */ |
| 603 | |
| 604 | /** |
| 605 | * struct iwl_time_event_notif - notifications of time event start/stop |
| 606 | * ( TIME_EVENT_NOTIFICATION = 0x2a ) |
| 607 | * @timestamp: action timestamp in GP2 |
| 608 | * @session_id: session's unique id |
| 609 | * @unique_id: unique id of the Time Event itself |
| 610 | * @id_and_color: ID and color of the relevant MAC |
| 611 | * @action: one of TE_NOTIF_START or TE_NOTIF_END |
| 612 | * @status: true if scheduled, false otherwise (not executed) |
| 613 | */ |
| 614 | struct iwl_time_event_notif { |
| 615 | __le32 timestamp; |
| 616 | __le32 session_id; |
| 617 | __le32 unique_id; |
| 618 | __le32 id_and_color; |
| 619 | __le32 action; |
| 620 | __le32 status; |
| 621 | } __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */ |
| 622 | |
| 623 | |
| 624 | /* Bindings and Time Quota */ |
| 625 | |
| 626 | /** |
| 627 | * struct iwl_binding_cmd - configuring bindings |
| 628 | * ( BINDING_CONTEXT_CMD = 0x2b ) |
| 629 | * @id_and_color: ID and color of the relevant Binding |
| 630 | * @action: action to perform, one of FW_CTXT_ACTION_* |
| 631 | * @macs: array of MAC id and colors which belong to the binding |
| 632 | * @phy: PHY id and color which belongs to the binding |
| 633 | */ |
| 634 | struct iwl_binding_cmd { |
| 635 | /* COMMON_INDEX_HDR_API_S_VER_1 */ |
| 636 | __le32 id_and_color; |
| 637 | __le32 action; |
| 638 | /* BINDING_DATA_API_S_VER_1 */ |
| 639 | __le32 macs[MAX_MACS_IN_BINDING]; |
| 640 | __le32 phy; |
| 641 | } __packed; /* BINDING_CMD_API_S_VER_1 */ |
| 642 | |
Ilan Peer | 35adfd6 | 2013-02-04 13:16:24 +0200 | [diff] [blame] | 643 | /* The maximal number of fragments in the FW's schedule session */ |
| 644 | #define IWL_MVM_MAX_QUOTA 128 |
| 645 | |
Johannes Berg | 8ca151b | 2013-01-24 14:25:36 +0100 | [diff] [blame] | 646 | /** |
| 647 | * struct iwl_time_quota_data - configuration of time quota per binding |
| 648 | * @id_and_color: ID and color of the relevant Binding |
| 649 | * @quota: absolute time quota in TU. The scheduler will try to divide the |
| 650 | * remainig quota (after Time Events) according to this quota. |
| 651 | * @max_duration: max uninterrupted context duration in TU |
| 652 | */ |
| 653 | struct iwl_time_quota_data { |
| 654 | __le32 id_and_color; |
| 655 | __le32 quota; |
| 656 | __le32 max_duration; |
| 657 | } __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */ |
| 658 | |
| 659 | /** |
| 660 | * struct iwl_time_quota_cmd - configuration of time quota between bindings |
| 661 | * ( TIME_QUOTA_CMD = 0x2c ) |
| 662 | * @quotas: allocations per binding |
| 663 | */ |
| 664 | struct iwl_time_quota_cmd { |
| 665 | struct iwl_time_quota_data quotas[MAX_BINDINGS]; |
| 666 | } __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */ |
| 667 | |
| 668 | |
| 669 | /* PHY context */ |
| 670 | |
| 671 | /* Supported bands */ |
| 672 | #define PHY_BAND_5 (0) |
| 673 | #define PHY_BAND_24 (1) |
| 674 | |
| 675 | /* Supported channel width, vary if there is VHT support */ |
| 676 | #define PHY_VHT_CHANNEL_MODE20 (0x0) |
| 677 | #define PHY_VHT_CHANNEL_MODE40 (0x1) |
| 678 | #define PHY_VHT_CHANNEL_MODE80 (0x2) |
| 679 | #define PHY_VHT_CHANNEL_MODE160 (0x3) |
| 680 | |
| 681 | /* |
| 682 | * Control channel position: |
| 683 | * For legacy set bit means upper channel, otherwise lower. |
| 684 | * For VHT - bit-2 marks if the control is lower/upper relative to center-freq |
| 685 | * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0. |
| 686 | * center_freq |
| 687 | * | |
| 688 | * 40Mhz |_______|_______| |
| 689 | * 80Mhz |_______|_______|_______|_______| |
| 690 | * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______| |
| 691 | * code 011 010 001 000 | 100 101 110 111 |
| 692 | */ |
| 693 | #define PHY_VHT_CTRL_POS_1_BELOW (0x0) |
| 694 | #define PHY_VHT_CTRL_POS_2_BELOW (0x1) |
| 695 | #define PHY_VHT_CTRL_POS_3_BELOW (0x2) |
| 696 | #define PHY_VHT_CTRL_POS_4_BELOW (0x3) |
| 697 | #define PHY_VHT_CTRL_POS_1_ABOVE (0x4) |
| 698 | #define PHY_VHT_CTRL_POS_2_ABOVE (0x5) |
| 699 | #define PHY_VHT_CTRL_POS_3_ABOVE (0x6) |
| 700 | #define PHY_VHT_CTRL_POS_4_ABOVE (0x7) |
| 701 | |
| 702 | /* |
| 703 | * @band: PHY_BAND_* |
| 704 | * @channel: channel number |
| 705 | * @width: PHY_[VHT|LEGACY]_CHANNEL_* |
| 706 | * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_* |
| 707 | */ |
| 708 | struct iwl_fw_channel_info { |
| 709 | u8 band; |
| 710 | u8 channel; |
| 711 | u8 width; |
| 712 | u8 ctrl_pos; |
| 713 | } __packed; |
| 714 | |
| 715 | #define PHY_RX_CHAIN_DRIVER_FORCE_POS (0) |
| 716 | #define PHY_RX_CHAIN_DRIVER_FORCE_MSK \ |
| 717 | (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS) |
| 718 | #define PHY_RX_CHAIN_VALID_POS (1) |
| 719 | #define PHY_RX_CHAIN_VALID_MSK \ |
| 720 | (0x7 << PHY_RX_CHAIN_VALID_POS) |
| 721 | #define PHY_RX_CHAIN_FORCE_SEL_POS (4) |
| 722 | #define PHY_RX_CHAIN_FORCE_SEL_MSK \ |
| 723 | (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS) |
| 724 | #define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7) |
| 725 | #define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \ |
| 726 | (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS) |
| 727 | #define PHY_RX_CHAIN_CNT_POS (10) |
| 728 | #define PHY_RX_CHAIN_CNT_MSK \ |
| 729 | (0x3 << PHY_RX_CHAIN_CNT_POS) |
| 730 | #define PHY_RX_CHAIN_MIMO_CNT_POS (12) |
| 731 | #define PHY_RX_CHAIN_MIMO_CNT_MSK \ |
| 732 | (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS) |
| 733 | #define PHY_RX_CHAIN_MIMO_FORCE_POS (14) |
| 734 | #define PHY_RX_CHAIN_MIMO_FORCE_MSK \ |
| 735 | (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS) |
| 736 | |
| 737 | /* TODO: fix the value, make it depend on firmware at runtime? */ |
| 738 | #define NUM_PHY_CTX 3 |
| 739 | |
| 740 | /* TODO: complete missing documentation */ |
| 741 | /** |
| 742 | * struct iwl_phy_context_cmd - config of the PHY context |
| 743 | * ( PHY_CONTEXT_CMD = 0x8 ) |
| 744 | * @id_and_color: ID and color of the relevant Binding |
| 745 | * @action: action to perform, one of FW_CTXT_ACTION_* |
| 746 | * @apply_time: 0 means immediate apply and context switch. |
| 747 | * other value means apply new params after X usecs |
| 748 | * @tx_param_color: ??? |
| 749 | * @channel_info: |
| 750 | * @txchain_info: ??? |
| 751 | * @rxchain_info: ??? |
| 752 | * @acquisition_data: ??? |
| 753 | * @dsp_cfg_flags: set to 0 |
| 754 | */ |
| 755 | struct iwl_phy_context_cmd { |
| 756 | /* COMMON_INDEX_HDR_API_S_VER_1 */ |
| 757 | __le32 id_and_color; |
| 758 | __le32 action; |
| 759 | /* PHY_CONTEXT_DATA_API_S_VER_1 */ |
| 760 | __le32 apply_time; |
| 761 | __le32 tx_param_color; |
| 762 | struct iwl_fw_channel_info ci; |
| 763 | __le32 txchain_info; |
| 764 | __le32 rxchain_info; |
| 765 | __le32 acquisition_data; |
| 766 | __le32 dsp_cfg_flags; |
| 767 | } __packed; /* PHY_CONTEXT_CMD_API_VER_1 */ |
| 768 | |
| 769 | #define IWL_RX_INFO_PHY_CNT 8 |
| 770 | #define IWL_RX_INFO_AGC_IDX 1 |
| 771 | #define IWL_RX_INFO_RSSI_AB_IDX 2 |
Emmanuel Grumbach | 8101a7f | 2013-02-28 11:54:28 +0200 | [diff] [blame] | 772 | #define IWL_OFDM_AGC_A_MSK 0x0000007f |
| 773 | #define IWL_OFDM_AGC_A_POS 0 |
| 774 | #define IWL_OFDM_AGC_B_MSK 0x00003f80 |
| 775 | #define IWL_OFDM_AGC_B_POS 7 |
| 776 | #define IWL_OFDM_AGC_CODE_MSK 0x3fe00000 |
| 777 | #define IWL_OFDM_AGC_CODE_POS 20 |
Johannes Berg | 8ca151b | 2013-01-24 14:25:36 +0100 | [diff] [blame] | 778 | #define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff |
Johannes Berg | 8ca151b | 2013-01-24 14:25:36 +0100 | [diff] [blame] | 779 | #define IWL_OFDM_RSSI_A_POS 0 |
Emmanuel Grumbach | 8101a7f | 2013-02-28 11:54:28 +0200 | [diff] [blame] | 780 | #define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00 |
| 781 | #define IWL_OFDM_RSSI_ALLBAND_A_POS 8 |
Johannes Berg | 8ca151b | 2013-01-24 14:25:36 +0100 | [diff] [blame] | 782 | #define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000 |
Johannes Berg | 8ca151b | 2013-01-24 14:25:36 +0100 | [diff] [blame] | 783 | #define IWL_OFDM_RSSI_B_POS 16 |
Emmanuel Grumbach | 8101a7f | 2013-02-28 11:54:28 +0200 | [diff] [blame] | 784 | #define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000 |
| 785 | #define IWL_OFDM_RSSI_ALLBAND_B_POS 24 |
Johannes Berg | 8ca151b | 2013-01-24 14:25:36 +0100 | [diff] [blame] | 786 | |
| 787 | /** |
| 788 | * struct iwl_rx_phy_info - phy info |
| 789 | * (REPLY_RX_PHY_CMD = 0xc0) |
| 790 | * @non_cfg_phy_cnt: non configurable DSP phy data byte count |
| 791 | * @cfg_phy_cnt: configurable DSP phy data byte count |
| 792 | * @stat_id: configurable DSP phy data set ID |
| 793 | * @reserved1: |
| 794 | * @system_timestamp: GP2 at on air rise |
| 795 | * @timestamp: TSF at on air rise |
| 796 | * @beacon_time_stamp: beacon at on-air rise |
| 797 | * @phy_flags: general phy flags: band, modulation, ... |
| 798 | * @channel: channel number |
| 799 | * @non_cfg_phy_buf: for various implementations of non_cfg_phy |
| 800 | * @rate_n_flags: RATE_MCS_* |
| 801 | * @byte_count: frame's byte-count |
| 802 | * @frame_time: frame's time on the air, based on byte count and frame rate |
| 803 | * calculation |
| 804 | * |
| 805 | * Before each Rx, the device sends this data. It contains PHY information |
| 806 | * about the reception of the packet. |
| 807 | */ |
| 808 | struct iwl_rx_phy_info { |
| 809 | u8 non_cfg_phy_cnt; |
| 810 | u8 cfg_phy_cnt; |
| 811 | u8 stat_id; |
| 812 | u8 reserved1; |
| 813 | __le32 system_timestamp; |
| 814 | __le64 timestamp; |
| 815 | __le32 beacon_time_stamp; |
| 816 | __le16 phy_flags; |
| 817 | __le16 channel; |
| 818 | __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT]; |
| 819 | __le32 rate_n_flags; |
| 820 | __le32 byte_count; |
| 821 | __le16 reserved2; |
| 822 | __le16 frame_time; |
| 823 | } __packed; |
| 824 | |
| 825 | struct iwl_rx_mpdu_res_start { |
| 826 | __le16 byte_count; |
| 827 | __le16 reserved; |
| 828 | } __packed; |
| 829 | |
| 830 | /** |
| 831 | * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags |
| 832 | * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band |
| 833 | * @RX_RES_PHY_FLAGS_MOD_CCK: |
| 834 | * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short |
| 835 | * @RX_RES_PHY_FLAGS_NARROW_BAND: |
| 836 | * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received |
| 837 | * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU |
| 838 | * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame |
| 839 | * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble |
| 840 | * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame |
| 841 | */ |
| 842 | enum iwl_rx_phy_flags { |
| 843 | RX_RES_PHY_FLAGS_BAND_24 = BIT(0), |
| 844 | RX_RES_PHY_FLAGS_MOD_CCK = BIT(1), |
| 845 | RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2), |
| 846 | RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3), |
| 847 | RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4), |
| 848 | RX_RES_PHY_FLAGS_ANTENNA_POS = 4, |
| 849 | RX_RES_PHY_FLAGS_AGG = BIT(7), |
| 850 | RX_RES_PHY_FLAGS_OFDM_HT = BIT(8), |
| 851 | RX_RES_PHY_FLAGS_OFDM_GF = BIT(9), |
| 852 | RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10), |
| 853 | }; |
| 854 | |
| 855 | /** |
| 856 | * enum iwl_mvm_rx_status - written by fw for each Rx packet |
| 857 | * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine |
| 858 | * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow |
| 859 | * @RX_MPDU_RES_STATUS_SRC_STA_FOUND: |
| 860 | * @RX_MPDU_RES_STATUS_KEY_VALID: |
| 861 | * @RX_MPDU_RES_STATUS_KEY_PARAM_OK: |
| 862 | * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed |
| 863 | * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked |
| 864 | * in the driver. |
| 865 | * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine |
| 866 | * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or |
| 867 | * alg = CCM only. Checks replay attack for 11w frames. Relevant only if |
| 868 | * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set. |
| 869 | * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted |
| 870 | * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP |
| 871 | * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM |
| 872 | * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP |
| 873 | * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC |
| 874 | * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted |
| 875 | * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm |
| 876 | * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted |
| 877 | * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP: |
| 878 | * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP: |
| 879 | * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT: |
| 880 | * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame |
| 881 | * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK: |
| 882 | * @RX_MPDU_RES_STATUS_STA_ID_MSK: |
| 883 | * @RX_MPDU_RES_STATUS_RRF_KILL: |
| 884 | * @RX_MPDU_RES_STATUS_FILTERING_MSK: |
| 885 | * @RX_MPDU_RES_STATUS2_FILTERING_MSK: |
| 886 | */ |
| 887 | enum iwl_mvm_rx_status { |
| 888 | RX_MPDU_RES_STATUS_CRC_OK = BIT(0), |
| 889 | RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1), |
| 890 | RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2), |
| 891 | RX_MPDU_RES_STATUS_KEY_VALID = BIT(3), |
| 892 | RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4), |
| 893 | RX_MPDU_RES_STATUS_ICV_OK = BIT(5), |
| 894 | RX_MPDU_RES_STATUS_MIC_OK = BIT(6), |
| 895 | RX_MPDU_RES_STATUS_TTAK_OK = BIT(7), |
| 896 | RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7), |
| 897 | RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8), |
| 898 | RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8), |
| 899 | RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8), |
| 900 | RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8), |
| 901 | RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8), |
| 902 | RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8), |
| 903 | RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8), |
| 904 | RX_MPDU_RES_STATUS_DEC_DONE = BIT(11), |
| 905 | RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12), |
| 906 | RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13), |
| 907 | RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14), |
| 908 | RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15), |
| 909 | RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000), |
| 910 | RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000), |
| 911 | RX_MPDU_RES_STATUS_RRF_KILL = BIT(29), |
| 912 | RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000), |
| 913 | RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000), |
| 914 | }; |
| 915 | |
| 916 | /** |
| 917 | * struct iwl_radio_version_notif - information on the radio version |
| 918 | * ( RADIO_VERSION_NOTIFICATION = 0x68 ) |
| 919 | * @radio_flavor: |
| 920 | * @radio_step: |
| 921 | * @radio_dash: |
| 922 | */ |
| 923 | struct iwl_radio_version_notif { |
| 924 | __le32 radio_flavor; |
| 925 | __le32 radio_step; |
| 926 | __le32 radio_dash; |
| 927 | } __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */ |
| 928 | |
| 929 | enum iwl_card_state_flags { |
| 930 | CARD_ENABLED = 0x00, |
| 931 | HW_CARD_DISABLED = 0x01, |
| 932 | SW_CARD_DISABLED = 0x02, |
| 933 | CT_KILL_CARD_DISABLED = 0x04, |
| 934 | HALT_CARD_DISABLED = 0x08, |
| 935 | CARD_DISABLED_MSK = 0x0f, |
| 936 | CARD_IS_RX_ON = 0x10, |
| 937 | }; |
| 938 | |
| 939 | /** |
| 940 | * struct iwl_radio_version_notif - information on the radio version |
| 941 | * ( CARD_STATE_NOTIFICATION = 0xa1 ) |
| 942 | * @flags: %iwl_card_state_flags |
| 943 | */ |
| 944 | struct iwl_card_state_notif { |
| 945 | __le32 flags; |
| 946 | } __packed; /* CARD_STATE_NTFY_API_S_VER_1 */ |
| 947 | |
| 948 | /** |
| 949 | * struct iwl_set_calib_default_cmd - set default value for calibration. |
| 950 | * ( SET_CALIB_DEFAULT_CMD = 0x8e ) |
| 951 | * @calib_index: the calibration to set value for |
| 952 | * @length: of data |
| 953 | * @data: the value to set for the calibration result |
| 954 | */ |
| 955 | struct iwl_set_calib_default_cmd { |
| 956 | __le16 calib_index; |
| 957 | __le16 length; |
| 958 | u8 data[0]; |
| 959 | } __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */ |
| 960 | |
| 961 | #endif /* __fw_api_h__ */ |