blob: 12008af797bd78049e15a6c14a295f851d7e88e3 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
Duncan Laurie8ca40132011-10-25 15:42:21 -070027#include <linux/dmi.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080028#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
David Howells760285e2012-10-02 18:01:07 +010030#include <drm/drmP.h>
Matt Roperc6f95f22015-01-22 16:50:32 -080031#include <drm/drm_atomic_helper.h>
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drm_crtc.h>
33#include <drm/drm_crtc_helper.h>
34#include <drm/drm_edid.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080035#include "intel_drv.h"
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/i915_drm.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drv.h"
38
Keith Packarde7dbb2f2010-11-16 16:03:53 +080039/* Here's the desired hotplug mode */
40#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
41 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
42 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
43 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
44 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
45 ADPA_CRT_HOTPLUG_ENABLE)
46
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +000047struct intel_crt {
48 struct intel_encoder base;
Adam Jackson637f44d2013-03-25 15:40:05 -040049 /* DPMS state is stored in the connector, which we need in the
50 * encoder's enable/disable callbacks */
51 struct intel_connector *connector;
Keith Packarde7dbb2f2010-11-16 16:03:53 +080052 bool force_hotplug_required;
Ville Syrjäläf0f59a02015-11-18 15:33:26 +020053 i915_reg_t adpa_reg;
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +000054};
55
Daniel Vetter540a8952012-07-11 16:27:57 +020056static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -080057{
Daniel Vetter540a8952012-07-11 16:27:57 +020058 return container_of(encoder, struct intel_crt, base);
Jesse Barnesdf0323c2012-04-17 15:06:33 -070059}
60
Daniel Vettereebe6f02013-07-21 21:37:03 +020061static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
62{
63 return intel_encoder_to_crt(intel_attached_encoder(connector));
64}
65
Daniel Vettere403fc92012-07-02 13:41:21 +020066static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
67 enum pipe *pipe)
Jesse Barnesdf0323c2012-04-17 15:06:33 -070068{
Daniel Vettere403fc92012-07-02 13:41:21 +020069 struct drm_device *dev = encoder->base.dev;
Jesse Barnesdf0323c2012-04-17 15:06:33 -070070 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vettere403fc92012-07-02 13:41:21 +020071 struct intel_crt *crt = intel_encoder_to_crt(encoder);
Imre Deak6d129be2014-03-05 16:20:54 +020072 enum intel_display_power_domain power_domain;
Daniel Vettere403fc92012-07-02 13:41:21 +020073 u32 tmp;
Zhenyu Wang2c072452009-06-05 15:38:42 +080074
Imre Deak6d129be2014-03-05 16:20:54 +020075 power_domain = intel_display_port_power_domain(encoder);
Daniel Vetterf458ebb2014-09-30 10:56:39 +020076 if (!intel_display_power_is_enabled(dev_priv, power_domain))
Imre Deak6d129be2014-03-05 16:20:54 +020077 return false;
78
Daniel Vettere403fc92012-07-02 13:41:21 +020079 tmp = I915_READ(crt->adpa_reg);
Zhenyu Wang2c072452009-06-05 15:38:42 +080080
Daniel Vettere403fc92012-07-02 13:41:21 +020081 if (!(tmp & ADPA_DAC_ENABLE))
82 return false;
Jesse Barnesdf0323c2012-04-17 15:06:33 -070083
Daniel Vettere403fc92012-07-02 13:41:21 +020084 if (HAS_PCH_CPT(dev))
85 *pipe = PORT_TO_PIPE_CPT(tmp);
86 else
87 *pipe = PORT_TO_PIPE(tmp);
88
89 return true;
Jesse Barnesdf0323c2012-04-17 15:06:33 -070090}
91
Ville Syrjälä6801c182013-09-24 14:24:05 +030092static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
Jesse Barnes045ac3b2013-05-14 17:08:26 -070093{
94 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
95 struct intel_crt *crt = intel_encoder_to_crt(encoder);
96 u32 tmp, flags = 0;
97
98 tmp = I915_READ(crt->adpa_reg);
99
100 if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
101 flags |= DRM_MODE_FLAG_PHSYNC;
102 else
103 flags |= DRM_MODE_FLAG_NHSYNC;
104
105 if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
106 flags |= DRM_MODE_FLAG_PVSYNC;
107 else
108 flags |= DRM_MODE_FLAG_NVSYNC;
109
Ville Syrjälä6801c182013-09-24 14:24:05 +0300110 return flags;
111}
112
113static void intel_crt_get_config(struct intel_encoder *encoder,
Ander Conselvan de Oliveira5cec2582015-01-15 14:55:21 +0200114 struct intel_crtc_state *pipe_config)
Ville Syrjälä6801c182013-09-24 14:24:05 +0300115{
116 struct drm_device *dev = encoder->base.dev;
117 int dotclock;
118
Ander Conselvan de Oliveira2d112de2015-01-15 14:55:22 +0200119 pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
Ville Syrjälä18442d02013-09-13 16:00:08 +0300120
121 dotclock = pipe_config->port_clock;
122
Ville Syrjälä6801c182013-09-24 14:24:05 +0300123 if (HAS_PCH_SPLIT(dev))
Ville Syrjälä18442d02013-09-13 16:00:08 +0300124 ironlake_check_encoder_dotclock(pipe_config, dotclock);
125
Ander Conselvan de Oliveira2d112de2015-01-15 14:55:22 +0200126 pipe_config->base.adjusted_mode.crtc_clock = dotclock;
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700127}
128
Ville Syrjälä6801c182013-09-24 14:24:05 +0300129static void hsw_crt_get_config(struct intel_encoder *encoder,
Ander Conselvan de Oliveira5cec2582015-01-15 14:55:21 +0200130 struct intel_crtc_state *pipe_config)
Ville Syrjälä6801c182013-09-24 14:24:05 +0300131{
132 intel_ddi_get_config(encoder, pipe_config);
133
Ander Conselvan de Oliveira2d112de2015-01-15 14:55:22 +0200134 pipe_config->base.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
Ville Syrjälä6801c182013-09-24 14:24:05 +0300135 DRM_MODE_FLAG_NHSYNC |
136 DRM_MODE_FLAG_PVSYNC |
137 DRM_MODE_FLAG_NVSYNC);
Ander Conselvan de Oliveira2d112de2015-01-15 14:55:22 +0200138 pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
Ville Syrjälä6801c182013-09-24 14:24:05 +0300139}
140
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200141/* Note: The caller is required to filter out dpms modes not supported by the
142 * platform. */
143static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800144{
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200145 struct drm_device *dev = encoder->base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800146 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200147 struct intel_crt *crt = intel_encoder_to_crt(encoder);
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200148 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
Ville Syrjälä7c5f93b2015-09-08 13:40:49 +0300149 const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200150 u32 adpa;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800151
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200152 if (INTEL_INFO(dev)->gen >= 5)
153 adpa = ADPA_HOTPLUG_BITS;
154 else
155 adpa = 0;
156
157 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
158 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
159 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
160 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
161
162 /* For CPT allow 3 pipe config, for others just use A or B */
163 if (HAS_PCH_LPT(dev))
164 ; /* Those bits don't exist here */
165 else if (HAS_PCH_CPT(dev))
166 adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
167 else if (crtc->pipe == 0)
168 adpa |= ADPA_PIPE_A_SELECT;
169 else
170 adpa |= ADPA_PIPE_B_SELECT;
171
172 if (!HAS_PCH_SPLIT(dev))
173 I915_WRITE(BCLRPAT(crtc->pipe), 0);
Jesse Barnesbd9e8412012-06-15 11:55:18 -0700174
Akshay Joshi0206e352011-08-16 15:34:10 -0400175 switch (mode) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800176 case DRM_MODE_DPMS_ON:
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200177 adpa |= ADPA_DAC_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800178 break;
179 case DRM_MODE_DPMS_STANDBY:
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200180 adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800181 break;
182 case DRM_MODE_DPMS_SUSPEND:
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200183 adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800184 break;
185 case DRM_MODE_DPMS_OFF:
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200186 adpa |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800187 break;
188 }
189
Daniel Vetter894ed1e2014-04-24 23:54:44 +0200190 I915_WRITE(crt->adpa_reg, adpa);
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200191}
192
Adam Jackson637f44d2013-03-25 15:40:05 -0400193static void intel_disable_crt(struct intel_encoder *encoder)
194{
195 intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
196}
197
Ville Syrjälä1ea56e22015-05-05 17:17:37 +0300198static void pch_disable_crt(struct intel_encoder *encoder)
199{
200}
201
202static void pch_post_disable_crt(struct intel_encoder *encoder)
203{
204 intel_disable_crt(encoder);
205}
Daniel Vetterabfdc1e2014-06-25 22:01:52 +0300206
Adam Jackson637f44d2013-03-25 15:40:05 -0400207static void intel_enable_crt(struct intel_encoder *encoder)
208{
209 struct intel_crt *crt = intel_encoder_to_crt(encoder);
210
211 intel_crt_set_dpms(encoder, crt->connector->base.dpms);
212}
213
Damien Lespiauc19de8e2013-11-28 15:29:18 +0000214static enum drm_mode_status
215intel_crt_mode_valid(struct drm_connector *connector,
216 struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800217{
Zhao Yakui6bcdcd92009-03-03 18:06:42 +0800218 struct drm_device *dev = connector->dev;
219
220 int max_clock = 0;
Jesse Barnes79e53942008-11-07 14:24:08 -0800221 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
222 return MODE_NO_DBLESCAN;
223
Zhao Yakui6bcdcd92009-03-03 18:06:42 +0800224 if (mode->clock < 25000)
225 return MODE_CLOCK_LOW;
226
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100227 if (IS_GEN2(dev))
Zhao Yakui6bcdcd92009-03-03 18:06:42 +0800228 max_clock = 350000;
229 else
230 max_clock = 400000;
231 if (mode->clock > max_clock)
232 return MODE_CLOCK_HIGH;
Jesse Barnes79e53942008-11-07 14:24:08 -0800233
Paulo Zanonid4b19312012-11-29 11:29:32 -0200234 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
235 if (HAS_PCH_LPT(dev) &&
236 (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
237 return MODE_CLOCK_HIGH;
238
Jesse Barnes79e53942008-11-07 14:24:08 -0800239 return MODE_OK;
240}
241
Daniel Vetter5bfe2ac2013-03-27 00:44:55 +0100242static bool intel_crt_compute_config(struct intel_encoder *encoder,
Ander Conselvan de Oliveira5cec2582015-01-15 14:55:21 +0200243 struct intel_crtc_state *pipe_config)
Jesse Barnes79e53942008-11-07 14:24:08 -0800244{
Daniel Vetter5bfe2ac2013-03-27 00:44:55 +0100245 struct drm_device *dev = encoder->base.dev;
246
247 if (HAS_PCH_SPLIT(dev))
248 pipe_config->has_pch_encoder = true;
249
Daniel Vetter2a7acee2013-04-19 11:24:39 +0200250 /* LPT FDI RX only supports 8bpc. */
251 if (HAS_PCH_LPT(dev))
252 pipe_config->pipe_bpp = 24;
253
Ville Syrjälä8f7abfd2014-02-27 14:23:12 +0200254 /* FDI must always be 2.7 GHz */
Daniel Vetter0e503382014-07-04 11:26:04 -0300255 if (HAS_DDI(dev)) {
256 pipe_config->ddi_pll_sel = PORT_CLK_SEL_SPLL;
Ville Syrjälä8f7abfd2014-02-27 14:23:12 +0200257 pipe_config->port_clock = 135000 * 2;
Maarten Lankhorst00490c22015-11-16 14:42:12 +0100258
259 pipe_config->dpll_hw_state.wrpll = 0;
260 pipe_config->dpll_hw_state.spll =
261 SPLL_PLL_ENABLE | SPLL_PLL_FREQ_1350MHz | SPLL_PLL_SSC;
Daniel Vetter0e503382014-07-04 11:26:04 -0300262 }
Ville Syrjälä8f7abfd2014-02-27 14:23:12 +0200263
Jesse Barnes79e53942008-11-07 14:24:08 -0800264 return true;
265}
266
Adam Jacksonf2b115e2009-12-03 17:14:42 -0500267static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
Zhenyu Wang2c072452009-06-05 15:38:42 +0800268{
269 struct drm_device *dev = connector->dev;
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800270 struct intel_crt *crt = intel_attached_crt(connector);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800271 struct drm_i915_private *dev_priv = dev->dev_private;
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800272 u32 adpa;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800273 bool ret;
274
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800275 /* The first time through, trigger an explicit detection cycle */
276 if (crt->force_hotplug_required) {
277 bool turn_off_dac = HAS_PCH_SPLIT(dev);
278 u32 save_adpa;
Zhenyu Wang67941da2009-07-24 01:00:33 +0800279
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800280 crt->force_hotplug_required = 0;
Dave Airlied5dd96c2010-08-04 15:52:19 +1000281
Ville Syrjäläca54b812013-01-25 21:44:42 +0200282 save_adpa = adpa = I915_READ(crt->adpa_reg);
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800283 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
Dave Airlied5dd96c2010-08-04 15:52:19 +1000284
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800285 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
286 if (turn_off_dac)
287 adpa &= ~ADPA_DAC_ENABLE;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800288
Ville Syrjäläca54b812013-01-25 21:44:42 +0200289 I915_WRITE(crt->adpa_reg, adpa);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800290
Ville Syrjäläca54b812013-01-25 21:44:42 +0200291 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800292 1000))
293 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
Zhenyu Wang2c072452009-06-05 15:38:42 +0800294
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800295 if (turn_off_dac) {
Ville Syrjäläca54b812013-01-25 21:44:42 +0200296 I915_WRITE(crt->adpa_reg, save_adpa);
297 POSTING_READ(crt->adpa_reg);
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800298 }
Zhenyu Wanga4a6b902010-04-07 16:15:55 +0800299 }
300
Zhenyu Wang2c072452009-06-05 15:38:42 +0800301 /* Check the status to see if both blue and green are on now */
Ville Syrjäläca54b812013-01-25 21:44:42 +0200302 adpa = I915_READ(crt->adpa_reg);
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800303 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
Zhenyu Wang2c072452009-06-05 15:38:42 +0800304 ret = true;
305 else
306 ret = false;
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800307 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800308
Zhenyu Wang2c072452009-06-05 15:38:42 +0800309 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800310}
311
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700312static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
313{
314 struct drm_device *dev = connector->dev;
Ville Syrjäläca54b812013-01-25 21:44:42 +0200315 struct intel_crt *crt = intel_attached_crt(connector);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700316 struct drm_i915_private *dev_priv = dev->dev_private;
317 u32 adpa;
318 bool ret;
319 u32 save_adpa;
320
Ville Syrjäläca54b812013-01-25 21:44:42 +0200321 save_adpa = adpa = I915_READ(crt->adpa_reg);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700322 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
323
324 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
325
Ville Syrjäläca54b812013-01-25 21:44:42 +0200326 I915_WRITE(crt->adpa_reg, adpa);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700327
Ville Syrjäläca54b812013-01-25 21:44:42 +0200328 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700329 1000)) {
330 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
Ville Syrjäläca54b812013-01-25 21:44:42 +0200331 I915_WRITE(crt->adpa_reg, save_adpa);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700332 }
333
334 /* Check the status to see if both blue and green are on now */
Ville Syrjäläca54b812013-01-25 21:44:42 +0200335 adpa = I915_READ(crt->adpa_reg);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700336 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
337 ret = true;
338 else
339 ret = false;
340
341 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
342
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700343 return ret;
344}
345
Jesse Barnes79e53942008-11-07 14:24:08 -0800346/**
347 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
348 *
349 * Not for i915G/i915GM
350 *
351 * \return true if CRT is connected.
352 * \return false if CRT is disconnected.
353 */
354static bool intel_crt_detect_hotplug(struct drm_connector *connector)
355{
356 struct drm_device *dev = connector->dev;
357 struct drm_i915_private *dev_priv = dev->dev_private;
Egbert Eich0706f172015-09-23 16:15:27 +0200358 u32 stat;
Adam Jackson7a772c42010-05-24 16:46:29 -0400359 bool ret = false;
Zhao Yakui771cb082009-03-03 18:07:52 +0800360 int i, tries = 0;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800361
Eric Anholtbad720f2009-10-22 16:11:14 -0700362 if (HAS_PCH_SPLIT(dev))
Adam Jacksonf2b115e2009-12-03 17:14:42 -0500363 return intel_ironlake_crt_detect_hotplug(connector);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800364
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700365 if (IS_VALLEYVIEW(dev))
366 return valleyview_crt_detect_hotplug(connector);
367
Zhao Yakui771cb082009-03-03 18:07:52 +0800368 /*
369 * On 4 series desktop, CRT detect sequence need to be done twice
370 * to get a reliable result.
371 */
Jesse Barnes79e53942008-11-07 14:24:08 -0800372
Zhao Yakui771cb082009-03-03 18:07:52 +0800373 if (IS_G4X(dev) && !IS_GM45(dev))
374 tries = 2;
375 else
376 tries = 1;
Jesse Barnes79e53942008-11-07 14:24:08 -0800377
Zhao Yakui771cb082009-03-03 18:07:52 +0800378 for (i = 0; i < tries ; i++) {
Zhao Yakui771cb082009-03-03 18:07:52 +0800379 /* turn on the FORCE_DETECT */
Egbert Eich0706f172015-09-23 16:15:27 +0200380 i915_hotplug_interrupt_update(dev_priv,
381 CRT_HOTPLUG_FORCE_DETECT,
382 CRT_HOTPLUG_FORCE_DETECT);
Zhao Yakui771cb082009-03-03 18:07:52 +0800383 /* wait for FORCE_DETECT to go off */
Chris Wilson913d8d12010-08-07 11:01:35 +0100384 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
385 CRT_HOTPLUG_FORCE_DETECT) == 0,
Chris Wilson481b6af2010-08-23 17:43:35 +0100386 1000))
Chris Wilson79077312010-09-12 19:58:04 +0100387 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
Zhao Yakui771cb082009-03-03 18:07:52 +0800388 }
Jesse Barnes79e53942008-11-07 14:24:08 -0800389
Adam Jackson7a772c42010-05-24 16:46:29 -0400390 stat = I915_READ(PORT_HOTPLUG_STAT);
391 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
392 ret = true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800393
Adam Jackson7a772c42010-05-24 16:46:29 -0400394 /* clear the interrupt we just generated, if any */
395 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
396
Egbert Eich0706f172015-09-23 16:15:27 +0200397 i915_hotplug_interrupt_update(dev_priv, CRT_HOTPLUG_FORCE_DETECT, 0);
Adam Jackson7a772c42010-05-24 16:46:29 -0400398
399 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800400}
401
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300402static struct edid *intel_crt_get_edid(struct drm_connector *connector,
403 struct i2c_adapter *i2c)
404{
405 struct edid *edid;
406
407 edid = drm_get_edid(connector, i2c);
408
409 if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
410 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
411 intel_gmbus_force_bit(i2c, true);
412 edid = drm_get_edid(connector, i2c);
413 intel_gmbus_force_bit(i2c, false);
414 }
415
416 return edid;
417}
418
419/* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
420static int intel_crt_ddc_get_modes(struct drm_connector *connector,
421 struct i2c_adapter *adapter)
422{
423 struct edid *edid;
Jani Nikulaebda95a2012-10-19 14:51:51 +0300424 int ret;
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300425
426 edid = intel_crt_get_edid(connector, adapter);
427 if (!edid)
428 return 0;
429
Jani Nikulaebda95a2012-10-19 14:51:51 +0300430 ret = intel_connector_update_modes(connector, edid);
431 kfree(edid);
432
433 return ret;
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300434}
435
David Müllerf5afcd32011-01-06 12:29:32 +0000436static bool intel_crt_detect_ddc(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -0800437{
David Müllerf5afcd32011-01-06 12:29:32 +0000438 struct intel_crt *crt = intel_attached_crt(connector);
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000439 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200440 struct edid *edid;
441 struct i2c_adapter *i2c;
Jesse Barnes79e53942008-11-07 14:24:08 -0800442
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200443 BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
Jesse Barnes79e53942008-11-07 14:24:08 -0800444
Rodrigo Vivi41aa3442013-05-09 20:03:18 -0300445 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300446 edid = intel_crt_get_edid(connector, i2c);
David Müllerf5afcd32011-01-06 12:29:32 +0000447
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200448 if (edid) {
449 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
450
David Müllerf5afcd32011-01-06 12:29:32 +0000451 /*
452 * This may be a DVI-I connector with a shared DDC
453 * link between analog and digital outputs, so we
454 * have to check the EDID input spec of the attached device.
455 */
David Müllerf5afcd32011-01-06 12:29:32 +0000456 if (!is_digital) {
457 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
458 return true;
459 }
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200460
461 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
462 } else {
463 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
Chris Wilson6ec3d0c2010-09-22 18:17:01 +0100464 }
465
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200466 kfree(edid);
467
Chris Wilson6ec3d0c2010-09-22 18:17:01 +0100468 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800469}
470
Ma Linge4a5d542009-05-26 11:31:00 +0800471static enum drm_connector_status
Chris Wilson71731882011-04-19 23:10:58 +0100472intel_crt_load_detect(struct intel_crt *crt)
Ma Linge4a5d542009-05-26 11:31:00 +0800473{
Chris Wilson71731882011-04-19 23:10:58 +0100474 struct drm_device *dev = crt->base.base.dev;
Ma Linge4a5d542009-05-26 11:31:00 +0800475 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson71731882011-04-19 23:10:58 +0100476 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
Ma Linge4a5d542009-05-26 11:31:00 +0800477 uint32_t save_bclrpat;
478 uint32_t save_vtotal;
479 uint32_t vtotal, vactive;
480 uint32_t vsample;
481 uint32_t vblank, vblank_start, vblank_end;
482 uint32_t dsl;
Ville Syrjäläf0f59a02015-11-18 15:33:26 +0200483 i915_reg_t bclrpat_reg, vtotal_reg,
484 vblank_reg, vsync_reg, pipeconf_reg, pipe_dsl_reg;
Ma Linge4a5d542009-05-26 11:31:00 +0800485 uint8_t st00;
486 enum drm_connector_status status;
487
Chris Wilson6ec3d0c2010-09-22 18:17:01 +0100488 DRM_DEBUG_KMS("starting load-detect on CRT\n");
489
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800490 bclrpat_reg = BCLRPAT(pipe);
491 vtotal_reg = VTOTAL(pipe);
492 vblank_reg = VBLANK(pipe);
493 vsync_reg = VSYNC(pipe);
494 pipeconf_reg = PIPECONF(pipe);
495 pipe_dsl_reg = PIPEDSL(pipe);
Ma Linge4a5d542009-05-26 11:31:00 +0800496
497 save_bclrpat = I915_READ(bclrpat_reg);
498 save_vtotal = I915_READ(vtotal_reg);
499 vblank = I915_READ(vblank_reg);
500
501 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
502 vactive = (save_vtotal & 0x7ff) + 1;
503
504 vblank_start = (vblank & 0xfff) + 1;
505 vblank_end = ((vblank >> 16) & 0xfff) + 1;
506
507 /* Set the border color to purple. */
508 I915_WRITE(bclrpat_reg, 0x500050);
509
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100510 if (!IS_GEN2(dev)) {
Ma Linge4a5d542009-05-26 11:31:00 +0800511 uint32_t pipeconf = I915_READ(pipeconf_reg);
512 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
Chris Wilson19c55da2010-08-09 14:50:53 +0100513 POSTING_READ(pipeconf_reg);
Ma Linge4a5d542009-05-26 11:31:00 +0800514 /* Wait for next Vblank to substitue
515 * border color for Color info */
Jesse Barnes9d0498a2010-08-18 13:20:54 -0700516 intel_wait_for_vblank(dev, pipe);
Ville Syrjäläf0f59a02015-11-18 15:33:26 +0200517 st00 = I915_READ8(_VGA_MSR_WRITE);
Ma Linge4a5d542009-05-26 11:31:00 +0800518 status = ((st00 & (1 << 4)) != 0) ?
519 connector_status_connected :
520 connector_status_disconnected;
521
522 I915_WRITE(pipeconf_reg, pipeconf);
523 } else {
524 bool restore_vblank = false;
525 int count, detect;
526
527 /*
528 * If there isn't any border, add some.
529 * Yes, this will flicker
530 */
531 if (vblank_start <= vactive && vblank_end >= vtotal) {
532 uint32_t vsync = I915_READ(vsync_reg);
533 uint32_t vsync_start = (vsync & 0xffff) + 1;
534
535 vblank_start = vsync_start;
536 I915_WRITE(vblank_reg,
537 (vblank_start - 1) |
538 ((vblank_end - 1) << 16));
539 restore_vblank = true;
540 }
541 /* sample in the vertical border, selecting the larger one */
542 if (vblank_start - vactive >= vtotal - vblank_end)
543 vsample = (vblank_start + vactive) >> 1;
544 else
545 vsample = (vtotal + vblank_end) >> 1;
546
547 /*
548 * Wait for the border to be displayed
549 */
550 while (I915_READ(pipe_dsl_reg) >= vactive)
551 ;
552 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
553 ;
554 /*
555 * Watch ST00 for an entire scanline
556 */
557 detect = 0;
558 count = 0;
559 do {
560 count++;
561 /* Read the ST00 VGA status register */
Ville Syrjäläf0f59a02015-11-18 15:33:26 +0200562 st00 = I915_READ8(_VGA_MSR_WRITE);
Ma Linge4a5d542009-05-26 11:31:00 +0800563 if (st00 & (1 << 4))
564 detect++;
565 } while ((I915_READ(pipe_dsl_reg) == dsl));
566
567 /* restore vblank if necessary */
568 if (restore_vblank)
569 I915_WRITE(vblank_reg, vblank);
570 /*
571 * If more than 3/4 of the scanline detected a monitor,
572 * then it is assumed to be present. This works even on i830,
573 * where there isn't any way to force the border color across
574 * the screen
575 */
576 status = detect * 4 > count * 3 ?
577 connector_status_connected :
578 connector_status_disconnected;
579 }
580
581 /* Restore previous settings */
582 I915_WRITE(bclrpat_reg, save_bclrpat);
583
584 return status;
585}
586
Chris Wilson7b334fc2010-09-09 23:51:02 +0100587static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +0100588intel_crt_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -0800589{
590 struct drm_device *dev = connector->dev;
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300591 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000592 struct intel_crt *crt = intel_attached_crt(connector);
Imre Deak671dedd2014-03-05 16:20:53 +0200593 struct intel_encoder *intel_encoder = &crt->base;
594 enum intel_display_power_domain power_domain;
Ma Linge4a5d542009-05-26 11:31:00 +0800595 enum drm_connector_status status;
Daniel Vettere95c8432012-04-20 21:03:36 +0200596 struct intel_load_detect_pipe tmp;
Rob Clark51fd3712013-11-19 12:10:12 -0500597 struct drm_modeset_acquire_ctx ctx;
Jesse Barnes79e53942008-11-07 14:24:08 -0800598
Chris Wilson164c8592013-07-20 20:27:08 +0100599 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
Jani Nikulac23cc412014-06-03 14:56:17 +0300600 connector->base.id, connector->name,
Chris Wilson164c8592013-07-20 20:27:08 +0100601 force);
602
Imre Deak671dedd2014-03-05 16:20:53 +0200603 power_domain = intel_display_port_power_domain(intel_encoder);
604 intel_display_power_get(dev_priv, power_domain);
605
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100606 if (I915_HAS_HOTPLUG(dev)) {
Daniel Vetteraaa37732012-06-16 15:30:32 +0200607 /* We can not rely on the HPD pin always being correctly wired
608 * up, for example many KVM do not pass it through, and so
609 * only trust an assertion that the monitor is connected.
610 */
Chris Wilson6ec3d0c2010-09-22 18:17:01 +0100611 if (intel_crt_detect_hotplug(connector)) {
612 DRM_DEBUG_KMS("CRT detected via hotplug\n");
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300613 status = connector_status_connected;
614 goto out;
Daniel Vetteraaa37732012-06-16 15:30:32 +0200615 } else
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800616 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800617 }
618
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300619 if (intel_crt_detect_ddc(connector)) {
620 status = connector_status_connected;
621 goto out;
622 }
Jesse Barnes79e53942008-11-07 14:24:08 -0800623
Daniel Vetteraaa37732012-06-16 15:30:32 +0200624 /* Load detection is broken on HPD capable machines. Whoever wants a
625 * broken monitor (without edid) to work behind a broken kvm (that fails
626 * to have the right resistors for HP detection) needs to fix this up.
627 * For now just bail out. */
Daniel Vetter5bedeb22015-03-03 18:03:47 +0100628 if (I915_HAS_HOTPLUG(dev) && !i915.load_detect_test) {
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300629 status = connector_status_disconnected;
630 goto out;
631 }
Daniel Vetteraaa37732012-06-16 15:30:32 +0200632
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300633 if (!force) {
634 status = connector->status;
635 goto out;
636 }
Chris Wilson7b334fc2010-09-09 23:51:02 +0100637
Ville Syrjälä208bf9f2014-08-11 13:15:35 +0300638 drm_modeset_acquire_init(&ctx, 0);
639
Ma Linge4a5d542009-05-26 11:31:00 +0800640 /* for pre-945g platforms use load detect */
Rob Clark51fd3712013-11-19 12:10:12 -0500641 if (intel_get_load_detect_pipe(connector, NULL, &tmp, &ctx)) {
Daniel Vettere95c8432012-04-20 21:03:36 +0200642 if (intel_crt_detect_ddc(connector))
643 status = connector_status_connected;
Daniel Vetter5bedeb22015-03-03 18:03:47 +0100644 else if (INTEL_INFO(dev)->gen < 4)
Daniel Vettere95c8432012-04-20 21:03:36 +0200645 status = intel_crt_load_detect(crt);
Daniel Vetter5bedeb22015-03-03 18:03:47 +0100646 else
647 status = connector_status_unknown;
Ander Conselvan de Oliveira49172fe2015-03-20 16:18:02 +0200648 intel_release_load_detect_pipe(connector, &tmp, &ctx);
Daniel Vettere95c8432012-04-20 21:03:36 +0200649 } else
650 status = connector_status_unknown;
Ma Linge4a5d542009-05-26 11:31:00 +0800651
Ville Syrjälä208bf9f2014-08-11 13:15:35 +0300652 drm_modeset_drop_locks(&ctx);
653 drm_modeset_acquire_fini(&ctx);
654
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300655out:
Imre Deak671dedd2014-03-05 16:20:53 +0200656 intel_display_power_put(dev_priv, power_domain);
Ma Linge4a5d542009-05-26 11:31:00 +0800657 return status;
Jesse Barnes79e53942008-11-07 14:24:08 -0800658}
659
660static void intel_crt_destroy(struct drm_connector *connector)
661{
Jesse Barnes79e53942008-11-07 14:24:08 -0800662 drm_connector_cleanup(connector);
663 kfree(connector);
664}
665
666static int intel_crt_get_modes(struct drm_connector *connector)
667{
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800668 struct drm_device *dev = connector->dev;
Chris Wilsonf899fc62010-07-20 15:44:45 -0700669 struct drm_i915_private *dev_priv = dev->dev_private;
Imre Deak671dedd2014-03-05 16:20:53 +0200670 struct intel_crt *crt = intel_attached_crt(connector);
671 struct intel_encoder *intel_encoder = &crt->base;
672 enum intel_display_power_domain power_domain;
Chris Wilson890f3352010-09-14 16:46:59 +0100673 int ret;
Daniel Kurtz3bd7d902012-03-28 02:36:14 +0800674 struct i2c_adapter *i2c;
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800675
Imre Deak671dedd2014-03-05 16:20:53 +0200676 power_domain = intel_display_port_power_domain(intel_encoder);
677 intel_display_power_get(dev_priv, power_domain);
678
Rodrigo Vivi41aa3442013-05-09 20:03:18 -0300679 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300680 ret = intel_crt_ddc_get_modes(connector, i2c);
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800681 if (ret || !IS_G4X(dev))
Imre Deak671dedd2014-03-05 16:20:53 +0200682 goto out;
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800683
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800684 /* Try to probe digital port for output in DVI-I -> VGA mode. */
Jani Nikula988c7012015-03-27 00:20:19 +0200685 i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPB);
Imre Deak671dedd2014-03-05 16:20:53 +0200686 ret = intel_crt_ddc_get_modes(connector, i2c);
687
688out:
689 intel_display_power_put(dev_priv, power_domain);
690
691 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800692}
693
694static int intel_crt_set_property(struct drm_connector *connector,
695 struct drm_property *property,
696 uint64_t value)
697{
Jesse Barnes79e53942008-11-07 14:24:08 -0800698 return 0;
699}
700
Chris Wilsonf3269052011-01-24 15:17:08 +0000701static void intel_crt_reset(struct drm_connector *connector)
702{
703 struct drm_device *dev = connector->dev;
Daniel Vetter2e938892012-10-11 20:08:24 +0200704 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsonf3269052011-01-24 15:17:08 +0000705 struct intel_crt *crt = intel_attached_crt(connector);
706
Chris Wilson10603ca2013-08-26 19:51:06 -0300707 if (INTEL_INFO(dev)->gen >= 5) {
Daniel Vetter2e938892012-10-11 20:08:24 +0200708 u32 adpa;
709
Ville Syrjäläca54b812013-01-25 21:44:42 +0200710 adpa = I915_READ(crt->adpa_reg);
Daniel Vetter2e938892012-10-11 20:08:24 +0200711 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
712 adpa |= ADPA_HOTPLUG_BITS;
Ville Syrjäläca54b812013-01-25 21:44:42 +0200713 I915_WRITE(crt->adpa_reg, adpa);
714 POSTING_READ(crt->adpa_reg);
Daniel Vetter2e938892012-10-11 20:08:24 +0200715
Ville Syrjälä0039a4b32014-10-16 20:52:30 +0300716 DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa);
Chris Wilsonf3269052011-01-24 15:17:08 +0000717 crt->force_hotplug_required = 1;
Daniel Vetter2e938892012-10-11 20:08:24 +0200718 }
719
Chris Wilsonf3269052011-01-24 15:17:08 +0000720}
721
Jesse Barnes79e53942008-11-07 14:24:08 -0800722/*
723 * Routines for controlling stuff on the analog port
724 */
725
Jesse Barnes79e53942008-11-07 14:24:08 -0800726static const struct drm_connector_funcs intel_crt_connector_funcs = {
Chris Wilsonf3269052011-01-24 15:17:08 +0000727 .reset = intel_crt_reset,
Maarten Lankhorst4d688a22015-08-05 12:37:06 +0200728 .dpms = drm_atomic_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -0800729 .detect = intel_crt_detect,
730 .fill_modes = drm_helper_probe_single_connector_modes,
731 .destroy = intel_crt_destroy,
732 .set_property = intel_crt_set_property,
Matt Roperc6f95f22015-01-22 16:50:32 -0800733 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
Ander Conselvan de Oliveira98969722015-03-20 16:18:06 +0200734 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
Matt Roper2545e4a2015-01-22 16:51:27 -0800735 .atomic_get_property = intel_connector_atomic_get_property,
Jesse Barnes79e53942008-11-07 14:24:08 -0800736};
737
738static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
739 .mode_valid = intel_crt_mode_valid,
740 .get_modes = intel_crt_get_modes,
Chris Wilsondf0e9242010-09-09 16:20:55 +0100741 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -0800742};
743
Jesse Barnes79e53942008-11-07 14:24:08 -0800744static const struct drm_encoder_funcs intel_crt_enc_funcs = {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100745 .destroy = intel_encoder_destroy,
Jesse Barnes79e53942008-11-07 14:24:08 -0800746};
747
Mathias Krausebbe1c272014-08-27 18:41:19 +0200748static int intel_no_crt_dmi_callback(const struct dmi_system_id *id)
Duncan Laurie8ca40132011-10-25 15:42:21 -0700749{
Daniel Vetterbc0daf42012-04-01 13:16:49 +0200750 DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
Duncan Laurie8ca40132011-10-25 15:42:21 -0700751 return 1;
752}
753
754static const struct dmi_system_id intel_no_crt[] = {
755 {
756 .callback = intel_no_crt_dmi_callback,
757 .ident = "ACER ZGB",
758 .matches = {
759 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
760 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
761 },
762 },
Giacomo Comes10b6ee42014-04-03 14:13:55 -0400763 {
764 .callback = intel_no_crt_dmi_callback,
765 .ident = "DELL XPS 8700",
766 .matches = {
767 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
768 DMI_MATCH(DMI_PRODUCT_NAME, "XPS 8700"),
769 },
770 },
Duncan Laurie8ca40132011-10-25 15:42:21 -0700771 { }
772};
773
Jesse Barnes79e53942008-11-07 14:24:08 -0800774void intel_crt_init(struct drm_device *dev)
775{
776 struct drm_connector *connector;
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000777 struct intel_crt *crt;
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800778 struct intel_connector *intel_connector;
David Müller (ELSOFT AG)db545012009-08-29 08:54:45 +0200779 struct drm_i915_private *dev_priv = dev->dev_private;
Ville Syrjälä6c03a6b2015-11-20 22:35:41 +0200780 i915_reg_t adpa_reg;
781 u32 adpa;
Jesse Barnes79e53942008-11-07 14:24:08 -0800782
Duncan Laurie8ca40132011-10-25 15:42:21 -0700783 /* Skip machines without VGA that falsely report hotplug events */
784 if (dmi_check_system(intel_no_crt))
785 return;
786
Ville Syrjälä6c03a6b2015-11-20 22:35:41 +0200787 if (HAS_PCH_SPLIT(dev))
788 adpa_reg = PCH_ADPA;
789 else if (IS_VALLEYVIEW(dev))
790 adpa_reg = VLV_ADPA;
791 else
792 adpa_reg = ADPA;
793
794 adpa = I915_READ(adpa_reg);
795 if ((adpa & ADPA_DAC_ENABLE) == 0) {
796 /*
797 * On some machines (some IVB at least) CRT can be
798 * fused off, but there's no known fuse bit to
799 * indicate that. On these machine the ADPA register
800 * works normally, except the DAC enable bit won't
801 * take. So the only way to tell is attempt to enable
802 * it and see what happens.
803 */
804 I915_WRITE(adpa_reg, adpa | ADPA_DAC_ENABLE |
805 ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
806 if ((I915_READ(adpa_reg) & ADPA_DAC_ENABLE) == 0)
807 return;
808 I915_WRITE(adpa_reg, adpa);
809 }
810
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000811 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
812 if (!crt)
Jesse Barnes79e53942008-11-07 14:24:08 -0800813 return;
814
Ander Conselvan de Oliveira9bdbd0b2015-04-10 10:59:10 +0300815 intel_connector = intel_connector_alloc();
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800816 if (!intel_connector) {
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000817 kfree(crt);
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800818 return;
819 }
820
821 connector = &intel_connector->base;
Adam Jackson637f44d2013-03-25 15:40:05 -0400822 crt->connector = intel_connector;
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800823 drm_connector_init(dev, &intel_connector->base,
Jesse Barnes79e53942008-11-07 14:24:08 -0800824 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
825
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000826 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
Jesse Barnes79e53942008-11-07 14:24:08 -0800827 DRM_MODE_ENCODER_DAC);
828
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000829 intel_connector_attach_encoder(intel_connector, &crt->base);
Jesse Barnes79e53942008-11-07 14:24:08 -0800830
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000831 crt->base.type = INTEL_OUTPUT_ANALOG;
Ville Syrjälä301ea742014-03-03 16:15:30 +0200832 crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);
Paulo Zanonid63fa0d2012-11-20 13:27:35 -0200833 if (IS_I830(dev))
Eugeni Dodonov59c859d2012-05-09 15:37:19 -0300834 crt->base.crtc_mask = (1 << 0);
835 else
Keith Packard08268742012-08-13 21:34:45 -0700836 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
Eugeni Dodonov59c859d2012-05-09 15:37:19 -0300837
Daniel Vetterdbb02572012-01-28 14:49:23 +0100838 if (IS_GEN2(dev))
839 connector->interlace_allowed = 0;
840 else
841 connector->interlace_allowed = 1;
Jesse Barnes79e53942008-11-07 14:24:08 -0800842 connector->doublescan_allowed = 0;
843
Ville Syrjälä6c03a6b2015-11-20 22:35:41 +0200844 crt->adpa_reg = adpa_reg;
Jesse Barnesdf0323c2012-04-17 15:06:33 -0700845
Daniel Vetter5bfe2ac2013-03-27 00:44:55 +0100846 crt->base.compute_config = intel_crt_compute_config;
Ville Syrjälä1ea56e22015-05-05 17:17:37 +0300847 if (HAS_PCH_SPLIT(dev) && !HAS_DDI(dev)) {
848 crt->base.disable = pch_disable_crt;
849 crt->base.post_disable = pch_post_disable_crt;
850 } else {
851 crt->base.disable = intel_disable_crt;
852 }
Daniel Vetter21246042012-07-01 14:58:27 +0200853 crt->base.enable = intel_enable_crt;
Egbert Eich1d843f92013-02-25 12:06:49 -0500854 if (I915_HAS_HOTPLUG(dev))
855 crt->base.hpd_pin = HPD_CRT;
Ville Syrjäläa2985792013-11-07 19:25:59 +0200856 if (HAS_DDI(dev)) {
857 crt->base.get_config = hsw_crt_get_config;
Paulo Zanoni4eda01b2012-10-31 18:12:21 -0200858 crt->base.get_hw_state = intel_ddi_get_hw_state;
Ville Syrjäläa2985792013-11-07 19:25:59 +0200859 } else {
860 crt->base.get_config = intel_crt_get_config;
Paulo Zanoni4eda01b2012-10-31 18:12:21 -0200861 crt->base.get_hw_state = intel_crt_get_hw_state;
Ville Syrjäläa2985792013-11-07 19:25:59 +0200862 }
Daniel Vettere403fc92012-07-02 13:41:21 +0200863 intel_connector->get_hw_state = intel_connector_get_hw_state;
Imre Deak4932e2c2014-02-11 17:12:48 +0200864 intel_connector->unregister = intel_connector_unregister;
Daniel Vetter21246042012-07-01 14:58:27 +0200865
Jesse Barnes79e53942008-11-07 14:24:08 -0800866 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
867
Thomas Wood34ea3d32014-05-29 16:57:41 +0100868 drm_connector_register(connector);
Jesse Barnesb01f2c32009-12-11 11:07:17 -0800869
Egbert Eich821450c2013-04-16 13:36:55 +0200870 if (!I915_HAS_HOTPLUG(dev))
871 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
Dave Airlieeb1f8e42010-05-07 06:42:51 +0000872
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800873 /*
874 * Configure the automatic hotplug detection stuff
875 */
876 crt->force_hotplug_required = 0;
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800877
Paulo Zanoni68d18ad2012-12-01 12:04:26 -0200878 /*
Damien Lespiau3e683202012-12-11 18:48:29 +0000879 * TODO: find a proper way to discover whether we need to set the the
880 * polarity and link reversal bits or not, instead of relying on the
881 * BIOS.
Paulo Zanoni68d18ad2012-12-01 12:04:26 -0200882 */
Damien Lespiau3e683202012-12-11 18:48:29 +0000883 if (HAS_PCH_LPT(dev)) {
884 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
885 FDI_RX_LINK_REVERSAL_OVERRIDE;
886
Ville Syrjäläeede3b52015-09-18 20:03:30 +0300887 dev_priv->fdi_rx_config = I915_READ(FDI_RX_CTL(PIPE_A)) & fdi_config;
Damien Lespiau3e683202012-12-11 18:48:29 +0000888 }
Daniel Vetter754970ee2014-01-16 22:28:44 +0100889
890 intel_crt_reset(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -0800891}