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Javier Martinez Canillascb5e1912012-12-19 14:33:09 +01001/*
Enric Balletbo i Serra9aa36df2013-11-26 15:03:37 -08002 * Device Tree Source for IGEPv2 Rev. (TI OMAP AM/DM37x)
Javier Martinez Canillascb5e1912012-12-19 14:33:09 +01003 *
4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
Florian Vaussard98ef79572013-05-31 14:32:55 +020012#include "omap3-igep.dtsi"
Tony Lindgren6b2978a2013-10-14 11:31:42 -070013#include "omap-gpmc-smsc911x.dtsi"
Javier Martinez Canillascb5e1912012-12-19 14:33:09 +010014
15/ {
Enric Balletbo i Serra9aa36df2013-11-26 15:03:37 -080016 model = "IGEPv2 (TI OMAP AM/DM37x)";
Javier Martinez Canillascb5e1912012-12-19 14:33:09 +010017 compatible = "isee,omap3-igep0020", "ti,omap3";
18
19 leds {
Javier Martinez Canillasbd52e2d2013-06-20 16:42:31 +020020 pinctrl-names = "default";
21 pinctrl-0 = <&leds_pins>;
Javier Martinez Canillascb5e1912012-12-19 14:33:09 +010022 compatible = "gpio-leds";
Javier Martinez Canillasbd52e2d2013-06-20 16:42:31 +020023
Javier Martinez Canillascb5e1912012-12-19 14:33:09 +010024 boot {
25 label = "omap3:green:boot";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020026 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
Javier Martinez Canillascb5e1912012-12-19 14:33:09 +010027 default-state = "on";
28 };
29
30 user0 {
31 label = "omap3:red:user0";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020032 gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
Javier Martinez Canillascb5e1912012-12-19 14:33:09 +010033 default-state = "off";
34 };
35
36 user1 {
37 label = "omap3:red:user1";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020038 gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
Javier Martinez Canillascb5e1912012-12-19 14:33:09 +010039 default-state = "off";
40 };
41
42 user2 {
43 label = "omap3:green:user1";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020044 gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>;
Javier Martinez Canillascb5e1912012-12-19 14:33:09 +010045 };
46 };
Javier Martinez Canillasd72b4412013-04-17 18:32:09 +020047
Javier Martinez Canillas339e8342013-10-07 17:12:24 +020048 /* HS USB Port 1 Power */
49 hsusb1_power: hsusb1_power_reg {
50 compatible = "regulator-fixed";
51 regulator-name = "hsusb1_vbus";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
54 gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */
55 startup-delay-us = <70000>;
56 };
57
58 /* HS USB Host PHY on PORT 1 */
59 hsusb1_phy: hsusb1_phy {
60 compatible = "usb-nop-xceiv";
61 reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
62 vcc-supply = <&hsusb1_power>;
63 };
64};
65
66&omap3_pmx_core {
67 pinctrl-names = "default";
68 pinctrl-0 = <
Javier Martinez Canillas50592dc2013-11-26 15:03:38 -080069 &tfp410_pins
70 &dss_pins
Javier Martinez Canillas339e8342013-10-07 17:12:24 +020071 >;
72
Javier Martinez Canillas50592dc2013-11-26 15:03:38 -080073 tfp410_pins: tfp410_dvi_pins {
74 pinctrl-single,pins = <
75 0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
76 >;
77 };
78
79 dss_pins: pinmux_dss_dvi_pins {
80 pinctrl-single,pins = <
81 0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
82 0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
83 0x0a8 (PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
84 0x0aa (PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
85 0x0ac (PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
86 0x0ae (PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
87 0x0b0 (PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
88 0x0b2 (PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
89 0x0b4 (PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
90 0x0b6 (PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
91 0x0b8 (PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
92 0x0ba (PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
93 0x0bc (PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
94 0x0be (PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
95 0x0c0 (PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
96 0x0c2 (PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
97 0x0c4 (PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
98 0x0c6 (PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
99 0x0c8 (PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
100 0x0ca (PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
101 0x0cc (PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
102 0x0ce (PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
103 0x0d0 (PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
104 0x0d2 (PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
105 0x0d4 (PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
106 0x0d6 (PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
107 0x0d8 (PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
108 0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
109 >;
110 };
Javier Martinez Canillascb5e1912012-12-19 14:33:09 +0100111};
112
Laurent Pinchart3d495382014-01-07 14:01:39 -0800113&omap3_pmx_core2 {
114 pinctrl-names = "default";
115 pinctrl-0 = <
116 &hsusbb1_pins
Javier Martinez Canillasbd52e2d2013-06-20 16:42:31 +0200117 >;
Laurent Pinchart3d495382014-01-07 14:01:39 -0800118
119 hsusbb1_pins: pinmux_hsusbb1_pins {
120 pinctrl-single,pins = <
121 OMAP3630_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
122 OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
123 OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */
124 OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */
125 OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */
126 OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */
127 OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */
128 OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */
129 OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */
130 OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */
131 OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */
132 OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */
133 >;
134 };
135
136 leds_pins: pinmux_leds_pins {
137 pinctrl-single,pins = <
138 OMAP3630_CORE2_IOPAD(0x25f4, PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */
139 OMAP3630_CORE2_IOPAD(0x25f6, PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */
140 OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
141 >;
142 };
Javier Martinez Canillasbd52e2d2013-06-20 16:42:31 +0200143};
144
Javier Martinez Canillascb5e1912012-12-19 14:33:09 +0100145&i2c3 {
146 clock-frequency = <100000>;
147
148 /*
149 * Display monitor features are burnt in the EEPROM
150 * as EDID data.
151 */
152 eeprom@50 {
153 compatible = "ti,eeprom";
154 reg = <0x50>;
155 };
156};
Javier Martinez Canillasd72b4412013-04-17 18:32:09 +0200157
158&gpmc {
Javier Martinez Canillas7f674b32013-05-10 21:31:10 +0200159 ranges = <0 0 0x00000000 0x20000000>,
160 <5 0 0x2c000000 0x01000000>;
161
162 nand@0,0 {
163 linux,mtd-name= "micron,mt29c4g96maz";
164 reg = <0 0 0>;
165 nand-bus-width = <16>;
166 ti,nand-ecc-opt = "bch8";
167
168 gpmc,sync-clk-ps = <0>;
169 gpmc,cs-on-ns = <0>;
170 gpmc,cs-rd-off-ns = <44>;
171 gpmc,cs-wr-off-ns = <44>;
172 gpmc,adv-on-ns = <6>;
173 gpmc,adv-rd-off-ns = <34>;
174 gpmc,adv-wr-off-ns = <44>;
175 gpmc,we-off-ns = <40>;
176 gpmc,oe-off-ns = <54>;
177 gpmc,access-ns = <64>;
178 gpmc,rd-cycle-ns = <82>;
179 gpmc,wr-cycle-ns = <82>;
180 gpmc,wr-access-ns = <40>;
181 gpmc,wr-data-mux-bus-ns = <0>;
182
183 #address-cells = <1>;
184 #size-cells = <1>;
185
186 partition@0 {
187 label = "SPL";
188 reg = <0 0x100000>;
189 };
Lee Jones8771c962013-07-22 11:52:32 +0100190 partition@80000 {
Javier Martinez Canillas7f674b32013-05-10 21:31:10 +0200191 label = "U-Boot";
192 reg = <0x100000 0x180000>;
193 };
Lee Jones8771c962013-07-22 11:52:32 +0100194 partition@1c0000 {
Javier Martinez Canillas7f674b32013-05-10 21:31:10 +0200195 label = "Environment";
196 reg = <0x280000 0x100000>;
197 };
Lee Jones8771c962013-07-22 11:52:32 +0100198 partition@280000 {
Javier Martinez Canillas7f674b32013-05-10 21:31:10 +0200199 label = "Kernel";
200 reg = <0x380000 0x300000>;
201 };
Lee Jones8771c962013-07-22 11:52:32 +0100202 partition@780000 {
Javier Martinez Canillas7f674b32013-05-10 21:31:10 +0200203 label = "Filesystem";
204 reg = <0x680000 0x1f980000>;
205 };
206 };
207
Tony Lindgren6b2978a2013-10-14 11:31:42 -0700208 ethernet@gpmc {
Javier Martinez Canillasd72b4412013-04-17 18:32:09 +0200209 pinctrl-names = "default";
210 pinctrl-0 = <&smsc911x_pins>;
Javier Martinez Canillasd72b4412013-04-17 18:32:09 +0200211 reg = <5 0 0xff>;
Javier Martinez Canillasd72b4412013-04-17 18:32:09 +0200212 interrupt-parent = <&gpio6>;
Javier Martinez Canillas2892aef2013-10-07 17:12:25 +0200213 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
Javier Martinez Canillasd72b4412013-04-17 18:32:09 +0200214 };
215};
Javier Martinez Canillas339e8342013-10-07 17:12:24 +0200216
217&usbhshost {
218 port1-mode = "ehci-phy";
219};
220
221&usbhsehci {
222 phys = <&hsusb1_phy>;
223};
Javier Martinez Canillas2f2befd2013-11-26 15:03:39 -0800224
225&vpll2 {
226 /* Needed for DSS */
227 regulator-name = "vdds_dsi";
228};