blob: 47fc2b88697928b4272a0878927d189762a82000 [file] [log] [blame]
Christian Koenigdafc3bd2009-10-11 23:49:13 +02001/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Christian König.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Christian König
25 */
David Howells760285e2012-10-02 18:01:07 +010026#include <drm/drmP.h>
Christian Koenigdafc3bd2009-10-11 23:49:13 +020027#include "radeon.h"
28#include "radeon_reg.h"
Daniel Vetter3574dda2011-02-18 17:59:19 +010029#include "radeon_asic.h"
Christian Koenigdafc3bd2009-10-11 23:49:13 +020030#include "atom.h"
31
Christian Koenigdafc3bd2009-10-11 23:49:13 +020032/*
Rafał Miłeckicfcbd6d2012-05-14 16:52:30 +020033 * check if enc_priv stores radeon_encoder_atom_dig
34 */
35static bool radeon_dig_encoder(struct drm_encoder *encoder)
36{
37 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
38 switch (radeon_encoder->encoder_id) {
39 case ENCODER_OBJECT_ID_INTERNAL_LVDS:
40 case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
41 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
42 case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
43 case ENCODER_OBJECT_ID_INTERNAL_DVO1:
44 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
45 case ENCODER_OBJECT_ID_INTERNAL_DDI:
46 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
47 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
48 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
49 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
50 return true;
51 }
52 return false;
53}
54
55/*
Christian Koenigdafc3bd2009-10-11 23:49:13 +020056 * check if the chipset is supported
57 */
58static int r600_audio_chipset_supported(struct radeon_device *rdev)
59{
Alex Deucherb5306022013-07-31 16:51:33 -040060 return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
Christian Koenigdafc3bd2009-10-11 23:49:13 +020061}
62
Alex Deucherb5306022013-07-31 16:51:33 -040063struct r600_audio_pin r600_audio_status(struct radeon_device *rdev)
Christian Koenigdafc3bd2009-10-11 23:49:13 +020064{
Alex Deucherb5306022013-07-31 16:51:33 -040065 struct r600_audio_pin status;
Rafał Miłecki3299de92012-05-14 21:25:57 +020066 uint32_t value;
Christian Koenigdafc3bd2009-10-11 23:49:13 +020067
Rafał Miłecki3299de92012-05-14 21:25:57 +020068 value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);
69
70 /* number of channels */
71 status.channels = (value & 0x7) + 1;
72
73 /* bits per sample */
74 switch ((value & 0xF0) >> 4) {
75 case 0x0:
76 status.bits_per_sample = 8;
77 break;
78 case 0x1:
79 status.bits_per_sample = 16;
80 break;
81 case 0x2:
82 status.bits_per_sample = 20;
83 break;
84 case 0x3:
85 status.bits_per_sample = 24;
86 break;
87 case 0x4:
88 status.bits_per_sample = 32;
89 break;
90 default:
91 dev_err(rdev->dev, "Unknown bits per sample 0x%x, using 16\n",
92 (int)value);
93 status.bits_per_sample = 16;
Christian Koenigdafc3bd2009-10-11 23:49:13 +020094 }
95
Rafał Miłecki3299de92012-05-14 21:25:57 +020096 /* current sampling rate in HZ */
Christian Koenigdafc3bd2009-10-11 23:49:13 +020097 if (value & 0x4000)
Rafał Miłecki3299de92012-05-14 21:25:57 +020098 status.rate = 44100;
Christian Koenigdafc3bd2009-10-11 23:49:13 +020099 else
Rafał Miłecki3299de92012-05-14 21:25:57 +0200100 status.rate = 48000;
101 status.rate *= ((value >> 11) & 0x7) + 1;
102 status.rate /= ((value >> 8) & 0x7) + 1;
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200103
Rafał Miłecki3299de92012-05-14 21:25:57 +0200104 value = RREG32(R600_AUDIO_STATUS_BITS);
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200105
Rafał Miłecki3299de92012-05-14 21:25:57 +0200106 /* iec 60958 status bits */
107 status.status_bits = value & 0xff;
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200108
Rafał Miłecki3299de92012-05-14 21:25:57 +0200109 /* iec 60958 category code */
110 status.category_code = (value >> 8) & 0xff;
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200111
Rafał Miłecki3299de92012-05-14 21:25:57 +0200112 return status;
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200113}
114
115/*
116 * update all hdmi interfaces with current audio parameters
117 */
Alex Deucherf122c612012-03-30 08:59:57 -0400118void r600_audio_update_hdmi(struct work_struct *work)
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200119{
Alex Deucherf122c612012-03-30 08:59:57 -0400120 struct radeon_device *rdev = container_of(work, struct radeon_device,
121 audio_work);
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200122 struct drm_device *dev = rdev->ddev;
Alex Deucherb5306022013-07-31 16:51:33 -0400123 struct r600_audio_pin audio_status = r600_audio_status(rdev);
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200124 struct drm_encoder *encoder;
Rafał Miłecki3299de92012-05-14 21:25:57 +0200125 bool changed = false;
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200126
Alex Deucherb5306022013-07-31 16:51:33 -0400127 if (rdev->audio.pin[0].channels != audio_status.channels ||
128 rdev->audio.pin[0].rate != audio_status.rate ||
129 rdev->audio.pin[0].bits_per_sample != audio_status.bits_per_sample ||
130 rdev->audio.pin[0].status_bits != audio_status.status_bits ||
131 rdev->audio.pin[0].category_code != audio_status.category_code) {
132 rdev->audio.pin[0] = audio_status;
Rafał Miłecki3299de92012-05-14 21:25:57 +0200133 changed = true;
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200134 }
135
136 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
Rafał Miłeckicfcbd6d2012-05-14 16:52:30 +0200137 if (!radeon_dig_encoder(encoder))
138 continue;
Rafał Miłecki3299de92012-05-14 21:25:57 +0200139 if (changed || r600_hdmi_buffer_status_changed(encoder))
Christian Koenigf2594932010-04-10 03:13:16 +0200140 r600_hdmi_update_audio_settings(encoder);
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200141 }
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200142}
143
Alex Deucherb5306022013-07-31 16:51:33 -0400144/* enable the audio stream */
145static void r600_audio_enable(struct radeon_device *rdev,
146 struct r600_audio_pin *pin,
147 bool enable)
Rafał Miłecki5230aea2010-02-11 22:58:52 +0100148{
Rafał Miłecki69d2ae52011-12-07 23:32:24 +0100149 u32 value = 0;
Alex Deucherb5306022013-07-31 16:51:33 -0400150
Rafał Miłecki69d2ae52011-12-07 23:32:24 +0100151 if (ASIC_IS_DCE4(rdev)) {
152 if (enable) {
153 value |= 0x81000000; /* Required to enable audio */
154 value |= 0x0e1000f0; /* fglrx sets that too */
155 }
156 WREG32(EVERGREEN_AUDIO_ENABLE, value);
157 } else {
158 WREG32_P(R600_AUDIO_ENABLE,
159 enable ? 0x81000000 : 0x0, ~0x81000000);
160 }
Alex Deucherb5306022013-07-31 16:51:33 -0400161 DRM_INFO("%s audio %d support\n", enable ? "Enabling" : "Disabling", pin->id);
Rafał Miłecki5230aea2010-02-11 22:58:52 +0100162}
163
164/*
Alex Deucherf122c612012-03-30 08:59:57 -0400165 * initialize the audio vars
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200166 */
167int r600_audio_init(struct radeon_device *rdev)
168{
Rafał Miłeckic8792d52010-02-26 08:46:33 +0000169 if (!radeon_audio || !r600_audio_chipset_supported(rdev))
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200170 return 0;
171
Alex Deucherb5306022013-07-31 16:51:33 -0400172 rdev->audio.enabled = true;
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200173
Alex Deucherb5306022013-07-31 16:51:33 -0400174 rdev->audio.num_pins = 1;
175 rdev->audio.pin[0].channels = -1;
176 rdev->audio.pin[0].rate = -1;
177 rdev->audio.pin[0].bits_per_sample = -1;
178 rdev->audio.pin[0].status_bits = 0;
179 rdev->audio.pin[0].category_code = 0;
180 rdev->audio.pin[0].id = 0;
181
182 r600_audio_enable(rdev, &rdev->audio.pin[0], true);
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200183
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200184 return 0;
185}
186
187/*
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200188 * release the audio timer
189 * TODO: How to do this correctly on SMP systems?
190 */
191void r600_audio_fini(struct radeon_device *rdev)
192{
Alex Deucherb5306022013-07-31 16:51:33 -0400193 if (!rdev->audio.enabled)
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200194 return;
195
Alex Deucherb5306022013-07-31 16:51:33 -0400196 r600_audio_enable(rdev, &rdev->audio.pin[0], false);
197
198 rdev->audio.enabled = false;
199}
200
201struct r600_audio_pin *r600_audio_get_pin(struct radeon_device *rdev)
202{
203 /* only one pin on 6xx-NI */
204 return &rdev->audio.pin[0];
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200205}