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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_MPSPEC_DEF_H
2#define _ASM_X86_MPSPEC_DEF_H
Linus Torvalds1da177e2005-04-16 15:20:36 -07003
4/*
5 * Structure definitions for SMP machines following the
6 * Intel Multiprocessing Specification 1.1 and 1.4.
7 */
8
9/*
10 * This tag identifies where the SMP configuration
Thomas Gleixner64883ab2008-01-30 13:30:35 +010011 * information is.
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 */
Thomas Gleixner64883ab2008-01-30 13:30:35 +010013
Joe Perches8f084032008-03-23 01:02:48 -070014#define SMP_MAGIC_IDENT (('_'<<24) | ('P'<<16) | ('M'<<8) | '_')
Linus Torvalds1da177e2005-04-16 15:20:36 -070015
Thomas Gleixner64883ab2008-01-30 13:30:35 +010016#ifdef CONFIG_X86_32
17# define MAX_MPC_ENTRY 1024
18# define MAX_APICS 256
19#else
Jack Steinerab9c0bb2008-06-16 12:09:10 -050020# if NR_CPUS <= 255
21# define MAX_APICS 255
22# else
23# define MAX_APICS 32768
24# endif
Thomas Gleixner64883ab2008-01-30 13:30:35 +010025#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
Joe Perches8f084032008-03-23 01:02:48 -070027struct intel_mp_floating {
Thomas Gleixner64883ab2008-01-30 13:30:35 +010028 char mpf_signature[4]; /* "_MP_" */
29 unsigned int mpf_physptr; /* Configuration table address */
Linus Torvalds1da177e2005-04-16 15:20:36 -070030 unsigned char mpf_length; /* Our length (paragraphs) */
31 unsigned char mpf_specification;/* Specification version */
32 unsigned char mpf_checksum; /* Checksum (makes sum 0) */
Thomas Gleixner64883ab2008-01-30 13:30:35 +010033 unsigned char mpf_feature1; /* Standard or configuration ? */
Linus Torvalds1da177e2005-04-16 15:20:36 -070034 unsigned char mpf_feature2; /* Bit7 set for IMCR|PIC */
35 unsigned char mpf_feature3; /* Unused (0) */
36 unsigned char mpf_feature4; /* Unused (0) */
37 unsigned char mpf_feature5; /* Unused (0) */
38};
39
Thomas Gleixner64883ab2008-01-30 13:30:35 +010040#define MPC_SIGNATURE "PCMP"
41
Jaswinder Singh Rajputf29521e2009-01-03 15:46:57 +053042struct mpc_table {
Jaswinder Singh Rajput6c65da52009-01-04 22:22:56 +053043 char signature[4];
44 unsigned short length; /* Size of table */
45 char spec; /* 0x01 */
46 char checksum;
47 char oem[8];
48 char productid[12];
49 unsigned int oemptr; /* 0 if not present */
50 unsigned short oemsize; /* 0 if not present */
51 unsigned short oemcount;
52 unsigned int lapic; /* APIC address */
Thomas Gleixner64883ab2008-01-30 13:30:35 +010053 unsigned int reserved;
Linus Torvalds1da177e2005-04-16 15:20:36 -070054};
55
56/* Followed by entries */
57
Thomas Gleixner64883ab2008-01-30 13:30:35 +010058#define MP_PROCESSOR 0
59#define MP_BUS 1
60#define MP_IOAPIC 2
61#define MP_INTSRC 3
62#define MP_LINTSRC 4
63/* Used by IBM NUMA-Q to describe node locality */
64#define MP_TRANSLATION 192
65
66#define CPU_ENABLED 1 /* Processor is available */
67#define CPU_BOOTPROCESSOR 2 /* Processor is the BP */
68
69#define CPU_STEPPING_MASK 0x000F
70#define CPU_MODEL_MASK 0x00F0
71#define CPU_FAMILY_MASK 0x0F00
Linus Torvalds1da177e2005-04-16 15:20:36 -070072
Jaswinder Singh Rajputf4f21b72009-01-03 15:48:52 +053073struct mpc_cpu {
Jaswinder Singh Rajputc4563822009-01-04 21:58:25 +053074 unsigned char type;
75 unsigned char apicid; /* Local APIC number */
76 unsigned char apicver; /* Its versions */
77 unsigned char cpuflag;
78 unsigned int cpufeature;
79 unsigned int featureflag; /* CPUID feature value */
80 unsigned int reserved[2];
Linus Torvalds1da177e2005-04-16 15:20:36 -070081};
82
Jaswinder Singh Rajput00fb8602009-01-03 15:47:32 +053083struct mpc_bus {
Jaswinder Singh Rajputd4c715f2009-01-04 21:59:26 +053084 unsigned char type;
85 unsigned char busid;
86 unsigned char bustype[6];
Linus Torvalds1da177e2005-04-16 15:20:36 -070087};
88
89/* List of Bus Type string values, Intel MP Spec. */
90#define BUSTYPE_EISA "EISA"
91#define BUSTYPE_ISA "ISA"
92#define BUSTYPE_INTERN "INTERN" /* Internal BUS */
93#define BUSTYPE_MCA "MCA"
94#define BUSTYPE_VL "VL" /* Local bus */
95#define BUSTYPE_PCI "PCI"
96#define BUSTYPE_PCMCIA "PCMCIA"
97#define BUSTYPE_CBUS "CBUS"
98#define BUSTYPE_CBUSII "CBUSII"
99#define BUSTYPE_FUTURE "FUTURE"
100#define BUSTYPE_MBI "MBI"
101#define BUSTYPE_MBII "MBII"
102#define BUSTYPE_MPI "MPI"
103#define BUSTYPE_MPSA "MPSA"
104#define BUSTYPE_NUBUS "NUBUS"
105#define BUSTYPE_TC "TC"
106#define BUSTYPE_VME "VME"
107#define BUSTYPE_XPRESS "XPRESS"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700108
Thomas Gleixner64883ab2008-01-30 13:30:35 +0100109#define MPC_APIC_USABLE 0x01
110
Jaswinder Singh Rajput2b85b5f2009-01-03 15:49:57 +0530111struct mpc_ioapic {
Jaswinder Singh Rajput5df82c72009-01-04 21:54:39 +0530112 unsigned char type;
113 unsigned char apicid;
114 unsigned char apicver;
115 unsigned char flags;
116 unsigned int apicaddr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117};
118
Jaswinder Singh Rajput540d4e72009-01-03 15:50:52 +0530119struct mpc_intsrc {
Jaswinder Singh Rajpute253b392009-01-04 21:56:44 +0530120 unsigned char type;
121 unsigned char irqtype;
122 unsigned short irqflag;
123 unsigned char srcbus;
124 unsigned char srcbusirq;
125 unsigned char dstapic;
126 unsigned char dstirq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127};
128
129enum mp_irq_source_types {
130 mp_INT = 0,
131 mp_NMI = 1,
132 mp_SMI = 2,
133 mp_ExtINT = 3
134};
135
136#define MP_IRQDIR_DEFAULT 0
137#define MP_IRQDIR_HIGH 1
138#define MP_IRQDIR_LOW 3
139
Thomas Gleixner64883ab2008-01-30 13:30:35 +0100140#define MP_APIC_ALL 0xFF
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141
Jaswinder Singh Rajput8fb29522009-01-03 15:51:54 +0530142struct mpc_lintsrc {
Jaswinder Singh Rajputb5ced7c2009-01-04 21:55:53 +0530143 unsigned char type;
144 unsigned char irqtype;
145 unsigned short irqflag;
146 unsigned char srcbusid;
147 unsigned char srcbusirq;
148 unsigned char destapic;
149 unsigned char destapiclint;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150};
151
Thomas Gleixner64883ab2008-01-30 13:30:35 +0100152#define MPC_OEM_SIGNATURE "_OEM"
153
Jaswinder Singh Rajputb0e239f2009-01-03 15:52:54 +0530154struct mpc_oemtable {
Jaswinder Singh Rajputa1d02722009-01-04 22:00:46 +0530155 char signature[4];
156 unsigned short length; /* Size of table */
157 char rev; /* 0x01 */
158 char checksum;
159 char mpc[8];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160};
161
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162/*
163 * Default configurations
164 *
165 * 1 2 CPU ISA 82489DX
166 * 2 2 CPU EISA 82489DX neither IRQ 0 timer nor IRQ 13 DMA chaining
167 * 3 2 CPU EISA 82489DX
168 * 4 2 CPU MCA 82489DX
169 * 5 2 CPU ISA+PCI
170 * 6 2 CPU EISA+PCI
171 * 7 2 CPU MCA+PCI
172 */
173
174enum mp_bustype {
175 MP_BUS_ISA = 1,
176 MP_BUS_EISA,
177 MP_BUS_PCI,
178 MP_BUS_MCA,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179};
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700180#endif /* _ASM_X86_MPSPEC_DEF_H */