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Philipp Zabelb7482f52008-05-28 17:58:06 +01001/*
2 * uda1380.c - Philips UDA1380 ALSA SoC audio driver
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
Philipp Zabel1abd9182009-06-15 22:18:23 +02008 * Copyright (c) 2007-2009 Philipp Zabel <philipp.zabel@gmail.com>
Philipp Zabelb7482f52008-05-28 17:58:06 +01009 *
10 * Modified by Richard Purdie <richard@openedhand.com> to fit into SoC
11 * codec model.
12 *
13 * Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
14 * Copyright 2005 Openedhand Ltd.
15 */
16
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/types.h>
Philipp Zabelb7482f52008-05-28 17:58:06 +010020#include <linux/slab.h>
21#include <linux/errno.h>
Philipp Zabel1abd9182009-06-15 22:18:23 +020022#include <linux/gpio.h>
Philipp Zabelb7482f52008-05-28 17:58:06 +010023#include <linux/delay.h>
24#include <linux/i2c.h>
Philipp Zabelef9e5e52009-03-03 16:10:54 +010025#include <linux/workqueue.h>
Philipp Zabelb7482f52008-05-28 17:58:06 +010026#include <sound/core.h>
27#include <sound/control.h>
28#include <sound/initval.h>
Philipp Zabelb7482f52008-05-28 17:58:06 +010029#include <sound/soc.h>
Philipp Zabelb7482f52008-05-28 17:58:06 +010030#include <sound/tlv.h>
Philipp Zabel1abd9182009-06-15 22:18:23 +020031#include <sound/uda1380.h>
Philipp Zabelb7482f52008-05-28 17:58:06 +010032
33#include "uda1380.h"
34
Philipp Zabel1abd9182009-06-15 22:18:23 +020035/* codec private data */
36struct uda1380_priv {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000037 struct snd_soc_codec *codec;
Philipp Zabel1abd9182009-06-15 22:18:23 +020038 unsigned int dac_clk;
39 struct work_struct work;
Vasily Khoruzhick8614d312010-08-30 11:28:07 +030040 void *control_data;
Philipp Zabel1abd9182009-06-15 22:18:23 +020041};
42
Philipp Zabelb7482f52008-05-28 17:58:06 +010043/*
44 * uda1380 register cache
45 */
46static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = {
47 0x0502, 0x0000, 0x0000, 0x3f3f,
48 0x0202, 0x0000, 0x0000, 0x0000,
49 0x0000, 0x0000, 0x0000, 0x0000,
50 0x0000, 0x0000, 0x0000, 0x0000,
51 0x0000, 0xff00, 0x0000, 0x4800,
52 0x0000, 0x0000, 0x0000, 0x0000,
53 0x0000, 0x0000, 0x0000, 0x0000,
54 0x0000, 0x0000, 0x0000, 0x0000,
55 0x0000, 0x8000, 0x0002, 0x0000,
56};
57
Philipp Zabelef9e5e52009-03-03 16:10:54 +010058static unsigned long uda1380_cache_dirty;
59
Philipp Zabelb7482f52008-05-28 17:58:06 +010060/*
61 * read uda1380 register cache
62 */
63static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec,
64 unsigned int reg)
65{
66 u16 *cache = codec->reg_cache;
67 if (reg == UDA1380_RESET)
68 return 0;
69 if (reg >= UDA1380_CACHEREGNUM)
70 return -1;
71 return cache[reg];
72}
73
74/*
75 * write uda1380 register cache
76 */
77static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec,
78 u16 reg, unsigned int value)
79{
80 u16 *cache = codec->reg_cache;
Philipp Zabelef9e5e52009-03-03 16:10:54 +010081
Philipp Zabelb7482f52008-05-28 17:58:06 +010082 if (reg >= UDA1380_CACHEREGNUM)
83 return;
Philipp Zabelef9e5e52009-03-03 16:10:54 +010084 if ((reg >= 0x10) && (cache[reg] != value))
85 set_bit(reg - 0x10, &uda1380_cache_dirty);
Philipp Zabelb7482f52008-05-28 17:58:06 +010086 cache[reg] = value;
87}
88
89/*
90 * write to the UDA1380 register space
91 */
92static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg,
93 unsigned int value)
94{
95 u8 data[3];
96
97 /* data is
98 * data[0] is register offset
99 * data[1] is MS byte
100 * data[2] is LS byte
101 */
102 data[0] = reg;
103 data[1] = (value & 0xff00) >> 8;
104 data[2] = value & 0x00ff;
105
106 uda1380_write_reg_cache(codec, reg, value);
107
108 /* the interpolator & decimator regs must only be written when the
109 * codec DAI is active.
110 */
111 if (!codec->active && (reg >= UDA1380_MVOL))
112 return 0;
113 pr_debug("uda1380: hw write %x val %x\n", reg, value);
114 if (codec->hw_write(codec->control_data, data, 3) == 3) {
115 unsigned int val;
116 i2c_master_send(codec->control_data, data, 1);
117 i2c_master_recv(codec->control_data, data, 2);
118 val = (data[0]<<8) | data[1];
119 if (val != value) {
120 pr_debug("uda1380: READ BACK VAL %x\n",
121 (data[0]<<8) | data[1]);
122 return -EIO;
123 }
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100124 if (reg >= 0x10)
125 clear_bit(reg - 0x10, &uda1380_cache_dirty);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100126 return 0;
127 } else
128 return -EIO;
129}
130
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300131static void uda1380_sync_cache(struct snd_soc_codec *codec)
132{
133 int reg;
134 u8 data[3];
135 u16 *cache = codec->reg_cache;
136
137 /* Sync reg_cache with the hardware */
138 for (reg = 0; reg < UDA1380_MVOL; reg++) {
139 data[0] = reg;
140 data[1] = (cache[reg] & 0xff00) >> 8;
141 data[2] = cache[reg] & 0x00ff;
142 if (codec->hw_write(codec->control_data, data, 3) != 3)
143 dev_err(codec->dev, "%s: write to reg 0x%x failed\n",
144 __func__, reg);
145 }
146}
147
148static int uda1380_reset(struct snd_soc_codec *codec)
149{
150 struct uda1380_platform_data *pdata = codec->dev->platform_data;
151
152 if (gpio_is_valid(pdata->gpio_reset)) {
153 gpio_set_value(pdata->gpio_reset, 1);
154 mdelay(1);
155 gpio_set_value(pdata->gpio_reset, 0);
156 } else {
157 u8 data[3];
158
159 data[0] = UDA1380_RESET;
160 data[1] = 0;
161 data[2] = 0;
162
163 if (codec->hw_write(codec->control_data, data, 3) != 3) {
164 dev_err(codec->dev, "%s: failed\n", __func__);
165 return -EIO;
166 }
167 }
168
169 return 0;
170}
Philipp Zabelb7482f52008-05-28 17:58:06 +0100171
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100172static void uda1380_flush_work(struct work_struct *work)
173{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000174 struct uda1380_priv *uda1380 = container_of(work, struct uda1380_priv, work);
175 struct snd_soc_codec *uda1380_codec = uda1380->codec;
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100176 int bit, reg;
177
Akinobu Mita984b3f52010-03-05 13:41:37 -0800178 for_each_set_bit(bit, &uda1380_cache_dirty, UDA1380_CACHEREGNUM - 0x10) {
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100179 reg = 0x10 + bit;
180 pr_debug("uda1380: flush reg %x val %x:\n", reg,
181 uda1380_read_reg_cache(uda1380_codec, reg));
182 uda1380_write(uda1380_codec, reg,
183 uda1380_read_reg_cache(uda1380_codec, reg));
184 clear_bit(bit, &uda1380_cache_dirty);
185 }
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000186
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100187}
188
Philipp Zabelb7482f52008-05-28 17:58:06 +0100189/* declarations of ALSA reg_elem_REAL controls */
190static const char *uda1380_deemp[] = {
191 "None",
192 "32kHz",
193 "44.1kHz",
194 "48kHz",
195 "96kHz",
196};
197static const char *uda1380_input_sel[] = {
198 "Line",
199 "Mic + Line R",
200 "Line L",
201 "Mic",
202};
203static const char *uda1380_output_sel[] = {
204 "DAC",
205 "Analog Mixer",
206};
207static const char *uda1380_spf_mode[] = {
208 "Flat",
209 "Minimum1",
210 "Minimum2",
211 "Maximum"
212};
213static const char *uda1380_capture_sel[] = {
214 "ADC",
215 "Digital Mixer"
216};
217static const char *uda1380_sel_ns[] = {
218 "3rd-order",
219 "5th-order"
220};
221static const char *uda1380_mix_control[] = {
222 "off",
223 "PCM only",
224 "before sound processing",
225 "after sound processing"
226};
227static const char *uda1380_sdet_setting[] = {
228 "3200",
229 "4800",
230 "9600",
231 "19200"
232};
233static const char *uda1380_os_setting[] = {
234 "single-speed",
235 "double-speed (no mixing)",
236 "quad-speed (no mixing)"
237};
238
239static const struct soc_enum uda1380_deemp_enum[] = {
240 SOC_ENUM_SINGLE(UDA1380_DEEMP, 8, 5, uda1380_deemp),
241 SOC_ENUM_SINGLE(UDA1380_DEEMP, 0, 5, uda1380_deemp),
242};
243static const struct soc_enum uda1380_input_sel_enum =
244 SOC_ENUM_SINGLE(UDA1380_ADC, 2, 4, uda1380_input_sel); /* SEL_MIC, SEL_LNA */
245static const struct soc_enum uda1380_output_sel_enum =
246 SOC_ENUM_SINGLE(UDA1380_PM, 7, 2, uda1380_output_sel); /* R02_EN_AVC */
247static const struct soc_enum uda1380_spf_enum =
248 SOC_ENUM_SINGLE(UDA1380_MODE, 14, 4, uda1380_spf_mode); /* M */
249static const struct soc_enum uda1380_capture_sel_enum =
250 SOC_ENUM_SINGLE(UDA1380_IFACE, 6, 2, uda1380_capture_sel); /* SEL_SOURCE */
251static const struct soc_enum uda1380_sel_ns_enum =
252 SOC_ENUM_SINGLE(UDA1380_MIXER, 14, 2, uda1380_sel_ns); /* SEL_NS */
253static const struct soc_enum uda1380_mix_enum =
254 SOC_ENUM_SINGLE(UDA1380_MIXER, 12, 4, uda1380_mix_control); /* MIX, MIX_POS */
255static const struct soc_enum uda1380_sdet_enum =
256 SOC_ENUM_SINGLE(UDA1380_MIXER, 4, 4, uda1380_sdet_setting); /* SD_VALUE */
257static const struct soc_enum uda1380_os_enum =
258 SOC_ENUM_SINGLE(UDA1380_MIXER, 0, 3, uda1380_os_setting); /* OS */
259
260/*
261 * from -48 dB in 1.5 dB steps (mute instead of -49.5 dB)
262 */
263static DECLARE_TLV_DB_SCALE(amix_tlv, -4950, 150, 1);
264
265/*
266 * from -78 dB in 1 dB steps (3 dB steps, really. LSB are ignored),
267 * from -66 dB in 0.5 dB steps (2 dB steps, really) and
268 * from -52 dB in 0.25 dB steps
269 */
270static const unsigned int mvol_tlv[] = {
271 TLV_DB_RANGE_HEAD(3),
272 0, 15, TLV_DB_SCALE_ITEM(-8200, 100, 1),
273 16, 43, TLV_DB_SCALE_ITEM(-6600, 50, 0),
274 44, 252, TLV_DB_SCALE_ITEM(-5200, 25, 0),
275};
276
277/*
278 * from -72 dB in 1.5 dB steps (6 dB steps really),
279 * from -66 dB in 0.75 dB steps (3 dB steps really),
280 * from -60 dB in 0.5 dB steps (2 dB steps really) and
281 * from -46 dB in 0.25 dB steps
282 */
283static const unsigned int vc_tlv[] = {
284 TLV_DB_RANGE_HEAD(4),
285 0, 7, TLV_DB_SCALE_ITEM(-7800, 150, 1),
286 8, 15, TLV_DB_SCALE_ITEM(-6600, 75, 0),
287 16, 43, TLV_DB_SCALE_ITEM(-6000, 50, 0),
288 44, 228, TLV_DB_SCALE_ITEM(-4600, 25, 0),
289};
290
291/* from 0 to 6 dB in 2 dB steps if SPF mode != flat */
292static DECLARE_TLV_DB_SCALE(tr_tlv, 0, 200, 0);
293
294/* from 0 to 24 dB in 2 dB steps, if SPF mode == maximum, otherwise cuts
295 * off at 18 dB max) */
296static DECLARE_TLV_DB_SCALE(bb_tlv, 0, 200, 0);
297
298/* from -63 to 24 dB in 0.5 dB steps (-128...48) */
299static DECLARE_TLV_DB_SCALE(dec_tlv, -6400, 50, 1);
300
301/* from 0 to 24 dB in 3 dB steps */
302static DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
303
304/* from 0 to 30 dB in 2 dB steps */
305static DECLARE_TLV_DB_SCALE(vga_tlv, 0, 200, 0);
306
307static const struct snd_kcontrol_new uda1380_snd_controls[] = {
308 SOC_DOUBLE_TLV("Analog Mixer Volume", UDA1380_AMIX, 0, 8, 44, 1, amix_tlv), /* AVCR, AVCL */
309 SOC_DOUBLE_TLV("Master Playback Volume", UDA1380_MVOL, 0, 8, 252, 1, mvol_tlv), /* MVCL, MVCR */
310 SOC_SINGLE_TLV("ADC Playback Volume", UDA1380_MIXVOL, 8, 228, 1, vc_tlv), /* VC2 */
311 SOC_SINGLE_TLV("PCM Playback Volume", UDA1380_MIXVOL, 0, 228, 1, vc_tlv), /* VC1 */
312 SOC_ENUM("Sound Processing Filter", uda1380_spf_enum), /* M */
313 SOC_DOUBLE_TLV("Tone Control - Treble", UDA1380_MODE, 4, 12, 3, 0, tr_tlv), /* TRL, TRR */
314 SOC_DOUBLE_TLV("Tone Control - Bass", UDA1380_MODE, 0, 8, 15, 0, bb_tlv), /* BBL, BBR */
315/**/ SOC_SINGLE("Master Playback Switch", UDA1380_DEEMP, 14, 1, 1), /* MTM */
316 SOC_SINGLE("ADC Playback Switch", UDA1380_DEEMP, 11, 1, 1), /* MT2 from decimation filter */
317 SOC_ENUM("ADC Playback De-emphasis", uda1380_deemp_enum[0]), /* DE2 */
318 SOC_SINGLE("PCM Playback Switch", UDA1380_DEEMP, 3, 1, 1), /* MT1, from digital data input */
319 SOC_ENUM("PCM Playback De-emphasis", uda1380_deemp_enum[1]), /* DE1 */
320 SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0), /* DA_POL_INV */
321 SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum), /* SEL_NS */
322 SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum), /* MIX_POS, MIX */
Philipp Zabelb7482f52008-05-28 17:58:06 +0100323 SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0), /* SDET_ON */
324 SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum), /* SD_VALUE */
325 SOC_ENUM("Oversampling Input", uda1380_os_enum), /* OS */
326 SOC_DOUBLE_S8_TLV("ADC Capture Volume", UDA1380_DEC, -128, 48, dec_tlv), /* ML_DEC, MR_DEC */
327/**/ SOC_SINGLE("ADC Capture Switch", UDA1380_PGA, 15, 1, 1), /* MT_ADC */
328 SOC_DOUBLE_TLV("Line Capture Volume", UDA1380_PGA, 0, 8, 8, 0, pga_tlv), /* PGA_GAINCTRLL, PGA_GAINCTRLR */
329 SOC_SINGLE("ADC Polarity inverting Switch", UDA1380_ADC, 12, 1, 0), /* ADCPOL_INV */
330 SOC_SINGLE_TLV("Mic Capture Volume", UDA1380_ADC, 8, 15, 0, vga_tlv), /* VGA_CTRL */
331 SOC_SINGLE("DC Filter Bypass Switch", UDA1380_ADC, 1, 1, 0), /* SKIP_DCFIL (before decimator) */
332 SOC_SINGLE("DC Filter Enable Switch", UDA1380_ADC, 0, 1, 0), /* EN_DCFIL (at output of decimator) */
333 SOC_SINGLE("AGC Timing", UDA1380_AGC, 8, 7, 0), /* TODO: enum, see table 62 */
334 SOC_SINGLE("AGC Target level", UDA1380_AGC, 2, 3, 1), /* AGC_LEVEL */
335 /* -5.5, -8, -11.5, -14 dBFS */
336 SOC_SINGLE("AGC Switch", UDA1380_AGC, 0, 1, 0),
337};
338
Philipp Zabelb7482f52008-05-28 17:58:06 +0100339/* Input mux */
340static const struct snd_kcontrol_new uda1380_input_mux_control =
341 SOC_DAPM_ENUM("Route", uda1380_input_sel_enum);
342
343/* Output mux */
344static const struct snd_kcontrol_new uda1380_output_mux_control =
345 SOC_DAPM_ENUM("Route", uda1380_output_sel_enum);
346
347/* Capture mux */
348static const struct snd_kcontrol_new uda1380_capture_mux_control =
349 SOC_DAPM_ENUM("Route", uda1380_capture_sel_enum);
350
351
352static const struct snd_soc_dapm_widget uda1380_dapm_widgets[] = {
353 SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
354 &uda1380_input_mux_control),
355 SND_SOC_DAPM_MUX("Output Mux", SND_SOC_NOPM, 0, 0,
356 &uda1380_output_mux_control),
357 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
358 &uda1380_capture_mux_control),
359 SND_SOC_DAPM_PGA("Left PGA", UDA1380_PM, 3, 0, NULL, 0),
360 SND_SOC_DAPM_PGA("Right PGA", UDA1380_PM, 1, 0, NULL, 0),
361 SND_SOC_DAPM_PGA("Mic LNA", UDA1380_PM, 4, 0, NULL, 0),
362 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", UDA1380_PM, 2, 0),
363 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", UDA1380_PM, 0, 0),
364 SND_SOC_DAPM_INPUT("VINM"),
365 SND_SOC_DAPM_INPUT("VINL"),
366 SND_SOC_DAPM_INPUT("VINR"),
367 SND_SOC_DAPM_MIXER("Analog Mixer", UDA1380_PM, 6, 0, NULL, 0),
368 SND_SOC_DAPM_OUTPUT("VOUTLHP"),
369 SND_SOC_DAPM_OUTPUT("VOUTRHP"),
370 SND_SOC_DAPM_OUTPUT("VOUTL"),
371 SND_SOC_DAPM_OUTPUT("VOUTR"),
372 SND_SOC_DAPM_DAC("DAC", "Playback", UDA1380_PM, 10, 0),
373 SND_SOC_DAPM_PGA("HeadPhone Driver", UDA1380_PM, 13, 0, NULL, 0),
374};
375
Axel Lin58fa8e42011-12-19 13:54:38 +0800376static const struct snd_soc_dapm_route uda1380_dapm_routes[] = {
Philipp Zabelb7482f52008-05-28 17:58:06 +0100377
378 /* output mux */
379 {"HeadPhone Driver", NULL, "Output Mux"},
380 {"VOUTR", NULL, "Output Mux"},
381 {"VOUTL", NULL, "Output Mux"},
382
383 {"Analog Mixer", NULL, "VINR"},
384 {"Analog Mixer", NULL, "VINL"},
385 {"Analog Mixer", NULL, "DAC"},
386
387 {"Output Mux", "DAC", "DAC"},
388 {"Output Mux", "Analog Mixer", "Analog Mixer"},
389
390 /* {"DAC", "Digital Mixer", "I2S" } */
391
392 /* headphone driver */
393 {"VOUTLHP", NULL, "HeadPhone Driver"},
394 {"VOUTRHP", NULL, "HeadPhone Driver"},
395
396 /* input mux */
397 {"Left ADC", NULL, "Input Mux"},
398 {"Input Mux", "Mic", "Mic LNA"},
399 {"Input Mux", "Mic + Line R", "Mic LNA"},
400 {"Input Mux", "Line L", "Left PGA"},
401 {"Input Mux", "Line", "Left PGA"},
402
403 /* right input */
404 {"Right ADC", "Mic + Line R", "Right PGA"},
405 {"Right ADC", "Line", "Right PGA"},
406
407 /* inputs */
408 {"Mic LNA", NULL, "VINM"},
409 {"Left PGA", NULL, "VINL"},
410 {"Right PGA", NULL, "VINR"},
411};
412
Philipp Zabel5b247442009-02-03 17:19:40 +0100413static int uda1380_set_dai_fmt_both(struct snd_soc_dai *codec_dai,
Philipp Zabelb7482f52008-05-28 17:58:06 +0100414 unsigned int fmt)
415{
416 struct snd_soc_codec *codec = codec_dai->codec;
417 int iface;
418
419 /* set up DAI based upon fmt */
420 iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
421 iface &= ~(R01_SFORI_MASK | R01_SIM | R01_SFORO_MASK);
422
Philipp Zabelb7482f52008-05-28 17:58:06 +0100423 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
424 case SND_SOC_DAIFMT_I2S:
425 iface |= R01_SFORI_I2S | R01_SFORO_I2S;
426 break;
427 case SND_SOC_DAIFMT_LSB:
Philipp Zabel5b247442009-02-03 17:19:40 +0100428 iface |= R01_SFORI_LSB16 | R01_SFORO_LSB16;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100429 break;
430 case SND_SOC_DAIFMT_MSB:
Philipp Zabel5b247442009-02-03 17:19:40 +0100431 iface |= R01_SFORI_MSB | R01_SFORO_MSB;
432 }
433
Philipp Zabel5f2a9382009-03-03 16:10:52 +0100434 /* DATAI is slave only, so in single-link mode, this has to be slave */
435 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
436 return -EINVAL;
Philipp Zabel5b247442009-02-03 17:19:40 +0100437
438 uda1380_write(codec, UDA1380_IFACE, iface);
439
440 return 0;
441}
442
443static int uda1380_set_dai_fmt_playback(struct snd_soc_dai *codec_dai,
444 unsigned int fmt)
445{
446 struct snd_soc_codec *codec = codec_dai->codec;
447 int iface;
448
449 /* set up DAI based upon fmt */
450 iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
451 iface &= ~R01_SFORI_MASK;
452
453 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
454 case SND_SOC_DAIFMT_I2S:
455 iface |= R01_SFORI_I2S;
456 break;
457 case SND_SOC_DAIFMT_LSB:
458 iface |= R01_SFORI_LSB16;
459 break;
460 case SND_SOC_DAIFMT_MSB:
461 iface |= R01_SFORI_MSB;
462 }
463
Philipp Zabel5f2a9382009-03-03 16:10:52 +0100464 /* DATAI is slave only, so this has to be slave */
465 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
466 return -EINVAL;
467
Philipp Zabel5b247442009-02-03 17:19:40 +0100468 uda1380_write(codec, UDA1380_IFACE, iface);
469
470 return 0;
471}
472
473static int uda1380_set_dai_fmt_capture(struct snd_soc_dai *codec_dai,
474 unsigned int fmt)
475{
476 struct snd_soc_codec *codec = codec_dai->codec;
477 int iface;
478
479 /* set up DAI based upon fmt */
480 iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
481 iface &= ~(R01_SIM | R01_SFORO_MASK);
482
483 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
484 case SND_SOC_DAIFMT_I2S:
485 iface |= R01_SFORO_I2S;
486 break;
487 case SND_SOC_DAIFMT_LSB:
488 iface |= R01_SFORO_LSB16;
489 break;
490 case SND_SOC_DAIFMT_MSB:
491 iface |= R01_SFORO_MSB;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100492 }
493
494 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
495 iface |= R01_SIM;
496
497 uda1380_write(codec, UDA1380_IFACE, iface);
498
499 return 0;
500}
501
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100502static int uda1380_trigger(struct snd_pcm_substream *substream, int cmd,
503 struct snd_soc_dai *dai)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100504{
505 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000506 struct snd_soc_codec *codec = rtd->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900507 struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100508 int mixer = uda1380_read_reg_cache(codec, UDA1380_MIXER);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100509
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100510 switch (cmd) {
511 case SNDRV_PCM_TRIGGER_START:
512 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
513 uda1380_write_reg_cache(codec, UDA1380_MIXER,
514 mixer & ~R14_SILENCE);
Philipp Zabel1abd9182009-06-15 22:18:23 +0200515 schedule_work(&uda1380->work);
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100516 break;
517 case SNDRV_PCM_TRIGGER_STOP:
518 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
519 uda1380_write_reg_cache(codec, UDA1380_MIXER,
520 mixer | R14_SILENCE);
Philipp Zabel1abd9182009-06-15 22:18:23 +0200521 schedule_work(&uda1380->work);
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100522 break;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100523 }
Philipp Zabelb7482f52008-05-28 17:58:06 +0100524 return 0;
525}
526
527static int uda1380_pcm_hw_params(struct snd_pcm_substream *substream,
Mark Browndee89c42008-11-18 22:11:38 +0000528 struct snd_pcm_hw_params *params,
529 struct snd_soc_dai *dai)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100530{
531 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000532 struct snd_soc_codec *codec = rtd->codec;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100533 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
534
535 /* set WSPLL power and divider if running from this clock */
536 if (clk & R00_DAC_CLK) {
537 int rate = params_rate(params);
538 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
539 clk &= ~0x3; /* clear SEL_LOOP_DIV */
540 switch (rate) {
541 case 6250 ... 12500:
542 clk |= 0x0;
543 break;
544 case 12501 ... 25000:
545 clk |= 0x1;
546 break;
547 case 25001 ... 50000:
548 clk |= 0x2;
549 break;
550 case 50001 ... 100000:
551 clk |= 0x3;
552 break;
553 }
554 uda1380_write(codec, UDA1380_PM, R02_PON_PLL | pm);
555 }
556
557 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
558 clk |= R00_EN_DAC | R00_EN_INT;
559 else
560 clk |= R00_EN_ADC | R00_EN_DEC;
561
562 uda1380_write(codec, UDA1380_CLK, clk);
563 return 0;
564}
565
Mark Browndee89c42008-11-18 22:11:38 +0000566static void uda1380_pcm_shutdown(struct snd_pcm_substream *substream,
567 struct snd_soc_dai *dai)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100568{
569 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000570 struct snd_soc_codec *codec = rtd->codec;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100571 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
572
573 /* shut down WSPLL power if running from this clock */
574 if (clk & R00_DAC_CLK) {
575 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
576 uda1380_write(codec, UDA1380_PM, ~R02_PON_PLL & pm);
577 }
578
579 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
580 clk &= ~(R00_EN_DAC | R00_EN_INT);
581 else
582 clk &= ~(R00_EN_ADC | R00_EN_DEC);
583
584 uda1380_write(codec, UDA1380_CLK, clk);
585}
586
Philipp Zabelb7482f52008-05-28 17:58:06 +0100587static int uda1380_set_bias_level(struct snd_soc_codec *codec,
588 enum snd_soc_bias_level level)
589{
590 int pm = uda1380_read_reg_cache(codec, UDA1380_PM);
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300591 int reg;
592 struct uda1380_platform_data *pdata = codec->dev->platform_data;
593
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200594 if (codec->dapm.bias_level == level)
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300595 return 0;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100596
597 switch (level) {
598 case SND_SOC_BIAS_ON:
599 case SND_SOC_BIAS_PREPARE:
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300600 /* ADC, DAC on */
Philipp Zabelb7482f52008-05-28 17:58:06 +0100601 uda1380_write(codec, UDA1380_PM, R02_PON_BIAS | pm);
602 break;
603 case SND_SOC_BIAS_STANDBY:
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200604 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300605 if (gpio_is_valid(pdata->gpio_power)) {
606 gpio_set_value(pdata->gpio_power, 1);
Vasily Khoruzhick8e3dce42010-09-07 17:04:17 +0300607 mdelay(1);
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300608 uda1380_reset(codec);
609 }
610
611 uda1380_sync_cache(codec);
612 }
Philipp Zabelb7482f52008-05-28 17:58:06 +0100613 uda1380_write(codec, UDA1380_PM, 0x0);
614 break;
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300615 case SND_SOC_BIAS_OFF:
616 if (!gpio_is_valid(pdata->gpio_power))
617 break;
618
619 gpio_set_value(pdata->gpio_power, 0);
620
621 /* Mark mixer regs cache dirty to sync them with
622 * codec regs on power on.
623 */
624 for (reg = UDA1380_MVOL; reg < UDA1380_CACHEREGNUM; reg++)
625 set_bit(reg - 0x10, &uda1380_cache_dirty);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100626 }
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200627 codec->dapm.bias_level = level;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100628 return 0;
629}
630
631#define UDA1380_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
632 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
633 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
634
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100635static const struct snd_soc_dai_ops uda1380_dai_ops = {
Eric Miao6335d052009-03-03 09:41:00 +0800636 .hw_params = uda1380_pcm_hw_params,
637 .shutdown = uda1380_pcm_shutdown,
Mark Brown65ec1cd2009-03-11 16:51:31 +0000638 .trigger = uda1380_trigger,
Eric Miao6335d052009-03-03 09:41:00 +0800639 .set_fmt = uda1380_set_dai_fmt_both,
640};
641
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100642static const struct snd_soc_dai_ops uda1380_dai_ops_playback = {
Eric Miao6335d052009-03-03 09:41:00 +0800643 .hw_params = uda1380_pcm_hw_params,
644 .shutdown = uda1380_pcm_shutdown,
Mark Brown65ec1cd2009-03-11 16:51:31 +0000645 .trigger = uda1380_trigger,
Eric Miao6335d052009-03-03 09:41:00 +0800646 .set_fmt = uda1380_set_dai_fmt_playback,
647};
648
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100649static const struct snd_soc_dai_ops uda1380_dai_ops_capture = {
Eric Miao6335d052009-03-03 09:41:00 +0800650 .hw_params = uda1380_pcm_hw_params,
651 .shutdown = uda1380_pcm_shutdown,
Mark Brown65ec1cd2009-03-11 16:51:31 +0000652 .trigger = uda1380_trigger,
Eric Miao6335d052009-03-03 09:41:00 +0800653 .set_fmt = uda1380_set_dai_fmt_capture,
654};
655
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000656static struct snd_soc_dai_driver uda1380_dai[] = {
Philipp Zabelb7482f52008-05-28 17:58:06 +0100657{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000658 .name = "uda1380-hifi",
Philipp Zabelb7482f52008-05-28 17:58:06 +0100659 .playback = {
660 .stream_name = "Playback",
661 .channels_min = 1,
662 .channels_max = 2,
663 .rates = UDA1380_RATES,
664 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
665 .capture = {
666 .stream_name = "Capture",
667 .channels_min = 1,
668 .channels_max = 2,
669 .rates = UDA1380_RATES,
670 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
Eric Miao6335d052009-03-03 09:41:00 +0800671 .ops = &uda1380_dai_ops,
Philipp Zabelb7482f52008-05-28 17:58:06 +0100672},
673{ /* playback only - dual interface */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000674 .name = "uda1380-hifi-playback",
Philipp Zabelb7482f52008-05-28 17:58:06 +0100675 .playback = {
676 .stream_name = "Playback",
677 .channels_min = 1,
678 .channels_max = 2,
679 .rates = UDA1380_RATES,
680 .formats = SNDRV_PCM_FMTBIT_S16_LE,
681 },
Eric Miao6335d052009-03-03 09:41:00 +0800682 .ops = &uda1380_dai_ops_playback,
Philipp Zabelb7482f52008-05-28 17:58:06 +0100683},
684{ /* capture only - dual interface*/
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000685 .name = "uda1380-hifi-capture",
Philipp Zabelb7482f52008-05-28 17:58:06 +0100686 .capture = {
687 .stream_name = "Capture",
688 .channels_min = 1,
689 .channels_max = 2,
690 .rates = UDA1380_RATES,
691 .formats = SNDRV_PCM_FMTBIT_S16_LE,
692 },
Eric Miao6335d052009-03-03 09:41:00 +0800693 .ops = &uda1380_dai_ops_capture,
Philipp Zabelb7482f52008-05-28 17:58:06 +0100694},
695};
Philipp Zabelb7482f52008-05-28 17:58:06 +0100696
Lars-Peter Clausen84b315e2011-12-02 10:18:28 +0100697static int uda1380_suspend(struct snd_soc_codec *codec)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100698{
Philipp Zabelb7482f52008-05-28 17:58:06 +0100699 uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
700 return 0;
701}
702
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000703static int uda1380_resume(struct snd_soc_codec *codec)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100704{
Philipp Zabelb7482f52008-05-28 17:58:06 +0100705 uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100706 return 0;
707}
708
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000709static int uda1380_probe(struct snd_soc_codec *codec)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100710{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000711 struct uda1380_platform_data *pdata =codec->dev->platform_data;
712 struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
713 int ret;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100714
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300715 uda1380->codec = codec;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100716
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300717 codec->hw_write = (hw_write_t)i2c_master_send;
718 codec->control_data = uda1380->control_data;
719
720 if (!pdata)
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000721 return -EINVAL;
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100722
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300723 if (gpio_is_valid(pdata->gpio_reset)) {
Axel Lin68020db2011-12-05 07:58:25 +0800724 ret = gpio_request_one(pdata->gpio_reset, GPIOF_OUT_INIT_LOW,
725 "uda1380 reset");
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300726 if (ret)
727 goto err_out;
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300728 }
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000729
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300730 if (gpio_is_valid(pdata->gpio_power)) {
Axel Lin68020db2011-12-05 07:58:25 +0800731 ret = gpio_request_one(pdata->gpio_power, GPIOF_OUT_INIT_LOW,
732 "uda1380 power");
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300733 if (ret)
Axel Lin68020db2011-12-05 07:58:25 +0800734 goto err_free_gpio;
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300735 } else {
736 ret = uda1380_reset(codec);
Axel Lin68020db2011-12-05 07:58:25 +0800737 if (ret)
738 goto err_free_gpio;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100739 }
740
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000741 INIT_WORK(&uda1380->work, uda1380_flush_work);
742
Philipp Zabelb7482f52008-05-28 17:58:06 +0100743 /* power on device */
744 uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
745 /* set clock input */
Philipp Zabel1abd9182009-06-15 22:18:23 +0200746 switch (pdata->dac_clk) {
Philipp Zabelb7482f52008-05-28 17:58:06 +0100747 case UDA1380_DAC_CLK_SYSCLK:
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300748 uda1380_write_reg_cache(codec, UDA1380_CLK, 0);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100749 break;
750 case UDA1380_DAC_CLK_WSPLL:
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300751 uda1380_write_reg_cache(codec, UDA1380_CLK,
752 R00_DAC_CLK);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100753 break;
754 }
755
Philipp Zabel1abd9182009-06-15 22:18:23 +0200756 return 0;
757
Axel Lin68020db2011-12-05 07:58:25 +0800758err_free_gpio:
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300759 if (gpio_is_valid(pdata->gpio_reset))
760 gpio_free(pdata->gpio_reset);
761err_out:
Philipp Zabel1abd9182009-06-15 22:18:23 +0200762 return ret;
763}
764
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000765/* power down chip */
766static int uda1380_remove(struct snd_soc_codec *codec)
Philipp Zabel1abd9182009-06-15 22:18:23 +0200767{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000768 struct uda1380_platform_data *pdata =codec->dev->platform_data;
Philipp Zabel1abd9182009-06-15 22:18:23 +0200769
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000770 uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
Philipp Zabel1abd9182009-06-15 22:18:23 +0200771
Philipp Zabel1abd9182009-06-15 22:18:23 +0200772 gpio_free(pdata->gpio_reset);
773 gpio_free(pdata->gpio_power);
774
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000775 return 0;
Philipp Zabel1abd9182009-06-15 22:18:23 +0200776}
Philipp Zabelb7482f52008-05-28 17:58:06 +0100777
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000778static struct snd_soc_codec_driver soc_codec_dev_uda1380 = {
779 .probe = uda1380_probe,
780 .remove = uda1380_remove,
781 .suspend = uda1380_suspend,
782 .resume = uda1380_resume,
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300783 .read = uda1380_read_reg_cache,
784 .write = uda1380_write,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000785 .set_bias_level = uda1380_set_bias_level,
786 .reg_cache_size = ARRAY_SIZE(uda1380_reg),
787 .reg_word_size = sizeof(u16),
788 .reg_cache_default = uda1380_reg,
789 .reg_cache_step = 1,
Axel Lin58fa8e42011-12-19 13:54:38 +0800790
791 .controls = uda1380_snd_controls,
792 .num_controls = ARRAY_SIZE(uda1380_snd_controls),
793 .dapm_widgets = uda1380_dapm_widgets,
794 .num_dapm_widgets = ARRAY_SIZE(uda1380_dapm_widgets),
795 .dapm_routes = uda1380_dapm_routes,
796 .num_dapm_routes = ARRAY_SIZE(uda1380_dapm_routes),
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000797};
798
Philipp Zabelb7482f52008-05-28 17:58:06 +0100799#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
Philipp Zabel1abd9182009-06-15 22:18:23 +0200800static __devinit int uda1380_i2c_probe(struct i2c_client *i2c,
801 const struct i2c_device_id *id)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100802{
Philipp Zabel1abd9182009-06-15 22:18:23 +0200803 struct uda1380_priv *uda1380;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100804 int ret;
805
Axel Lin6ce91ad2011-12-26 20:58:14 +0800806 uda1380 = devm_kzalloc(&i2c->dev, sizeof(struct uda1380_priv),
807 GFP_KERNEL);
Philipp Zabel1abd9182009-06-15 22:18:23 +0200808 if (uda1380 == NULL)
809 return -ENOMEM;
810
Philipp Zabel1abd9182009-06-15 22:18:23 +0200811 i2c_set_clientdata(i2c, uda1380);
Vasily Khoruzhick8614d312010-08-30 11:28:07 +0300812 uda1380->control_data = i2c;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100813
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000814 ret = snd_soc_register_codec(&i2c->dev,
815 &soc_codec_dev_uda1380, uda1380_dai, ARRAY_SIZE(uda1380_dai));
Philipp Zabelb7482f52008-05-28 17:58:06 +0100816 return ret;
817}
818
Philipp Zabel1abd9182009-06-15 22:18:23 +0200819static int __devexit uda1380_i2c_remove(struct i2c_client *i2c)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100820{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000821 snd_soc_unregister_codec(&i2c->dev);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100822 return 0;
823}
824
Jean Delvare88fc39d2008-09-01 18:46:58 +0100825static const struct i2c_device_id uda1380_i2c_id[] = {
826 { "uda1380", 0 },
827 { }
828};
829MODULE_DEVICE_TABLE(i2c, uda1380_i2c_id);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100830
831static struct i2c_driver uda1380_i2c_driver = {
832 .driver = {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000833 .name = "uda1380-codec",
Philipp Zabelb7482f52008-05-28 17:58:06 +0100834 .owner = THIS_MODULE,
835 },
Jean Delvare88fc39d2008-09-01 18:46:58 +0100836 .probe = uda1380_i2c_probe,
Philipp Zabel1abd9182009-06-15 22:18:23 +0200837 .remove = __devexit_p(uda1380_i2c_remove),
Jean Delvare88fc39d2008-09-01 18:46:58 +0100838 .id_table = uda1380_i2c_id,
Philipp Zabelb7482f52008-05-28 17:58:06 +0100839};
Philipp Zabelb7482f52008-05-28 17:58:06 +0100840#endif
841
Takashi Iwaic9b3a402008-12-10 07:47:22 +0100842static int __init uda1380_modinit(void)
Mark Brown64089b82008-12-08 19:17:58 +0000843{
Axel Linef149772011-12-04 19:35:20 +0800844 int ret = 0;
Philipp Zabel1abd9182009-06-15 22:18:23 +0200845#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
846 ret = i2c_add_driver(&uda1380_i2c_driver);
847 if (ret != 0)
848 pr_err("Failed to register UDA1380 I2C driver: %d\n", ret);
849#endif
Axel Linef149772011-12-04 19:35:20 +0800850 return ret;
Mark Brown64089b82008-12-08 19:17:58 +0000851}
852module_init(uda1380_modinit);
853
854static void __exit uda1380_exit(void)
855{
Philipp Zabel1abd9182009-06-15 22:18:23 +0200856#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
857 i2c_del_driver(&uda1380_i2c_driver);
858#endif
Mark Brown64089b82008-12-08 19:17:58 +0000859}
860module_exit(uda1380_exit);
861
Philipp Zabelb7482f52008-05-28 17:58:06 +0100862MODULE_AUTHOR("Giorgio Padrin");
863MODULE_DESCRIPTION("Audio support for codec Philips UDA1380");
864MODULE_LICENSE("GPL");