Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 1 | /* |
| 2 | * GPMC support functions |
| 3 | * |
| 4 | * Copyright (C) 2005-2006 Nokia Corporation |
| 5 | * |
| 6 | * Author: Juha Yrjola |
| 7 | * |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 8 | * Copyright (C) 2009 Texas Instruments |
| 9 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> |
| 10 | * |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License version 2 as |
| 13 | * published by the Free Software Foundation. |
| 14 | */ |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 15 | #undef DEBUG |
| 16 | |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 17 | #include <linux/irq.h> |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 18 | #include <linux/kernel.h> |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/err.h> |
| 21 | #include <linux/clk.h> |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 22 | #include <linux/ioport.h> |
| 23 | #include <linux/spinlock.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 24 | #include <linux/io.h> |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 25 | #include <linux/module.h> |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 26 | #include <linux/interrupt.h> |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 27 | #include <linux/platform_device.h> |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 28 | |
Afzal Mohammed | bc3668e | 2012-09-29 12:26:13 +0530 | [diff] [blame] | 29 | #include <linux/platform_data/mtd-nand-omap2.h> |
| 30 | |
Kyungmin Park | 7f24516 | 2006-12-29 16:48:51 -0800 | [diff] [blame] | 31 | #include <asm/mach-types.h> |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 32 | |
Tony Lindgren | dbc0416 | 2012-08-31 10:59:07 -0700 | [diff] [blame] | 33 | #include "soc.h" |
Tony Lindgren | 7d7e1eb | 2012-08-27 17:43:01 -0700 | [diff] [blame] | 34 | #include "common.h" |
Tony Lindgren | 25c7d49 | 2012-10-02 17:25:48 -0700 | [diff] [blame] | 35 | #include "omap_device.h" |
Afzal Mohammed | 3ef5d00 | 2012-10-05 10:37:27 +0530 | [diff] [blame] | 36 | #include "gpmc.h" |
Tony Lindgren | 7d7e1eb | 2012-08-27 17:43:01 -0700 | [diff] [blame] | 37 | |
Afzal Mohammed | 4be48fd | 2012-09-23 17:28:24 -0600 | [diff] [blame] | 38 | #define DEVICE_NAME "omap-gpmc" |
| 39 | |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 40 | /* GPMC register offsets */ |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 41 | #define GPMC_REVISION 0x00 |
| 42 | #define GPMC_SYSCONFIG 0x10 |
| 43 | #define GPMC_SYSSTATUS 0x14 |
| 44 | #define GPMC_IRQSTATUS 0x18 |
| 45 | #define GPMC_IRQENABLE 0x1c |
| 46 | #define GPMC_TIMEOUT_CONTROL 0x40 |
| 47 | #define GPMC_ERR_ADDRESS 0x44 |
| 48 | #define GPMC_ERR_TYPE 0x48 |
| 49 | #define GPMC_CONFIG 0x50 |
| 50 | #define GPMC_STATUS 0x54 |
| 51 | #define GPMC_PREFETCH_CONFIG1 0x1e0 |
| 52 | #define GPMC_PREFETCH_CONFIG2 0x1e4 |
Thara Gopinath | 15e02a3 | 2008-04-28 16:55:01 +0530 | [diff] [blame] | 53 | #define GPMC_PREFETCH_CONTROL 0x1ec |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 54 | #define GPMC_PREFETCH_STATUS 0x1f0 |
| 55 | #define GPMC_ECC_CONFIG 0x1f4 |
| 56 | #define GPMC_ECC_CONTROL 0x1f8 |
| 57 | #define GPMC_ECC_SIZE_CONFIG 0x1fc |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 58 | #define GPMC_ECC1_RESULT 0x200 |
Ivan Djelic | 8d602cf | 2012-04-26 14:17:49 +0200 | [diff] [blame] | 59 | #define GPMC_ECC_BCH_RESULT_0 0x240 /* not available on OMAP2 */ |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 60 | #define GPMC_ECC_BCH_RESULT_1 0x244 /* not available on OMAP2 */ |
| 61 | #define GPMC_ECC_BCH_RESULT_2 0x248 /* not available on OMAP2 */ |
| 62 | #define GPMC_ECC_BCH_RESULT_3 0x24c /* not available on OMAP2 */ |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 63 | |
Yegor Yefremov | 2c65e74 | 2012-05-09 08:32:49 -0700 | [diff] [blame] | 64 | /* GPMC ECC control settings */ |
| 65 | #define GPMC_ECC_CTRL_ECCCLEAR 0x100 |
| 66 | #define GPMC_ECC_CTRL_ECCDISABLE 0x000 |
| 67 | #define GPMC_ECC_CTRL_ECCREG1 0x001 |
| 68 | #define GPMC_ECC_CTRL_ECCREG2 0x002 |
| 69 | #define GPMC_ECC_CTRL_ECCREG3 0x003 |
| 70 | #define GPMC_ECC_CTRL_ECCREG4 0x004 |
| 71 | #define GPMC_ECC_CTRL_ECCREG5 0x005 |
| 72 | #define GPMC_ECC_CTRL_ECCREG6 0x006 |
| 73 | #define GPMC_ECC_CTRL_ECCREG7 0x007 |
| 74 | #define GPMC_ECC_CTRL_ECCREG8 0x008 |
| 75 | #define GPMC_ECC_CTRL_ECCREG9 0x009 |
| 76 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 77 | #define GPMC_CS0_OFFSET 0x60 |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 78 | #define GPMC_CS_SIZE 0x30 |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 79 | #define GPMC_BCH_SIZE 0x10 |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 80 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 81 | #define GPMC_MEM_START 0x00000000 |
| 82 | #define GPMC_MEM_END 0x3FFFFFFF |
| 83 | #define BOOT_ROM_SPACE 0x100000 /* 1MB */ |
| 84 | |
| 85 | #define GPMC_CHUNK_SHIFT 24 /* 16 MB */ |
| 86 | #define GPMC_SECTION_SHIFT 28 /* 128 MB */ |
| 87 | |
vimal singh | 59e9c5a | 2009-07-13 16:26:24 +0530 | [diff] [blame] | 88 | #define CS_NUM_SHIFT 24 |
| 89 | #define ENABLE_PREFETCH (0x1 << 7) |
| 90 | #define DMA_MPU_MODE 2 |
| 91 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 92 | #define GPMC_REVISION_MAJOR(l) ((l >> 4) & 0xf) |
| 93 | #define GPMC_REVISION_MINOR(l) (l & 0xf) |
| 94 | |
| 95 | #define GPMC_HAS_WR_ACCESS 0x1 |
| 96 | #define GPMC_HAS_WR_DATA_MUX_BUS 0x2 |
| 97 | |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 98 | /* XXX: Only NAND irq has been considered,currently these are the only ones used |
| 99 | */ |
| 100 | #define GPMC_NR_IRQ 2 |
| 101 | |
| 102 | struct gpmc_client_irq { |
| 103 | unsigned irq; |
| 104 | u32 bitmask; |
| 105 | }; |
| 106 | |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 107 | /* Structure to save gpmc cs context */ |
| 108 | struct gpmc_cs_config { |
| 109 | u32 config1; |
| 110 | u32 config2; |
| 111 | u32 config3; |
| 112 | u32 config4; |
| 113 | u32 config5; |
| 114 | u32 config6; |
| 115 | u32 config7; |
| 116 | int is_valid; |
| 117 | }; |
| 118 | |
| 119 | /* |
| 120 | * Structure to save/restore gpmc context |
| 121 | * to support core off on OMAP3 |
| 122 | */ |
| 123 | struct omap3_gpmc_regs { |
| 124 | u32 sysconfig; |
| 125 | u32 irqenable; |
| 126 | u32 timeout_ctrl; |
| 127 | u32 config; |
| 128 | u32 prefetch_config1; |
| 129 | u32 prefetch_config2; |
| 130 | u32 prefetch_control; |
| 131 | struct gpmc_cs_config cs_context[GPMC_CS_NUM]; |
| 132 | }; |
| 133 | |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 134 | static struct gpmc_client_irq gpmc_client_irq[GPMC_NR_IRQ]; |
| 135 | static struct irq_chip gpmc_irq_chip; |
| 136 | static unsigned gpmc_irq_start; |
| 137 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 138 | static struct resource gpmc_mem_root; |
| 139 | static struct resource gpmc_cs_mem[GPMC_CS_NUM]; |
Thomas Gleixner | 87b247c | 2007-05-10 22:33:04 -0700 | [diff] [blame] | 140 | static DEFINE_SPINLOCK(gpmc_mem_lock); |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 141 | static unsigned int gpmc_cs_map; /* flag for cs which are initialized */ |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 142 | static struct device *gpmc_dev; |
| 143 | static int gpmc_irq; |
| 144 | static resource_size_t phys_base, mem_size; |
| 145 | static unsigned gpmc_capability; |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 146 | static void __iomem *gpmc_base; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 147 | |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 148 | static struct clk *gpmc_l3_clk; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 149 | |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 150 | static irqreturn_t gpmc_handle_irq(int irq, void *dev); |
| 151 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 152 | static void gpmc_write_reg(int idx, u32 val) |
| 153 | { |
| 154 | __raw_writel(val, gpmc_base + idx); |
| 155 | } |
| 156 | |
| 157 | static u32 gpmc_read_reg(int idx) |
| 158 | { |
| 159 | return __raw_readl(gpmc_base + idx); |
| 160 | } |
| 161 | |
| 162 | void gpmc_cs_write_reg(int cs, int idx, u32 val) |
| 163 | { |
| 164 | void __iomem *reg_addr; |
| 165 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 166 | reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 167 | __raw_writel(val, reg_addr); |
| 168 | } |
| 169 | |
| 170 | u32 gpmc_cs_read_reg(int cs, int idx) |
| 171 | { |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 172 | void __iomem *reg_addr; |
| 173 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 174 | reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 175 | return __raw_readl(reg_addr); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 176 | } |
| 177 | |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 178 | /* TODO: Add support for gpmc_fck to clock framework and use it */ |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 179 | unsigned long gpmc_get_fclk_period(void) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 180 | { |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 181 | unsigned long rate = clk_get_rate(gpmc_l3_clk); |
| 182 | |
| 183 | if (rate == 0) { |
| 184 | printk(KERN_WARNING "gpmc_l3_clk not enabled\n"); |
| 185 | return 0; |
| 186 | } |
| 187 | |
| 188 | rate /= 1000; |
| 189 | rate = 1000000000 / rate; /* In picoseconds */ |
| 190 | |
| 191 | return rate; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 192 | } |
| 193 | |
| 194 | unsigned int gpmc_ns_to_ticks(unsigned int time_ns) |
| 195 | { |
| 196 | unsigned long tick_ps; |
| 197 | |
| 198 | /* Calculate in picosecs to yield more exact results */ |
| 199 | tick_ps = gpmc_get_fclk_period(); |
| 200 | |
| 201 | return (time_ns * 1000 + tick_ps - 1) / tick_ps; |
| 202 | } |
| 203 | |
Adrian Hunter | a3551f5 | 2010-12-09 10:48:27 +0200 | [diff] [blame] | 204 | unsigned int gpmc_ps_to_ticks(unsigned int time_ps) |
| 205 | { |
| 206 | unsigned long tick_ps; |
| 207 | |
| 208 | /* Calculate in picosecs to yield more exact results */ |
| 209 | tick_ps = gpmc_get_fclk_period(); |
| 210 | |
| 211 | return (time_ps + tick_ps - 1) / tick_ps; |
| 212 | } |
| 213 | |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 214 | unsigned int gpmc_ticks_to_ns(unsigned int ticks) |
| 215 | { |
| 216 | return ticks * gpmc_get_fclk_period() / 1000; |
| 217 | } |
| 218 | |
Kai Svahn | 2330059 | 2007-01-26 12:29:40 -0800 | [diff] [blame] | 219 | unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns) |
| 220 | { |
| 221 | unsigned long ticks = gpmc_ns_to_ticks(time_ns); |
| 222 | |
| 223 | return ticks * gpmc_get_fclk_period() / 1000; |
| 224 | } |
| 225 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 226 | #ifdef DEBUG |
| 227 | static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, |
Juha Yrjola | 2aab646 | 2006-06-26 16:16:21 -0700 | [diff] [blame] | 228 | int time, const char *name) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 229 | #else |
| 230 | static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, |
| 231 | int time) |
| 232 | #endif |
| 233 | { |
| 234 | u32 l; |
| 235 | int ticks, mask, nr_bits; |
| 236 | |
| 237 | if (time == 0) |
| 238 | ticks = 0; |
| 239 | else |
| 240 | ticks = gpmc_ns_to_ticks(time); |
| 241 | nr_bits = end_bit - st_bit + 1; |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 242 | if (ticks >= 1 << nr_bits) { |
| 243 | #ifdef DEBUG |
| 244 | printk(KERN_INFO "GPMC CS%d: %-10s* %3d ns, %3d ticks >= %d\n", |
| 245 | cs, name, time, ticks, 1 << nr_bits); |
| 246 | #endif |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 247 | return -1; |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 248 | } |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 249 | |
| 250 | mask = (1 << nr_bits) - 1; |
| 251 | l = gpmc_cs_read_reg(cs, reg); |
| 252 | #ifdef DEBUG |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 253 | printk(KERN_INFO |
| 254 | "GPMC CS%d: %-10s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n", |
Juha Yrjola | 2aab646 | 2006-06-26 16:16:21 -0700 | [diff] [blame] | 255 | cs, name, ticks, gpmc_get_fclk_period() * ticks / 1000, |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 256 | (l >> st_bit) & mask, time); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 257 | #endif |
| 258 | l &= ~(mask << st_bit); |
| 259 | l |= ticks << st_bit; |
| 260 | gpmc_cs_write_reg(cs, reg, l); |
| 261 | |
| 262 | return 0; |
| 263 | } |
| 264 | |
| 265 | #ifdef DEBUG |
| 266 | #define GPMC_SET_ONE(reg, st, end, field) \ |
| 267 | if (set_gpmc_timing_reg(cs, (reg), (st), (end), \ |
| 268 | t->field, #field) < 0) \ |
| 269 | return -1 |
| 270 | #else |
| 271 | #define GPMC_SET_ONE(reg, st, end, field) \ |
| 272 | if (set_gpmc_timing_reg(cs, (reg), (st), (end), t->field) < 0) \ |
| 273 | return -1 |
| 274 | #endif |
| 275 | |
Afzal Mohammed | 1b47ca1 | 2012-08-19 18:29:45 +0530 | [diff] [blame] | 276 | int gpmc_calc_divider(unsigned int sync_clk) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 277 | { |
| 278 | int div; |
| 279 | u32 l; |
| 280 | |
Adrian Hunter | a3551f5 | 2010-12-09 10:48:27 +0200 | [diff] [blame] | 281 | l = sync_clk + (gpmc_get_fclk_period() - 1); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 282 | div = l / gpmc_get_fclk_period(); |
| 283 | if (div > 4) |
| 284 | return -1; |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 285 | if (div <= 0) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 286 | div = 1; |
| 287 | |
| 288 | return div; |
| 289 | } |
| 290 | |
| 291 | int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) |
| 292 | { |
| 293 | int div; |
| 294 | u32 l; |
| 295 | |
Afzal Mohammed | 1b47ca1 | 2012-08-19 18:29:45 +0530 | [diff] [blame] | 296 | div = gpmc_calc_divider(t->sync_clk); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 297 | if (div < 0) |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 298 | return div; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 299 | |
| 300 | GPMC_SET_ONE(GPMC_CS_CONFIG2, 0, 3, cs_on); |
| 301 | GPMC_SET_ONE(GPMC_CS_CONFIG2, 8, 12, cs_rd_off); |
| 302 | GPMC_SET_ONE(GPMC_CS_CONFIG2, 16, 20, cs_wr_off); |
| 303 | |
| 304 | GPMC_SET_ONE(GPMC_CS_CONFIG3, 0, 3, adv_on); |
| 305 | GPMC_SET_ONE(GPMC_CS_CONFIG3, 8, 12, adv_rd_off); |
| 306 | GPMC_SET_ONE(GPMC_CS_CONFIG3, 16, 20, adv_wr_off); |
| 307 | |
| 308 | GPMC_SET_ONE(GPMC_CS_CONFIG4, 0, 3, oe_on); |
| 309 | GPMC_SET_ONE(GPMC_CS_CONFIG4, 8, 12, oe_off); |
| 310 | GPMC_SET_ONE(GPMC_CS_CONFIG4, 16, 19, we_on); |
| 311 | GPMC_SET_ONE(GPMC_CS_CONFIG4, 24, 28, we_off); |
| 312 | |
| 313 | GPMC_SET_ONE(GPMC_CS_CONFIG5, 0, 4, rd_cycle); |
| 314 | GPMC_SET_ONE(GPMC_CS_CONFIG5, 8, 12, wr_cycle); |
| 315 | GPMC_SET_ONE(GPMC_CS_CONFIG5, 16, 20, access); |
| 316 | |
| 317 | GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access); |
| 318 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 319 | if (gpmc_capability & GPMC_HAS_WR_DATA_MUX_BUS) |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 320 | GPMC_SET_ONE(GPMC_CS_CONFIG6, 16, 19, wr_data_mux_bus); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 321 | if (gpmc_capability & GPMC_HAS_WR_ACCESS) |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 322 | GPMC_SET_ONE(GPMC_CS_CONFIG6, 24, 28, wr_access); |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 323 | |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 324 | /* caller is expected to have initialized CONFIG1 to cover |
| 325 | * at least sync vs async |
| 326 | */ |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 327 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 328 | if (l & (GPMC_CONFIG1_READTYPE_SYNC | GPMC_CONFIG1_WRITETYPE_SYNC)) { |
| 329 | #ifdef DEBUG |
| 330 | printk(KERN_INFO "GPMC CS%d CLK period is %lu ns (div %d)\n", |
| 331 | cs, (div * gpmc_get_fclk_period()) / 1000, div); |
| 332 | #endif |
| 333 | l &= ~0x03; |
| 334 | l |= (div - 1); |
| 335 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, l); |
| 336 | } |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 337 | |
| 338 | return 0; |
| 339 | } |
| 340 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 341 | static void gpmc_cs_enable_mem(int cs, u32 base, u32 size) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 342 | { |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 343 | u32 l; |
| 344 | u32 mask; |
| 345 | |
| 346 | mask = (1 << GPMC_SECTION_SHIFT) - size; |
| 347 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
| 348 | l &= ~0x3f; |
| 349 | l = (base >> GPMC_CHUNK_SHIFT) & 0x3f; |
| 350 | l &= ~(0x0f << 8); |
| 351 | l |= ((mask >> GPMC_CHUNK_SHIFT) & 0x0f) << 8; |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 352 | l |= GPMC_CONFIG7_CSVALID; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 353 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); |
| 354 | } |
| 355 | |
| 356 | static void gpmc_cs_disable_mem(int cs) |
| 357 | { |
| 358 | u32 l; |
| 359 | |
| 360 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 361 | l &= ~GPMC_CONFIG7_CSVALID; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 362 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); |
| 363 | } |
| 364 | |
| 365 | static void gpmc_cs_get_memconf(int cs, u32 *base, u32 *size) |
| 366 | { |
| 367 | u32 l; |
| 368 | u32 mask; |
| 369 | |
| 370 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
| 371 | *base = (l & 0x3f) << GPMC_CHUNK_SHIFT; |
| 372 | mask = (l >> 8) & 0x0f; |
| 373 | *size = (1 << GPMC_SECTION_SHIFT) - (mask << GPMC_CHUNK_SHIFT); |
| 374 | } |
| 375 | |
| 376 | static int gpmc_cs_mem_enabled(int cs) |
| 377 | { |
| 378 | u32 l; |
| 379 | |
| 380 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 381 | return l & GPMC_CONFIG7_CSVALID; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 382 | } |
| 383 | |
Tony Lindgren | c40fae95 | 2006-12-07 13:58:10 -0800 | [diff] [blame] | 384 | int gpmc_cs_set_reserved(int cs, int reserved) |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 385 | { |
Tony Lindgren | c40fae95 | 2006-12-07 13:58:10 -0800 | [diff] [blame] | 386 | if (cs > GPMC_CS_NUM) |
| 387 | return -ENODEV; |
| 388 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 389 | gpmc_cs_map &= ~(1 << cs); |
| 390 | gpmc_cs_map |= (reserved ? 1 : 0) << cs; |
Tony Lindgren | c40fae95 | 2006-12-07 13:58:10 -0800 | [diff] [blame] | 391 | |
| 392 | return 0; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 393 | } |
| 394 | |
Tony Lindgren | c40fae95 | 2006-12-07 13:58:10 -0800 | [diff] [blame] | 395 | int gpmc_cs_reserved(int cs) |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 396 | { |
Tony Lindgren | c40fae95 | 2006-12-07 13:58:10 -0800 | [diff] [blame] | 397 | if (cs > GPMC_CS_NUM) |
| 398 | return -ENODEV; |
| 399 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 400 | return gpmc_cs_map & (1 << cs); |
| 401 | } |
| 402 | |
| 403 | static unsigned long gpmc_mem_align(unsigned long size) |
| 404 | { |
| 405 | int order; |
| 406 | |
| 407 | size = (size - 1) >> (GPMC_CHUNK_SHIFT - 1); |
| 408 | order = GPMC_CHUNK_SHIFT - 1; |
| 409 | do { |
| 410 | size >>= 1; |
| 411 | order++; |
| 412 | } while (size); |
| 413 | size = 1 << order; |
| 414 | return size; |
| 415 | } |
| 416 | |
| 417 | static int gpmc_cs_insert_mem(int cs, unsigned long base, unsigned long size) |
| 418 | { |
| 419 | struct resource *res = &gpmc_cs_mem[cs]; |
| 420 | int r; |
| 421 | |
| 422 | size = gpmc_mem_align(size); |
| 423 | spin_lock(&gpmc_mem_lock); |
| 424 | res->start = base; |
| 425 | res->end = base + size - 1; |
| 426 | r = request_resource(&gpmc_mem_root, res); |
| 427 | spin_unlock(&gpmc_mem_lock); |
| 428 | |
| 429 | return r; |
| 430 | } |
| 431 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 432 | static int gpmc_cs_delete_mem(int cs) |
| 433 | { |
| 434 | struct resource *res = &gpmc_cs_mem[cs]; |
| 435 | int r; |
| 436 | |
| 437 | spin_lock(&gpmc_mem_lock); |
| 438 | r = release_resource(&gpmc_cs_mem[cs]); |
| 439 | res->start = 0; |
| 440 | res->end = 0; |
| 441 | spin_unlock(&gpmc_mem_lock); |
| 442 | |
| 443 | return r; |
| 444 | } |
| 445 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 446 | int gpmc_cs_request(int cs, unsigned long size, unsigned long *base) |
| 447 | { |
| 448 | struct resource *res = &gpmc_cs_mem[cs]; |
| 449 | int r = -1; |
| 450 | |
| 451 | if (cs > GPMC_CS_NUM) |
| 452 | return -ENODEV; |
| 453 | |
| 454 | size = gpmc_mem_align(size); |
| 455 | if (size > (1 << GPMC_SECTION_SHIFT)) |
| 456 | return -ENOMEM; |
| 457 | |
| 458 | spin_lock(&gpmc_mem_lock); |
| 459 | if (gpmc_cs_reserved(cs)) { |
| 460 | r = -EBUSY; |
| 461 | goto out; |
| 462 | } |
| 463 | if (gpmc_cs_mem_enabled(cs)) |
| 464 | r = adjust_resource(res, res->start & ~(size - 1), size); |
| 465 | if (r < 0) |
| 466 | r = allocate_resource(&gpmc_mem_root, res, size, 0, ~0, |
| 467 | size, NULL, NULL); |
| 468 | if (r < 0) |
| 469 | goto out; |
| 470 | |
Tobias Klauser | 6d13524 | 2009-11-10 18:55:19 -0800 | [diff] [blame] | 471 | gpmc_cs_enable_mem(cs, res->start, resource_size(res)); |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 472 | *base = res->start; |
| 473 | gpmc_cs_set_reserved(cs, 1); |
| 474 | out: |
| 475 | spin_unlock(&gpmc_mem_lock); |
| 476 | return r; |
| 477 | } |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 478 | EXPORT_SYMBOL(gpmc_cs_request); |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 479 | |
| 480 | void gpmc_cs_free(int cs) |
| 481 | { |
| 482 | spin_lock(&gpmc_mem_lock); |
Roel Kluin | e7fdc60 | 2009-11-17 14:39:06 -0800 | [diff] [blame] | 483 | if (cs >= GPMC_CS_NUM || cs < 0 || !gpmc_cs_reserved(cs)) { |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 484 | printk(KERN_ERR "Trying to free non-reserved GPMC CS%d\n", cs); |
| 485 | BUG(); |
| 486 | spin_unlock(&gpmc_mem_lock); |
| 487 | return; |
| 488 | } |
| 489 | gpmc_cs_disable_mem(cs); |
| 490 | release_resource(&gpmc_cs_mem[cs]); |
| 491 | gpmc_cs_set_reserved(cs, 0); |
| 492 | spin_unlock(&gpmc_mem_lock); |
| 493 | } |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 494 | EXPORT_SYMBOL(gpmc_cs_free); |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 495 | |
vimal singh | 59e9c5a | 2009-07-13 16:26:24 +0530 | [diff] [blame] | 496 | /** |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 497 | * gpmc_cs_configure - write request to configure gpmc |
| 498 | * @cs: chip select number |
| 499 | * @cmd: command type |
| 500 | * @wval: value to write |
| 501 | * @return status of the operation |
| 502 | */ |
| 503 | int gpmc_cs_configure(int cs, int cmd, int wval) |
| 504 | { |
| 505 | int err = 0; |
| 506 | u32 regval = 0; |
| 507 | |
| 508 | switch (cmd) { |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 509 | case GPMC_ENABLE_IRQ: |
| 510 | gpmc_write_reg(GPMC_IRQENABLE, wval); |
| 511 | break; |
| 512 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 513 | case GPMC_SET_IRQ_STATUS: |
| 514 | gpmc_write_reg(GPMC_IRQSTATUS, wval); |
| 515 | break; |
| 516 | |
| 517 | case GPMC_CONFIG_WP: |
| 518 | regval = gpmc_read_reg(GPMC_CONFIG); |
| 519 | if (wval) |
| 520 | regval &= ~GPMC_CONFIG_WRITEPROTECT; /* WP is ON */ |
| 521 | else |
| 522 | regval |= GPMC_CONFIG_WRITEPROTECT; /* WP is OFF */ |
| 523 | gpmc_write_reg(GPMC_CONFIG, regval); |
| 524 | break; |
| 525 | |
| 526 | case GPMC_CONFIG_RDY_BSY: |
| 527 | regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); |
| 528 | if (wval) |
| 529 | regval |= WR_RD_PIN_MONITORING; |
| 530 | else |
| 531 | regval &= ~WR_RD_PIN_MONITORING; |
| 532 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval); |
| 533 | break; |
| 534 | |
| 535 | case GPMC_CONFIG_DEV_SIZE: |
| 536 | regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); |
Yegor Yefremov | 8ef5d84 | 2012-01-23 08:32:23 +0100 | [diff] [blame] | 537 | |
| 538 | /* clear 2 target bits */ |
| 539 | regval &= ~GPMC_CONFIG1_DEVICESIZE(3); |
| 540 | |
| 541 | /* set the proper value */ |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 542 | regval |= GPMC_CONFIG1_DEVICESIZE(wval); |
Yegor Yefremov | 8ef5d84 | 2012-01-23 08:32:23 +0100 | [diff] [blame] | 543 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 544 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval); |
| 545 | break; |
| 546 | |
| 547 | case GPMC_CONFIG_DEV_TYPE: |
| 548 | regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); |
| 549 | regval |= GPMC_CONFIG1_DEVICETYPE(wval); |
| 550 | if (wval == GPMC_DEVICETYPE_NOR) |
| 551 | regval |= GPMC_CONFIG1_MUXADDDATA; |
| 552 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval); |
| 553 | break; |
| 554 | |
| 555 | default: |
| 556 | printk(KERN_ERR "gpmc_configure_cs: Not supported\n"); |
| 557 | err = -EINVAL; |
| 558 | } |
| 559 | |
| 560 | return err; |
| 561 | } |
| 562 | EXPORT_SYMBOL(gpmc_cs_configure); |
| 563 | |
Afzal Mohammed | 52bd138 | 2012-08-30 12:53:22 -0700 | [diff] [blame] | 564 | void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs) |
| 565 | { |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 566 | int i; |
| 567 | |
Afzal Mohammed | 52bd138 | 2012-08-30 12:53:22 -0700 | [diff] [blame] | 568 | reg->gpmc_status = gpmc_base + GPMC_STATUS; |
| 569 | reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET + |
| 570 | GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs; |
| 571 | reg->gpmc_nand_address = gpmc_base + GPMC_CS0_OFFSET + |
| 572 | GPMC_CS_NAND_ADDRESS + GPMC_CS_SIZE * cs; |
| 573 | reg->gpmc_nand_data = gpmc_base + GPMC_CS0_OFFSET + |
| 574 | GPMC_CS_NAND_DATA + GPMC_CS_SIZE * cs; |
| 575 | reg->gpmc_prefetch_config1 = gpmc_base + GPMC_PREFETCH_CONFIG1; |
| 576 | reg->gpmc_prefetch_config2 = gpmc_base + GPMC_PREFETCH_CONFIG2; |
| 577 | reg->gpmc_prefetch_control = gpmc_base + GPMC_PREFETCH_CONTROL; |
| 578 | reg->gpmc_prefetch_status = gpmc_base + GPMC_PREFETCH_STATUS; |
| 579 | reg->gpmc_ecc_config = gpmc_base + GPMC_ECC_CONFIG; |
| 580 | reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL; |
| 581 | reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG; |
| 582 | reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT; |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 583 | |
| 584 | for (i = 0; i < GPMC_BCH_NUM_REMAINDER; i++) { |
| 585 | reg->gpmc_bch_result0[i] = gpmc_base + GPMC_ECC_BCH_RESULT_0 + |
| 586 | GPMC_BCH_SIZE * i; |
| 587 | reg->gpmc_bch_result1[i] = gpmc_base + GPMC_ECC_BCH_RESULT_1 + |
| 588 | GPMC_BCH_SIZE * i; |
| 589 | reg->gpmc_bch_result2[i] = gpmc_base + GPMC_ECC_BCH_RESULT_2 + |
| 590 | GPMC_BCH_SIZE * i; |
| 591 | reg->gpmc_bch_result3[i] = gpmc_base + GPMC_ECC_BCH_RESULT_3 + |
| 592 | GPMC_BCH_SIZE * i; |
| 593 | } |
Afzal Mohammed | 52bd138 | 2012-08-30 12:53:22 -0700 | [diff] [blame] | 594 | } |
| 595 | |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 596 | int gpmc_get_client_irq(unsigned irq_config) |
| 597 | { |
| 598 | int i; |
| 599 | |
| 600 | if (hweight32(irq_config) > 1) |
| 601 | return 0; |
| 602 | |
| 603 | for (i = 0; i < GPMC_NR_IRQ; i++) |
| 604 | if (gpmc_client_irq[i].bitmask & irq_config) |
| 605 | return gpmc_client_irq[i].irq; |
| 606 | |
| 607 | return 0; |
| 608 | } |
| 609 | |
| 610 | static int gpmc_irq_endis(unsigned irq, bool endis) |
| 611 | { |
| 612 | int i; |
| 613 | u32 regval; |
| 614 | |
| 615 | for (i = 0; i < GPMC_NR_IRQ; i++) |
| 616 | if (irq == gpmc_client_irq[i].irq) { |
| 617 | regval = gpmc_read_reg(GPMC_IRQENABLE); |
| 618 | if (endis) |
| 619 | regval |= gpmc_client_irq[i].bitmask; |
| 620 | else |
| 621 | regval &= ~gpmc_client_irq[i].bitmask; |
| 622 | gpmc_write_reg(GPMC_IRQENABLE, regval); |
| 623 | break; |
| 624 | } |
| 625 | |
| 626 | return 0; |
| 627 | } |
| 628 | |
| 629 | static void gpmc_irq_disable(struct irq_data *p) |
| 630 | { |
| 631 | gpmc_irq_endis(p->irq, false); |
| 632 | } |
| 633 | |
| 634 | static void gpmc_irq_enable(struct irq_data *p) |
| 635 | { |
| 636 | gpmc_irq_endis(p->irq, true); |
| 637 | } |
| 638 | |
| 639 | static void gpmc_irq_noop(struct irq_data *data) { } |
| 640 | |
| 641 | static unsigned int gpmc_irq_noop_ret(struct irq_data *data) { return 0; } |
| 642 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 643 | static int gpmc_setup_irq(void) |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 644 | { |
| 645 | int i; |
| 646 | u32 regval; |
| 647 | |
| 648 | if (!gpmc_irq) |
| 649 | return -EINVAL; |
| 650 | |
| 651 | gpmc_irq_start = irq_alloc_descs(-1, 0, GPMC_NR_IRQ, 0); |
| 652 | if (IS_ERR_VALUE(gpmc_irq_start)) { |
| 653 | pr_err("irq_alloc_descs failed\n"); |
| 654 | return gpmc_irq_start; |
| 655 | } |
| 656 | |
| 657 | gpmc_irq_chip.name = "gpmc"; |
| 658 | gpmc_irq_chip.irq_startup = gpmc_irq_noop_ret; |
| 659 | gpmc_irq_chip.irq_enable = gpmc_irq_enable; |
| 660 | gpmc_irq_chip.irq_disable = gpmc_irq_disable; |
| 661 | gpmc_irq_chip.irq_shutdown = gpmc_irq_noop; |
| 662 | gpmc_irq_chip.irq_ack = gpmc_irq_noop; |
| 663 | gpmc_irq_chip.irq_mask = gpmc_irq_noop; |
| 664 | gpmc_irq_chip.irq_unmask = gpmc_irq_noop; |
| 665 | |
| 666 | gpmc_client_irq[0].bitmask = GPMC_IRQ_FIFOEVENTENABLE; |
| 667 | gpmc_client_irq[1].bitmask = GPMC_IRQ_COUNT_EVENT; |
| 668 | |
| 669 | for (i = 0; i < GPMC_NR_IRQ; i++) { |
| 670 | gpmc_client_irq[i].irq = gpmc_irq_start + i; |
| 671 | irq_set_chip_and_handler(gpmc_client_irq[i].irq, |
| 672 | &gpmc_irq_chip, handle_simple_irq); |
| 673 | set_irq_flags(gpmc_client_irq[i].irq, |
| 674 | IRQF_VALID | IRQF_NOAUTOEN); |
| 675 | } |
| 676 | |
| 677 | /* Disable interrupts */ |
| 678 | gpmc_write_reg(GPMC_IRQENABLE, 0); |
| 679 | |
| 680 | /* clear interrupts */ |
| 681 | regval = gpmc_read_reg(GPMC_IRQSTATUS); |
| 682 | gpmc_write_reg(GPMC_IRQSTATUS, regval); |
| 683 | |
| 684 | return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL); |
| 685 | } |
| 686 | |
Afzal Mohammed | 61687c6 | 2012-10-04 14:01:57 +0530 | [diff] [blame] | 687 | static __devexit int gpmc_free_irq(void) |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 688 | { |
| 689 | int i; |
| 690 | |
| 691 | if (gpmc_irq) |
| 692 | free_irq(gpmc_irq, NULL); |
| 693 | |
| 694 | for (i = 0; i < GPMC_NR_IRQ; i++) { |
| 695 | irq_set_handler(gpmc_client_irq[i].irq, NULL); |
| 696 | irq_set_chip(gpmc_client_irq[i].irq, &no_irq_chip); |
| 697 | irq_modify_status(gpmc_client_irq[i].irq, 0, 0); |
| 698 | } |
| 699 | |
| 700 | irq_free_descs(gpmc_irq_start, GPMC_NR_IRQ); |
| 701 | |
| 702 | return 0; |
| 703 | } |
| 704 | |
| 705 | static void __devexit gpmc_mem_exit(void) |
| 706 | { |
| 707 | int cs; |
| 708 | |
| 709 | for (cs = 0; cs < GPMC_CS_NUM; cs++) { |
| 710 | if (!gpmc_cs_mem_enabled(cs)) |
| 711 | continue; |
| 712 | gpmc_cs_delete_mem(cs); |
| 713 | } |
| 714 | |
| 715 | } |
| 716 | |
Jon Hunter | 8119024 | 2012-10-17 09:41:25 -0500 | [diff] [blame] | 717 | static int __devinit gpmc_mem_init(void) |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 718 | { |
Jon Hunter | 8119024 | 2012-10-17 09:41:25 -0500 | [diff] [blame] | 719 | int cs, rc; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 720 | unsigned long boot_rom_space = 0; |
| 721 | |
Kyungmin Park | 7f24516 | 2006-12-29 16:48:51 -0800 | [diff] [blame] | 722 | /* never allocate the first page, to facilitate bug detection; |
| 723 | * even if we didn't boot from ROM. |
| 724 | */ |
| 725 | boot_rom_space = BOOT_ROM_SPACE; |
| 726 | /* In apollon the CS0 is mapped as 0x0000 0000 */ |
| 727 | if (machine_is_omap_apollon()) |
| 728 | boot_rom_space = 0; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 729 | gpmc_mem_root.start = GPMC_MEM_START + boot_rom_space; |
| 730 | gpmc_mem_root.end = GPMC_MEM_END; |
| 731 | |
| 732 | /* Reserve all regions that has been set up by bootloader */ |
| 733 | for (cs = 0; cs < GPMC_CS_NUM; cs++) { |
| 734 | u32 base, size; |
| 735 | |
| 736 | if (!gpmc_cs_mem_enabled(cs)) |
| 737 | continue; |
| 738 | gpmc_cs_get_memconf(cs, &base, &size); |
Jon Hunter | 8119024 | 2012-10-17 09:41:25 -0500 | [diff] [blame] | 739 | rc = gpmc_cs_insert_mem(cs, base, size); |
| 740 | if (IS_ERR_VALUE(rc)) { |
| 741 | while (--cs >= 0) |
| 742 | if (gpmc_cs_mem_enabled(cs)) |
| 743 | gpmc_cs_delete_mem(cs); |
| 744 | return rc; |
| 745 | } |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 746 | } |
Jon Hunter | 8119024 | 2012-10-17 09:41:25 -0500 | [diff] [blame] | 747 | |
| 748 | return 0; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 749 | } |
| 750 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 751 | static __devinit int gpmc_probe(struct platform_device *pdev) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 752 | { |
Jon Hunter | 8119024 | 2012-10-17 09:41:25 -0500 | [diff] [blame] | 753 | int rc; |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 754 | u32 l; |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 755 | struct resource *res; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 756 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 757 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 758 | if (res == NULL) |
| 759 | return -ENOENT; |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 760 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 761 | phys_base = res->start; |
| 762 | mem_size = resource_size(res); |
Kevin Hilman | 8d08436 | 2010-01-29 14:20:06 -0800 | [diff] [blame] | 763 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 764 | gpmc_base = devm_request_and_ioremap(&pdev->dev, res); |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 765 | if (!gpmc_base) { |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 766 | dev_err(&pdev->dev, "error: request memory / ioremap\n"); |
| 767 | return -EADDRNOTAVAIL; |
| 768 | } |
| 769 | |
| 770 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 771 | if (res == NULL) |
| 772 | dev_warn(&pdev->dev, "Failed to get resource: irq\n"); |
| 773 | else |
| 774 | gpmc_irq = res->start; |
| 775 | |
| 776 | gpmc_l3_clk = clk_get(&pdev->dev, "fck"); |
| 777 | if (IS_ERR(gpmc_l3_clk)) { |
| 778 | dev_err(&pdev->dev, "error: clk_get\n"); |
| 779 | gpmc_irq = 0; |
| 780 | return PTR_ERR(gpmc_l3_clk); |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 781 | } |
| 782 | |
Rajendra Nayak | 4d7cb45 | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 783 | clk_prepare_enable(gpmc_l3_clk); |
Olof Johansson | 1daa8c1 | 2010-01-20 22:39:29 +0000 | [diff] [blame] | 784 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 785 | gpmc_dev = &pdev->dev; |
| 786 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 787 | l = gpmc_read_reg(GPMC_REVISION); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 788 | if (GPMC_REVISION_MAJOR(l) > 0x4) |
| 789 | gpmc_capability = GPMC_HAS_WR_ACCESS | GPMC_HAS_WR_DATA_MUX_BUS; |
| 790 | dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), |
| 791 | GPMC_REVISION_MINOR(l)); |
| 792 | |
Jon Hunter | 8119024 | 2012-10-17 09:41:25 -0500 | [diff] [blame] | 793 | rc = gpmc_mem_init(); |
| 794 | if (IS_ERR_VALUE(rc)) { |
| 795 | clk_disable_unprepare(gpmc_l3_clk); |
| 796 | clk_put(gpmc_l3_clk); |
| 797 | dev_err(gpmc_dev, "failed to reserve memory\n"); |
| 798 | return rc; |
| 799 | } |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 800 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 801 | if (IS_ERR_VALUE(gpmc_setup_irq())) |
| 802 | dev_warn(gpmc_dev, "gpmc_setup_irq failed\n"); |
| 803 | |
| 804 | return 0; |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 805 | } |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 806 | |
Afzal Mohammed | 61687c6 | 2012-10-04 14:01:57 +0530 | [diff] [blame] | 807 | static __devexit int gpmc_remove(struct platform_device *pdev) |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 808 | { |
| 809 | gpmc_free_irq(); |
| 810 | gpmc_mem_exit(); |
| 811 | gpmc_dev = NULL; |
| 812 | return 0; |
| 813 | } |
| 814 | |
| 815 | static struct platform_driver gpmc_driver = { |
| 816 | .probe = gpmc_probe, |
| 817 | .remove = __devexit_p(gpmc_remove), |
| 818 | .driver = { |
| 819 | .name = DEVICE_NAME, |
| 820 | .owner = THIS_MODULE, |
| 821 | }, |
| 822 | }; |
| 823 | |
| 824 | static __init int gpmc_init(void) |
| 825 | { |
| 826 | return platform_driver_register(&gpmc_driver); |
| 827 | } |
| 828 | |
| 829 | static __exit void gpmc_exit(void) |
| 830 | { |
| 831 | platform_driver_unregister(&gpmc_driver); |
| 832 | |
| 833 | } |
| 834 | |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 835 | postcore_initcall(gpmc_init); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 836 | module_exit(gpmc_exit); |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 837 | |
Afzal Mohammed | 4be48fd | 2012-09-23 17:28:24 -0600 | [diff] [blame] | 838 | static int __init omap_gpmc_init(void) |
| 839 | { |
| 840 | struct omap_hwmod *oh; |
| 841 | struct platform_device *pdev; |
| 842 | char *oh_name = "gpmc"; |
| 843 | |
| 844 | oh = omap_hwmod_lookup(oh_name); |
| 845 | if (!oh) { |
| 846 | pr_err("Could not look up %s\n", oh_name); |
| 847 | return -ENODEV; |
| 848 | } |
| 849 | |
| 850 | pdev = omap_device_build(DEVICE_NAME, -1, oh, NULL, 0, NULL, 0, 0); |
| 851 | WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name); |
| 852 | |
| 853 | return IS_ERR(pdev) ? PTR_ERR(pdev) : 0; |
| 854 | } |
| 855 | postcore_initcall(omap_gpmc_init); |
| 856 | |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 857 | static irqreturn_t gpmc_handle_irq(int irq, void *dev) |
| 858 | { |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 859 | int i; |
| 860 | u32 regval; |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 861 | |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 862 | regval = gpmc_read_reg(GPMC_IRQSTATUS); |
| 863 | |
| 864 | if (!regval) |
| 865 | return IRQ_NONE; |
| 866 | |
| 867 | for (i = 0; i < GPMC_NR_IRQ; i++) |
| 868 | if (regval & gpmc_client_irq[i].bitmask) |
| 869 | generic_handle_irq(gpmc_client_irq[i].irq); |
| 870 | |
| 871 | gpmc_write_reg(GPMC_IRQSTATUS, regval); |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 872 | |
| 873 | return IRQ_HANDLED; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 874 | } |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 875 | |
| 876 | #ifdef CONFIG_ARCH_OMAP3 |
| 877 | static struct omap3_gpmc_regs gpmc_context; |
| 878 | |
Felipe Balbi | b2fa3b7 | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 879 | void omap3_gpmc_save_context(void) |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 880 | { |
| 881 | int i; |
Felipe Balbi | b2fa3b7 | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 882 | |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 883 | gpmc_context.sysconfig = gpmc_read_reg(GPMC_SYSCONFIG); |
| 884 | gpmc_context.irqenable = gpmc_read_reg(GPMC_IRQENABLE); |
| 885 | gpmc_context.timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL); |
| 886 | gpmc_context.config = gpmc_read_reg(GPMC_CONFIG); |
| 887 | gpmc_context.prefetch_config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1); |
| 888 | gpmc_context.prefetch_config2 = gpmc_read_reg(GPMC_PREFETCH_CONFIG2); |
| 889 | gpmc_context.prefetch_control = gpmc_read_reg(GPMC_PREFETCH_CONTROL); |
| 890 | for (i = 0; i < GPMC_CS_NUM; i++) { |
| 891 | gpmc_context.cs_context[i].is_valid = gpmc_cs_mem_enabled(i); |
| 892 | if (gpmc_context.cs_context[i].is_valid) { |
| 893 | gpmc_context.cs_context[i].config1 = |
| 894 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG1); |
| 895 | gpmc_context.cs_context[i].config2 = |
| 896 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG2); |
| 897 | gpmc_context.cs_context[i].config3 = |
| 898 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG3); |
| 899 | gpmc_context.cs_context[i].config4 = |
| 900 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG4); |
| 901 | gpmc_context.cs_context[i].config5 = |
| 902 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG5); |
| 903 | gpmc_context.cs_context[i].config6 = |
| 904 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG6); |
| 905 | gpmc_context.cs_context[i].config7 = |
| 906 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG7); |
| 907 | } |
| 908 | } |
| 909 | } |
| 910 | |
Felipe Balbi | b2fa3b7 | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 911 | void omap3_gpmc_restore_context(void) |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 912 | { |
| 913 | int i; |
Felipe Balbi | b2fa3b7 | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 914 | |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 915 | gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context.sysconfig); |
| 916 | gpmc_write_reg(GPMC_IRQENABLE, gpmc_context.irqenable); |
| 917 | gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context.timeout_ctrl); |
| 918 | gpmc_write_reg(GPMC_CONFIG, gpmc_context.config); |
| 919 | gpmc_write_reg(GPMC_PREFETCH_CONFIG1, gpmc_context.prefetch_config1); |
| 920 | gpmc_write_reg(GPMC_PREFETCH_CONFIG2, gpmc_context.prefetch_config2); |
| 921 | gpmc_write_reg(GPMC_PREFETCH_CONTROL, gpmc_context.prefetch_control); |
| 922 | for (i = 0; i < GPMC_CS_NUM; i++) { |
| 923 | if (gpmc_context.cs_context[i].is_valid) { |
| 924 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG1, |
| 925 | gpmc_context.cs_context[i].config1); |
| 926 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG2, |
| 927 | gpmc_context.cs_context[i].config2); |
| 928 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG3, |
| 929 | gpmc_context.cs_context[i].config3); |
| 930 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG4, |
| 931 | gpmc_context.cs_context[i].config4); |
| 932 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG5, |
| 933 | gpmc_context.cs_context[i].config5); |
| 934 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG6, |
| 935 | gpmc_context.cs_context[i].config6); |
| 936 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG7, |
| 937 | gpmc_context.cs_context[i].config7); |
| 938 | } |
| 939 | } |
| 940 | } |
| 941 | #endif /* CONFIG_ARCH_OMAP3 */ |