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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/mach-sa1100/shannon.c
3 */
4
Linus Torvalds1da177e2005-04-16 15:20:36 -07005#include <linux/init.h>
6#include <linux/device.h>
7#include <linux/kernel.h>
Russell King6920b5a2012-09-21 10:18:58 +01008#include <linux/platform_data/sa11x0-serial.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07009#include <linux/tty.h>
10#include <linux/mtd/mtd.h>
11#include <linux/mtd/partitions.h>
12
Russell Kinge1b7a722012-01-14 11:50:04 +000013#include <video/sa1100fb.h>
14
Russell Kinga09e64f2008-08-05 16:14:15 +010015#include <mach/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070016#include <asm/mach-types.h>
17#include <asm/setup.h>
18
19#include <asm/mach/arch.h>
20#include <asm/mach/flash.h>
21#include <asm/mach/map.h>
Arnd Bergmanna1fd8442012-08-24 15:17:38 +020022#include <linux/platform_data/mfd-mcp-sa11x0.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010023#include <mach/shannon.h>
Rob Herringf314f332012-02-24 00:06:51 +010024#include <mach/irqs.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070025
26#include "generic.h"
27
28static struct mtd_partition shannon_partitions[] = {
29 {
30 .name = "BLOB boot loader",
31 .offset = 0,
32 .size = 0x20000
33 },
34 {
35 .name = "kernel",
36 .offset = MTDPART_OFS_APPEND,
37 .size = 0xe0000
38 },
Kristoffer Ericson93982532008-11-26 20:58:43 +010039 {
Linus Torvalds1da177e2005-04-16 15:20:36 -070040 .name = "initrd",
41 .offset = MTDPART_OFS_APPEND,
42 .size = MTDPART_SIZ_FULL
43 }
44};
45
46static struct flash_platform_data shannon_flash_data = {
47 .map_name = "cfi_probe",
48 .parts = shannon_partitions,
49 .nr_parts = ARRAY_SIZE(shannon_partitions),
50};
51
Russell Kinga1810992012-01-12 10:25:29 +000052static struct resource shannon_flash_resource =
53 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_4M);
Linus Torvalds1da177e2005-04-16 15:20:36 -070054
Russell King323cdfc2005-08-18 10:10:46 +010055static struct mcp_plat_data shannon_mcp_data = {
56 .mccr0 = MCCR0_ADM,
57 .sclk_rate = 11981000,
58};
59
Russell Kinge1b7a722012-01-14 11:50:04 +000060static struct sa1100fb_mach_info shannon_lcd_info = {
61 .pixclock = 152500, .bpp = 8,
62 .xres = 640, .yres = 480,
63
64 .hsync_len = 4, .vsync_len = 3,
65 .left_margin = 2, .upper_margin = 0,
66 .right_margin = 1, .lower_margin = 0,
67
68 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
69
70 .lccr0 = LCCR0_Color | LCCR0_Dual | LCCR0_Pas,
71 .lccr3 = LCCR3_ACBsDiv(512),
72};
73
Linus Torvalds1da177e2005-04-16 15:20:36 -070074static void __init shannon_init(void)
75{
Russell Kinge36e26a2012-01-20 22:24:07 +000076 sa11x0_ppc_configure_mcp();
Russell Kinge1b7a722012-01-14 11:50:04 +000077 sa11x0_register_lcd(&shannon_lcd_info);
Russell King7a5b4e12009-10-06 14:55:53 +010078 sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1);
79 sa11x0_register_mcp(&shannon_mcp_data);
Linus Torvalds1da177e2005-04-16 15:20:36 -070080}
81
82static void __init shannon_map_io(void)
83{
84 sa1100_map_io();
85
86 sa1100_register_uart(0, 3);
87 sa1100_register_uart(1, 1);
88
89 Ser1SDCR0 |= SDCR0_SUS;
90 GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
91 GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET;
92 GPDR &= ~GPIO_UART_RXD;
93 PPAR |= PPAR_UPR;
94
95 /* reset the codec */
96 GPCR = SHANNON_GPIO_CODEC_RESET;
97 GPSR = SHANNON_GPIO_CODEC_RESET;
98}
99
100MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
Nicolas Pitre17f44252011-07-05 22:38:17 -0400101 .atag_offset = 0x100,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100102 .map_io = shannon_map_io,
Rob Herringf314f332012-02-24 00:06:51 +0100103 .nr_irqs = SA1100_NR_IRQS,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100104 .init_irq = sa1100_init_irq,
Stephen Warren6bb27d72012-11-08 12:40:59 -0700105 .init_time = sa1100_timer_init,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106 .init_machine = shannon_init,
Shawn Guo7fea1ba2012-04-26 21:22:45 +0800107 .init_late = sa11x0_init_late,
Russell Kingd9ca5832011-11-05 10:28:50 +0000108 .restart = sa11x0_restart,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109MACHINE_END