blob: 31ab804a22bcc19abfb517187a3a7834ee79ea01 [file] [log] [blame]
Brian Austineef5bb22014-08-04 15:11:16 -05001/*
2 * cs35l32.h -- CS35L32 ALSA SoC audio driver
3 *
4 * Copyright 2014 CirrusLogic, Inc.
5 *
6 * Author: Brian Austin <brian.austin@cirrus.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#ifndef __CS35L32_H__
15#define __CS35L32_H__
16
17struct cs35l32_platform_data {
18 /* Low Battery Threshold */
19 unsigned int batt_thresh;
20 /* Low Battery Recovery */
21 unsigned int batt_recov;
22 /* LED Current Management*/
23 unsigned int led_mng;
24 /* Audio Gain w/ LED */
25 unsigned int audiogain_mng;
26 /* Boost Management */
27 unsigned int boost_mng;
28 /* Data CFG for DUAL device */
29 unsigned int sdout_datacfg;
30 /* SDOUT Sharing */
31 unsigned int sdout_share;
32};
33
34#define CS35L32_CHIP_ID 0x00035A32
35#define CS35L32_DEVID_AB 0x01 /* Device ID A & B [RO] */
36#define CS35L32_DEVID_CD 0x02 /* Device ID C & D [RO] */
37#define CS35L32_DEVID_E 0x03 /* Device ID E [RO] */
38#define CS35L32_FAB_ID 0x04 /* Fab ID [RO] */
39#define CS35L32_REV_ID 0x05 /* Revision ID [RO] */
40#define CS35L32_PWRCTL1 0x06 /* Power Ctl 1 */
41#define CS35L32_PWRCTL2 0x07 /* Power Ctl 2 */
42#define CS35L32_CLK_CTL 0x08 /* Clock Ctl */
43#define CS35L32_BATT_THRESHOLD 0x09 /* Low Battery Threshold */
44#define CS35L32_VMON 0x0A /* Voltage Monitor [RO] */
45#define CS35L32_BST_CPCP_CTL 0x0B /* Conv Peak Curr Protection CTL */
46#define CS35L32_IMON_SCALING 0x0C /* IMON Scaling */
47#define CS35L32_AUDIO_LED_MNGR 0x0D /* Audio/LED Pwr Manager */
48#define CS35L32_ADSP_CTL 0x0F /* Serial Port Control */
49#define CS35L32_CLASSD_CTL 0x10 /* Class D Amp CTL */
50#define CS35L32_PROTECT_CTL 0x11 /* Protection Release CTL */
51#define CS35L32_INT_MASK_1 0x12 /* Interrupt Mask 1 */
52#define CS35L32_INT_MASK_2 0x13 /* Interrupt Mask 2 */
53#define CS35L32_INT_MASK_3 0x14 /* Interrupt Mask 3 */
54#define CS35L32_INT_STATUS_1 0x15 /* Interrupt Status 1 [RO] */
55#define CS35L32_INT_STATUS_2 0x16 /* Interrupt Status 2 [RO] */
56#define CS35L32_INT_STATUS_3 0x17 /* Interrupt Status 3 [RO] */
57#define CS35L32_LED_STATUS 0x18 /* LED Lighting Status [RO] */
58#define CS35L32_FLASH_MODE 0x19 /* LED Flash Mode Current */
59#define CS35L32_MOVIE_MODE 0x1A /* LED Movie Mode Current */
60#define CS35L32_FLASH_TIMER 0x1B /* LED Flash Timer */
61#define CS35L32_FLASH_INHIBIT 0x1C /* LED Flash Inhibit Current */
62#define CS35L32_MAX_REGISTER 0x1C
63
64#define CS35L32_MCLK_DIV2 0x01
65#define CS35L32_MCLK_RATIO 0x01
66#define CS35L32_MCLKDIS 0x80
67#define CS35L32_PDN_ALL 0x01
68#define CS35L32_PDN_AMP 0x80
69#define CS35L32_PDN_BOOST 0x04
70#define CS35L32_PDN_IMON 0x40
71#define CS35L32_PDN_VMON 0x80
72#define CS35L32_PDN_VPMON 0x20
73#define CS35L32_PDN_ADSP 0x08
74
75#define CS35L32_MCLK_DIV2_MASK 0x40
76#define CS35L32_MCLK_RATIO_MASK 0x01
77#define CS35L32_MCLK_MASK 0x41
78#define CS35L32_ADSP_MASTER_MASK 0x40
79#define CS35L32_BOOST_MASK 0x03
80#define CS35L32_GAIN_MGR_MASK 0x08
81#define CS35L32_ADSP_SHARE_MASK 0x08
82#define CS35L32_ADSP_DATACFG_MASK 0x30
83#define CS35L32_SDOUT_3ST 0x80
84#define CS35L32_BATT_REC_MASK 0x0E
85#define CS35L32_BATT_THRESH_MASK 0x30
86
87#define CS35L32_RATES (SNDRV_PCM_RATE_48000)
88#define CS35L32_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
89 SNDRV_PCM_FMTBIT_S24_LE | \
90 SNDRV_PCM_FMTBIT_S32_LE)
91
92
93#endif