blob: 90f5f04eca2d89903e16b5bdb9ff949c929f9ad2 [file] [log] [blame]
Steve Sakomancc175572008-10-30 21:35:26 -07001/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +030029#include <linux/of.h>
30#include <linux/of_gpio.h>
Santosh Shilimkarb07682b2009-12-13 20:05:51 +010031#include <linux/i2c/twl.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090032#include <linux/slab.h>
Peter Ujfalusi281ecd12012-09-10 13:46:27 +030033#include <linux/gpio.h>
Steve Sakomancc175572008-10-30 21:35:26 -070034#include <sound/core.h>
35#include <sound/pcm.h>
36#include <sound/pcm_params.h>
37#include <sound/soc.h>
Steve Sakomancc175572008-10-30 21:35:26 -070038#include <sound/initval.h>
Peter Ujfalusic10b82c2008-11-24 13:49:35 +020039#include <sound/tlv.h>
Steve Sakomancc175572008-10-30 21:35:26 -070040
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000041/* Register descriptions are here */
Peter Ujfalusi57fe7252011-05-31 12:02:49 +030042#include <linux/mfd/twl4030-audio.h>
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000043
Peter Ujfalusi5712ded2012-12-31 11:51:46 +010044/* TWL4030 PMBR1 Register */
45#define TWL4030_PMBR1_REG 0x0D
46/* TWL4030 PMBR1 Register GPIO6 mux bits */
47#define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2)
48
Lars-Peter Clausen052901f42013-10-06 13:43:50 +020049#define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1)
Steve Sakomancc175572008-10-30 21:35:26 -070050
Peter Ujfalusi73939582009-01-29 14:57:50 +020051/* codec private data */
52struct twl4030_priv {
Peter Ujfalusi73939582009-01-29 14:57:50 +020053 unsigned int codec_powered;
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +030054
55 /* reference counts of AIF/APLL users */
Peter Ujfalusi2845fa12009-10-28 10:57:05 +020056 unsigned int apll_enabled;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +020057
58 struct snd_pcm_substream *master_substream;
59 struct snd_pcm_substream *slave_substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +030060
61 unsigned int configured;
62 unsigned int rate;
63 unsigned int sample_bits;
64 unsigned int channels;
Peter Ujfalusi6943c922009-05-18 16:02:05 +030065
66 unsigned int sysclk;
67
Peter Ujfalusic96907f2010-03-22 17:46:37 +020068 /* Output (with associated amp) states */
69 u8 hsl_enabled, hsr_enabled;
70 u8 earpiece_enabled;
71 u8 predrivel_enabled, predriver_enabled;
72 u8 carkitl_enabled, carkitr_enabled;
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +020073 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +030074
Peter Ujfalusi182f73f2012-09-10 13:46:31 +030075 struct twl4030_codec_data *pdata;
Peter Ujfalusi73939582009-01-29 14:57:50 +020076};
77
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +020078static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)
79{
80 int i;
81 u8 byte;
82
83 for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {
84 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);
85 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;
86 }
87}
88
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +020089static unsigned int twl4030_read(struct snd_soc_codec *codec, unsigned int reg)
90{
91 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
92 u8 value = 0;
Steve Sakomancc175572008-10-30 21:35:26 -070093
Ian Molton91432e92009-01-17 17:44:23 +000094 if (reg >= TWL4030_CACHEREGNUM)
95 return -EIO;
96
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +020097 switch (reg) {
98 case TWL4030_REG_EAR_CTL:
99 case TWL4030_REG_PREDL_CTL:
100 case TWL4030_REG_PREDR_CTL:
101 case TWL4030_REG_PRECKL_CTL:
102 case TWL4030_REG_PRECKR_CTL:
103 case TWL4030_REG_HS_GAIN_SET:
104 value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL];
105 break;
106 default:
107 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
108 break;
109 }
Steve Sakomancc175572008-10-30 21:35:26 -0700110
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200111 return value;
Steve Sakomancc175572008-10-30 21:35:26 -0700112}
113
Peter Ujfalusib703b502014-01-03 15:27:56 +0200114static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030,
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200115 unsigned int reg)
Steve Sakomancc175572008-10-30 21:35:26 -0700116{
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200117 bool write_to_reg = false;
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200118
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200119 /* Decide if the given register can be written */
120 switch (reg) {
121 case TWL4030_REG_EAR_CTL:
122 if (twl4030->earpiece_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200123 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200124 break;
125 case TWL4030_REG_PREDL_CTL:
126 if (twl4030->predrivel_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200127 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200128 break;
129 case TWL4030_REG_PREDR_CTL:
130 if (twl4030->predriver_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200131 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200132 break;
133 case TWL4030_REG_PRECKL_CTL:
134 if (twl4030->carkitl_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200135 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200136 break;
137 case TWL4030_REG_PRECKR_CTL:
138 if (twl4030->carkitr_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200139 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200140 break;
141 case TWL4030_REG_HS_GAIN_SET:
142 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200143 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200144 break;
145 default:
146 /* All other register can be written */
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200147 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200148 break;
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200149 }
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200150
151 return write_to_reg;
152}
153
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200154static int twl4030_write(struct snd_soc_codec *codec, unsigned int reg,
155 unsigned int value)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200156{
Peter Ujfalusia450aa62014-01-03 15:27:55 +0200157 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
158
159 /* Update the ctl cache */
160 switch (reg) {
161 case TWL4030_REG_EAR_CTL:
162 case TWL4030_REG_PREDL_CTL:
163 case TWL4030_REG_PREDR_CTL:
164 case TWL4030_REG_PRECKL_CTL:
165 case TWL4030_REG_PRECKR_CTL:
166 case TWL4030_REG_HS_GAIN_SET:
167 twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value;
168 break;
169 default:
170 break;
171 }
172
Peter Ujfalusib703b502014-01-03 15:27:56 +0200173 if (twl4030_can_write_to_chip(twl4030, reg))
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200174 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200175
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200176 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700177}
178
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300179static inline void twl4030_wait_ms(int time)
180{
181 if (time < 60) {
182 time *= 1000;
183 usleep_range(time, time + 500);
184 } else {
185 msleep(time);
186 }
187}
188
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200189static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
Steve Sakomancc175572008-10-30 21:35:26 -0700190{
Mark Brownb2c812e2010-04-14 15:35:19 +0900191 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300192 int mode;
Steve Sakomancc175572008-10-30 21:35:26 -0700193
Peter Ujfalusi73939582009-01-29 14:57:50 +0200194 if (enable == twl4030->codec_powered)
195 return;
196
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200197 if (enable)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300198 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200199 else
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300200 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
Steve Sakomancc175572008-10-30 21:35:26 -0700201
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200202 if (mode >= 0)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300203 twl4030->codec_powered = enable;
Steve Sakomancc175572008-10-30 21:35:26 -0700204
205 /* REVISIT: this delay is present in TI sample drivers */
206 /* but there seems to be no TRM requirement for it */
207 udelay(10);
208}
209
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300210static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata,
211 struct device_node *node)
212{
213 int value;
214
215 of_property_read_u32(node, "ti,digimic_delay",
216 &pdata->digimic_delay);
217 of_property_read_u32(node, "ti,ramp_delay_value",
218 &pdata->ramp_delay_value);
219 of_property_read_u32(node, "ti,offset_cncl_path",
220 &pdata->offset_cncl_path);
221 if (!of_property_read_u32(node, "ti,hs_extmute", &value))
222 pdata->hs_extmute = value;
223
224 pdata->hs_extmute_gpio = of_get_named_gpio(node,
225 "ti,hs_extmute_gpio", 0);
226 if (gpio_is_valid(pdata->hs_extmute_gpio))
227 pdata->hs_extmute = 1;
228}
229
230static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -0700231{
Peter Ujfalusi4ae6df52011-05-31 15:21:13 +0300232 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300233 struct device_node *twl4030_codec_node = NULL;
234
235 twl4030_codec_node = of_find_node_by_name(codec->dev->parent->of_node,
236 "codec");
237
238 if (!pdata && twl4030_codec_node) {
239 pdata = devm_kzalloc(codec->dev,
240 sizeof(struct twl4030_codec_data),
241 GFP_KERNEL);
242 if (!pdata) {
243 dev_err(codec->dev, "Can not allocate memory\n");
244 return NULL;
245 }
246 twl4030_setup_pdata_of(pdata, twl4030_codec_node);
247 }
248
249 return pdata;
250}
251
252static void twl4030_init_chip(struct snd_soc_codec *codec)
253{
254 struct twl4030_codec_data *pdata;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300255 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
256 u8 reg, byte;
257 int i = 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700258
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300259 pdata = twl4030_get_pdata(codec);
260
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100261 if (pdata && pdata->hs_extmute) {
262 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
263 int ret;
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300264
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100265 if (!pdata->hs_extmute_gpio)
266 dev_warn(codec->dev,
267 "Extmute GPIO is 0 is this correct?\n");
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300268
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100269 ret = gpio_request_one(pdata->hs_extmute_gpio,
270 GPIOF_OUT_INIT_LOW,
271 "hs_extmute");
272 if (ret) {
273 dev_err(codec->dev,
274 "Failed to get hs_extmute GPIO\n");
275 pdata->hs_extmute_gpio = -1;
276 }
277 } else {
278 u8 pin_mux;
279
280 /* Set TWL4030 GPIO6 as EXTMUTE signal */
281 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux,
282 TWL4030_PMBR1_REG);
283 pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03);
284 pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02);
285 twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux,
286 TWL4030_PMBR1_REG);
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300287 }
288 }
289
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +0200290 /* Initialize the local ctl register cache */
291 tw4030_init_ctl_cache(twl4030);
292
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300293 /* anti-pop when changing analog gain */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200294 reg = twl4030_read(codec, TWL4030_REG_MISC_SET_1);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300295 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200296 reg | TWL4030_SMOOTH_ANAVOL_EN);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300297
298 twl4030_write(codec, TWL4030_REG_OPTION,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200299 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
300 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300301
Peter Ujfalusi3c36cc62010-05-26 11:38:19 +0300302 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
303 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
304
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300305 /* Machine dependent setup */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000306 if (!pdata)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300307 return;
308
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300309 twl4030->pdata = pdata;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300310
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200311 reg = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300312 reg &= ~TWL4030_RAMP_DELAY;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000313 reg |= (pdata->ramp_delay_value << 2);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200314 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, reg);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300315
316 /* initiate offset cancellation */
317 twl4030_codec_enable(codec, 1);
318
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200319 reg = twl4030_read(codec, TWL4030_REG_ANAMICL);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300320 reg &= ~TWL4030_OFFSET_CNCL_SEL;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000321 reg |= pdata->offset_cncl_path;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300322 twl4030_write(codec, TWL4030_REG_ANAMICL,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200323 reg | TWL4030_CNCL_OFFSET_START);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300324
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300325 /*
326 * Wait for offset cancellation to complete.
327 * Since this takes a while, do not slam the i2c.
328 * Start polling the status after ~20ms.
329 */
330 msleep(20);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300331 do {
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300332 usleep_range(1000, 2000);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200333 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300334 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200335 TWL4030_REG_ANAMICL);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200336 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300337 } while ((i++ < 100) &&
338 ((byte & TWL4030_CNCL_OFFSET_START) ==
339 TWL4030_CNCL_OFFSET_START));
340
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200341 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -0700342}
343
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200344static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200345{
Mark Brownb2c812e2010-04-14 15:35:19 +0900346 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi73939582009-01-29 14:57:50 +0200347
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300348 if (enable) {
349 twl4030->apll_enabled++;
350 if (twl4030->apll_enabled == 1)
Sachin Kamatbb17bc72014-07-01 09:59:31 +0530351 twl4030_audio_enable_resource(
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300352 TWL4030_AUDIO_RES_APLL);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300353 } else {
354 twl4030->apll_enabled--;
355 if (!twl4030->apll_enabled)
Sachin Kamatbb17bc72014-07-01 09:59:31 +0530356 twl4030_audio_disable_resource(
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300357 TWL4030_AUDIO_RES_APLL);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300358 }
Peter Ujfalusi73939582009-01-29 14:57:50 +0200359}
360
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200361/* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900362static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
363 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
364 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
365 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
366 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
367};
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200368
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200369/* PreDrive Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900370static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
371 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
372 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
373 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
374 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
375};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200376
377/* PreDrive Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900378static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
379 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
380 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
381 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
382 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
383};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200384
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200385/* Headset Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900386static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
387 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
388 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
389 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
390};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200391
392/* Headset Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900393static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
394 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
395 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
396 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
397};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200398
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200399/* Carkit Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900400static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
401 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
402 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
403 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
404};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200405
406/* Carkit Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900407static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
408 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
409 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
410 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
411};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200412
Peter Ujfalusidf339802008-12-09 12:35:51 +0200413/* Handsfree Left */
414static const char *twl4030_handsfreel_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900415 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200416
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100417static SOC_ENUM_SINGLE_DECL(twl4030_handsfreel_enum,
418 TWL4030_REG_HFL_CTL, 0,
419 twl4030_handsfreel_texts);
Peter Ujfalusidf339802008-12-09 12:35:51 +0200420
421static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
422SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
423
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300424/* Handsfree Left virtual mute */
425static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200426 SOC_DAPM_SINGLE_VIRT("Switch", 1);
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300427
Peter Ujfalusidf339802008-12-09 12:35:51 +0200428/* Handsfree Right */
429static const char *twl4030_handsfreer_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900430 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200431
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100432static SOC_ENUM_SINGLE_DECL(twl4030_handsfreer_enum,
433 TWL4030_REG_HFR_CTL, 0,
434 twl4030_handsfreer_texts);
Peter Ujfalusidf339802008-12-09 12:35:51 +0200435
436static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
437SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
438
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300439/* Handsfree Right virtual mute */
440static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200441 SOC_DAPM_SINGLE_VIRT("Switch", 1);
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300442
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300443/* Vibra */
444/* Vibra audio path selection */
445static const char *twl4030_vibra_texts[] =
446 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
447
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100448static SOC_ENUM_SINGLE_DECL(twl4030_vibra_enum,
449 TWL4030_REG_VIBRA_CTL, 2,
450 twl4030_vibra_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300451
452static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
453SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
454
455/* Vibra path selection: local vibrator (PWM) or audio driven */
456static const char *twl4030_vibrapath_texts[] =
457 {"Local vibrator", "Audio"};
458
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100459static SOC_ENUM_SINGLE_DECL(twl4030_vibrapath_enum,
460 TWL4030_REG_VIBRA_CTL, 4,
461 twl4030_vibrapath_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300462
463static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
464SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
465
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200466/* Left analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900467static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300468 SOC_DAPM_SINGLE("Main Mic Capture Switch",
469 TWL4030_REG_ANAMICL, 0, 1, 0),
470 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
471 TWL4030_REG_ANAMICL, 1, 1, 0),
472 SOC_DAPM_SINGLE("AUXL Capture Switch",
473 TWL4030_REG_ANAMICL, 2, 1, 0),
474 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
475 TWL4030_REG_ANAMICL, 3, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900476};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200477
478/* Right analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900479static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300480 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
481 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900482};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200483
484/* TX1 L/R Analog/Digital microphone selection */
485static const char *twl4030_micpathtx1_texts[] =
486 {"Analog", "Digimic0"};
487
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100488static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx1_enum,
489 TWL4030_REG_ADCMICSEL, 0,
490 twl4030_micpathtx1_texts);
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200491
492static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
493SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
494
495/* TX2 L/R Analog/Digital microphone selection */
496static const char *twl4030_micpathtx2_texts[] =
497 {"Analog", "Digimic1"};
498
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100499static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx2_enum,
500 TWL4030_REG_ADCMICSEL, 2,
501 twl4030_micpathtx2_texts);
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200502
503static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
504SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
505
Peter Ujfalusi73939582009-01-29 14:57:50 +0200506/* Analog bypass for AudioR1 */
507static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
508 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
509
510/* Analog bypass for AudioL1 */
511static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
512 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
513
514/* Analog bypass for AudioR2 */
515static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
516 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
517
518/* Analog bypass for AudioL2 */
519static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
520 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
521
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500522/* Analog bypass for Voice */
523static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
524 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
525
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300526/* Digital bypass gain, mute instead of -30dB */
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200527static const unsigned int twl4030_dapm_dbypass_tlv[] = {
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300528 TLV_DB_RANGE_HEAD(3),
529 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
530 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200531 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
532};
533
534/* Digital bypass left (TX1L -> RX2L) */
535static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
536 SOC_DAPM_SINGLE_TLV("Volume",
537 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
538 twl4030_dapm_dbypass_tlv);
539
540/* Digital bypass right (TX1R -> RX2R) */
541static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
542 SOC_DAPM_SINGLE_TLV("Volume",
543 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
544 twl4030_dapm_dbypass_tlv);
545
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500546/*
547 * Voice Sidetone GAIN volume control:
548 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
549 */
550static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
551
552/* Digital bypass voice: sidetone (VUL -> VDL)*/
553static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
554 SOC_DAPM_SINGLE_TLV("Volume",
555 TWL4030_REG_VSTPGA, 0, 0x29, 0,
556 twl4030_dapm_dbypassv_tlv);
557
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300558/*
559 * Output PGA builder:
560 * Handle the muting and unmuting of the given output (turning off the
561 * amplifier associated with the output pin)
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200562 * On mute bypass the reg_cache and write 0 to the register
563 * On unmute: restore the register content from the reg_cache
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300564 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
565 */
566#define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
567static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200568 struct snd_kcontrol *kcontrol, int event) \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300569{ \
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100570 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); \
571 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300572 \
573 switch (event) { \
574 case SND_SOC_DAPM_POST_PMU: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200575 twl4030->pin_name##_enabled = 1; \
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100576 twl4030_write(codec, reg, twl4030_read(codec, reg)); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300577 break; \
578 case SND_SOC_DAPM_POST_PMD: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200579 twl4030->pin_name##_enabled = 0; \
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200580 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300581 break; \
582 } \
583 return 0; \
584}
585
586TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
587TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
588TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
589TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
590TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
591
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300592static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
Stanley.Miao49d92c72008-12-11 23:28:10 +0800593{
Stanley.Miao49d92c72008-12-11 23:28:10 +0800594 unsigned char hs_ctl;
595
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200596 hs_ctl = twl4030_read(codec, reg);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800597
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300598 if (ramp) {
599 /* HF ramp-up */
600 hs_ctl |= TWL4030_HF_CTL_REF_EN;
601 twl4030_write(codec, reg, hs_ctl);
602 udelay(10);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800603 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300604 twl4030_write(codec, reg, hs_ctl);
605 udelay(40);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800606 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
Stanley.Miao49d92c72008-12-11 23:28:10 +0800607 hs_ctl |= TWL4030_HF_CTL_HB_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300608 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800609 } else {
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300610 /* HF ramp-down */
611 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
612 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
613 twl4030_write(codec, reg, hs_ctl);
614 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
615 twl4030_write(codec, reg, hs_ctl);
616 udelay(40);
617 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
618 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800619 }
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300620}
Stanley.Miao49d92c72008-12-11 23:28:10 +0800621
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300622static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200623 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300624{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100625 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
626
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300627 switch (event) {
628 case SND_SOC_DAPM_POST_PMU:
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100629 handsfree_ramp(codec, TWL4030_REG_HFL_CTL, 1);
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300630 break;
631 case SND_SOC_DAPM_POST_PMD:
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100632 handsfree_ramp(codec, TWL4030_REG_HFL_CTL, 0);
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300633 break;
634 }
635 return 0;
636}
637
638static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200639 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300640{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100641 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
642
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300643 switch (event) {
644 case SND_SOC_DAPM_POST_PMU:
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100645 handsfree_ramp(codec, TWL4030_REG_HFR_CTL, 1);
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300646 break;
647 case SND_SOC_DAPM_POST_PMD:
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100648 handsfree_ramp(codec, TWL4030_REG_HFR_CTL, 0);
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300649 break;
650 }
Stanley.Miao49d92c72008-12-11 23:28:10 +0800651 return 0;
652}
653
Jari Vanhala86139a12009-10-29 11:58:09 +0200654static int vibramux_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200655 struct snd_kcontrol *kcontrol, int event)
Jari Vanhala86139a12009-10-29 11:58:09 +0200656{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100657 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
658
659 twl4030_write(codec, TWL4030_REG_VIBRA_SET, 0xff);
Jari Vanhala86139a12009-10-29 11:58:09 +0200660 return 0;
661}
662
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200663static int apll_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200664 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200665{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100666 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
667
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200668 switch (event) {
669 case SND_SOC_DAPM_PRE_PMU:
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100670 twl4030_apll_enable(codec, 1);
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200671 break;
672 case SND_SOC_DAPM_POST_PMD:
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100673 twl4030_apll_enable(codec, 0);
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200674 break;
675 }
676 return 0;
677}
678
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300679static int aif_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200680 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300681{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100682 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300683 u8 audio_if;
684
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100685 audio_if = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300686 switch (event) {
687 case SND_SOC_DAPM_PRE_PMU:
688 /* Enable AIF */
689 /* enable the PLL before we use it to clock the DAI */
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100690 twl4030_apll_enable(codec, 1);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300691
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100692 twl4030_write(codec, TWL4030_REG_AUDIO_IF,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200693 audio_if | TWL4030_AIF_EN);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300694 break;
695 case SND_SOC_DAPM_POST_PMD:
696 /* disable the DAI before we stop it's source PLL */
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100697 twl4030_write(codec, TWL4030_REG_AUDIO_IF,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200698 audio_if & ~TWL4030_AIF_EN);
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100699 twl4030_apll_enable(codec, 0);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300700 break;
701 }
702 return 0;
703}
704
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300705static void headset_ramp(struct snd_soc_codec *codec, int ramp)
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200706{
707 unsigned char hs_gain, hs_pop;
Mark Brownb2c812e2010-04-14 15:35:19 +0900708 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300709 struct twl4030_codec_data *pdata = twl4030->pdata;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300710 /* Base values for ramp delay calculation: 2^19 - 2^26 */
711 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
712 8388608, 16777216, 33554432, 67108864};
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300713 unsigned int delay;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200714
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200715 hs_gain = twl4030_read(codec, TWL4030_REG_HS_GAIN_SET);
716 hs_pop = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300717 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
718 twl4030->sysclk) + 1;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200719
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500720 /* Enable external mute control, this dramatically reduces
721 * the pop-noise */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000722 if (pdata && pdata->hs_extmute) {
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300723 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
724 gpio_set_value(pdata->hs_extmute_gpio, 1);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500725 } else {
726 hs_pop |= TWL4030_EXTMUTE;
727 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
728 }
729 }
730
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300731 if (ramp) {
732 /* Headset ramp-up according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200733 hs_pop |= TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300734 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200735 /* Actually write to the register */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200736 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain,
737 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200738 hs_pop |= TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300739 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500740 /* Wait ramp delay time + 1, so the VMID can settle */
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300741 twl4030_wait_ms(delay);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300742 } else {
743 /* Headset ramp-down _not_ according to
744 * the TRM, but in a way that it is working */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200745 hs_pop &= ~TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300746 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
747 /* Wait ramp delay time + 1, so the VMID can settle */
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300748 twl4030_wait_ms(delay);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200749 /* Bypass the reg_cache to mute the headset */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200750 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f),
751 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300752
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200753 hs_pop &= ~TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300754 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
755 }
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500756
757 /* Disable external mute */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000758 if (pdata && pdata->hs_extmute) {
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300759 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
760 gpio_set_value(pdata->hs_extmute_gpio, 0);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500761 } else {
762 hs_pop &= ~TWL4030_EXTMUTE;
763 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
764 }
765 }
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300766}
767
768static int headsetlpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200769 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300770{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100771 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
772 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300773
774 switch (event) {
775 case SND_SOC_DAPM_POST_PMU:
776 /* Do the ramp-up only once */
777 if (!twl4030->hsr_enabled)
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100778 headset_ramp(codec, 1);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300779
780 twl4030->hsl_enabled = 1;
781 break;
782 case SND_SOC_DAPM_POST_PMD:
783 /* Do the ramp-down only if both headsetL/R is disabled */
784 if (!twl4030->hsr_enabled)
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100785 headset_ramp(codec, 0);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300786
787 twl4030->hsl_enabled = 0;
788 break;
789 }
790 return 0;
791}
792
793static int headsetrpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200794 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300795{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100796 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
797 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300798
799 switch (event) {
800 case SND_SOC_DAPM_POST_PMU:
801 /* Do the ramp-up only once */
802 if (!twl4030->hsl_enabled)
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100803 headset_ramp(codec, 1);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300804
805 twl4030->hsr_enabled = 1;
806 break;
807 case SND_SOC_DAPM_POST_PMD:
808 /* Do the ramp-down only if both headsetL/R is disabled */
809 if (!twl4030->hsl_enabled)
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100810 headset_ramp(codec, 0);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300811
812 twl4030->hsr_enabled = 0;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200813 break;
814 }
815 return 0;
816}
817
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300818static int digimic_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200819 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300820{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100821 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
822 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300823 struct twl4030_codec_data *pdata = twl4030->pdata;
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300824
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300825 if (pdata && pdata->digimic_delay)
826 twl4030_wait_ms(pdata->digimic_delay);
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300827 return 0;
828}
829
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200830/*
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200831 * Some of the gain controls in TWL (mostly those which are associated with
832 * the outputs) are implemented in an interesting way:
833 * 0x0 : Power down (mute)
834 * 0x1 : 6dB
835 * 0x2 : 0 dB
836 * 0x3 : -6 dB
837 * Inverting not going to help with these.
838 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
839 */
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200840static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200841 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200842{
843 struct soc_mixer_control *mc =
844 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100845 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200846 unsigned int reg = mc->reg;
847 unsigned int shift = mc->shift;
848 unsigned int rshift = mc->rshift;
849 int max = mc->max;
850 int mask = (1 << fls(max)) - 1;
851
852 ucontrol->value.integer.value[0] =
853 (snd_soc_read(codec, reg) >> shift) & mask;
854 if (ucontrol->value.integer.value[0])
855 ucontrol->value.integer.value[0] =
856 max + 1 - ucontrol->value.integer.value[0];
857
858 if (shift != rshift) {
859 ucontrol->value.integer.value[1] =
860 (snd_soc_read(codec, reg) >> rshift) & mask;
861 if (ucontrol->value.integer.value[1])
862 ucontrol->value.integer.value[1] =
863 max + 1 - ucontrol->value.integer.value[1];
864 }
865
866 return 0;
867}
868
869static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200870 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200871{
872 struct soc_mixer_control *mc =
873 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100874 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200875 unsigned int reg = mc->reg;
876 unsigned int shift = mc->shift;
877 unsigned int rshift = mc->rshift;
878 int max = mc->max;
879 int mask = (1 << fls(max)) - 1;
880 unsigned short val, val2, val_mask;
881
882 val = (ucontrol->value.integer.value[0] & mask);
883
884 val_mask = mask << shift;
885 if (val)
886 val = max + 1 - val;
887 val = val << shift;
888 if (shift != rshift) {
889 val2 = (ucontrol->value.integer.value[1] & mask);
890 val_mask |= mask << rshift;
891 if (val2)
892 val2 = max + 1 - val2;
893 val |= val2 << rshift;
894 }
895 return snd_soc_update_bits(codec, reg, val_mask, val);
896}
897
898static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200899 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200900{
901 struct soc_mixer_control *mc =
902 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100903 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200904 unsigned int reg = mc->reg;
905 unsigned int reg2 = mc->rreg;
906 unsigned int shift = mc->shift;
907 int max = mc->max;
908 int mask = (1<<fls(max))-1;
909
910 ucontrol->value.integer.value[0] =
911 (snd_soc_read(codec, reg) >> shift) & mask;
912 ucontrol->value.integer.value[1] =
913 (snd_soc_read(codec, reg2) >> shift) & mask;
914
915 if (ucontrol->value.integer.value[0])
916 ucontrol->value.integer.value[0] =
917 max + 1 - ucontrol->value.integer.value[0];
918 if (ucontrol->value.integer.value[1])
919 ucontrol->value.integer.value[1] =
920 max + 1 - ucontrol->value.integer.value[1];
921
922 return 0;
923}
924
925static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200926 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200927{
928 struct soc_mixer_control *mc =
929 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100930 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200931 unsigned int reg = mc->reg;
932 unsigned int reg2 = mc->rreg;
933 unsigned int shift = mc->shift;
934 int max = mc->max;
935 int mask = (1 << fls(max)) - 1;
936 int err;
937 unsigned short val, val2, val_mask;
938
939 val_mask = mask << shift;
940 val = (ucontrol->value.integer.value[0] & mask);
941 val2 = (ucontrol->value.integer.value[1] & mask);
942
943 if (val)
944 val = max + 1 - val;
945 if (val2)
946 val2 = max + 1 - val2;
947
948 val = val << shift;
949 val2 = val2 << shift;
950
951 err = snd_soc_update_bits(codec, reg, val_mask, val);
952 if (err < 0)
953 return err;
954
955 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
956 return err;
957}
958
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500959/* Codec operation modes */
960static const char *twl4030_op_modes_texts[] = {
961 "Option 2 (voice/audio)", "Option 1 (audio)"
962};
963
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100964static SOC_ENUM_SINGLE_DECL(twl4030_op_modes_enum,
965 TWL4030_REG_CODEC_MODE, 0,
966 twl4030_op_modes_texts);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500967
Mark Brown423c2382009-06-20 13:54:02 +0100968static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500969 struct snd_ctl_elem_value *ucontrol)
970{
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100971 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Mark Brownb2c812e2010-04-14 15:35:19 +0900972 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500973
974 if (twl4030->configured) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +0200975 dev_err(codec->dev,
976 "operation mode cannot be changed on-the-fly\n");
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500977 return -EBUSY;
978 }
979
Takashi Iwai6b207c02014-02-18 08:56:39 +0100980 return snd_soc_put_enum_double(kcontrol, ucontrol);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500981}
982
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200983/*
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200984 * FGAIN volume control:
985 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
986 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200987static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200988
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200989/*
990 * CGAIN volume control:
991 * 0 dB to 12 dB in 6 dB steps
992 * value 2 and 3 means 12 dB
993 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200994static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
995
996/*
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900997 * Voice Downlink GAIN volume control:
998 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
999 */
1000static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1001
1002/*
Peter Ujfalusid889a722008-12-01 10:03:46 +02001003 * Analog playback gain
1004 * -24 dB to 12 dB in 2 dB steps
1005 */
1006static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +02001007
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001008/*
Peter Ujfalusi42902392008-12-01 10:03:47 +02001009 * Gain controls tied to outputs
1010 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1011 */
1012static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1013
1014/*
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001015 * Gain control for earpiece amplifier
1016 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1017 */
1018static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1019
1020/*
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001021 * Capture gain after the ADCs
1022 * from 0 dB to 31 dB in 1 dB steps
1023 */
1024static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1025
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001026/*
1027 * Gain control for input amplifiers
1028 * 0 dB to 30 dB in 6 dB steps
1029 */
1030static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1031
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001032/* AVADC clock priority */
1033static const char *twl4030_avadc_clk_priority_texts[] = {
1034 "Voice high priority", "HiFi high priority"
1035};
1036
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001037static SOC_ENUM_SINGLE_DECL(twl4030_avadc_clk_priority_enum,
1038 TWL4030_REG_AVADC_CTL, 2,
1039 twl4030_avadc_clk_priority_texts);
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001040
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001041static const char *twl4030_rampdelay_texts[] = {
1042 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1043 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1044 "3495/2581/1748 ms"
1045};
1046
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001047static SOC_ENUM_SINGLE_DECL(twl4030_rampdelay_enum,
1048 TWL4030_REG_HS_POPN_SET, 2,
1049 twl4030_rampdelay_texts);
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001050
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001051/* Vibra H-bridge direction mode */
1052static const char *twl4030_vibradirmode_texts[] = {
1053 "Vibra H-bridge direction", "Audio data MSB",
1054};
1055
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001056static SOC_ENUM_SINGLE_DECL(twl4030_vibradirmode_enum,
1057 TWL4030_REG_VIBRA_CTL, 5,
1058 twl4030_vibradirmode_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001059
1060/* Vibra H-bridge direction */
1061static const char *twl4030_vibradir_texts[] = {
1062 "Positive polarity", "Negative polarity",
1063};
1064
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001065static SOC_ENUM_SINGLE_DECL(twl4030_vibradir_enum,
1066 TWL4030_REG_VIBRA_CTL, 1,
1067 twl4030_vibradir_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001068
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001069/* Digimic Left and right swapping */
1070static const char *twl4030_digimicswap_texts[] = {
1071 "Not swapped", "Swapped",
1072};
1073
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001074static SOC_ENUM_SINGLE_DECL(twl4030_digimicswap_enum,
1075 TWL4030_REG_MISC_SET_1, 0,
1076 twl4030_digimicswap_texts);
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001077
Steve Sakomancc175572008-10-30 21:35:26 -07001078static const struct snd_kcontrol_new twl4030_snd_controls[] = {
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001079 /* Codec operation mode control */
1080 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1081 snd_soc_get_enum_double,
1082 snd_soc_put_twl4030_opmode_enum_double),
1083
Peter Ujfalusid889a722008-12-01 10:03:46 +02001084 /* Common playback gain controls */
1085 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1086 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1087 0, 0x3f, 0, digital_fine_tlv),
1088 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1089 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1090 0, 0x3f, 0, digital_fine_tlv),
1091
1092 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1093 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1094 6, 0x2, 0, digital_coarse_tlv),
1095 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1096 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1097 6, 0x2, 0, digital_coarse_tlv),
1098
1099 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1100 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1101 3, 0x12, 1, analog_tlv),
1102 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1103 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1104 3, 0x12, 1, analog_tlv),
Peter Ujfalusi44c55872008-12-09 08:45:44 +02001105 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1106 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1107 1, 1, 0),
1108 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1109 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1110 1, 1, 0),
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001111
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001112 /* Common voice downlink gain controls */
1113 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1114 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1115
1116 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1117 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1118
1119 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1120 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1121
Peter Ujfalusi42902392008-12-01 10:03:47 +02001122 /* Separate output gain controls */
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001123 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
Peter Ujfalusi42902392008-12-01 10:03:47 +02001124 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001125 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1126 snd_soc_put_volsw_r2_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001127
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001128 SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1129 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
1130 snd_soc_put_volsw_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001131
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001132 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
Peter Ujfalusi42902392008-12-01 10:03:47 +02001133 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001134 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1135 snd_soc_put_volsw_r2_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001136
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001137 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
1138 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
1139 snd_soc_put_volsw_twl4030, output_ear_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001140
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001141 /* Common capture gain controls */
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001142 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001143 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1144 0, 0x1f, 0, digital_capture_tlv),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001145 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1146 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1147 0, 0x1f, 0, digital_capture_tlv),
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001148
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001149 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001150 0, 3, 5, 0, input_gain_tlv),
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001151
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001152 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1153
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001154 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001155
1156 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1157 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001158
1159 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
Steve Sakomancc175572008-10-30 21:35:26 -07001160};
1161
Steve Sakomancc175572008-10-30 21:35:26 -07001162static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001163 /* Left channel inputs */
1164 SND_SOC_DAPM_INPUT("MAINMIC"),
1165 SND_SOC_DAPM_INPUT("HSMIC"),
1166 SND_SOC_DAPM_INPUT("AUXL"),
1167 SND_SOC_DAPM_INPUT("CARKITMIC"),
1168 /* Right channel inputs */
1169 SND_SOC_DAPM_INPUT("SUBMIC"),
1170 SND_SOC_DAPM_INPUT("AUXR"),
1171 /* Digital microphones (Stereo) */
1172 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1173 SND_SOC_DAPM_INPUT("DIGIMIC1"),
Steve Sakomancc175572008-10-30 21:35:26 -07001174
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001175 /* Outputs */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001176 SND_SOC_DAPM_OUTPUT("EARPIECE"),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001177 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1178 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001179 SND_SOC_DAPM_OUTPUT("HSOL"),
1180 SND_SOC_DAPM_OUTPUT("HSOR"),
Peter Ujfalusi6a1bee42008-12-10 12:51:46 +02001181 SND_SOC_DAPM_OUTPUT("CARKITL"),
1182 SND_SOC_DAPM_OUTPUT("CARKITR"),
Peter Ujfalusidf339802008-12-09 12:35:51 +02001183 SND_SOC_DAPM_OUTPUT("HFL"),
1184 SND_SOC_DAPM_OUTPUT("HFR"),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001185 SND_SOC_DAPM_OUTPUT("VIBRA"),
Steve Sakomancc175572008-10-30 21:35:26 -07001186
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001187 /* AIF and APLL clocks for running DAIs (including loopback) */
1188 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1189 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1190 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1191
Peter Ujfalusi53b50472008-12-09 08:45:43 +02001192 /* DACs */
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001193 SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
1194 SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
1195 SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
1196 SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
1197 SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001198
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001199 SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0,
1200 TWL4030_REG_VOICE_IF, 6, 0),
1201
Peter Ujfalusi73939582009-01-29 14:57:50 +02001202 /* Analog bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001203 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1204 &twl4030_dapm_abypassr1_control),
1205 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1206 &twl4030_dapm_abypassl1_control),
1207 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1208 &twl4030_dapm_abypassr2_control),
1209 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1210 &twl4030_dapm_abypassl2_control),
1211 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1212 &twl4030_dapm_abypassv_control),
1213
1214 /* Master analog loopback switch */
1215 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1216 NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001217
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001218 /* Digital bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001219 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1220 &twl4030_dapm_dbypassl_control),
1221 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1222 &twl4030_dapm_dbypassr_control),
1223 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1224 &twl4030_dapm_dbypassv_control),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001225
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001226 /* Digital mixers, power control for the physical DACs */
1227 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1228 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1229 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1230 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1231 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1232 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1233 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1234 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1235 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1236 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1237
1238 /* Analog mixers, power control for the physical PGAs */
1239 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1240 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1241 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1242 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1243 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1244 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1245 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1246 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1247 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1248 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001249
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001250 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1251 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1252
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001253 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1254 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001255
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001256 /* Output MIXER controls */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001257 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001258 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1259 &twl4030_dapm_earpiece_controls[0],
1260 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001261 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1262 0, 0, NULL, 0, earpiecepga_event,
1263 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001264 /* PreDrivL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001265 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1266 &twl4030_dapm_predrivel_controls[0],
1267 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001268 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1269 0, 0, NULL, 0, predrivelpga_event,
1270 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001271 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1272 &twl4030_dapm_predriver_controls[0],
1273 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001274 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1275 0, 0, NULL, 0, predriverpga_event,
1276 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001277 /* HeadsetL/R */
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001278 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001279 &twl4030_dapm_hsol_controls[0],
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001280 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1281 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1282 0, 0, NULL, 0, headsetlpga_event,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001283 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1284 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1285 &twl4030_dapm_hsor_controls[0],
1286 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001287 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1288 0, 0, NULL, 0, headsetrpga_event,
1289 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001290 /* CarkitL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001291 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1292 &twl4030_dapm_carkitl_controls[0],
1293 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001294 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1295 0, 0, NULL, 0, carkitlpga_event,
1296 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001297 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1298 &twl4030_dapm_carkitr_controls[0],
1299 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001300 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1301 0, 0, NULL, 0, carkitrpga_event,
1302 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001303
1304 /* Output MUX controls */
Peter Ujfalusidf339802008-12-09 12:35:51 +02001305 /* HandsfreeL/R */
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001306 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1307 &twl4030_dapm_handsfreel_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001308 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001309 &twl4030_dapm_handsfreelmute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001310 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1311 0, 0, NULL, 0, handsfreelpga_event,
1312 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1313 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1314 &twl4030_dapm_handsfreer_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001315 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001316 &twl4030_dapm_handsfreermute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001317 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1318 0, 0, NULL, 0, handsfreerpga_event,
1319 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001320 /* Vibra */
Jari Vanhala86139a12009-10-29 11:58:09 +02001321 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1322 &twl4030_dapm_vibra_control, vibramux_event,
1323 SND_SOC_DAPM_PRE_PMU),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001324 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1325 &twl4030_dapm_vibrapath_control),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001326
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001327 /* Introducing four virtual ADC, since TWL4030 have four channel for
1328 capture */
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001329 SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
1330 SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
1331 SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
1332 SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001333
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001334 SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0,
1335 TWL4030_REG_VOICE_IF, 5, 0),
1336
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001337 /* Analog/Digital mic path selection.
1338 TX1 Left/Right: either analog Left/Right or Digimic0
1339 TX2 Left/Right: either analog Left/Right or Digimic1 */
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001340 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1341 &twl4030_dapm_micpathtx1_control),
1342 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1343 &twl4030_dapm_micpathtx2_control),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001344
Joonyoung Shim97b80962009-05-11 20:36:08 +09001345 /* Analog input mixers for the capture amplifiers */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001346 SND_SOC_DAPM_MIXER("Analog Left",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001347 TWL4030_REG_ANAMICL, 4, 0,
1348 &twl4030_dapm_analoglmic_controls[0],
1349 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
Peter Ujfalusi90289352009-08-14 08:44:00 +03001350 SND_SOC_DAPM_MIXER("Analog Right",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001351 TWL4030_REG_ANAMICR, 4, 0,
1352 &twl4030_dapm_analogrmic_controls[0],
1353 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001354
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001355 SND_SOC_DAPM_PGA("ADC Physical Left",
1356 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1357 SND_SOC_DAPM_PGA("ADC Physical Right",
1358 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001359
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +03001360 SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1361 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1362 digimic_event, SND_SOC_DAPM_POST_PMU),
1363 SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1364 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1365 digimic_event, SND_SOC_DAPM_POST_PMU),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001366
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001367 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1368 NULL, 0),
1369 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1370 NULL, 0),
1371
Peter Ujfalusie04d6e52012-12-31 11:51:45 +01001372 /* Microphone bias */
1373 SND_SOC_DAPM_SUPPLY("Mic Bias 1",
1374 TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0),
1375 SND_SOC_DAPM_SUPPLY("Mic Bias 2",
1376 TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0),
1377 SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
1378 TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001379
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001380 SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001381};
1382
1383static const struct snd_soc_dapm_route intercon[] = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001384 /* Stream -> DAC mapping */
1385 {"DAC Right1", NULL, "HiFi Playback"},
1386 {"DAC Left1", NULL, "HiFi Playback"},
1387 {"DAC Right2", NULL, "HiFi Playback"},
1388 {"DAC Left2", NULL, "HiFi Playback"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001389 {"DAC Voice", NULL, "VAIFIN"},
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001390
1391 /* ADC -> Stream mapping */
1392 {"HiFi Capture", NULL, "ADC Virtual Left1"},
1393 {"HiFi Capture", NULL, "ADC Virtual Right1"},
1394 {"HiFi Capture", NULL, "ADC Virtual Left2"},
1395 {"HiFi Capture", NULL, "ADC Virtual Right2"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001396 {"VAIFOUT", NULL, "ADC Virtual Left2"},
1397 {"VAIFOUT", NULL, "ADC Virtual Right2"},
1398 {"VAIFOUT", NULL, "VIF Enable"},
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001399
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001400 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1401 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1402 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1403 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1404 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001405
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001406 /* Supply for the digital part (APLL) */
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001407 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1408
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001409 {"DAC Left1", NULL, "AIF Enable"},
1410 {"DAC Right1", NULL, "AIF Enable"},
1411 {"DAC Left2", NULL, "AIF Enable"},
1412 {"DAC Right1", NULL, "AIF Enable"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001413 {"DAC Voice", NULL, "VIF Enable"},
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001414
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001415 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1416 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1417
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001418 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1419 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1420 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1421 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1422 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001423
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001424 /* Internal playback routings */
1425 /* Earpiece */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001426 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1427 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1428 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1429 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001430 {"Earpiece PGA", NULL, "Earpiece Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001431 /* PreDrivL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001432 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1433 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1434 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1435 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001436 {"PredriveL PGA", NULL, "PredriveL Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001437 /* PreDrivR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001438 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1439 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1440 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1441 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001442 {"PredriveR PGA", NULL, "PredriveR Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001443 /* HeadsetL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001444 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1445 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1446 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001447 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001448 /* HeadsetR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001449 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1450 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1451 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001452 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001453 /* CarkitL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001454 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1455 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1456 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001457 {"CarkitL PGA", NULL, "CarkitL Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001458 /* CarkitR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001459 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1460 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1461 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001462 {"CarkitR PGA", NULL, "CarkitR Mixer"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001463 /* HandsfreeL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001464 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1465 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1466 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1467 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001468 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1469 {"HandsfreeL PGA", NULL, "HandsfreeL"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001470 /* HandsfreeR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001471 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1472 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1473 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1474 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001475 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1476 {"HandsfreeR PGA", NULL, "HandsfreeR"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001477 /* Vibra */
1478 {"Vibra Mux", "AudioL1", "DAC Left1"},
1479 {"Vibra Mux", "AudioR1", "DAC Right1"},
1480 {"Vibra Mux", "AudioL2", "DAC Left2"},
1481 {"Vibra Mux", "AudioR2", "DAC Right2"},
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001482
Steve Sakomancc175572008-10-30 21:35:26 -07001483 /* outputs */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001484 /* Must be always connected (for AIF and APLL) */
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001485 {"Virtual HiFi OUT", NULL, "DAC Left1"},
1486 {"Virtual HiFi OUT", NULL, "DAC Right1"},
1487 {"Virtual HiFi OUT", NULL, "DAC Left2"},
1488 {"Virtual HiFi OUT", NULL, "DAC Right2"},
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001489 /* Must be always connected (for APLL) */
1490 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1491 /* Physical outputs */
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001492 {"EARPIECE", NULL, "Earpiece PGA"},
1493 {"PREDRIVEL", NULL, "PredriveL PGA"},
1494 {"PREDRIVER", NULL, "PredriveR PGA"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001495 {"HSOL", NULL, "HeadsetL PGA"},
1496 {"HSOR", NULL, "HeadsetR PGA"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001497 {"CARKITL", NULL, "CarkitL PGA"},
1498 {"CARKITR", NULL, "CarkitR PGA"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001499 {"HFL", NULL, "HandsfreeL PGA"},
1500 {"HFR", NULL, "HandsfreeR PGA"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001501 {"Vibra Route", "Audio", "Vibra Mux"},
1502 {"VIBRA", NULL, "Vibra Route"},
Steve Sakomancc175572008-10-30 21:35:26 -07001503
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001504 /* Capture path */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001505 /* Must be always connected (for AIF and APLL) */
1506 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1507 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1508 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1509 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1510 /* Physical inputs */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001511 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1512 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1513 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1514 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001515
Peter Ujfalusi90289352009-08-14 08:44:00 +03001516 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1517 {"Analog Right", "AUXR Capture Switch", "AUXR"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001518
Peter Ujfalusi90289352009-08-14 08:44:00 +03001519 {"ADC Physical Left", NULL, "Analog Left"},
1520 {"ADC Physical Right", NULL, "Analog Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001521
1522 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1523 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1524
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001525 {"DIGIMIC0", NULL, "micbias1 select"},
1526 {"DIGIMIC1", NULL, "micbias2 select"},
1527
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001528 /* TX1 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001529 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001530 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1531 /* TX1 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001532 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001533 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1534 /* TX2 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001535 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001536 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1537 /* TX2 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001538 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001539 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1540
1541 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1542 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1543 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1544 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1545
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001546 {"ADC Virtual Left1", NULL, "AIF Enable"},
1547 {"ADC Virtual Right1", NULL, "AIF Enable"},
1548 {"ADC Virtual Left2", NULL, "AIF Enable"},
1549 {"ADC Virtual Right2", NULL, "AIF Enable"},
1550
Peter Ujfalusi73939582009-01-29 14:57:50 +02001551 /* Analog bypass routes */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001552 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1553 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1554 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1555 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1556 {"Voice Analog Loopback", "Switch", "Analog Left"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001557
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001558 /* Supply for the Analog loopbacks */
1559 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1560 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1561 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1562 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1563 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1564
Peter Ujfalusi73939582009-01-29 14:57:50 +02001565 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1566 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1567 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1568 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001569 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001570
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001571 /* Digital bypass routes */
1572 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1573 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001574 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001575
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001576 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1577 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1578 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001579
Steve Sakomancc175572008-10-30 21:35:26 -07001580};
1581
Steve Sakomancc175572008-10-30 21:35:26 -07001582static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1583 enum snd_soc_bias_level level)
1584{
1585 switch (level) {
1586 case SND_SOC_BIAS_ON:
Steve Sakomancc175572008-10-30 21:35:26 -07001587 break;
1588 case SND_SOC_BIAS_PREPARE:
Steve Sakomancc175572008-10-30 21:35:26 -07001589 break;
1590 case SND_SOC_BIAS_STANDBY:
Lars-Peter Clausen1682c8e2015-05-15 12:32:59 +02001591 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +03001592 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001593 break;
1594 case SND_SOC_BIAS_OFF:
Peter Ujfalusicbd2db12010-05-26 11:38:15 +03001595 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001596 break;
1597 }
Steve Sakomancc175572008-10-30 21:35:26 -07001598
1599 return 0;
1600}
1601
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001602static void twl4030_constraints(struct twl4030_priv *twl4030,
1603 struct snd_pcm_substream *mst_substream)
1604{
1605 struct snd_pcm_substream *slv_substream;
1606
1607 /* Pick the stream, which need to be constrained */
1608 if (mst_substream == twl4030->master_substream)
1609 slv_substream = twl4030->slave_substream;
1610 else if (mst_substream == twl4030->slave_substream)
1611 slv_substream = twl4030->master_substream;
1612 else /* This should not happen.. */
1613 return;
1614
1615 /* Set the constraints according to the already configured stream */
1616 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1617 SNDRV_PCM_HW_PARAM_RATE,
1618 twl4030->rate,
1619 twl4030->rate);
1620
1621 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1622 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1623 twl4030->sample_bits,
1624 twl4030->sample_bits);
1625
1626 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1627 SNDRV_PCM_HW_PARAM_CHANNELS,
1628 twl4030->channels,
1629 twl4030->channels);
1630}
1631
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001632/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1633 * capture has to be enabled/disabled. */
1634static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001635 int enable)
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001636{
1637 u8 reg, mask;
1638
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001639 reg = twl4030_read(codec, TWL4030_REG_OPTION);
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001640
1641 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1642 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1643 else
1644 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1645
1646 if (enable)
1647 reg |= mask;
1648 else
1649 reg &= ~mask;
1650
1651 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1652}
1653
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001654static int twl4030_startup(struct snd_pcm_substream *substream,
1655 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001656{
Mark Browne6968a12012-04-04 15:58:16 +01001657 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001658 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001659
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001660 if (twl4030->master_substream) {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001661 twl4030->slave_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001662 /* The DAI has one configuration for playback and capture, so
1663 * if the DAI has been already configured then constrain this
1664 * substream to match it. */
1665 if (twl4030->configured)
1666 twl4030_constraints(twl4030, twl4030->master_substream);
1667 } else {
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001668 if (!(twl4030_read(codec, TWL4030_REG_CODEC_MODE) &
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001669 TWL4030_OPTION_1)) {
1670 /* In option2 4 channel is not supported, set the
1671 * constraint for the first stream for channels, the
1672 * second stream will 'inherit' this cosntraint */
1673 snd_pcm_hw_constraint_minmax(substream->runtime,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001674 SNDRV_PCM_HW_PARAM_CHANNELS,
1675 2, 2);
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001676 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001677 twl4030->master_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001678 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001679
1680 return 0;
1681}
1682
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001683static void twl4030_shutdown(struct snd_pcm_substream *substream,
1684 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001685{
Mark Browne6968a12012-04-04 15:58:16 +01001686 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001687 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001688
1689 if (twl4030->master_substream == substream)
1690 twl4030->master_substream = twl4030->slave_substream;
1691
1692 twl4030->slave_substream = NULL;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001693
1694 /* If all streams are closed, or the remaining stream has not yet
1695 * been configured than set the DAI as not configured. */
1696 if (!twl4030->master_substream)
1697 twl4030->configured = 0;
1698 else if (!twl4030->master_substream->runtime->channels)
1699 twl4030->configured = 0;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001700
1701 /* If the closing substream had 4 channel, do the necessary cleanup */
1702 if (substream->runtime->channels == 4)
1703 twl4030_tdm_enable(codec, substream->stream, 0);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001704}
1705
Steve Sakomancc175572008-10-30 21:35:26 -07001706static int twl4030_hw_params(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001707 struct snd_pcm_hw_params *params,
1708 struct snd_soc_dai *dai)
Steve Sakomancc175572008-10-30 21:35:26 -07001709{
Mark Browne6968a12012-04-04 15:58:16 +01001710 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001711 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001712 u8 mode, old_mode, format, old_format;
1713
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001714 /* If the substream has 4 channel, do the necessary setup */
1715 if (params_channels(params) == 4) {
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001716 format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1717 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE);
Peter Ujfalusieaf1ac82009-06-01 14:06:40 +03001718
1719 /* Safety check: are we in the correct operating mode and
1720 * the interface is in TDM mode? */
1721 if ((mode & TWL4030_OPTION_1) &&
1722 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001723 twl4030_tdm_enable(codec, substream->stream, 1);
1724 else
1725 return -EINVAL;
1726 }
1727
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001728 if (twl4030->configured)
1729 /* Ignoring hw_params for already configured DAI */
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001730 return 0;
1731
Steve Sakomancc175572008-10-30 21:35:26 -07001732 /* bit rate */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001733 old_mode = twl4030_read(codec,
1734 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
Steve Sakomancc175572008-10-30 21:35:26 -07001735 mode = old_mode & ~TWL4030_APLL_RATE;
1736
1737 switch (params_rate(params)) {
1738 case 8000:
1739 mode |= TWL4030_APLL_RATE_8000;
1740 break;
1741 case 11025:
1742 mode |= TWL4030_APLL_RATE_11025;
1743 break;
1744 case 12000:
1745 mode |= TWL4030_APLL_RATE_12000;
1746 break;
1747 case 16000:
1748 mode |= TWL4030_APLL_RATE_16000;
1749 break;
1750 case 22050:
1751 mode |= TWL4030_APLL_RATE_22050;
1752 break;
1753 case 24000:
1754 mode |= TWL4030_APLL_RATE_24000;
1755 break;
1756 case 32000:
1757 mode |= TWL4030_APLL_RATE_32000;
1758 break;
1759 case 44100:
1760 mode |= TWL4030_APLL_RATE_44100;
1761 break;
1762 case 48000:
1763 mode |= TWL4030_APLL_RATE_48000;
1764 break;
Peter Ujfalusi103f2112009-04-03 14:39:05 +03001765 case 96000:
1766 mode |= TWL4030_APLL_RATE_96000;
1767 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001768 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001769 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
Steve Sakomancc175572008-10-30 21:35:26 -07001770 params_rate(params));
1771 return -EINVAL;
1772 }
1773
Steve Sakomancc175572008-10-30 21:35:26 -07001774 /* sample size */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001775 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Steve Sakomancc175572008-10-30 21:35:26 -07001776 format = old_format;
1777 format &= ~TWL4030_DATA_WIDTH;
Mark Brown04f630d2014-07-31 12:49:12 +01001778 switch (params_width(params)) {
1779 case 16:
Steve Sakomancc175572008-10-30 21:35:26 -07001780 format |= TWL4030_DATA_WIDTH_16S_16W;
1781 break;
Mark Brown04f630d2014-07-31 12:49:12 +01001782 case 32:
Steve Sakomancc175572008-10-30 21:35:26 -07001783 format |= TWL4030_DATA_WIDTH_32S_24W;
1784 break;
1785 default:
Mark Brown04f630d2014-07-31 12:49:12 +01001786 dev_err(codec->dev, "%s: unsupported bits/sample %d\n",
1787 __func__, params_width(params));
Steve Sakomancc175572008-10-30 21:35:26 -07001788 return -EINVAL;
1789 }
1790
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001791 if (format != old_format || mode != old_mode) {
1792 if (twl4030->codec_powered) {
1793 /*
1794 * If the codec is powered, than we need to toggle the
1795 * codec power.
1796 */
1797 twl4030_codec_enable(codec, 0);
1798 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1799 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1800 twl4030_codec_enable(codec, 1);
1801 } else {
1802 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1803 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1804 }
Steve Sakomancc175572008-10-30 21:35:26 -07001805 }
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001806
1807 /* Store the important parameters for the DAI configuration and set
1808 * the DAI as configured */
1809 twl4030->configured = 1;
1810 twl4030->rate = params_rate(params);
1811 twl4030->sample_bits = hw_param_interval(params,
1812 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1813 twl4030->channels = params_channels(params);
1814
1815 /* If both playback and capture streams are open, and one of them
1816 * is setting the hw parameters right now (since we are here), set
1817 * constraints to the other stream to match the current one. */
1818 if (twl4030->slave_substream)
1819 twl4030_constraints(twl4030, substream);
1820
Steve Sakomancc175572008-10-30 21:35:26 -07001821 return 0;
1822}
1823
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001824static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
1825 unsigned int freq, int dir)
Steve Sakomancc175572008-10-30 21:35:26 -07001826{
1827 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001828 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001829
1830 switch (freq) {
1831 case 19200000:
Steve Sakomancc175572008-10-30 21:35:26 -07001832 case 26000000:
Steve Sakomancc175572008-10-30 21:35:26 -07001833 case 38400000:
Steve Sakomancc175572008-10-30 21:35:26 -07001834 break;
1835 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001836 dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq);
Steve Sakomancc175572008-10-30 21:35:26 -07001837 return -EINVAL;
1838 }
1839
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001840 if ((freq / 1000) != twl4030->sysclk) {
1841 dev_err(codec->dev,
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001842 "Mismatch in HFCLKIN: %u (configured: %u)\n",
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001843 freq, twl4030->sysclk * 1000);
1844 return -EINVAL;
1845 }
Steve Sakomancc175572008-10-30 21:35:26 -07001846
1847 return 0;
1848}
1849
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001850static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
Steve Sakomancc175572008-10-30 21:35:26 -07001851{
1852 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001853 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001854 u8 old_format, format;
1855
1856 /* get format */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001857 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Steve Sakomancc175572008-10-30 21:35:26 -07001858 format = old_format;
1859
1860 /* set master/slave audio interface */
1861 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1862 case SND_SOC_DAIFMT_CBM_CFM:
1863 format &= ~(TWL4030_AIF_SLAVE_EN);
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001864 format &= ~(TWL4030_CLK256FS_EN);
Steve Sakomancc175572008-10-30 21:35:26 -07001865 break;
1866 case SND_SOC_DAIFMT_CBS_CFS:
Steve Sakomancc175572008-10-30 21:35:26 -07001867 format |= TWL4030_AIF_SLAVE_EN;
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001868 format |= TWL4030_CLK256FS_EN;
Steve Sakomancc175572008-10-30 21:35:26 -07001869 break;
1870 default:
1871 return -EINVAL;
1872 }
1873
1874 /* interface format */
1875 format &= ~TWL4030_AIF_FORMAT;
1876 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1877 case SND_SOC_DAIFMT_I2S:
1878 format |= TWL4030_AIF_FORMAT_CODEC;
1879 break;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001880 case SND_SOC_DAIFMT_DSP_A:
1881 format |= TWL4030_AIF_FORMAT_TDM;
1882 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001883 default:
1884 return -EINVAL;
1885 }
1886
1887 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001888 if (twl4030->codec_powered) {
1889 /*
1890 * If the codec is powered, than we need to toggle the
1891 * codec power.
1892 */
1893 twl4030_codec_enable(codec, 0);
1894 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1895 twl4030_codec_enable(codec, 1);
1896 } else {
1897 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1898 }
Steve Sakomancc175572008-10-30 21:35:26 -07001899 }
1900
1901 return 0;
1902}
1903
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001904static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1905{
1906 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001907 u8 reg = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001908
1909 if (tristate)
1910 reg |= TWL4030_AIF_TRI_EN;
1911 else
1912 reg &= ~TWL4030_AIF_TRI_EN;
1913
1914 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1915}
1916
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001917/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1918 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1919static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001920 int enable)
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001921{
1922 u8 reg, mask;
1923
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001924 reg = twl4030_read(codec, TWL4030_REG_OPTION);
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001925
1926 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1927 mask = TWL4030_ARXL1_VRX_EN;
1928 else
1929 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1930
1931 if (enable)
1932 reg |= mask;
1933 else
1934 reg &= ~mask;
1935
1936 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1937}
1938
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001939static int twl4030_voice_startup(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001940 struct snd_soc_dai *dai)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001941{
Mark Browne6968a12012-04-04 15:58:16 +01001942 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001943 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001944 u8 mode;
1945
1946 /* If the system master clock is not 26MHz, the voice PCM interface is
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001947 * not available.
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001948 */
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001949 if (twl4030->sysclk != 26000) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001950 dev_err(codec->dev,
1951 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
1952 __func__, twl4030->sysclk);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001953 return -EINVAL;
1954 }
1955
1956 /* If the codec mode is not option2, the voice PCM interface is not
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001957 * available.
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001958 */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001959 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001960 & TWL4030_OPT_MODE;
1961
1962 if (mode != TWL4030_OPTION_2) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001963 dev_err(codec->dev, "%s: the codec mode is not option2\n",
1964 __func__);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001965 return -EINVAL;
1966 }
1967
1968 return 0;
1969}
1970
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001971static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001972 struct snd_soc_dai *dai)
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001973{
Mark Browne6968a12012-04-04 15:58:16 +01001974 struct snd_soc_codec *codec = dai->codec;
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001975
1976 /* Enable voice digital filters */
1977 twl4030_voice_enable(codec, substream->stream, 0);
1978}
1979
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001980static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001981 struct snd_pcm_hw_params *params,
1982 struct snd_soc_dai *dai)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001983{
Mark Browne6968a12012-04-04 15:58:16 +01001984 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001985 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001986 u8 old_mode, mode;
1987
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001988 /* Enable voice digital filters */
1989 twl4030_voice_enable(codec, substream->stream, 1);
1990
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001991 /* bit rate */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001992 old_mode = twl4030_read(codec,
1993 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001994 mode = old_mode;
1995
1996 switch (params_rate(params)) {
1997 case 8000:
1998 mode &= ~(TWL4030_SEL_16K);
1999 break;
2000 case 16000:
2001 mode |= TWL4030_SEL_16K;
2002 break;
2003 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002004 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002005 params_rate(params));
2006 return -EINVAL;
2007 }
2008
2009 if (mode != old_mode) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002010 if (twl4030->codec_powered) {
2011 /*
2012 * If the codec is powered, than we need to toggle the
2013 * codec power.
2014 */
2015 twl4030_codec_enable(codec, 0);
2016 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2017 twl4030_codec_enable(codec, 1);
2018 } else {
2019 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2020 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002021 }
2022
2023 return 0;
2024}
2025
2026static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002027 int clk_id, unsigned int freq, int dir)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002028{
2029 struct snd_soc_codec *codec = codec_dai->codec;
Takashi Iwaid4a8ca22010-04-20 08:20:31 +02002030 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002031
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002032 if (freq != 26000000) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002033 dev_err(codec->dev,
2034 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
2035 __func__, freq / 1000);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002036 return -EINVAL;
2037 }
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002038 if ((freq / 1000) != twl4030->sysclk) {
2039 dev_err(codec->dev,
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002040 "Mismatch in HFCLKIN: %u (configured: %u)\n",
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002041 freq, twl4030->sysclk * 1000);
2042 return -EINVAL;
2043 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002044 return 0;
2045}
2046
2047static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002048 unsigned int fmt)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002049{
2050 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002051 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002052 u8 old_format, format;
2053
2054 /* get format */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002055 old_format = twl4030_read(codec, TWL4030_REG_VOICE_IF);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002056 format = old_format;
2057
2058 /* set master/slave audio interface */
2059 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
Lopez Cruz, Misaelc2643012009-06-19 03:23:42 -05002060 case SND_SOC_DAIFMT_CBM_CFM:
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002061 format &= ~(TWL4030_VIF_SLAVE_EN);
2062 break;
2063 case SND_SOC_DAIFMT_CBS_CFS:
2064 format |= TWL4030_VIF_SLAVE_EN;
2065 break;
2066 default:
2067 return -EINVAL;
2068 }
2069
2070 /* clock inversion */
2071 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2072 case SND_SOC_DAIFMT_IB_NF:
2073 format &= ~(TWL4030_VIF_FORMAT);
2074 break;
2075 case SND_SOC_DAIFMT_NB_IF:
2076 format |= TWL4030_VIF_FORMAT;
2077 break;
2078 default:
2079 return -EINVAL;
2080 }
2081
2082 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002083 if (twl4030->codec_powered) {
2084 /*
2085 * If the codec is powered, than we need to toggle the
2086 * codec power.
2087 */
2088 twl4030_codec_enable(codec, 0);
2089 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2090 twl4030_codec_enable(codec, 1);
2091 } else {
2092 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2093 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002094 }
2095
2096 return 0;
2097}
2098
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002099static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2100{
2101 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002102 u8 reg = twl4030_read(codec, TWL4030_REG_VOICE_IF);
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002103
2104 if (tristate)
2105 reg |= TWL4030_VIF_TRI_EN;
2106 else
2107 reg &= ~TWL4030_VIF_TRI_EN;
2108
2109 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2110}
2111
Jarkko Nikulabbba9442008-11-12 17:05:41 +02002112#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
Peter Ujfalusidcdeda42010-12-14 13:45:29 +02002113#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
Steve Sakomancc175572008-10-30 21:35:26 -07002114
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01002115static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02002116 .startup = twl4030_startup,
2117 .shutdown = twl4030_shutdown,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002118 .hw_params = twl4030_hw_params,
2119 .set_sysclk = twl4030_set_dai_sysclk,
2120 .set_fmt = twl4030_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002121 .set_tristate = twl4030_set_tristate,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002122};
2123
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01002124static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002125 .startup = twl4030_voice_startup,
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002126 .shutdown = twl4030_voice_shutdown,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002127 .hw_params = twl4030_voice_hw_params,
2128 .set_sysclk = twl4030_voice_set_dai_sysclk,
2129 .set_fmt = twl4030_voice_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002130 .set_tristate = twl4030_voice_set_tristate,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002131};
2132
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002133static struct snd_soc_dai_driver twl4030_dai[] = {
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002134{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002135 .name = "twl4030-hifi",
Steve Sakomancc175572008-10-30 21:35:26 -07002136 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002137 .stream_name = "HiFi Playback",
Steve Sakomancc175572008-10-30 21:35:26 -07002138 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002139 .channels_max = 4,
Peter Ujfalusi31ad0f32009-03-27 10:39:07 +02002140 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
Peter Ujfalusi8819f652012-01-18 12:18:26 +01002141 .formats = TWL4030_FORMATS,
2142 .sig_bits = 24,},
Steve Sakomancc175572008-10-30 21:35:26 -07002143 .capture = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03002144 .stream_name = "HiFi Capture",
Steve Sakomancc175572008-10-30 21:35:26 -07002145 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002146 .channels_max = 4,
Steve Sakomancc175572008-10-30 21:35:26 -07002147 .rates = TWL4030_RATES,
Peter Ujfalusi8819f652012-01-18 12:18:26 +01002148 .formats = TWL4030_FORMATS,
2149 .sig_bits = 24,},
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002150 .ops = &twl4030_dai_hifi_ops,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002151},
2152{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002153 .name = "twl4030-voice",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002154 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002155 .stream_name = "Voice Playback",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002156 .channels_min = 1,
2157 .channels_max = 1,
2158 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2159 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2160 .capture = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03002161 .stream_name = "Voice Capture",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002162 .channels_min = 1,
2163 .channels_max = 2,
2164 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2165 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2166 .ops = &twl4030_dai_voice_ops,
2167},
Steve Sakomancc175572008-10-30 21:35:26 -07002168};
Steve Sakomancc175572008-10-30 21:35:26 -07002169
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002170static int twl4030_soc_probe(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -07002171{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002172 struct twl4030_priv *twl4030;
Steve Sakomancc175572008-10-30 21:35:26 -07002173
Peter Ujfalusif2b1ce42012-09-10 13:46:30 +03002174 twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv),
2175 GFP_KERNEL);
Sachin Kamat04cc41a2014-06-20 15:29:03 +05302176 if (!twl4030)
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002177 return -ENOMEM;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002178 snd_soc_codec_set_drvdata(codec, twl4030);
2179 /* Set the defaults, and power up the codec */
Peter Ujfalusi57fe7252011-05-31 12:02:49 +03002180 twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002181
2182 twl4030_init_chip(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07002183
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002184 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -07002185}
2186
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002187static int twl4030_soc_remove(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -07002188{
Axel Lin5b3b0fa2010-11-19 17:31:08 +08002189 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +03002190 struct twl4030_codec_data *pdata = twl4030->pdata;
Axel Lin5b3b0fa2010-11-19 17:31:08 +08002191
Peter Ujfalusi281ecd12012-09-10 13:46:27 +03002192 if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio))
2193 gpio_free(pdata->hs_extmute_gpio);
2194
Steve Sakomancc175572008-10-30 21:35:26 -07002195 return 0;
2196}
2197
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002198static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
2199 .probe = twl4030_soc_probe,
2200 .remove = twl4030_soc_remove,
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002201 .read = twl4030_read,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002202 .write = twl4030_write,
2203 .set_bias_level = twl4030_set_bias_level,
Axel Lineb3032f2012-01-27 18:02:09 +08002204 .idle_bias_off = true,
Peter Ujfalusif7c93f02011-10-11 13:11:32 +03002205
2206 .controls = twl4030_snd_controls,
2207 .num_controls = ARRAY_SIZE(twl4030_snd_controls),
2208 .dapm_widgets = twl4030_dapm_widgets,
2209 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
2210 .dapm_routes = intercon,
2211 .num_dapm_routes = ARRAY_SIZE(intercon),
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002212};
2213
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002214static int twl4030_codec_probe(struct platform_device *pdev)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002215{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002216 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002217 twl4030_dai, ARRAY_SIZE(twl4030_dai));
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002218}
2219
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002220static int twl4030_codec_remove(struct platform_device *pdev)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002221{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002222 snd_soc_unregister_codec(&pdev->dev);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002223 return 0;
2224}
2225
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002226MODULE_ALIAS("platform:twl4030-codec");
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002227
2228static struct platform_driver twl4030_codec_driver = {
2229 .probe = twl4030_codec_probe,
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002230 .remove = twl4030_codec_remove,
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002231 .driver = {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002232 .name = "twl4030-codec",
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002233 },
Steve Sakomancc175572008-10-30 21:35:26 -07002234};
Steve Sakomancc175572008-10-30 21:35:26 -07002235
Mark Brown5bbcc3c2011-11-23 22:52:08 +00002236module_platform_driver(twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002237
Steve Sakomancc175572008-10-30 21:35:26 -07002238MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2239MODULE_AUTHOR("Steve Sakoman");
2240MODULE_LICENSE("GPL");