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Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -07001config STMMAC_ETH
2 tristate "STMicroelectronics 10/100/1000 Ethernet driver"
Jeff Kirsher7ac66532011-05-16 00:05:19 -07003 depends on HAS_IOMEM
Jeff Kirsheraaba2152011-09-14 21:23:14 +00004 select NET_CORE
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -07005 select MII
6 select PHYLIB
Carmelo AMOROSO7ba8a9b2010-03-31 21:44:03 +00007 select CRC32
Jeff Kirsher7ac66532011-05-16 00:05:19 -07008 ---help---
Giuseppe CAVALLARO7187c1a2010-01-06 23:07:22 +00009 This is the driver for the Ethernet IPs are built around a
Giuseppe CAVALLAROac757912010-08-23 20:40:41 +000010 Synopsys IP Core and only tested on the STMicroelectronics
Giuseppe CAVALLARO7187c1a2010-01-06 23:07:22 +000011 platforms.
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -070012
13if STMMAC_ETH
14
Giuseppe CAVALLARObfab27a2011-12-21 03:58:19 +000015config STMMAC_PLATFORM
Giuseppe CAVALLAROba27ec62012-06-04 19:22:57 +000016 bool "STMMAC Platform bus support"
Giuseppe CAVALLARObfab27a2011-12-21 03:58:19 +000017 depends on STMMAC_ETH
Giuseppe CAVALLARO33d5e332012-06-07 19:25:07 +000018 default y
Giuseppe CAVALLARObfab27a2011-12-21 03:58:19 +000019 ---help---
20 This selects the platform specific bus support for
21 the stmmac device driver. This is the driver used
22 on many embedded STM platforms based on ARM and SuperH
23 processors.
24 If you have a controller with this interface, say Y or M here.
25
26 If unsure, say N.
27
28config STMMAC_PCI
Kees Cook6e1215a2013-01-22 10:30:30 -080029 bool "STMMAC PCI bus support"
30 depends on STMMAC_ETH && PCI
Giuseppe CAVALLARObfab27a2011-12-21 03:58:19 +000031 ---help---
32 This is to select the Synopsys DWMAC available on PCI devices,
33 if you have a controller with this interface, say Y or M here.
34
35 This PCI support is tested on XLINX XC2V3000 FF1152AMT0221
36 D1215994A VIRTEX FPGA board.
37
38 If unsure, say N.
39
Giuseppe CAVALLARO7ac29052011-09-01 21:51:39 +000040config STMMAC_DEBUG_FS
41 bool "Enable monitoring via sysFS "
42 default n
43 depends on STMMAC_ETH && DEBUG_FS
Giuseppe CAVALLARObfab27a2011-12-21 03:58:19 +000044 ---help---
Giuseppe CAVALLAROe7434822011-09-01 21:51:41 +000045 The stmmac entry in /sys reports DMA TX/RX rings
46 or (if supported) the HW cap register.
Giuseppe CAVALLARO7ac29052011-09-01 21:51:39 +000047
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -070048config STMMAC_DA
49 bool "STMMAC DMA arbitration scheme"
50 default n
Jeff Kirsher7ac66532011-05-16 00:05:19 -070051 ---help---
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -070052 Selecting this option, rx has priority over Tx (only for Giga
53 Ethernet device).
54 By default, the DMA arbitration scheme is based on Round-robin
55 (rx:tx priority is 1:1).
56
Giuseppe CAVALLARO286a8372011-10-18 00:01:24 +000057choice
58 prompt "Select the DMA TX/RX descriptor operating modes"
59 depends on STMMAC_ETH
60 ---help---
61 This driver supports DMA descriptor to operate both in dual buffer
62 (RING) and linked-list(CHAINED) mode. In RING mode each descriptor
63 points to two data buffer pointers whereas in CHAINED mode they
64 points to only one data buffer pointer.
65
66config STMMAC_RING
67 bool "Enable Descriptor Ring Mode"
68
69config STMMAC_CHAINED
70 bool "Enable Descriptor Chained Mode"
71
72endchoice
73
74
Giuseppe Cavallaro47dd7a52009-10-14 15:13:45 -070075endif