blob: 19f197ccf28deebcc9c24990e904f9310d8b9faf [file] [log] [blame]
Linus Walleij4a31bd22012-01-11 13:52:34 +01001#include <linux/clk.h>
2#include <linux/clkdev.h>
3#include <linux/err.h>
4#include <linux/io.h>
5#include <linux/clk-provider.h>
Linus Walleij6e2b07a2013-04-16 21:38:29 +02006#include <linux/of.h>
Linus Walleij4a31bd22012-01-11 13:52:34 +01007
8/*
9 * The Nomadik clock tree is described in the STN8815A12 DB V4.2
10 * reference manual for the chip, page 94 ff.
11 */
12
Linus Walleij6e2b07a2013-04-16 21:38:29 +020013static const __initconst struct of_device_id cpu8815_clk_match[] = {
14 { .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
15 { /* sentinel */ }
16};
17
Linus Walleij4a31bd22012-01-11 13:52:34 +010018void __init nomadik_clk_init(void)
19{
20 struct clk *clk;
21
22 clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
23 clk_register_clkdev(clk, "apb_pclk", NULL);
Linus Walleij4a31bd22012-01-11 13:52:34 +010024
25 /*
26 * The 2.4 MHz TIMCLK reference clock is active at boot time, this is
27 * actually the MXTALCLK @19.2 MHz divided by 8. This clock is used
28 * by the timers and watchdog. See page 105 ff.
29 */
30 clk = clk_register_fixed_rate(NULL, "TIMCLK", NULL, CLK_IS_ROOT,
31 2400000);
32 clk_register_clkdev(clk, NULL, "mtu0");
33 clk_register_clkdev(clk, NULL, "mtu1");
34
Linus Walleij6e2b07a2013-04-16 21:38:29 +020035 of_clk_init(cpu8815_clk_match);
Linus Walleij4a31bd22012-01-11 13:52:34 +010036}