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Eric W. Biederman3b7d1922006-10-04 02:16:59 -07001#ifndef LINUX_MSI_H
2#define LINUX_MSI_H
3
Neil Hormanb50cac52011-10-06 14:08:18 -04004#include <linux/kobject.h>
Michael Ellerman4aa9bc92007-04-05 17:19:10 +10005#include <linux/list.h>
6
Eric W. Biederman3b7d1922006-10-04 02:16:59 -07007struct msi_msg {
8 u32 address_lo; /* low 32 bits of msi message address */
9 u32 address_hi; /* high 32 bits of msi message address */
10 u32 data; /* 16 bits of msi message data */
11};
12
Yijing Wang38737d82014-10-27 10:44:36 +080013extern int pci_msi_ignore_mask;
Satoru Takeuchic54c1872007-01-18 13:50:05 +090014/* Helper functions */
Thomas Gleixner1c9db522010-09-28 16:46:51 +020015struct irq_data;
Thomas Gleixner39431ac2010-09-28 19:09:51 +020016struct msi_desc;
Jiang Liu25a98bd2015-07-09 16:00:45 +080017struct pci_dev;
Marc Zyngierc09fcc4b2015-07-28 14:46:16 +010018struct platform_msi_priv_data;
Bjorn Helgaas2366d062013-04-18 10:55:46 -060019void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
Bjorn Helgaas2366d062013-04-18 10:55:46 -060020void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
Jiang Liu891d4a42014-11-09 23:10:33 +080021
Marc Zyngierc09fcc4b2015-07-28 14:46:16 +010022typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
23 struct msi_msg *msg);
24
25/**
26 * platform_msi_desc - Platform device specific msi descriptor data
27 * @msi_priv_data: Pointer to platform private data
28 * @msi_index: The index of the MSI descriptor for multi MSI
29 */
30struct platform_msi_desc {
31 struct platform_msi_priv_data *msi_priv_data;
32 u16 msi_index;
33};
34
Jiang Liufc884192015-07-09 16:00:46 +080035/**
36 * struct msi_desc - Descriptor structure for MSI based interrupts
37 * @list: List head for management
38 * @irq: The base interrupt number
39 * @nvec_used: The number of vectors used
40 * @dev: Pointer to the device which uses this descriptor
41 * @msg: The last set MSI message cached for reuse
42 *
43 * @masked: [PCI MSI/X] Mask bits
44 * @is_msix: [PCI MSI/X] True if MSI-X
45 * @multiple: [PCI MSI/X] log2 num of messages allocated
46 * @multi_cap: [PCI MSI/X] log2 num of messages supported
47 * @maskbit: [PCI MSI/X] Mask-Pending bit supported?
48 * @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
49 * @entry_nr: [PCI MSI/X] Entry which is described by this descriptor
50 * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
51 * @mask_pos: [PCI MSI] Mask register position
52 * @mask_base: [PCI MSI-X] Mask register base address
Marc Zyngierc09fcc4b2015-07-28 14:46:16 +010053 * @platform: [platform] Platform device specific msi descriptor data
Jiang Liufc884192015-07-09 16:00:46 +080054 */
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070055struct msi_desc {
Jiang Liufc884192015-07-09 16:00:46 +080056 /* Shared device/bus type independent data */
57 struct list_head list;
58 unsigned int irq;
59 unsigned int nvec_used;
60 struct device *dev;
61 struct msi_msg msg;
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070062
Matthew Wilcox264d9ca2009-03-17 08:54:08 -040063 union {
Jiang Liufc884192015-07-09 16:00:46 +080064 /* PCI MSI/X specific data */
65 struct {
66 u32 masked;
67 struct {
68 __u8 is_msix : 1;
69 __u8 multiple : 3;
70 __u8 multi_cap : 3;
71 __u8 maskbit : 1;
72 __u8 is_64 : 1;
73 __u16 entry_nr;
74 unsigned default_irq;
75 } msi_attrib;
76 union {
77 u8 mask_pos;
78 void __iomem *mask_base;
79 };
80 };
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070081
Jiang Liufc884192015-07-09 16:00:46 +080082 /*
83 * Non PCI variants add their data structure here. New
84 * entries need to use a named structure. We want
85 * proper name spaces for this. The PCI part is
86 * anonymous for now as it would require an immediate
87 * tree wide cleanup.
88 */
Marc Zyngierc09fcc4b2015-07-28 14:46:16 +010089 struct platform_msi_desc platform;
Jiang Liufc884192015-07-09 16:00:46 +080090 };
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070091};
92
Jiang Liud31eb342014-11-15 22:24:03 +080093/* Helpers to hide struct msi_desc implementation details */
Jiang Liu25a98bd2015-07-09 16:00:45 +080094#define msi_desc_to_dev(desc) ((desc)->dev)
Jiang Liu4a7cc832015-07-09 16:00:44 +080095#define dev_to_msi_list(dev) (&(dev)->msi_list)
Jiang Liud31eb342014-11-15 22:24:03 +080096#define first_msi_entry(dev) \
97 list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
98#define for_each_msi_entry(desc, dev) \
99 list_for_each_entry((desc), dev_to_msi_list((dev)), list)
100
101#ifdef CONFIG_PCI_MSI
102#define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev)
103#define for_each_pci_msi_entry(desc, pdev) \
104 for_each_msi_entry((desc), &(pdev)->dev)
105
Jiang Liu25a98bd2015-07-09 16:00:45 +0800106struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
Jiang Liuc179c9b2015-07-09 16:00:36 +0800107void *msi_desc_to_pci_sysdata(struct msi_desc *desc);
108#else /* CONFIG_PCI_MSI */
109static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
110{
111 return NULL;
112}
Jiang Liud31eb342014-11-15 22:24:03 +0800113#endif /* CONFIG_PCI_MSI */
114
Jiang Liuaa48b6f2015-07-09 16:00:47 +0800115struct msi_desc *alloc_msi_entry(struct device *dev);
116void free_msi_entry(struct msi_desc *entry);
Jiang Liu891d4a42014-11-09 23:10:33 +0800117void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
Jiang Liu83a18912014-11-09 23:10:34 +0800118void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
119void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
120
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100121u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
122u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
123void pci_msi_mask_irq(struct irq_data *data);
124void pci_msi_unmask_irq(struct irq_data *data);
125
Jiang Liu83a18912014-11-09 23:10:34 +0800126/* Conversion helpers. Should be removed after merging */
127static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
128{
129 __pci_write_msi_msg(entry, msg);
130}
131static inline void write_msi_msg(int irq, struct msi_msg *msg)
132{
133 pci_write_msi_msg(irq, msg);
134}
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100135static inline void mask_msi_irq(struct irq_data *data)
136{
137 pci_msi_mask_irq(data);
138}
139static inline void unmask_msi_irq(struct irq_data *data)
140{
141 pci_msi_unmask_irq(data);
142}
Jiang Liu891d4a42014-11-09 23:10:33 +0800143
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700144/*
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200145 * The arch hooks to setup up msi irqs. Those functions are
146 * implemented as weak symbols so that they /can/ be overriden by
147 * architecture specific code if needed.
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700148 */
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700149int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700150void arch_teardown_msi_irq(unsigned int irq);
Bjorn Helgaas2366d062013-04-18 10:55:46 -0600151int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
152void arch_teardown_msi_irqs(struct pci_dev *dev);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800153void arch_restore_msi_irqs(struct pci_dev *dev);
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200154
155void default_teardown_msi_irqs(struct pci_dev *dev);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800156void default_restore_msi_irqs(struct pci_dev *dev);
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700157
Yijing Wangc2791b82014-11-11 17:45:45 -0700158struct msi_controller {
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200159 struct module *owner;
160 struct device *dev;
Thomas Petazzoni0d5a6db2013-08-09 22:27:09 +0200161 struct device_node *of_node;
162 struct list_head list;
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200163
Yijing Wangc2791b82014-11-11 17:45:45 -0700164 int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200165 struct msi_desc *desc);
Lucas Stach339e5b42015-09-18 13:58:34 -0500166 int (*setup_irqs)(struct msi_controller *chip, struct pci_dev *dev,
167 int nvec, int type);
Yijing Wangc2791b82014-11-11 17:45:45 -0700168 void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200169};
170
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100171#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
Jiang Liud9109692014-11-15 22:24:04 +0800172
Jiang Liuaeeb5962014-11-15 22:24:05 +0800173#include <linux/irqhandler.h>
Jiang Liud9109692014-11-15 22:24:04 +0800174#include <asm/msi.h>
175
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100176struct irq_domain;
Marc Zyngier552c4942015-11-23 08:26:07 +0000177struct irq_domain_ops;
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100178struct irq_chip;
179struct device_node;
Marc Zyngierbe5436c2015-10-13 12:51:44 +0100180struct fwnode_handle;
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100181struct msi_domain_info;
182
183/**
184 * struct msi_domain_ops - MSI interrupt domain callbacks
185 * @get_hwirq: Retrieve the resulting hw irq number
186 * @msi_init: Domain specific init function for MSI interrupts
187 * @msi_free: Domain specific function to free a MSI interrupts
Jiang Liud9109692014-11-15 22:24:04 +0800188 * @msi_check: Callback for verification of the domain/info/dev data
189 * @msi_prepare: Prepare the allocation of the interrupts in the domain
Thomas Petazzoni1d1e8cd2015-12-21 14:13:08 +0100190 * @msi_finish: Optional callback to finalize the allocation
Jiang Liud9109692014-11-15 22:24:04 +0800191 * @set_desc: Set the msi descriptor for an interrupt
192 * @handle_error: Optional error handler if the allocation fails
193 *
194 * @get_hwirq, @msi_init and @msi_free are callbacks used by
195 * msi_create_irq_domain() and related interfaces
196 *
197 * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error
Thomas Petazzoni1d1e8cd2015-12-21 14:13:08 +0100198 * are callbacks used by msi_domain_alloc_irqs() and related
Jiang Liud9109692014-11-15 22:24:04 +0800199 * interfaces which are based on msi_desc.
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100200 */
201struct msi_domain_ops {
Jiang Liuaeeb5962014-11-15 22:24:05 +0800202 irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info,
203 msi_alloc_info_t *arg);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100204 int (*msi_init)(struct irq_domain *domain,
205 struct msi_domain_info *info,
206 unsigned int virq, irq_hw_number_t hwirq,
Jiang Liuaeeb5962014-11-15 22:24:05 +0800207 msi_alloc_info_t *arg);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100208 void (*msi_free)(struct irq_domain *domain,
209 struct msi_domain_info *info,
210 unsigned int virq);
Jiang Liud9109692014-11-15 22:24:04 +0800211 int (*msi_check)(struct irq_domain *domain,
212 struct msi_domain_info *info,
213 struct device *dev);
214 int (*msi_prepare)(struct irq_domain *domain,
215 struct device *dev, int nvec,
216 msi_alloc_info_t *arg);
217 void (*msi_finish)(msi_alloc_info_t *arg, int retval);
218 void (*set_desc)(msi_alloc_info_t *arg,
219 struct msi_desc *desc);
220 int (*handle_error)(struct irq_domain *domain,
221 struct msi_desc *desc, int error);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100222};
223
224/**
225 * struct msi_domain_info - MSI interrupt domain data
Jiang Liuaeeb5962014-11-15 22:24:05 +0800226 * @flags: Flags to decribe features and capabilities
227 * @ops: The callback data structure
228 * @chip: Optional: associated interrupt chip
229 * @chip_data: Optional: associated interrupt chip data
230 * @handler: Optional: associated interrupt flow handler
231 * @handler_data: Optional: associated interrupt flow handler data
232 * @handler_name: Optional: associated interrupt flow handler name
233 * @data: Optional: domain specific data
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100234 */
235struct msi_domain_info {
Jiang Liuaeeb5962014-11-15 22:24:05 +0800236 u32 flags;
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100237 struct msi_domain_ops *ops;
238 struct irq_chip *chip;
Jiang Liuaeeb5962014-11-15 22:24:05 +0800239 void *chip_data;
240 irq_flow_handler_t handler;
241 void *handler_data;
242 const char *handler_name;
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100243 void *data;
244};
245
Jiang Liuaeeb5962014-11-15 22:24:05 +0800246/* Flags for msi_domain_info */
247enum {
248 /*
249 * Init non implemented ops callbacks with default MSI domain
250 * callbacks.
251 */
252 MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0),
253 /*
254 * Init non implemented chip callbacks with default MSI chip
255 * callbacks.
256 */
257 MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1),
258 /* Build identity map between hwirq and irq */
259 MSI_FLAG_IDENTITY_MAP = (1 << 2),
260 /* Support multiple PCI MSI interrupts */
261 MSI_FLAG_MULTI_PCI_MSI = (1 << 3),
262 /* Support PCI MSIX interrupts */
263 MSI_FLAG_PCI_MSIX = (1 << 4),
264};
265
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100266int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
267 bool force);
268
Marc Zyngierbe5436c2015-10-13 12:51:44 +0100269struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100270 struct msi_domain_info *info,
271 struct irq_domain *parent);
Jiang Liud9109692014-11-15 22:24:04 +0800272int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
273 int nvec);
274void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100275struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
276
Marc Zyngierbe5436c2015-10-13 12:51:44 +0100277struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode,
Marc Zyngierc09fcc4b2015-07-28 14:46:16 +0100278 struct msi_domain_info *info,
279 struct irq_domain *parent);
280int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
281 irq_write_msi_msg_t write_msi_msg);
282void platform_msi_domain_free_irqs(struct device *dev);
Marc Zyngierb2eba392015-11-23 08:26:05 +0000283
284/* When an MSI domain is used as an intermediate domain */
285int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
286 int nvec, msi_alloc_info_t *args);
Marc Zyngier2145ac92015-11-23 08:26:06 +0000287int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
288 int virq, int nvec, msi_alloc_info_t *args);
Marc Zyngier552c4942015-11-23 08:26:07 +0000289struct irq_domain *
290platform_msi_create_device_domain(struct device *dev,
291 unsigned int nvec,
292 irq_write_msi_msg_t write_msi_msg,
293 const struct irq_domain_ops *ops,
294 void *host_data);
295int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
296 unsigned int nr_irqs);
297void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq,
298 unsigned int nvec);
299void *platform_msi_get_host_data(struct irq_domain *domain);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100300#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
301
Jiang Liu3878eae2014-11-11 21:02:18 +0800302#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
303void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg);
Marc Zyngierbe5436c2015-10-13 12:51:44 +0100304struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
Jiang Liu3878eae2014-11-11 21:02:18 +0800305 struct msi_domain_info *info,
306 struct irq_domain *parent);
307int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
308 int nvec, int type);
309void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev);
Marc Zyngierbe5436c2015-10-13 12:51:44 +0100310struct irq_domain *pci_msi_create_default_irq_domain(struct fwnode_handle *fwnode,
Jiang Liu8e047ad2014-11-15 22:24:07 +0800311 struct msi_domain_info *info, struct irq_domain *parent);
312
Jiang Liu3878eae2014-11-11 21:02:18 +0800313irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
314 struct msi_desc *desc);
315int pci_msi_domain_check_cap(struct irq_domain *domain,
316 struct msi_domain_info *info, struct device *dev);
David Daneyb6eec9b2015-10-08 15:10:49 -0700317u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
Marc Zyngier54fa97e2015-10-02 14:43:06 +0100318struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);
319#else
320static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
321{
322 return NULL;
323}
Jiang Liu3878eae2014-11-11 21:02:18 +0800324#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
325
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700326#endif /* LINUX_MSI_H */