Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*- |
| 2 | */ |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 3 | /* |
Dave Airlie | bc54fd1 | 2005-06-23 22:46:46 +1000 | [diff] [blame] | 4 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
| 6 | * All Rights Reserved. |
Dave Airlie | bc54fd1 | 2005-06-23 22:46:46 +1000 | [diff] [blame] | 7 | * |
| 8 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 9 | * copy of this software and associated documentation files (the |
| 10 | * "Software"), to deal in the Software without restriction, including |
| 11 | * without limitation the rights to use, copy, modify, merge, publish, |
| 12 | * distribute, sub license, and/or sell copies of the Software, and to |
| 13 | * permit persons to whom the Software is furnished to do so, subject to |
| 14 | * the following conditions: |
| 15 | * |
| 16 | * The above copyright notice and this permission notice (including the |
| 17 | * next paragraph) shall be included in all copies or substantial portions |
| 18 | * of the Software. |
| 19 | * |
| 20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| 21 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 22 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
| 23 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
| 24 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 25 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 26 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 27 | * |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 28 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 30 | #include <linux/device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | #include "drmP.h" |
| 32 | #include "drm.h" |
| 33 | #include "i915_drm.h" |
| 34 | #include "i915_drv.h" |
Kenneth Graunke | f49f058 | 2010-09-11 01:19:14 -0700 | [diff] [blame] | 35 | #include "intel_drv.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 37 | #include <linux/console.h> |
Zhao Yakui | 354ff96 | 2009-07-08 14:13:12 +0800 | [diff] [blame] | 38 | #include "drm_crtc_helper.h" |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 39 | |
Ben Widawsky | a35d9d3 | 2011-07-13 14:38:17 -0700 | [diff] [blame] | 40 | static int i915_modeset __read_mostly = -1; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 41 | module_param_named(modeset, i915_modeset, int, 0400); |
Ben Widawsky | 6e96e77 | 2011-07-13 14:38:18 -0700 | [diff] [blame^] | 42 | MODULE_PARM_DESC(modeset, |
| 43 | "Use kernel modesetting [KMS] (0=DRM_I915_KMS from .config, " |
| 44 | "1=on, -1=force vga console preference [default])"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 45 | |
Ben Widawsky | a35d9d3 | 2011-07-13 14:38:17 -0700 | [diff] [blame] | 46 | unsigned int i915_fbpercrtc __always_unused = 0; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 47 | module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | |
Ben Widawsky | a35d9d3 | 2011-07-13 14:38:17 -0700 | [diff] [blame] | 49 | int i915_panel_ignore_lid __read_mostly = 0; |
Chris Wilson | fca8740 | 2011-02-17 13:44:48 +0000 | [diff] [blame] | 50 | module_param_named(panel_ignore_lid, i915_panel_ignore_lid, int, 0600); |
Ben Widawsky | 6e96e77 | 2011-07-13 14:38:18 -0700 | [diff] [blame^] | 51 | MODULE_PARM_DESC(panel_ignore_lid, |
| 52 | "Override lid status (0=autodetect [default], 1=lid open, " |
| 53 | "-1=lid closed)"); |
Chris Wilson | fca8740 | 2011-02-17 13:44:48 +0000 | [diff] [blame] | 54 | |
Ben Widawsky | a35d9d3 | 2011-07-13 14:38:17 -0700 | [diff] [blame] | 55 | unsigned int i915_powersave __read_mostly = 1; |
Chris Wilson | 0aa9927 | 2010-11-02 09:20:50 +0000 | [diff] [blame] | 56 | module_param_named(powersave, i915_powersave, int, 0600); |
Ben Widawsky | 6e96e77 | 2011-07-13 14:38:18 -0700 | [diff] [blame^] | 57 | MODULE_PARM_DESC(powersave, |
| 58 | "Enable powersavings, fbc, downclocking, etc. (default: true)"); |
Jesse Barnes | 652c393 | 2009-08-17 13:31:43 -0700 | [diff] [blame] | 59 | |
Ben Widawsky | a35d9d3 | 2011-07-13 14:38:17 -0700 | [diff] [blame] | 60 | unsigned int i915_semaphores __read_mostly = 0; |
Chris Wilson | a1656b9 | 2011-03-04 18:48:03 +0000 | [diff] [blame] | 61 | module_param_named(semaphores, i915_semaphores, int, 0600); |
Ben Widawsky | 6e96e77 | 2011-07-13 14:38:18 -0700 | [diff] [blame^] | 62 | MODULE_PARM_DESC(semaphores, |
| 63 | "Use semaphores for inter-ring sync (default: false)"); |
Chris Wilson | a1656b9 | 2011-03-04 18:48:03 +0000 | [diff] [blame] | 64 | |
Ben Widawsky | a35d9d3 | 2011-07-13 14:38:17 -0700 | [diff] [blame] | 65 | unsigned int i915_enable_rc6 __read_mostly = 0; |
Chris Wilson | ac66808 | 2011-02-09 16:15:32 +0000 | [diff] [blame] | 66 | module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600); |
Ben Widawsky | 6e96e77 | 2011-07-13 14:38:18 -0700 | [diff] [blame^] | 67 | MODULE_PARM_DESC(i915_enable_rc6, |
| 68 | "Enable power-saving render C-state 6 (default: true)"); |
Chris Wilson | ac66808 | 2011-02-09 16:15:32 +0000 | [diff] [blame] | 69 | |
Ben Widawsky | a35d9d3 | 2011-07-13 14:38:17 -0700 | [diff] [blame] | 70 | unsigned int i915_enable_fbc __read_mostly = 1; |
Jesse Barnes | c1a9f04 | 2011-05-05 15:24:21 -0700 | [diff] [blame] | 71 | module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600); |
Ben Widawsky | 6e96e77 | 2011-07-13 14:38:18 -0700 | [diff] [blame^] | 72 | MODULE_PARM_DESC(i915_enable_fbc, |
| 73 | "Enable frame buffer compression for power savings " |
| 74 | "(default: false)"); |
Jesse Barnes | c1a9f04 | 2011-05-05 15:24:21 -0700 | [diff] [blame] | 75 | |
Ben Widawsky | a35d9d3 | 2011-07-13 14:38:17 -0700 | [diff] [blame] | 76 | unsigned int i915_lvds_downclock __read_mostly = 0; |
Jesse Barnes | 3381434 | 2010-01-14 20:48:02 +0000 | [diff] [blame] | 77 | module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400); |
Ben Widawsky | 6e96e77 | 2011-07-13 14:38:18 -0700 | [diff] [blame^] | 78 | MODULE_PARM_DESC(lvds_downclock, |
| 79 | "Use panel (LVDS/eDP) downclocking for power savings " |
| 80 | "(default: false)"); |
Jesse Barnes | 3381434 | 2010-01-14 20:48:02 +0000 | [diff] [blame] | 81 | |
Ben Widawsky | a35d9d3 | 2011-07-13 14:38:17 -0700 | [diff] [blame] | 82 | unsigned int i915_panel_use_ssc __read_mostly = 1; |
Chris Wilson | a761503 | 2011-01-12 17:04:08 +0000 | [diff] [blame] | 83 | module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600); |
Ben Widawsky | 6e96e77 | 2011-07-13 14:38:18 -0700 | [diff] [blame^] | 84 | MODULE_PARM_DESC(lvds_use_ssc, |
| 85 | "Use Spread Spectrum Clock with panels [LVDS/eDP] " |
| 86 | "(default: true)"); |
Chris Wilson | a761503 | 2011-01-12 17:04:08 +0000 | [diff] [blame] | 87 | |
Ben Widawsky | a35d9d3 | 2011-07-13 14:38:17 -0700 | [diff] [blame] | 88 | int i915_vbt_sdvo_panel_type __read_mostly = -1; |
Chris Wilson | 5a1e5b6 | 2011-01-29 16:50:25 +0000 | [diff] [blame] | 89 | module_param_named(vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600); |
Ben Widawsky | 6e96e77 | 2011-07-13 14:38:18 -0700 | [diff] [blame^] | 90 | MODULE_PARM_DESC(vbt_sdvo_panel_type, |
| 91 | "Override selection of SDVO panel mode in the VBT " |
| 92 | "(default: auto)"); |
Chris Wilson | 5a1e5b6 | 2011-01-29 16:50:25 +0000 | [diff] [blame] | 93 | |
Ben Widawsky | a35d9d3 | 2011-07-13 14:38:17 -0700 | [diff] [blame] | 94 | static bool i915_try_reset __read_mostly = true; |
Chris Wilson | d78cb50 | 2010-12-23 13:33:15 +0000 | [diff] [blame] | 95 | module_param_named(reset, i915_try_reset, bool, 0600); |
Ben Widawsky | 6e96e77 | 2011-07-13 14:38:18 -0700 | [diff] [blame^] | 96 | MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)"); |
Chris Wilson | d78cb50 | 2010-12-23 13:33:15 +0000 | [diff] [blame] | 97 | |
Ben Widawsky | a35d9d3 | 2011-07-13 14:38:17 -0700 | [diff] [blame] | 98 | bool i915_enable_hangcheck __read_mostly = true; |
Ben Widawsky | 3e0dc6b | 2011-06-29 10:26:42 -0700 | [diff] [blame] | 99 | module_param_named(enable_hangcheck, i915_enable_hangcheck, bool, 0644); |
Ben Widawsky | 6e96e77 | 2011-07-13 14:38:18 -0700 | [diff] [blame^] | 100 | MODULE_PARM_DESC(enable_hangcheck, |
| 101 | "Periodically check GPU activity for detecting hangs. " |
| 102 | "WARNING: Disabling this can cause system wide hangs. " |
| 103 | "(default: true)"); |
Ben Widawsky | 3e0dc6b | 2011-06-29 10:26:42 -0700 | [diff] [blame] | 104 | |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 105 | static struct drm_driver driver; |
Zhenyu Wang | 1f7a6e3 | 2010-02-23 14:05:24 +0800 | [diff] [blame] | 106 | extern int intel_agp_enabled; |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 107 | |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 108 | #define INTEL_VGA_DEVICE(id, info) { \ |
Kristian Høgsberg | 49ae35f | 2009-12-16 15:16:15 -0500 | [diff] [blame] | 109 | .class = PCI_CLASS_DISPLAY_VGA << 8, \ |
Chris Wilson | 934f992 | 2011-01-20 13:09:12 +0000 | [diff] [blame] | 110 | .class_mask = 0xff0000, \ |
Kristian Høgsberg | 49ae35f | 2009-12-16 15:16:15 -0500 | [diff] [blame] | 111 | .vendor = 0x8086, \ |
| 112 | .device = id, \ |
| 113 | .subvendor = PCI_ANY_ID, \ |
| 114 | .subdevice = PCI_ANY_ID, \ |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 115 | .driver_data = (unsigned long) info } |
Kristian Høgsberg | 49ae35f | 2009-12-16 15:16:15 -0500 | [diff] [blame] | 116 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 117 | static const struct intel_device_info intel_i830_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 118 | .gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 119 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 120 | }; |
| 121 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 122 | static const struct intel_device_info intel_845g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 123 | .gen = 2, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 124 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 125 | }; |
| 126 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 127 | static const struct intel_device_info intel_i85x_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 128 | .gen = 2, .is_i85x = 1, .is_mobile = 1, |
Adam Jackson | 5ce8ba7 | 2010-04-15 14:03:30 -0400 | [diff] [blame] | 129 | .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 130 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 131 | }; |
| 132 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 133 | static const struct intel_device_info intel_i865g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 134 | .gen = 2, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 135 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 136 | }; |
| 137 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 138 | static const struct intel_device_info intel_i915g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 139 | .gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 140 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 141 | }; |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 142 | static const struct intel_device_info intel_i915gm_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 143 | .gen = 3, .is_mobile = 1, |
Kristian Høgsberg | b295d1b | 2009-12-16 15:16:17 -0500 | [diff] [blame] | 144 | .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 145 | .has_overlay = 1, .overlay_needs_physical = 1, |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 146 | .supports_tv = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 147 | }; |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 148 | static const struct intel_device_info intel_i945g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 149 | .gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 150 | .has_overlay = 1, .overlay_needs_physical = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 151 | }; |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 152 | static const struct intel_device_info intel_i945gm_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 153 | .gen = 3, .is_i945gm = 1, .is_mobile = 1, |
Kristian Høgsberg | b295d1b | 2009-12-16 15:16:17 -0500 | [diff] [blame] | 154 | .has_hotplug = 1, .cursor_needs_physical = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 155 | .has_overlay = 1, .overlay_needs_physical = 1, |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 156 | .supports_tv = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 157 | }; |
| 158 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 159 | static const struct intel_device_info intel_i965g_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 160 | .gen = 4, .is_broadwater = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 161 | .has_hotplug = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 162 | .has_overlay = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 163 | }; |
| 164 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 165 | static const struct intel_device_info intel_i965gm_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 166 | .gen = 4, .is_crestline = 1, |
Chris Wilson | e3c4e5d | 2010-12-05 16:49:51 +0000 | [diff] [blame] | 167 | .is_mobile = 1, .has_fbc = 1, .has_hotplug = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 168 | .has_overlay = 1, |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 169 | .supports_tv = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 170 | }; |
| 171 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 172 | static const struct intel_device_info intel_g33_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 173 | .gen = 3, .is_g33 = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 174 | .need_gfx_hws = 1, .has_hotplug = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 175 | .has_overlay = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 176 | }; |
| 177 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 178 | static const struct intel_device_info intel_g45_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 179 | .gen = 4, .is_g4x = 1, .need_gfx_hws = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 180 | .has_pipe_cxsr = 1, .has_hotplug = 1, |
Xiang, Haihao | 92f49d9 | 2010-09-16 10:43:10 +0800 | [diff] [blame] | 181 | .has_bsd_ring = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 182 | }; |
| 183 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 184 | static const struct intel_device_info intel_gm45_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 185 | .gen = 4, .is_g4x = 1, |
Chris Wilson | e3c4e5d | 2010-12-05 16:49:51 +0000 | [diff] [blame] | 186 | .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 187 | .has_pipe_cxsr = 1, .has_hotplug = 1, |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 188 | .supports_tv = 1, |
Xiang, Haihao | 92f49d9 | 2010-09-16 10:43:10 +0800 | [diff] [blame] | 189 | .has_bsd_ring = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 190 | }; |
| 191 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 192 | static const struct intel_device_info intel_pineview_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 193 | .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 194 | .need_gfx_hws = 1, .has_hotplug = 1, |
Chris Wilson | 31578148 | 2010-08-12 09:42:51 +0100 | [diff] [blame] | 195 | .has_overlay = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 196 | }; |
| 197 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 198 | static const struct intel_device_info intel_ironlake_d_info = { |
Chris Wilson | f00a3dd | 2010-10-21 14:57:17 +0100 | [diff] [blame] | 199 | .gen = 5, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 200 | .need_gfx_hws = 1, .has_pipe_cxsr = 1, .has_hotplug = 1, |
Xiang, Haihao | 92f49d9 | 2010-09-16 10:43:10 +0800 | [diff] [blame] | 201 | .has_bsd_ring = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 202 | }; |
| 203 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 204 | static const struct intel_device_info intel_ironlake_m_info = { |
Chris Wilson | f00a3dd | 2010-10-21 14:57:17 +0100 | [diff] [blame] | 205 | .gen = 5, .is_mobile = 1, |
Chris Wilson | e3c4e5d | 2010-12-05 16:49:51 +0000 | [diff] [blame] | 206 | .need_gfx_hws = 1, .has_hotplug = 1, |
Jesse Barnes | c1a9f04 | 2011-05-05 15:24:21 -0700 | [diff] [blame] | 207 | .has_fbc = 1, |
Xiang, Haihao | 92f49d9 | 2010-09-16 10:43:10 +0800 | [diff] [blame] | 208 | .has_bsd_ring = 1, |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 209 | }; |
| 210 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 211 | static const struct intel_device_info intel_sandybridge_d_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 212 | .gen = 6, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 213 | .need_gfx_hws = 1, .has_hotplug = 1, |
Xiang, Haihao | 881f47b | 2010-09-19 14:40:43 +0100 | [diff] [blame] | 214 | .has_bsd_ring = 1, |
Chris Wilson | 549f736 | 2010-10-19 11:19:32 +0100 | [diff] [blame] | 215 | .has_blt_ring = 1, |
Eric Anholt | f6e450a | 2009-11-02 12:08:22 -0800 | [diff] [blame] | 216 | }; |
| 217 | |
Tobias Klauser | 9a7e849 | 2010-05-20 10:33:46 +0200 | [diff] [blame] | 218 | static const struct intel_device_info intel_sandybridge_m_info = { |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 219 | .gen = 6, .is_mobile = 1, |
Chris Wilson | c96c3a8c | 2010-08-11 09:59:24 +0100 | [diff] [blame] | 220 | .need_gfx_hws = 1, .has_hotplug = 1, |
Yuanhan Liu | 9c04f01 | 2010-12-15 15:42:32 +0800 | [diff] [blame] | 221 | .has_fbc = 1, |
Xiang, Haihao | 881f47b | 2010-09-19 14:40:43 +0100 | [diff] [blame] | 222 | .has_bsd_ring = 1, |
Chris Wilson | 549f736 | 2010-10-19 11:19:32 +0100 | [diff] [blame] | 223 | .has_blt_ring = 1, |
Eric Anholt | a13e409 | 2010-01-07 15:08:18 -0800 | [diff] [blame] | 224 | }; |
| 225 | |
Jesse Barnes | c76b615 | 2011-04-28 14:32:07 -0700 | [diff] [blame] | 226 | static const struct intel_device_info intel_ivybridge_d_info = { |
| 227 | .is_ivybridge = 1, .gen = 7, |
| 228 | .need_gfx_hws = 1, .has_hotplug = 1, |
| 229 | .has_bsd_ring = 1, |
| 230 | .has_blt_ring = 1, |
| 231 | }; |
| 232 | |
| 233 | static const struct intel_device_info intel_ivybridge_m_info = { |
| 234 | .is_ivybridge = 1, .gen = 7, .is_mobile = 1, |
| 235 | .need_gfx_hws = 1, .has_hotplug = 1, |
| 236 | .has_fbc = 0, /* FBC is not enabled on Ivybridge mobile yet */ |
| 237 | .has_bsd_ring = 1, |
| 238 | .has_blt_ring = 1, |
| 239 | }; |
| 240 | |
Chris Wilson | 6103da0 | 2010-07-05 18:01:47 +0100 | [diff] [blame] | 241 | static const struct pci_device_id pciidlist[] = { /* aka */ |
| 242 | INTEL_VGA_DEVICE(0x3577, &intel_i830_info), /* I830_M */ |
| 243 | INTEL_VGA_DEVICE(0x2562, &intel_845g_info), /* 845_G */ |
| 244 | INTEL_VGA_DEVICE(0x3582, &intel_i85x_info), /* I855_GM */ |
Adam Jackson | 5ce8ba7 | 2010-04-15 14:03:30 -0400 | [diff] [blame] | 245 | INTEL_VGA_DEVICE(0x358e, &intel_i85x_info), |
Chris Wilson | 6103da0 | 2010-07-05 18:01:47 +0100 | [diff] [blame] | 246 | INTEL_VGA_DEVICE(0x2572, &intel_i865g_info), /* I865_G */ |
| 247 | INTEL_VGA_DEVICE(0x2582, &intel_i915g_info), /* I915_G */ |
| 248 | INTEL_VGA_DEVICE(0x258a, &intel_i915g_info), /* E7221_G */ |
| 249 | INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info), /* I915_GM */ |
| 250 | INTEL_VGA_DEVICE(0x2772, &intel_i945g_info), /* I945_G */ |
| 251 | INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info), /* I945_GM */ |
| 252 | INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info), /* I945_GME */ |
| 253 | INTEL_VGA_DEVICE(0x2972, &intel_i965g_info), /* I946_GZ */ |
| 254 | INTEL_VGA_DEVICE(0x2982, &intel_i965g_info), /* G35_G */ |
| 255 | INTEL_VGA_DEVICE(0x2992, &intel_i965g_info), /* I965_Q */ |
| 256 | INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info), /* I965_G */ |
| 257 | INTEL_VGA_DEVICE(0x29b2, &intel_g33_info), /* Q35_G */ |
| 258 | INTEL_VGA_DEVICE(0x29c2, &intel_g33_info), /* G33_G */ |
| 259 | INTEL_VGA_DEVICE(0x29d2, &intel_g33_info), /* Q33_G */ |
| 260 | INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info), /* I965_GM */ |
| 261 | INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info), /* I965_GME */ |
| 262 | INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info), /* GM45_G */ |
| 263 | INTEL_VGA_DEVICE(0x2e02, &intel_g45_info), /* IGD_E_G */ |
| 264 | INTEL_VGA_DEVICE(0x2e12, &intel_g45_info), /* Q45_G */ |
| 265 | INTEL_VGA_DEVICE(0x2e22, &intel_g45_info), /* G45_G */ |
| 266 | INTEL_VGA_DEVICE(0x2e32, &intel_g45_info), /* G41_G */ |
| 267 | INTEL_VGA_DEVICE(0x2e42, &intel_g45_info), /* B43_G */ |
Chris Wilson | 41a5142 | 2010-09-17 08:22:30 +0100 | [diff] [blame] | 268 | INTEL_VGA_DEVICE(0x2e92, &intel_g45_info), /* B43_G.1 */ |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 269 | INTEL_VGA_DEVICE(0xa001, &intel_pineview_info), |
| 270 | INTEL_VGA_DEVICE(0xa011, &intel_pineview_info), |
| 271 | INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info), |
| 272 | INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info), |
Eric Anholt | f6e450a | 2009-11-02 12:08:22 -0800 | [diff] [blame] | 273 | INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info), |
Zhenyu Wang | 8554048 | 2010-09-07 13:45:32 +0800 | [diff] [blame] | 274 | INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info), |
| 275 | INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info), |
Eric Anholt | a13e409 | 2010-01-07 15:08:18 -0800 | [diff] [blame] | 276 | INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info), |
Zhenyu Wang | 8554048 | 2010-09-07 13:45:32 +0800 | [diff] [blame] | 277 | INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info), |
Zhenyu Wang | 4fefe43 | 2010-08-19 09:46:16 +0800 | [diff] [blame] | 278 | INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info), |
Zhenyu Wang | 8554048 | 2010-09-07 13:45:32 +0800 | [diff] [blame] | 279 | INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info), |
Jesse Barnes | c76b615 | 2011-04-28 14:32:07 -0700 | [diff] [blame] | 280 | INTEL_VGA_DEVICE(0x0156, &intel_ivybridge_m_info), /* GT1 mobile */ |
| 281 | INTEL_VGA_DEVICE(0x0166, &intel_ivybridge_m_info), /* GT2 mobile */ |
| 282 | INTEL_VGA_DEVICE(0x0152, &intel_ivybridge_d_info), /* GT1 desktop */ |
| 283 | INTEL_VGA_DEVICE(0x0162, &intel_ivybridge_d_info), /* GT2 desktop */ |
| 284 | INTEL_VGA_DEVICE(0x015a, &intel_ivybridge_d_info), /* GT1 server */ |
Kristian Høgsberg | 49ae35f | 2009-12-16 15:16:15 -0500 | [diff] [blame] | 285 | {0, 0, 0} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 286 | }; |
| 287 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 288 | #if defined(CONFIG_DRM_I915_KMS) |
| 289 | MODULE_DEVICE_TABLE(pci, pciidlist); |
| 290 | #endif |
| 291 | |
Zhenyu Wang | 3bad078 | 2010-04-07 16:15:53 +0800 | [diff] [blame] | 292 | #define INTEL_PCH_DEVICE_ID_MASK 0xff00 |
Jesse Barnes | 90711d5 | 2011-04-28 14:48:02 -0700 | [diff] [blame] | 293 | #define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00 |
Zhenyu Wang | 3bad078 | 2010-04-07 16:15:53 +0800 | [diff] [blame] | 294 | #define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00 |
Jesse Barnes | c792513 | 2011-04-07 12:33:56 -0700 | [diff] [blame] | 295 | #define INTEL_PCH_PPT_DEVICE_ID_TYPE 0x1e00 |
Zhenyu Wang | 3bad078 | 2010-04-07 16:15:53 +0800 | [diff] [blame] | 296 | |
| 297 | void intel_detect_pch (struct drm_device *dev) |
| 298 | { |
| 299 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 300 | struct pci_dev *pch; |
| 301 | |
| 302 | /* |
| 303 | * The reason to probe ISA bridge instead of Dev31:Fun0 is to |
| 304 | * make graphics device passthrough work easy for VMM, that only |
| 305 | * need to expose ISA bridge to let driver know the real hardware |
| 306 | * underneath. This is a requirement from virtualization team. |
| 307 | */ |
| 308 | pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL); |
| 309 | if (pch) { |
| 310 | if (pch->vendor == PCI_VENDOR_ID_INTEL) { |
| 311 | int id; |
| 312 | id = pch->device & INTEL_PCH_DEVICE_ID_MASK; |
| 313 | |
Jesse Barnes | 90711d5 | 2011-04-28 14:48:02 -0700 | [diff] [blame] | 314 | if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) { |
| 315 | dev_priv->pch_type = PCH_IBX; |
| 316 | DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); |
| 317 | } else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) { |
Zhenyu Wang | 3bad078 | 2010-04-07 16:15:53 +0800 | [diff] [blame] | 318 | dev_priv->pch_type = PCH_CPT; |
| 319 | DRM_DEBUG_KMS("Found CougarPoint PCH\n"); |
Jesse Barnes | c792513 | 2011-04-07 12:33:56 -0700 | [diff] [blame] | 320 | } else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) { |
| 321 | /* PantherPoint is CPT compatible */ |
| 322 | dev_priv->pch_type = PCH_CPT; |
| 323 | DRM_DEBUG_KMS("Found PatherPoint PCH\n"); |
Zhenyu Wang | 3bad078 | 2010-04-07 16:15:53 +0800 | [diff] [blame] | 324 | } |
| 325 | } |
| 326 | pci_dev_put(pch); |
| 327 | } |
| 328 | } |
| 329 | |
Ben Widawsky | fcca792 | 2011-04-25 11:23:07 -0700 | [diff] [blame] | 330 | static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) |
Chris Wilson | eb43f4a | 2010-12-08 17:32:24 +0000 | [diff] [blame] | 331 | { |
| 332 | int count; |
| 333 | |
| 334 | count = 0; |
| 335 | while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1)) |
| 336 | udelay(10); |
| 337 | |
| 338 | I915_WRITE_NOTRACE(FORCEWAKE, 1); |
| 339 | POSTING_READ(FORCEWAKE); |
| 340 | |
| 341 | count = 0; |
| 342 | while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0) |
| 343 | udelay(10); |
| 344 | } |
| 345 | |
Ben Widawsky | fcca792 | 2011-04-25 11:23:07 -0700 | [diff] [blame] | 346 | /* |
| 347 | * Generally this is called implicitly by the register read function. However, |
| 348 | * if some sequence requires the GT to not power down then this function should |
| 349 | * be called at the beginning of the sequence followed by a call to |
| 350 | * gen6_gt_force_wake_put() at the end of the sequence. |
| 351 | */ |
| 352 | void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) |
| 353 | { |
| 354 | WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex)); |
| 355 | |
| 356 | /* Forcewake is atomic in case we get in here without the lock */ |
| 357 | if (atomic_add_return(1, &dev_priv->forcewake_count) == 1) |
| 358 | __gen6_gt_force_wake_get(dev_priv); |
| 359 | } |
| 360 | |
| 361 | static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv) |
Chris Wilson | eb43f4a | 2010-12-08 17:32:24 +0000 | [diff] [blame] | 362 | { |
| 363 | I915_WRITE_NOTRACE(FORCEWAKE, 0); |
| 364 | POSTING_READ(FORCEWAKE); |
| 365 | } |
| 366 | |
Ben Widawsky | fcca792 | 2011-04-25 11:23:07 -0700 | [diff] [blame] | 367 | /* |
| 368 | * see gen6_gt_force_wake_get() |
| 369 | */ |
| 370 | void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv) |
| 371 | { |
| 372 | WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex)); |
| 373 | |
| 374 | if (atomic_dec_and_test(&dev_priv->forcewake_count)) |
| 375 | __gen6_gt_force_wake_put(dev_priv); |
| 376 | } |
| 377 | |
Chris Wilson | 9135583 | 2011-03-04 19:22:40 +0000 | [diff] [blame] | 378 | void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv) |
| 379 | { |
Chris Wilson | 95736720 | 2011-05-12 22:17:09 +0100 | [diff] [blame] | 380 | if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES ) { |
| 381 | int loop = 500; |
| 382 | u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES); |
| 383 | while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) { |
| 384 | udelay(10); |
| 385 | fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES); |
| 386 | } |
| 387 | WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES); |
| 388 | dev_priv->gt_fifo_count = fifo; |
Chris Wilson | 9135583 | 2011-03-04 19:22:40 +0000 | [diff] [blame] | 389 | } |
Chris Wilson | 95736720 | 2011-05-12 22:17:09 +0100 | [diff] [blame] | 390 | dev_priv->gt_fifo_count--; |
Chris Wilson | 9135583 | 2011-03-04 19:22:40 +0000 | [diff] [blame] | 391 | } |
| 392 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 393 | static int i915_drm_freeze(struct drm_device *dev) |
| 394 | { |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 395 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 396 | |
Dave Airlie | 5bcf719 | 2010-12-07 09:20:40 +1000 | [diff] [blame] | 397 | drm_kms_helper_poll_disable(dev); |
| 398 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 399 | pci_save_state(dev->pdev); |
| 400 | |
| 401 | /* If KMS is active, we do the leavevt stuff here */ |
| 402 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
| 403 | int error = i915_gem_idle(dev); |
| 404 | if (error) { |
| 405 | dev_err(&dev->pdev->dev, |
| 406 | "GEM idle failed, resume might fail\n"); |
| 407 | return error; |
| 408 | } |
| 409 | drm_irq_uninstall(dev); |
| 410 | } |
| 411 | |
| 412 | i915_save_state(dev); |
| 413 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 414 | intel_opregion_fini(dev); |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 415 | |
| 416 | /* Modeset on resume, not lid events */ |
| 417 | dev_priv->modeset_on_lid = 0; |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 418 | |
| 419 | return 0; |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 420 | } |
| 421 | |
Dave Airlie | 6a9ee8a | 2010-02-01 15:38:10 +1000 | [diff] [blame] | 422 | int i915_suspend(struct drm_device *dev, pm_message_t state) |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 423 | { |
| 424 | int error; |
| 425 | |
| 426 | if (!dev || !dev->dev_private) { |
| 427 | DRM_ERROR("dev: %p\n", dev); |
Keith Packard | 1ae8c0a | 2009-06-28 15:42:17 -0700 | [diff] [blame] | 428 | DRM_ERROR("DRM not initialized, aborting suspend.\n"); |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 429 | return -ENODEV; |
| 430 | } |
| 431 | |
Dave Airlie | b932ccb | 2008-02-20 10:02:20 +1000 | [diff] [blame] | 432 | if (state.event == PM_EVENT_PRETHAW) |
| 433 | return 0; |
| 434 | |
Dave Airlie | 5bcf719 | 2010-12-07 09:20:40 +1000 | [diff] [blame] | 435 | |
| 436 | if (dev->switch_power_state == DRM_SWITCH_POWER_OFF) |
| 437 | return 0; |
Chris Wilson | 6eecba3 | 2010-09-08 09:45:11 +0100 | [diff] [blame] | 438 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 439 | error = i915_drm_freeze(dev); |
| 440 | if (error) |
| 441 | return error; |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 442 | |
Dave Airlie | b932ccb | 2008-02-20 10:02:20 +1000 | [diff] [blame] | 443 | if (state.event == PM_EVENT_SUSPEND) { |
| 444 | /* Shut down the device */ |
| 445 | pci_disable_device(dev->pdev); |
| 446 | pci_set_power_state(dev->pdev, PCI_D3hot); |
| 447 | } |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 448 | |
| 449 | return 0; |
| 450 | } |
| 451 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 452 | static int i915_drm_thaw(struct drm_device *dev) |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 453 | { |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 454 | struct drm_i915_private *dev_priv = dev->dev_private; |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 455 | int error = 0; |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 456 | |
Chris Wilson | d1c3b17 | 2010-12-08 14:26:19 +0000 | [diff] [blame] | 457 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
| 458 | mutex_lock(&dev->struct_mutex); |
| 459 | i915_gem_restore_gtt_mappings(dev); |
| 460 | mutex_unlock(&dev->struct_mutex); |
| 461 | } |
| 462 | |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 463 | i915_restore_state(dev); |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 464 | intel_opregion_setup(dev); |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 465 | |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 466 | /* KMS EnterVT equivalent */ |
| 467 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
| 468 | mutex_lock(&dev->struct_mutex); |
| 469 | dev_priv->mm.suspended = 0; |
| 470 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 471 | error = i915_gem_init_ringbuffer(dev); |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 472 | mutex_unlock(&dev->struct_mutex); |
Jesse Barnes | 226485e | 2009-02-23 15:41:09 -0800 | [diff] [blame] | 473 | |
Chris Wilson | 500f714 | 2011-01-24 15:14:41 +0000 | [diff] [blame] | 474 | drm_mode_config_reset(dev); |
Jesse Barnes | 226485e | 2009-02-23 15:41:09 -0800 | [diff] [blame] | 475 | drm_irq_install(dev); |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 476 | |
Zhao Yakui | 354ff96 | 2009-07-08 14:13:12 +0800 | [diff] [blame] | 477 | /* Resume the modeset for every activated CRTC */ |
| 478 | drm_helper_resume_force_mode(dev); |
Jesse Barnes | 5669fca | 2009-02-17 15:13:31 -0800 | [diff] [blame] | 479 | |
Chris Wilson | ac66808 | 2011-02-09 16:15:32 +0000 | [diff] [blame] | 480 | if (IS_IRONLAKE_M(dev)) |
Jesse Barnes | d5bb081 | 2011-01-05 12:01:26 -0800 | [diff] [blame] | 481 | ironlake_enable_rc6(dev); |
| 482 | } |
Jesse Barnes | 1daed3f | 2011-01-05 12:01:25 -0800 | [diff] [blame] | 483 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 484 | intel_opregion_init(dev); |
| 485 | |
Linus Torvalds | c9354c8 | 2009-11-02 09:29:55 -0800 | [diff] [blame] | 486 | dev_priv->modeset_on_lid = 0; |
Jesse Barnes | 06891e2 | 2009-09-14 10:58:48 -0700 | [diff] [blame] | 487 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 488 | return error; |
| 489 | } |
| 490 | |
Dave Airlie | 6a9ee8a | 2010-02-01 15:38:10 +1000 | [diff] [blame] | 491 | int i915_resume(struct drm_device *dev) |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 492 | { |
Chris Wilson | 6eecba3 | 2010-09-08 09:45:11 +0100 | [diff] [blame] | 493 | int ret; |
| 494 | |
Dave Airlie | 5bcf719 | 2010-12-07 09:20:40 +1000 | [diff] [blame] | 495 | if (dev->switch_power_state == DRM_SWITCH_POWER_OFF) |
| 496 | return 0; |
| 497 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 498 | if (pci_enable_device(dev->pdev)) |
| 499 | return -EIO; |
| 500 | |
| 501 | pci_set_master(dev->pdev); |
| 502 | |
Chris Wilson | 6eecba3 | 2010-09-08 09:45:11 +0100 | [diff] [blame] | 503 | ret = i915_drm_thaw(dev); |
| 504 | if (ret) |
| 505 | return ret; |
| 506 | |
| 507 | drm_kms_helper_poll_enable(dev); |
| 508 | return 0; |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 509 | } |
| 510 | |
Chris Wilson | dc96e9b | 2010-10-01 12:05:06 +0100 | [diff] [blame] | 511 | static int i8xx_do_reset(struct drm_device *dev, u8 flags) |
| 512 | { |
| 513 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 514 | |
| 515 | if (IS_I85X(dev)) |
| 516 | return -ENODEV; |
| 517 | |
| 518 | I915_WRITE(D_STATE, I915_READ(D_STATE) | DSTATE_GFX_RESET_I830); |
| 519 | POSTING_READ(D_STATE); |
| 520 | |
| 521 | if (IS_I830(dev) || IS_845G(dev)) { |
| 522 | I915_WRITE(DEBUG_RESET_I830, |
| 523 | DEBUG_RESET_DISPLAY | |
| 524 | DEBUG_RESET_RENDER | |
| 525 | DEBUG_RESET_FULL); |
| 526 | POSTING_READ(DEBUG_RESET_I830); |
| 527 | msleep(1); |
| 528 | |
| 529 | I915_WRITE(DEBUG_RESET_I830, 0); |
| 530 | POSTING_READ(DEBUG_RESET_I830); |
| 531 | } |
| 532 | |
| 533 | msleep(1); |
| 534 | |
| 535 | I915_WRITE(D_STATE, I915_READ(D_STATE) & ~DSTATE_GFX_RESET_I830); |
| 536 | POSTING_READ(D_STATE); |
| 537 | |
| 538 | return 0; |
| 539 | } |
| 540 | |
Kenneth Graunke | f49f058 | 2010-09-11 01:19:14 -0700 | [diff] [blame] | 541 | static int i965_reset_complete(struct drm_device *dev) |
| 542 | { |
| 543 | u8 gdrst; |
Kenneth Graunke | eeccdca | 2010-09-11 01:24:50 -0700 | [diff] [blame] | 544 | pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst); |
Kenneth Graunke | f49f058 | 2010-09-11 01:19:14 -0700 | [diff] [blame] | 545 | return gdrst & 0x1; |
| 546 | } |
| 547 | |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 548 | static int i965_do_reset(struct drm_device *dev, u8 flags) |
| 549 | { |
| 550 | u8 gdrst; |
| 551 | |
Chris Wilson | ae681d9 | 2010-10-01 14:57:56 +0100 | [diff] [blame] | 552 | /* |
| 553 | * Set the domains we want to reset (GRDOM/bits 2 and 3) as |
| 554 | * well as the reset bit (GR/bit 0). Setting the GR bit |
| 555 | * triggers the reset; when done, the hardware will clear it. |
| 556 | */ |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 557 | pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst); |
| 558 | pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | flags | 0x1); |
| 559 | |
| 560 | return wait_for(i965_reset_complete(dev), 500); |
| 561 | } |
| 562 | |
| 563 | static int ironlake_do_reset(struct drm_device *dev, u8 flags) |
| 564 | { |
| 565 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 566 | u32 gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR); |
| 567 | I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, gdrst | flags | 0x1); |
| 568 | return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 569 | } |
| 570 | |
Eric Anholt | cff458c | 2010-11-18 09:31:14 +0800 | [diff] [blame] | 571 | static int gen6_do_reset(struct drm_device *dev, u8 flags) |
| 572 | { |
| 573 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 574 | |
| 575 | I915_WRITE(GEN6_GDRST, GEN6_GRDOM_FULL); |
| 576 | return wait_for((I915_READ(GEN6_GDRST) & GEN6_GRDOM_FULL) == 0, 500); |
| 577 | } |
| 578 | |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 579 | /** |
| 580 | * i965_reset - reset chip after a hang |
| 581 | * @dev: drm device to reset |
| 582 | * @flags: reset domains |
| 583 | * |
| 584 | * Reset the chip. Useful if a hang is detected. Returns zero on successful |
| 585 | * reset or otherwise an error code. |
| 586 | * |
| 587 | * Procedure is fairly simple: |
| 588 | * - reset the chip using the reset reg |
| 589 | * - re-init context state |
| 590 | * - re-init hardware status page |
| 591 | * - re-init ring buffer |
| 592 | * - re-init interrupt state |
| 593 | * - re-init display |
| 594 | */ |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 595 | int i915_reset(struct drm_device *dev, u8 flags) |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 596 | { |
| 597 | drm_i915_private_t *dev_priv = dev->dev_private; |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 598 | /* |
| 599 | * We really should only reset the display subsystem if we actually |
| 600 | * need to |
| 601 | */ |
| 602 | bool need_display = true; |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 603 | int ret; |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 604 | |
Chris Wilson | d78cb50 | 2010-12-23 13:33:15 +0000 | [diff] [blame] | 605 | if (!i915_try_reset) |
| 606 | return 0; |
| 607 | |
Chris Wilson | 340479a | 2010-12-04 18:17:15 +0000 | [diff] [blame] | 608 | if (!mutex_trylock(&dev->struct_mutex)) |
| 609 | return -EBUSY; |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 610 | |
Chris Wilson | 069efc1 | 2010-09-30 16:53:18 +0100 | [diff] [blame] | 611 | i915_gem_reset(dev); |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 612 | |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 613 | ret = -ENODEV; |
Chris Wilson | ae681d9 | 2010-10-01 14:57:56 +0100 | [diff] [blame] | 614 | if (get_seconds() - dev_priv->last_gpu_reset < 5) { |
| 615 | DRM_ERROR("GPU hanging too fast, declaring wedged!\n"); |
| 616 | } else switch (INTEL_INFO(dev)->gen) { |
Kenneth Graunke | 1083694 | 2011-07-07 15:33:26 -0700 | [diff] [blame] | 617 | case 7: |
Eric Anholt | cff458c | 2010-11-18 09:31:14 +0800 | [diff] [blame] | 618 | case 6: |
| 619 | ret = gen6_do_reset(dev, flags); |
Ben Widawsky | 2573282 | 2011-06-24 14:31:47 -0700 | [diff] [blame] | 620 | /* If reset with a user forcewake, try to restore */ |
| 621 | if (atomic_read(&dev_priv->forcewake_count)) |
| 622 | __gen6_gt_force_wake_get(dev_priv); |
Eric Anholt | cff458c | 2010-11-18 09:31:14 +0800 | [diff] [blame] | 623 | break; |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 624 | case 5: |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 625 | ret = ironlake_do_reset(dev, flags); |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 626 | break; |
| 627 | case 4: |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 628 | ret = i965_do_reset(dev, flags); |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 629 | break; |
Chris Wilson | dc96e9b | 2010-10-01 12:05:06 +0100 | [diff] [blame] | 630 | case 2: |
| 631 | ret = i8xx_do_reset(dev, flags); |
| 632 | break; |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 633 | } |
Chris Wilson | ae681d9 | 2010-10-01 14:57:56 +0100 | [diff] [blame] | 634 | dev_priv->last_gpu_reset = get_seconds(); |
Kenneth Graunke | 0573ed4 | 2010-09-11 03:17:19 -0700 | [diff] [blame] | 635 | if (ret) { |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 636 | DRM_ERROR("Failed to reset chip.\n"); |
Daniel J Blueman | f953c93 | 2010-05-17 14:23:52 +0100 | [diff] [blame] | 637 | mutex_unlock(&dev->struct_mutex); |
Chris Wilson | f803aa5 | 2010-09-19 12:38:26 +0100 | [diff] [blame] | 638 | return ret; |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 639 | } |
| 640 | |
| 641 | /* Ok, now get things going again... */ |
| 642 | |
| 643 | /* |
| 644 | * Everything depends on having the GTT running, so we need to start |
| 645 | * there. Fortunately we don't need to do this unless we reset the |
| 646 | * chip at a PCI level. |
| 647 | * |
| 648 | * Next we need to restore the context, but we don't use those |
| 649 | * yet either... |
| 650 | * |
| 651 | * Ring buffer needs to be re-initialized in the KMS case, or if X |
| 652 | * was running at the time of the reset (i.e. we weren't VT |
| 653 | * switched away). |
| 654 | */ |
| 655 | if (drm_core_check_feature(dev, DRIVER_MODESET) || |
Zou Nan hai | 8187a2b | 2010-05-21 09:08:55 +0800 | [diff] [blame] | 656 | !dev_priv->mm.suspended) { |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 657 | dev_priv->mm.suspended = 0; |
Eric Anholt | 75a6898 | 2010-11-18 09:31:13 +0800 | [diff] [blame] | 658 | |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 659 | dev_priv->ring[RCS].init(&dev_priv->ring[RCS]); |
Eric Anholt | 75a6898 | 2010-11-18 09:31:13 +0800 | [diff] [blame] | 660 | if (HAS_BSD(dev)) |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 661 | dev_priv->ring[VCS].init(&dev_priv->ring[VCS]); |
Eric Anholt | 75a6898 | 2010-11-18 09:31:13 +0800 | [diff] [blame] | 662 | if (HAS_BLT(dev)) |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 663 | dev_priv->ring[BCS].init(&dev_priv->ring[BCS]); |
Eric Anholt | 75a6898 | 2010-11-18 09:31:13 +0800 | [diff] [blame] | 664 | |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 665 | mutex_unlock(&dev->struct_mutex); |
| 666 | drm_irq_uninstall(dev); |
Chris Wilson | 500f714 | 2011-01-24 15:14:41 +0000 | [diff] [blame] | 667 | drm_mode_config_reset(dev); |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 668 | drm_irq_install(dev); |
| 669 | mutex_lock(&dev->struct_mutex); |
| 670 | } |
| 671 | |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 672 | mutex_unlock(&dev->struct_mutex); |
Chris Wilson | 9fd9814 | 2010-09-18 08:08:06 +0100 | [diff] [blame] | 673 | |
| 674 | /* |
| 675 | * Perform a full modeset as on later generations, e.g. Ironlake, we may |
| 676 | * need to retrain the display link and cannot just restore the register |
| 677 | * values. |
| 678 | */ |
| 679 | if (need_display) { |
| 680 | mutex_lock(&dev->mode_config.mutex); |
| 681 | drm_helper_resume_force_mode(dev); |
| 682 | mutex_unlock(&dev->mode_config.mutex); |
| 683 | } |
| 684 | |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 685 | return 0; |
| 686 | } |
| 687 | |
| 688 | |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 689 | static int __devinit |
| 690 | i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
| 691 | { |
Chris Wilson | 5fe49d8 | 2011-02-01 19:43:02 +0000 | [diff] [blame] | 692 | /* Only bind to function 0 of the device. Early generations |
| 693 | * used function 1 as a placeholder for multi-head. This causes |
| 694 | * us confusion instead, especially on the systems where both |
| 695 | * functions have the same PCI-ID! |
| 696 | */ |
| 697 | if (PCI_FUNC(pdev->devfn)) |
| 698 | return -ENODEV; |
| 699 | |
Jordan Crouse | dcdb167 | 2010-05-27 13:40:25 -0600 | [diff] [blame] | 700 | return drm_get_pci_dev(pdev, ent, &driver); |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 701 | } |
| 702 | |
| 703 | static void |
| 704 | i915_pci_remove(struct pci_dev *pdev) |
| 705 | { |
| 706 | struct drm_device *dev = pci_get_drvdata(pdev); |
| 707 | |
| 708 | drm_put_dev(dev); |
| 709 | } |
| 710 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 711 | static int i915_pm_suspend(struct device *dev) |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 712 | { |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 713 | struct pci_dev *pdev = to_pci_dev(dev); |
| 714 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
| 715 | int error; |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 716 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 717 | if (!drm_dev || !drm_dev->dev_private) { |
| 718 | dev_err(dev, "DRM not initialized, aborting suspend.\n"); |
| 719 | return -ENODEV; |
| 720 | } |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 721 | |
Dave Airlie | 5bcf719 | 2010-12-07 09:20:40 +1000 | [diff] [blame] | 722 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF) |
| 723 | return 0; |
| 724 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 725 | error = i915_drm_freeze(drm_dev); |
| 726 | if (error) |
| 727 | return error; |
Kristian Høgsberg | 112b715 | 2009-01-04 16:55:33 -0500 | [diff] [blame] | 728 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 729 | pci_disable_device(pdev); |
| 730 | pci_set_power_state(pdev, PCI_D3hot); |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 731 | |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 732 | return 0; |
| 733 | } |
| 734 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 735 | static int i915_pm_resume(struct device *dev) |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 736 | { |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 737 | struct pci_dev *pdev = to_pci_dev(dev); |
| 738 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
| 739 | |
| 740 | return i915_resume(drm_dev); |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 741 | } |
| 742 | |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 743 | static int i915_pm_freeze(struct device *dev) |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 744 | { |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 745 | struct pci_dev *pdev = to_pci_dev(dev); |
| 746 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
| 747 | |
| 748 | if (!drm_dev || !drm_dev->dev_private) { |
| 749 | dev_err(dev, "DRM not initialized, aborting suspend.\n"); |
| 750 | return -ENODEV; |
| 751 | } |
| 752 | |
| 753 | return i915_drm_freeze(drm_dev); |
| 754 | } |
| 755 | |
| 756 | static int i915_pm_thaw(struct device *dev) |
| 757 | { |
| 758 | struct pci_dev *pdev = to_pci_dev(dev); |
| 759 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
| 760 | |
| 761 | return i915_drm_thaw(drm_dev); |
| 762 | } |
| 763 | |
| 764 | static int i915_pm_poweroff(struct device *dev) |
| 765 | { |
| 766 | struct pci_dev *pdev = to_pci_dev(dev); |
| 767 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 768 | |
Rafael J. Wysocki | 61caf87 | 2010-02-18 23:06:27 +0100 | [diff] [blame] | 769 | return i915_drm_freeze(drm_dev); |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 770 | } |
| 771 | |
Chris Wilson | b4b78d1 | 2010-06-06 15:40:20 +0100 | [diff] [blame] | 772 | static const struct dev_pm_ops i915_pm_ops = { |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 773 | .suspend = i915_pm_suspend, |
| 774 | .resume = i915_pm_resume, |
| 775 | .freeze = i915_pm_freeze, |
| 776 | .thaw = i915_pm_thaw, |
| 777 | .poweroff = i915_pm_poweroff, |
Rafael J. Wysocki | 84b79f8 | 2010-02-07 21:48:24 +0100 | [diff] [blame] | 778 | .restore = i915_pm_resume, |
Zhenyu Wang | cbda12d | 2009-12-16 13:36:10 +0800 | [diff] [blame] | 779 | }; |
| 780 | |
Jesse Barnes | de151cf | 2008-11-12 10:03:55 -0800 | [diff] [blame] | 781 | static struct vm_operations_struct i915_gem_vm_ops = { |
| 782 | .fault = i915_gem_fault, |
Jesse Barnes | ab00b3e | 2009-02-11 14:01:46 -0800 | [diff] [blame] | 783 | .open = drm_gem_vm_open, |
| 784 | .close = drm_gem_vm_close, |
Jesse Barnes | de151cf | 2008-11-12 10:03:55 -0800 | [diff] [blame] | 785 | }; |
| 786 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 787 | static struct drm_driver driver = { |
Dave Airlie | 792d2b9 | 2005-11-11 23:30:27 +1100 | [diff] [blame] | 788 | /* don't use mtrr's here, the Xserver or user space app should |
| 789 | * deal with them for intel hardware. |
| 790 | */ |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 791 | .driver_features = |
| 792 | DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/ |
| 793 | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM, |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 794 | .load = i915_driver_load, |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 795 | .unload = i915_driver_unload, |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 796 | .open = i915_driver_open, |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 797 | .lastclose = i915_driver_lastclose, |
| 798 | .preclose = i915_driver_preclose, |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 799 | .postclose = i915_driver_postclose, |
Rafael J. Wysocki | d8e2920 | 2010-01-09 00:45:33 +0100 | [diff] [blame] | 800 | |
| 801 | /* Used in place of i915_pm_ops for non-DRIVER_MODESET */ |
| 802 | .suspend = i915_suspend, |
| 803 | .resume = i915_resume, |
| 804 | |
Dave Airlie | cda1738 | 2005-07-10 17:31:26 +1000 | [diff] [blame] | 805 | .device_is_agp = i915_driver_device_is_agp, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 806 | .reclaim_buffers = drm_core_reclaim_buffers, |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 807 | .master_create = i915_master_create, |
| 808 | .master_destroy = i915_master_destroy, |
Ben Gamari | 955b12d | 2009-02-17 20:08:49 -0500 | [diff] [blame] | 809 | #if defined(CONFIG_DEBUG_FS) |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 810 | .debugfs_init = i915_debugfs_init, |
| 811 | .debugfs_cleanup = i915_debugfs_cleanup, |
Ben Gamari | 955b12d | 2009-02-17 20:08:49 -0500 | [diff] [blame] | 812 | #endif |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 813 | .gem_init_object = i915_gem_init_object, |
| 814 | .gem_free_object = i915_gem_free_object, |
Jesse Barnes | de151cf | 2008-11-12 10:03:55 -0800 | [diff] [blame] | 815 | .gem_vm_ops = &i915_gem_vm_ops, |
Dave Airlie | ff72145b | 2011-02-07 12:16:14 +1000 | [diff] [blame] | 816 | .dumb_create = i915_gem_dumb_create, |
| 817 | .dumb_map_offset = i915_gem_mmap_gtt, |
| 818 | .dumb_destroy = i915_gem_dumb_destroy, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 819 | .ioctls = i915_ioctls, |
| 820 | .fops = { |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 821 | .owner = THIS_MODULE, |
| 822 | .open = drm_open, |
| 823 | .release = drm_release, |
Arnd Bergmann | ed8b670 | 2009-12-16 22:17:09 +0000 | [diff] [blame] | 824 | .unlocked_ioctl = drm_ioctl, |
Jesse Barnes | de151cf | 2008-11-12 10:03:55 -0800 | [diff] [blame] | 825 | .mmap = drm_gem_mmap, |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 826 | .poll = drm_poll, |
| 827 | .fasync = drm_fasync, |
Kristian Høgsberg | c9a9c5e | 2009-09-12 04:33:34 +1000 | [diff] [blame] | 828 | .read = drm_read, |
Dave Airlie | 8ca7c1d | 2005-07-07 21:51:26 +1000 | [diff] [blame] | 829 | #ifdef CONFIG_COMPAT |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 830 | .compat_ioctl = i915_compat_ioctl, |
Dave Airlie | 8ca7c1d | 2005-07-07 21:51:26 +1000 | [diff] [blame] | 831 | #endif |
Arnd Bergmann | dc880ab | 2010-07-06 18:54:47 +0200 | [diff] [blame] | 832 | .llseek = noop_llseek, |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 833 | }, |
| 834 | |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 835 | .name = DRIVER_NAME, |
| 836 | .desc = DRIVER_DESC, |
| 837 | .date = DRIVER_DATE, |
| 838 | .major = DRIVER_MAJOR, |
| 839 | .minor = DRIVER_MINOR, |
| 840 | .patchlevel = DRIVER_PATCHLEVEL, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 841 | }; |
| 842 | |
Dave Airlie | 8410ea3 | 2010-12-15 03:16:38 +1000 | [diff] [blame] | 843 | static struct pci_driver i915_pci_driver = { |
| 844 | .name = DRIVER_NAME, |
| 845 | .id_table = pciidlist, |
| 846 | .probe = i915_pci_probe, |
| 847 | .remove = i915_pci_remove, |
| 848 | .driver.pm = &i915_pm_ops, |
| 849 | }; |
| 850 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 851 | static int __init i915_init(void) |
| 852 | { |
Zhenyu Wang | 1f7a6e3 | 2010-02-23 14:05:24 +0800 | [diff] [blame] | 853 | if (!intel_agp_enabled) { |
| 854 | DRM_ERROR("drm/i915 can't work without intel_agp module!\n"); |
| 855 | return -ENODEV; |
| 856 | } |
| 857 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 858 | driver.num_ioctls = i915_max_ioctl; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 859 | |
| 860 | /* |
| 861 | * If CONFIG_DRM_I915_KMS is set, default to KMS unless |
| 862 | * explicitly disabled with the module pararmeter. |
| 863 | * |
| 864 | * Otherwise, just follow the parameter (defaulting to off). |
| 865 | * |
| 866 | * Allow optional vga_text_mode_force boot option to override |
| 867 | * the default behavior. |
| 868 | */ |
| 869 | #if defined(CONFIG_DRM_I915_KMS) |
| 870 | if (i915_modeset != 0) |
| 871 | driver.driver_features |= DRIVER_MODESET; |
| 872 | #endif |
| 873 | if (i915_modeset == 1) |
| 874 | driver.driver_features |= DRIVER_MODESET; |
| 875 | |
| 876 | #ifdef CONFIG_VGA_CONSOLE |
| 877 | if (vgacon_text_force() && i915_modeset == -1) |
| 878 | driver.driver_features &= ~DRIVER_MODESET; |
| 879 | #endif |
| 880 | |
Chris Wilson | 3885c6b | 2011-01-23 10:45:14 +0000 | [diff] [blame] | 881 | if (!(driver.driver_features & DRIVER_MODESET)) |
| 882 | driver.get_vblank_timestamp = NULL; |
| 883 | |
Dave Airlie | 8410ea3 | 2010-12-15 03:16:38 +1000 | [diff] [blame] | 884 | return drm_pci_init(&driver, &i915_pci_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 885 | } |
| 886 | |
| 887 | static void __exit i915_exit(void) |
| 888 | { |
Dave Airlie | 8410ea3 | 2010-12-15 03:16:38 +1000 | [diff] [blame] | 889 | drm_pci_exit(&driver, &i915_pci_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 890 | } |
| 891 | |
| 892 | module_init(i915_init); |
| 893 | module_exit(i915_exit); |
| 894 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 895 | MODULE_AUTHOR(DRIVER_AUTHOR); |
| 896 | MODULE_DESCRIPTION(DRIVER_DESC); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 897 | MODULE_LICENSE("GPL and additional rights"); |