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Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata_sis.c - SiS ATA driver
3 *
Alan Coxab771632008-10-27 15:09:10 +00004 * (C) 2005 Red Hat
Bartlomiej Zolnierkiewicz750c7132009-12-03 20:32:13 +01005 * (C) 2007,2009 Bartlomiej Zolnierkiewicz
Jeff Garzik669a5db2006-08-29 18:12:40 -04006 *
7 * Based upon linux/drivers/ide/pci/sis5513.c
8 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
9 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
10 * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz>
11 * SiS Taiwan : for direct support and hardware.
12 * Daniela Engert : for initial ATA100 advices and numerous others.
13 * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt :
14 * for checking code correctness, providing patches.
15 * Original tests and design on the SiS620 chipset.
16 * ATA100 tests and design on the SiS735 chipset.
17 * ATA16/33 support from specs
18 * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw>
19 *
20 *
21 * TODO
22 * Check MWDMA on drives that don't support MWDMA speed pio cycles ?
23 * More Testing
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/pci.h>
29#include <linux/init.h>
30#include <linux/blkdev.h>
31#include <linux/delay.h>
32#include <linux/device.h>
33#include <scsi/scsi_host.h>
34#include <linux/libata.h>
35#include <linux/ata.h>
Alan4bb64fb2007-02-16 01:40:04 -080036#include "sis.h"
Jeff Garzik669a5db2006-08-29 18:12:40 -040037
38#define DRV_NAME "pata_sis"
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +020039#define DRV_VERSION "0.5.2"
Jeff Garzik669a5db2006-08-29 18:12:40 -040040
41struct sis_chipset {
Tejun Heo1626aeb2007-05-04 12:43:58 +020042 u16 device; /* PCI host ID */
43 const struct ata_port_info *info; /* Info block */
Jeff Garzik669a5db2006-08-29 18:12:40 -040044 /* Probably add family, cable detect type etc here to clean
45 up code later */
46};
47
Jakub W. Jozwicki J7dcbc1f2007-01-09 09:01:19 +090048struct sis_laptop {
49 u16 device;
50 u16 subvendor;
51 u16 subdevice;
52};
53
54static const struct sis_laptop sis_laptop[] = {
55 /* devid, subvendor, subdev */
56 { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
Alan Cox4f2d47c2007-08-22 22:56:43 +010057 { 0x5513, 0x1734, 0x105F }, /* FSC Amilo A1630 */
Gabriel C1f71d062007-11-15 13:14:00 +090058 { 0x5513, 0x1071, 0x8640 }, /* EasyNote K5305 */
Jakub W. Jozwicki J7dcbc1f2007-01-09 09:01:19 +090059 /* end marker */
60 { 0, }
61};
62
63static int sis_short_ata40(struct pci_dev *dev)
64{
65 const struct sis_laptop *lap = &sis_laptop[0];
66
67 while (lap->device) {
68 if (lap->device == dev->device &&
69 lap->subvendor == dev->subsystem_vendor &&
70 lap->subdevice == dev->subsystem_device)
71 return 1;
72 lap++;
73 }
74
75 return 0;
76}
77
Jeff Garzik669a5db2006-08-29 18:12:40 -040078/**
Alan Coxdd668d12007-05-21 15:00:53 +010079 * sis_old_port_base - return PCI configuration base for dev
Jeff Garzik669a5db2006-08-29 18:12:40 -040080 * @adev: device
81 *
82 * Returns the base of the PCI configuration registers for this port
83 * number.
84 */
85
Alan Coxdd668d12007-05-21 15:00:53 +010086static int sis_old_port_base(struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -040087{
Tejun Heo9af5c9c2007-08-06 18:36:22 +090088 return 0x40 + (4 * adev->link->ap->port_no) + (2 * adev->devno);
Jeff Garzik669a5db2006-08-29 18:12:40 -040089}
90
91/**
Alan Cox2e413f52007-03-07 16:54:24 +000092 * sis_133_cable_detect - check for 40/80 pin
Jeff Garzik669a5db2006-08-29 18:12:40 -040093 * @ap: Port
Tejun Heod4b2bab2007-02-02 16:50:52 +090094 * @deadline: deadline jiffies for the operation
Jeff Garzik669a5db2006-08-29 18:12:40 -040095 *
96 * Perform cable detection for the later UDMA133 capable
97 * SiS chipset.
98 */
99
Alan Cox2e413f52007-03-07 16:54:24 +0000100static int sis_133_cable_detect(struct ata_port *ap)
101{
102 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
103 u16 tmp;
104
105 /* The top bit of this register is the cable detect bit */
106 pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp);
107 if ((tmp & 0x8000) && !sis_short_ata40(pdev))
108 return ATA_CBL_PATA40;
109 return ATA_CBL_PATA80;
110}
111
112/**
113 * sis_66_cable_detect - check for 40/80 pin
114 * @ap: Port
115 *
116 * Perform cable detection on the UDMA66, UDMA100 and early UDMA133
117 * SiS IDE controllers.
118 */
119
120static int sis_66_cable_detect(struct ata_port *ap)
121{
122 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
123 u8 tmp;
124
125 /* Older chips keep cable detect in bits 4/5 of reg 0x48 */
126 pci_read_config_byte(pdev, 0x48, &tmp);
127 tmp >>= ap->port_no;
128 if ((tmp & 0x10) && !sis_short_ata40(pdev))
129 return ATA_CBL_PATA40;
130 return ATA_CBL_PATA80;
131}
132
133
134/**
135 * sis_pre_reset - probe begin
Tejun Heocc0680a2007-08-06 18:36:23 +0900136 * @link: ATA link
Tejun Heod4b2bab2007-02-02 16:50:52 +0900137 * @deadline: deadline jiffies for the operation
Alan Cox2e413f52007-03-07 16:54:24 +0000138 *
139 * Set up cable type and use generic probe init
140 */
141
Tejun Heocc0680a2007-08-06 18:36:23 +0900142static int sis_pre_reset(struct ata_link *link, unsigned long deadline)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400143{
144 static const struct pci_bits sis_enable_bits[] = {
145 { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */
146 { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */
147 };
Jeff Garzik85cd7252006-08-31 00:03:49 -0400148
Tejun Heocc0680a2007-08-06 18:36:23 +0900149 struct ata_port *ap = link->ap;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400150 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400151
Alan Coxc9619222006-09-26 17:53:38 +0100152 if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no]))
153 return -ENOENT;
Tejun Heod4b2bab2007-02-02 16:50:52 +0900154
Alan Cox15ce0942007-05-25 20:50:24 +0100155 /* Clear the FIFO settings. We can't enable the FIFO until
156 we know we are poking at a disk */
157 pci_write_config_byte(pdev, 0x4B, 0);
Tejun Heo9363c382008-04-07 22:47:16 +0900158 return ata_sff_prereset(link, deadline);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400159}
160
Alan Cox2e413f52007-03-07 16:54:24 +0000161
Jeff Garzik669a5db2006-08-29 18:12:40 -0400162/**
Jeff Garzik669a5db2006-08-29 18:12:40 -0400163 * sis_set_fifo - Set RWP fifo bits for this device
164 * @ap: Port
165 * @adev: Device
166 *
167 * SIS chipsets implement prefetch/postwrite bits for each device
168 * on both channels. This functionality is not ATAPI compatible and
169 * must be configured according to the class of device present
170 */
171
172static void sis_set_fifo(struct ata_port *ap, struct ata_device *adev)
173{
174 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
175 u8 fifoctrl;
176 u8 mask = 0x11;
177
178 mask <<= (2 * ap->port_no);
179 mask <<= adev->devno;
180
181 /* This holds various bits including the FIFO control */
182 pci_read_config_byte(pdev, 0x4B, &fifoctrl);
183 fifoctrl &= ~mask;
184
185 /* Enable for ATA (disk) only */
186 if (adev->class == ATA_DEV_ATA)
187 fifoctrl |= mask;
188 pci_write_config_byte(pdev, 0x4B, fifoctrl);
189}
190
191/**
192 * sis_old_set_piomode - Initialize host controller PATA PIO timings
193 * @ap: Port whose timings we are configuring
194 * @adev: Device we are configuring for.
195 *
196 * Set PIO mode for device, in host controller PCI config space. This
197 * function handles PIO set up for all chips that are pre ATA100 and
198 * also early ATA100 devices.
199 *
200 * LOCKING:
201 * None (inherited from caller).
202 */
203
204static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev)
205{
206 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Alan Coxdd668d12007-05-21 15:00:53 +0100207 int port = sis_old_port_base(adev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400208 u8 t1, t2;
209 int speed = adev->pio_mode - XFER_PIO_0;
210
211 const u8 active[] = { 0x00, 0x07, 0x04, 0x03, 0x01 };
212 const u8 recovery[] = { 0x00, 0x06, 0x04, 0x03, 0x03 };
213
214 sis_set_fifo(ap, adev);
215
216 pci_read_config_byte(pdev, port, &t1);
217 pci_read_config_byte(pdev, port + 1, &t2);
218
219 t1 &= ~0x0F; /* Clear active/recovery timings */
220 t2 &= ~0x07;
221
222 t1 |= active[speed];
223 t2 |= recovery[speed];
224
225 pci_write_config_byte(pdev, port, t1);
226 pci_write_config_byte(pdev, port + 1, t2);
227}
228
229/**
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +0200230 * sis_100_set_piomode - Initialize host controller PATA PIO timings
Jeff Garzik669a5db2006-08-29 18:12:40 -0400231 * @ap: Port whose timings we are configuring
232 * @adev: Device we are configuring for.
233 *
234 * Set PIO mode for device, in host controller PCI config space. This
235 * function handles PIO set up for ATA100 devices and early ATA133.
236 *
237 * LOCKING:
238 * None (inherited from caller).
239 */
240
241static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev)
242{
243 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Alan Coxdd668d12007-05-21 15:00:53 +0100244 int port = sis_old_port_base(adev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400245 int speed = adev->pio_mode - XFER_PIO_0;
246
247 const u8 actrec[] = { 0x00, 0x67, 0x44, 0x33, 0x31 };
248
249 sis_set_fifo(ap, adev);
250
251 pci_write_config_byte(pdev, port, actrec[speed]);
252}
253
254/**
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500255 * sis_133_set_piomode - Initialize host controller PATA PIO timings
Jeff Garzik669a5db2006-08-29 18:12:40 -0400256 * @ap: Port whose timings we are configuring
257 * @adev: Device we are configuring for.
258 *
259 * Set PIO mode for device, in host controller PCI config space. This
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500260 * function handles PIO set up for the later ATA133 devices.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400261 *
262 * LOCKING:
263 * None (inherited from caller).
264 */
265
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500266static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400267{
268 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
269 int port = 0x40;
270 u32 t1;
271 u32 reg54;
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500272 int speed = adev->pio_mode - XFER_PIO_0;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400273
274 const u32 timing133[] = {
275 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */
276 0x0C266000,
277 0x04263000,
278 0x0C0A3000,
279 0x05093000
280 };
281 const u32 timing100[] = {
282 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */
283 0x091C4000,
284 0x031C2000,
285 0x09072000,
286 0x04062000
287 };
288
289 sis_set_fifo(ap, adev);
290
291 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
292 pci_read_config_dword(pdev, 0x54, &reg54);
293 if (reg54 & 0x40000000)
294 port = 0x70;
295 port += 8 * ap->port_no + 4 * adev->devno;
296
297 pci_read_config_dword(pdev, port, &t1);
298 t1 &= 0xC0C00FFF; /* Mask out timing */
299
300 if (t1 & 0x08) /* 100 or 133 ? */
301 t1 |= timing133[speed];
302 else
303 t1 |= timing100[speed];
304 pci_write_config_byte(pdev, port, t1);
305}
306
307/**
308 * sis_old_set_dmamode - Initialize host controller PATA DMA timings
309 * @ap: Port whose timings we are configuring
310 * @adev: Device to program
311 *
312 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
313 * Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike
314 * the old ide/pci driver.
315 *
316 * LOCKING:
317 * None (inherited from caller).
318 */
319
320static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev)
321{
322 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
323 int speed = adev->dma_mode - XFER_MW_DMA_0;
Alan Coxdd668d12007-05-21 15:00:53 +0100324 int drive_pci = sis_old_port_base(adev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400325 u16 timing;
326
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +0200327 const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400328 const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 };
329
330 pci_read_config_word(pdev, drive_pci, &timing);
331
332 if (adev->dma_mode < XFER_UDMA_0) {
333 /* bits 3-0 hold recovery timing bits 8-10 active timing and
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300334 the higher bits are dependent on the device */
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +0200335 timing &= ~0x870F;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400336 timing |= mwdma_bits[speed];
Jeff Garzik669a5db2006-08-29 18:12:40 -0400337 } else {
338 /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */
339 speed = adev->dma_mode - XFER_UDMA_0;
340 timing &= ~0x6000;
341 timing |= udma_bits[speed];
342 }
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +0200343 pci_write_config_word(pdev, drive_pci, timing);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400344}
345
346/**
347 * sis_66_set_dmamode - Initialize host controller PATA DMA timings
348 * @ap: Port whose timings we are configuring
349 * @adev: Device to program
350 *
351 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
352 * Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike
353 * the old ide/pci driver.
354 *
355 * LOCKING:
356 * None (inherited from caller).
357 */
358
359static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev)
360{
361 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
362 int speed = adev->dma_mode - XFER_MW_DMA_0;
Alan Coxdd668d12007-05-21 15:00:53 +0100363 int drive_pci = sis_old_port_base(adev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400364 u16 timing;
365
Tejun Heoedeb6142007-09-21 16:29:05 +0900366 /* MWDMA 0-2 and UDMA 0-5 */
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +0200367 const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 };
Tejun Heoedeb6142007-09-21 16:29:05 +0900368 const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000, 0x8000 };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400369
370 pci_read_config_word(pdev, drive_pci, &timing);
371
372 if (adev->dma_mode < XFER_UDMA_0) {
373 /* bits 3-0 hold recovery timing bits 8-10 active timing and
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300374 the higher bits are dependent on the device, bit 15 udma */
Alan Coxdd668d12007-05-21 15:00:53 +0100375 timing &= ~0x870F;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400376 timing |= mwdma_bits[speed];
377 } else {
378 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
379 speed = adev->dma_mode - XFER_UDMA_0;
Alan Coxdd668d12007-05-21 15:00:53 +0100380 timing &= ~0xF000;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400381 timing |= udma_bits[speed];
382 }
383 pci_write_config_word(pdev, drive_pci, timing);
384}
385
386/**
387 * sis_100_set_dmamode - Initialize host controller PATA DMA timings
388 * @ap: Port whose timings we are configuring
389 * @adev: Device to program
390 *
391 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500392 * Handles UDMA66 and early UDMA100 devices.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400393 *
394 * LOCKING:
395 * None (inherited from caller).
396 */
397
398static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev)
399{
400 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
401 int speed = adev->dma_mode - XFER_MW_DMA_0;
Alan Coxdd668d12007-05-21 15:00:53 +0100402 int drive_pci = sis_old_port_base(adev);
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500403 u8 timing;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400404
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500405 const u8 udma_bits[] = { 0x8B, 0x87, 0x85, 0x83, 0x82, 0x81};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400406
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500407 pci_read_config_byte(pdev, drive_pci + 1, &timing);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400408
409 if (adev->dma_mode < XFER_UDMA_0) {
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500410 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400411 } else {
Alan Coxdd668d12007-05-21 15:00:53 +0100412 /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400413 speed = adev->dma_mode - XFER_UDMA_0;
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500414 timing &= ~0x8F;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400415 timing |= udma_bits[speed];
416 }
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500417 pci_write_config_byte(pdev, drive_pci + 1, timing);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400418}
419
420/**
421 * sis_133_early_set_dmamode - Initialize host controller PATA DMA timings
422 * @ap: Port whose timings we are configuring
423 * @adev: Device to program
424 *
425 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
Bartlomiej Zolnierkiewicz4761c062007-07-31 22:02:41 +0200426 * Handles early SiS 961 bridges.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400427 *
428 * LOCKING:
429 * None (inherited from caller).
430 */
431
432static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *adev)
433{
434 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
435 int speed = adev->dma_mode - XFER_MW_DMA_0;
Alan Coxdd668d12007-05-21 15:00:53 +0100436 int drive_pci = sis_old_port_base(adev);
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500437 u8 timing;
438 /* Low 4 bits are timing */
439 static const u8 udma_bits[] = { 0x8F, 0x8A, 0x87, 0x85, 0x83, 0x82, 0x81};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400440
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500441 pci_read_config_byte(pdev, drive_pci + 1, &timing);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400442
443 if (adev->dma_mode < XFER_UDMA_0) {
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500444 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400445 } else {
Alan Coxdd668d12007-05-21 15:00:53 +0100446 /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400447 speed = adev->dma_mode - XFER_UDMA_0;
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500448 timing &= ~0x8F;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400449 timing |= udma_bits[speed];
450 }
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500451 pci_write_config_byte(pdev, drive_pci + 1, timing);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400452}
453
454/**
455 * sis_133_set_dmamode - Initialize host controller PATA DMA timings
456 * @ap: Port whose timings we are configuring
457 * @adev: Device to program
458 *
459 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400460 *
461 * LOCKING:
462 * None (inherited from caller).
463 */
464
465static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev)
466{
467 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
468 int speed = adev->dma_mode - XFER_MW_DMA_0;
469 int port = 0x40;
470 u32 t1;
471 u32 reg54;
472
473 /* bits 4- cycle time 8 - cvs time */
Alan Cox2e413f52007-03-07 16:54:24 +0000474 static const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 };
475 static const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400476
477 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
478 pci_read_config_dword(pdev, 0x54, &reg54);
479 if (reg54 & 0x40000000)
480 port = 0x70;
481 port += (8 * ap->port_no) + (4 * adev->devno);
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500482
Jeff Garzik669a5db2006-08-29 18:12:40 -0400483 pci_read_config_dword(pdev, port, &t1);
484
485 if (adev->dma_mode < XFER_UDMA_0) {
Jeff Garzik1b52f2a2009-12-07 11:41:25 -0500486 t1 &= ~0x00000004;
487 /* FIXME: need data sheet to add MWDMA here. Also lacking on
488 ide/pci driver */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400489 } else {
490 speed = adev->dma_mode - XFER_UDMA_0;
491 /* if & 8 no UDMA133 - need info for ... */
492 t1 &= ~0x00000FF0;
493 t1 |= 0x00000004;
494 if (t1 & 0x08)
495 t1 |= timing_u133[speed];
496 else
497 t1 |= timing_u100[speed];
498 }
499 pci_write_config_dword(pdev, port, t1);
500}
501
502static struct scsi_host_template sis_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900503 ATA_BMDMA_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400504};
505
Tejun Heo029cfd62008-03-25 12:22:49 +0900506static struct ata_port_operations sis_133_for_sata_ops = {
507 .inherits = &ata_bmdma_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400508 .set_piomode = sis_133_set_piomode,
509 .set_dmamode = sis_133_set_dmamode,
Tejun Heo029cfd62008-03-25 12:22:49 +0900510 .cable_detect = sis_133_cable_detect,
511};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400512
Tejun Heo029cfd62008-03-25 12:22:49 +0900513static struct ata_port_operations sis_base_ops = {
514 .inherits = &ata_bmdma_port_ops,
Tejun Heoa1efdab2008-03-25 12:22:50 +0900515 .prereset = sis_pre_reset,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400516};
517
Tejun Heo029cfd62008-03-25 12:22:49 +0900518static struct ata_port_operations sis_133_ops = {
519 .inherits = &sis_base_ops,
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200520 .set_piomode = sis_133_set_piomode,
521 .set_dmamode = sis_133_set_dmamode,
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200522 .cable_detect = sis_133_cable_detect,
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200523};
524
Tejun Heo029cfd62008-03-25 12:22:49 +0900525static struct ata_port_operations sis_133_early_ops = {
526 .inherits = &sis_base_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400527 .set_piomode = sis_100_set_piomode,
528 .set_dmamode = sis_133_early_set_dmamode,
Alan Cox2e413f52007-03-07 16:54:24 +0000529 .cable_detect = sis_66_cable_detect,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400530};
531
Tejun Heo029cfd62008-03-25 12:22:49 +0900532static struct ata_port_operations sis_100_ops = {
533 .inherits = &sis_base_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400534 .set_piomode = sis_100_set_piomode,
535 .set_dmamode = sis_100_set_dmamode,
Alan Cox2e413f52007-03-07 16:54:24 +0000536 .cable_detect = sis_66_cable_detect,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400537};
538
Tejun Heo029cfd62008-03-25 12:22:49 +0900539static struct ata_port_operations sis_66_ops = {
540 .inherits = &sis_base_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400541 .set_piomode = sis_old_set_piomode,
542 .set_dmamode = sis_66_set_dmamode,
Alan Cox2e413f52007-03-07 16:54:24 +0000543 .cable_detect = sis_66_cable_detect,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400544};
545
Tejun Heo029cfd62008-03-25 12:22:49 +0900546static struct ata_port_operations sis_old_ops = {
547 .inherits = &sis_base_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400548 .set_piomode = sis_old_set_piomode,
549 .set_dmamode = sis_old_set_dmamode,
Alan Cox2e413f52007-03-07 16:54:24 +0000550 .cable_detect = ata_cable_40wire,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400551};
552
Tejun Heo1626aeb2007-05-04 12:43:58 +0200553static const struct ata_port_info sis_info = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400554 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100555 .pio_mask = ATA_PIO4,
556 .mwdma_mask = ATA_MWDMA2,
557 /* No UDMA */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400558 .port_ops = &sis_old_ops,
559};
Tejun Heo1626aeb2007-05-04 12:43:58 +0200560static const struct ata_port_info sis_info33 = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400561 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100562 .pio_mask = ATA_PIO4,
563 .mwdma_mask = ATA_MWDMA2,
564 .udma_mask = ATA_UDMA2,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400565 .port_ops = &sis_old_ops,
566};
Tejun Heo1626aeb2007-05-04 12:43:58 +0200567static const struct ata_port_info sis_info66 = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400568 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100569 .pio_mask = ATA_PIO4,
570 /* No MWDMA */
571 .udma_mask = ATA_UDMA4,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400572 .port_ops = &sis_66_ops,
573};
Tejun Heo1626aeb2007-05-04 12:43:58 +0200574static const struct ata_port_info sis_info100 = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400575 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100576 .pio_mask = ATA_PIO4,
577 /* No MWDMA */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400578 .udma_mask = ATA_UDMA5,
579 .port_ops = &sis_100_ops,
580};
Tejun Heo1626aeb2007-05-04 12:43:58 +0200581static const struct ata_port_info sis_info100_early = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400582 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100583 .pio_mask = ATA_PIO4,
584 /* No MWDMA */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400585 .udma_mask = ATA_UDMA5,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400586 .port_ops = &sis_66_ops,
587};
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200588static const struct ata_port_info sis_info133 = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400589 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100590 .pio_mask = ATA_PIO4,
591 /* No MWDMA */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400592 .udma_mask = ATA_UDMA6,
593 .port_ops = &sis_133_ops,
594};
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200595const struct ata_port_info sis_info133_for_sata = {
Sergei Shtylyovc10f97b2011-02-04 22:03:34 +0300596 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100597 .pio_mask = ATA_PIO4,
598 /* No MWDMA */
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200599 .udma_mask = ATA_UDMA6,
600 .port_ops = &sis_133_for_sata_ops,
601};
Tejun Heo1626aeb2007-05-04 12:43:58 +0200602static const struct ata_port_info sis_info133_early = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400603 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100604 .pio_mask = ATA_PIO4,
605 /* No MWDMA */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400606 .udma_mask = ATA_UDMA6,
607 .port_ops = &sis_133_early_ops,
608};
609
Alan9b14dec2007-01-08 16:11:07 +0000610/* Privately shared with the SiS180 SATA driver, not for use elsewhere */
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200611EXPORT_SYMBOL_GPL(sis_info133_for_sata);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400612
613static void sis_fixup(struct pci_dev *pdev, struct sis_chipset *sis)
614{
615 u16 regw;
616 u8 reg;
617
618 if (sis->info == &sis_info133) {
619 pci_read_config_word(pdev, 0x50, &regw);
620 if (regw & 0x08)
621 pci_write_config_word(pdev, 0x50, regw & ~0x08);
622 pci_read_config_word(pdev, 0x52, &regw);
623 if (regw & 0x08)
624 pci_write_config_word(pdev, 0x52, regw & ~0x08);
625 return;
626 }
627
628 if (sis->info == &sis_info133_early || sis->info == &sis_info100) {
629 /* Fix up latency */
630 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);
631 /* Set compatibility bit */
632 pci_read_config_byte(pdev, 0x49, &reg);
633 if (!(reg & 0x01))
634 pci_write_config_byte(pdev, 0x49, reg | 0x01);
635 return;
636 }
637
638 if (sis->info == &sis_info66 || sis->info == &sis_info100_early) {
639 /* Fix up latency */
640 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);
641 /* Set compatibility bit */
642 pci_read_config_byte(pdev, 0x52, &reg);
643 if (!(reg & 0x04))
644 pci_write_config_byte(pdev, 0x52, reg | 0x04);
645 return;
646 }
647
648 if (sis->info == &sis_info33) {
649 pci_read_config_byte(pdev, PCI_CLASS_PROG, &reg);
650 if (( reg & 0x0F ) != 0x00)
651 pci_write_config_byte(pdev, PCI_CLASS_PROG, reg & 0xF0);
652 /* Fall through to ATA16 fixup below */
653 }
654
655 if (sis->info == &sis_info || sis->info == &sis_info33) {
656 /* force per drive recovery and active timings
657 needed on ATA_33 and below chips */
658 pci_read_config_byte(pdev, 0x52, &reg);
659 if (!(reg & 0x08))
660 pci_write_config_byte(pdev, 0x52, reg|0x08);
661 return;
662 }
663
664 BUG();
665}
666
667/**
668 * sis_init_one - Register SiS ATA PCI device with kernel services
669 * @pdev: PCI device to register
670 * @ent: Entry in sis_pci_tbl matching with @pdev
671 *
672 * Called from kernel PCI layer. We probe for combined mode (sigh),
673 * and then hand over control to libata, for it to do the rest.
674 *
675 * LOCKING:
676 * Inherited from PCI layer (may sleep).
677 *
678 * RETURNS:
679 * Zero on success, or -ERRNO value.
680 */
681
682static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
683{
Tejun Heo887125e2008-03-25 12:22:49 +0900684 const struct ata_port_info *ppi[] = { NULL, NULL };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400685 struct pci_dev *host = NULL;
686 struct sis_chipset *chipset = NULL;
Alan Coxf3769e92007-04-19 11:09:52 +0100687 struct sis_chipset *sets;
Tejun Heof08048e2008-03-25 12:22:47 +0900688 int rc;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400689
690 static struct sis_chipset sis_chipsets[] = {
Jeff Garzikf20b16f2006-12-11 11:14:06 -0500691
Alan Coxaf323a22006-09-12 17:15:12 +0100692 { 0x0968, &sis_info133 },
693 { 0x0966, &sis_info133 },
694 { 0x0965, &sis_info133 },
Jeff Garzik669a5db2006-08-29 18:12:40 -0400695 { 0x0745, &sis_info100 },
696 { 0x0735, &sis_info100 },
697 { 0x0733, &sis_info100 },
698 { 0x0635, &sis_info100 },
699 { 0x0633, &sis_info100 },
700
701 { 0x0730, &sis_info100_early }, /* 100 with ATA 66 layout */
702 { 0x0550, &sis_info100_early }, /* 100 with ATA 66 layout */
703
704 { 0x0640, &sis_info66 },
705 { 0x0630, &sis_info66 },
706 { 0x0620, &sis_info66 },
707 { 0x0540, &sis_info66 },
708 { 0x0530, &sis_info66 },
709
710 { 0x5600, &sis_info33 },
711 { 0x5598, &sis_info33 },
712 { 0x5597, &sis_info33 },
713 { 0x5591, &sis_info33 },
714 { 0x5582, &sis_info33 },
715 { 0x5581, &sis_info33 },
716
717 { 0x5596, &sis_info },
718 { 0x5571, &sis_info },
719 { 0x5517, &sis_info },
720 { 0x5511, &sis_info },
721
722 {0}
723 };
724 static struct sis_chipset sis133_early = {
725 0x0, &sis_info133_early
726 };
727 static struct sis_chipset sis133 = {
728 0x0, &sis_info133
729 };
730 static struct sis_chipset sis100_early = {
731 0x0, &sis_info100_early
732 };
733 static struct sis_chipset sis100 = {
734 0x0, &sis_info100
735 };
736
Joe Perches06296a12011-04-15 15:52:00 -0700737 ata_print_version_once(&pdev->dev, DRV_VERSION);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400738
Tejun Heof08048e2008-03-25 12:22:47 +0900739 rc = pcim_enable_device(pdev);
740 if (rc)
741 return rc;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400742
Tejun Heof08048e2008-03-25 12:22:47 +0900743 /* We have to find the bridge first */
Alan Coxf3769e92007-04-19 11:09:52 +0100744 for (sets = &sis_chipsets[0]; sets->device; sets++) {
745 host = pci_get_device(PCI_VENDOR_ID_SI, sets->device, NULL);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400746 if (host != NULL) {
Alan Coxf3769e92007-04-19 11:09:52 +0100747 chipset = sets; /* Match found */
748 if (sets->device == 0x630) { /* SIS630 */
Auke Kok44c10132007-06-08 15:46:36 -0700749 if (host->revision >= 0x30) /* 630 ET */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400750 chipset = &sis100_early;
751 }
752 break;
753 }
754 }
755
756 /* Look for concealed bridges */
Alan Coxf3769e92007-04-19 11:09:52 +0100757 if (chipset == NULL) {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400758 /* Second check */
759 u32 idemisc;
760 u16 trueid;
761
762 /* Disable ID masking and register remapping then
763 see what the real ID is */
764
765 pci_read_config_dword(pdev, 0x54, &idemisc);
766 pci_write_config_dword(pdev, 0x54, idemisc & 0x7fffffff);
767 pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid);
768 pci_write_config_dword(pdev, 0x54, idemisc);
769
770 switch(trueid) {
771 case 0x5518: /* SIS 962/963 */
772 chipset = &sis133;
773 if ((idemisc & 0x40000000) == 0) {
774 pci_write_config_dword(pdev, 0x54, idemisc | 0x40000000);
775 printk(KERN_INFO "SIS5513: Switching to 5513 register mapping\n");
776 }
777 break;
778 case 0x0180: /* SIS 965/965L */
779 chipset = &sis133;
780 break;
781 case 0x1180: /* SIS 966/966L */
782 chipset = &sis133;
783 break;
784 }
785 }
786
787 /* Further check */
788 if (chipset == NULL) {
789 struct pci_dev *lpc_bridge;
790 u16 trueid;
791 u8 prefctl;
792 u8 idecfg;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400793
794 /* Try the second unmasking technique */
795 pci_read_config_byte(pdev, 0x4a, &idecfg);
796 pci_write_config_byte(pdev, 0x4a, idecfg | 0x10);
797 pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid);
798 pci_write_config_byte(pdev, 0x4a, idecfg);
799
800 switch(trueid) {
801 case 0x5517:
802 lpc_bridge = pci_get_slot(pdev->bus, 0x10); /* Bus 0 Dev 2 Fn 0 */
803 if (lpc_bridge == NULL)
804 break;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400805 pci_read_config_byte(pdev, 0x49, &prefctl);
806 pci_dev_put(lpc_bridge);
807
Auke Kok44c10132007-06-08 15:46:36 -0700808 if (lpc_bridge->revision == 0x10 && (prefctl & 0x80)) {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400809 chipset = &sis133_early;
810 break;
811 }
812 chipset = &sis100;
813 break;
814 }
815 }
816 pci_dev_put(host);
817
818 /* No chipset info, no support */
819 if (chipset == NULL)
820 return -ENODEV;
821
Tejun Heo887125e2008-03-25 12:22:49 +0900822 ppi[0] = chipset->info;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400823
824 sis_fixup(pdev, chipset);
825
Tejun Heo1c5afdf2010-05-19 22:10:22 +0200826 return ata_pci_bmdma_init_one(pdev, ppi, &sis_sht, chipset, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400827}
828
Bartlomiej Zolnierkiewicz750c7132009-12-03 20:32:13 +0100829#ifdef CONFIG_PM
830static int sis_reinit_one(struct pci_dev *pdev)
831{
832 struct ata_host *host = dev_get_drvdata(&pdev->dev);
833 int rc;
834
835 rc = ata_pci_device_do_resume(pdev);
836 if (rc)
837 return rc;
838
839 sis_fixup(pdev, host->private_data);
840
841 ata_host_resume(host);
842 return 0;
843}
844#endif
845
Jeff Garzik669a5db2006-08-29 18:12:40 -0400846static const struct pci_device_id sis_pci_tbl[] = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400847 { PCI_VDEVICE(SI, 0x5513), }, /* SiS 5513 */
848 { PCI_VDEVICE(SI, 0x5518), }, /* SiS 5518 */
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200849 { PCI_VDEVICE(SI, 0x1180), }, /* SiS 1180 */
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400850
Jeff Garzik669a5db2006-08-29 18:12:40 -0400851 { }
852};
853
854static struct pci_driver sis_pci_driver = {
855 .name = DRV_NAME,
856 .id_table = sis_pci_tbl,
857 .probe = sis_init_one,
858 .remove = ata_pci_remove_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900859#ifdef CONFIG_PM
Alan62d64ae2006-11-27 16:27:20 +0000860 .suspend = ata_pci_device_suspend,
Bartlomiej Zolnierkiewicz750c7132009-12-03 20:32:13 +0100861 .resume = sis_reinit_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900862#endif
Jeff Garzik669a5db2006-08-29 18:12:40 -0400863};
864
865static int __init sis_init(void)
866{
867 return pci_register_driver(&sis_pci_driver);
868}
869
870static void __exit sis_exit(void)
871{
872 pci_unregister_driver(&sis_pci_driver);
873}
874
Jeff Garzik669a5db2006-08-29 18:12:40 -0400875module_init(sis_init);
876module_exit(sis_exit);
877
878MODULE_AUTHOR("Alan Cox");
879MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA");
880MODULE_LICENSE("GPL");
881MODULE_DEVICE_TABLE(pci, sis_pci_tbl);
882MODULE_VERSION(DRV_VERSION);
883