blob: 0640ab8b9958803bd3a3c2cccd41a0dd011aff02 [file] [log] [blame]
Ben Widawsky254f9652012-06-04 14:42:42 -07001/*
2 * Copyright © 2011-2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Ben Widawsky <ben@bwidawsk.net>
25 *
26 */
27
28/*
29 * This file implements HW context support. On gen5+ a HW context consists of an
30 * opaque GPU object which is referenced at times of context saves and restores.
31 * With RC6 enabled, the context is also referenced as the GPU enters and exists
32 * from RC6 (GPU has it's own internal power context, except on gen5). Though
33 * something like a context does exist for the media ring, the code only
34 * supports contexts for the render ring.
35 *
36 * In software, there is a distinction between contexts created by the user,
37 * and the default HW context. The default HW context is used by GPU clients
38 * that do not request setup of their own hardware context. The default
39 * context's state is never restored to help prevent programming errors. This
40 * would happen if a client ran and piggy-backed off another clients GPU state.
41 * The default context only exists to give the GPU some offset to load as the
42 * current to invoke a save of the context we actually care about. In fact, the
43 * code could likely be constructed, albeit in a more complicated fashion, to
44 * never use the default context, though that limits the driver's ability to
45 * swap out, and/or destroy other contexts.
46 *
47 * All other contexts are created as a request by the GPU client. These contexts
48 * store GPU state, and thus allow GPU clients to not re-emit state (and
49 * potentially query certain state) at any time. The kernel driver makes
50 * certain that the appropriate commands are inserted.
51 *
52 * The context life cycle is semi-complicated in that context BOs may live
53 * longer than the context itself because of the way the hardware, and object
54 * tracking works. Below is a very crude representation of the state machine
55 * describing the context life.
56 * refcount pincount active
57 * S0: initial state 0 0 0
58 * S1: context created 1 0 0
59 * S2: context is currently running 2 1 X
60 * S3: GPU referenced, but not current 2 0 1
61 * S4: context is current, but destroyed 1 1 0
62 * S5: like S3, but destroyed 1 0 1
63 *
64 * The most common (but not all) transitions:
65 * S0->S1: client creates a context
66 * S1->S2: client submits execbuf with context
67 * S2->S3: other clients submits execbuf with context
68 * S3->S1: context object was retired
69 * S3->S2: clients submits another execbuf
70 * S2->S4: context destroy called with current context
71 * S3->S5->S0: destroy path
72 * S4->S5->S0: destroy path on current context
73 *
74 * There are two confusing terms used above:
75 * The "current context" means the context which is currently running on the
Damien Lespiau508842a2013-08-30 14:40:26 +010076 * GPU. The GPU has loaded its state already and has stored away the gtt
Ben Widawsky254f9652012-06-04 14:42:42 -070077 * offset of the BO. The GPU is not actively referencing the data at this
78 * offset, but it will on the next context switch. The only way to avoid this
79 * is to do a GPU reset.
80 *
81 * An "active context' is one which was previously the "current context" and is
82 * on the active list waiting for the next context switch to occur. Until this
83 * happens, the object must remain at the same gtt offset. It is therefore
84 * possible to destroy a context, but it is still active.
85 *
86 */
87
David Howells760285e2012-10-02 18:01:07 +010088#include <drm/drmP.h>
89#include <drm/i915_drm.h>
Ben Widawsky254f9652012-06-04 14:42:42 -070090#include "i915_drv.h"
91
Ben Widawsky40521052012-06-04 14:42:43 -070092/* This is a HW constraint. The value below is the largest known requirement
93 * I've seen in a spec to date, and that was a workaround for a non-shipping
94 * part. It should be safe to decrease this, but it's more future proof as is.
95 */
96#define CONTEXT_ALIGN (64<<10)
97
98static struct i915_hw_context *
99i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
Chris Wilson9a3b5302012-07-15 12:34:24 +0100100static int do_switch(struct i915_hw_context *to);
Ben Widawsky40521052012-06-04 14:42:43 -0700101
Ben Widawsky254f9652012-06-04 14:42:42 -0700102static int get_context_size(struct drm_device *dev)
103{
104 struct drm_i915_private *dev_priv = dev->dev_private;
105 int ret;
106 u32 reg;
107
108 switch (INTEL_INFO(dev)->gen) {
109 case 6:
110 reg = I915_READ(CXT_SIZE);
111 ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
112 break;
113 case 7:
Ben Widawsky4f91dd62012-07-18 10:10:09 -0700114 reg = I915_READ(GEN7_CXT_SIZE);
Ben Widawsky2e4291e2012-07-24 20:47:30 -0700115 if (IS_HASWELL(dev))
Ben Widawskya0de80a2013-06-25 21:53:40 -0700116 ret = HSW_CXT_TOTAL_SIZE;
Ben Widawsky2e4291e2012-07-24 20:47:30 -0700117 else
118 ret = GEN7_CXT_TOTAL_SIZE(reg) * 64;
Ben Widawsky254f9652012-06-04 14:42:42 -0700119 break;
Ben Widawsky88976442013-11-02 21:07:05 -0700120 case 8:
121 ret = GEN8_CXT_TOTAL_SIZE;
122 break;
Ben Widawsky254f9652012-06-04 14:42:42 -0700123 default:
124 BUG();
125 }
126
127 return ret;
128}
129
Mika Kuoppaladce32712013-04-30 13:30:33 +0300130void i915_gem_context_free(struct kref *ctx_ref)
Ben Widawsky40521052012-06-04 14:42:43 -0700131{
Mika Kuoppaladce32712013-04-30 13:30:33 +0300132 struct i915_hw_context *ctx = container_of(ctx_ref,
133 typeof(*ctx), ref);
Ben Widawsky40521052012-06-04 14:42:43 -0700134
Ben Widawskya33afea2013-09-17 21:12:45 -0700135 list_del(&ctx->link);
Ben Widawsky40521052012-06-04 14:42:43 -0700136 drm_gem_object_unreference(&ctx->obj->base);
137 kfree(ctx);
138}
139
Ben Widawsky146937e2012-06-29 10:30:39 -0700140static struct i915_hw_context *
Ben Widawsky40521052012-06-04 14:42:43 -0700141create_hw_context(struct drm_device *dev,
Ben Widawsky146937e2012-06-29 10:30:39 -0700142 struct drm_i915_file_private *file_priv)
Ben Widawsky40521052012-06-04 14:42:43 -0700143{
144 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawsky146937e2012-06-29 10:30:39 -0700145 struct i915_hw_context *ctx;
Tejun Heoc8c470a2013-02-27 17:04:10 -0800146 int ret;
Ben Widawsky40521052012-06-04 14:42:43 -0700147
Ben Widawskyf94982b2012-11-10 10:56:04 -0800148 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
Ben Widawsky146937e2012-06-29 10:30:39 -0700149 if (ctx == NULL)
150 return ERR_PTR(-ENOMEM);
Ben Widawsky40521052012-06-04 14:42:43 -0700151
Mika Kuoppaladce32712013-04-30 13:30:33 +0300152 kref_init(&ctx->ref);
Ben Widawsky146937e2012-06-29 10:30:39 -0700153 ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
Ben Widawskya33afea2013-09-17 21:12:45 -0700154 INIT_LIST_HEAD(&ctx->link);
Ben Widawsky146937e2012-06-29 10:30:39 -0700155 if (ctx->obj == NULL) {
156 kfree(ctx);
Ben Widawsky40521052012-06-04 14:42:43 -0700157 DRM_DEBUG_DRIVER("Context object allocated failed\n");
Ben Widawsky146937e2012-06-29 10:30:39 -0700158 return ERR_PTR(-ENOMEM);
Ben Widawsky40521052012-06-04 14:42:43 -0700159 }
160
Chris Wilson4615d4c2013-04-08 14:28:40 +0100161 if (INTEL_INFO(dev)->gen >= 7) {
162 ret = i915_gem_object_set_cache_level(ctx->obj,
Chris Wilson350ec882013-08-06 13:17:02 +0100163 I915_CACHE_L3_LLC);
Ben Widawskybb036412013-05-25 12:26:38 -0700164 /* Failure shouldn't ever happen this early */
165 if (WARN_ON(ret))
Chris Wilson4615d4c2013-04-08 14:28:40 +0100166 goto err_out;
167 }
168
Ben Widawsky40521052012-06-04 14:42:43 -0700169 /* The ring associated with the context object is handled by the normal
170 * object tracking code. We give an initial ring value simple to pass an
171 * assertion in the context switch code.
172 */
Ben Widawsky146937e2012-06-29 10:30:39 -0700173 ctx->ring = &dev_priv->ring[RCS];
Ben Widawskya33afea2013-09-17 21:12:45 -0700174 list_add_tail(&ctx->link, &dev_priv->context_list);
Ben Widawsky40521052012-06-04 14:42:43 -0700175
176 /* Default context will never have a file_priv */
177 if (file_priv == NULL)
Ben Widawsky146937e2012-06-29 10:30:39 -0700178 return ctx;
Ben Widawsky40521052012-06-04 14:42:43 -0700179
Tejun Heoc8c470a2013-02-27 17:04:10 -0800180 ret = idr_alloc(&file_priv->context_idr, ctx, DEFAULT_CONTEXT_ID + 1, 0,
181 GFP_KERNEL);
182 if (ret < 0)
Ben Widawsky40521052012-06-04 14:42:43 -0700183 goto err_out;
Mika Kuoppaladce32712013-04-30 13:30:33 +0300184
185 ctx->file_priv = file_priv;
Tejun Heoc8c470a2013-02-27 17:04:10 -0800186 ctx->id = ret;
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700187 /* NB: Mark all slices as needing a remap so that when the context first
188 * loads it will restore whatever remap state already exists. If there
189 * is no remap info, it will be a NOP. */
190 ctx->remap_slice = (1 << NUM_L3_SLICES(dev)) - 1;
Ben Widawsky40521052012-06-04 14:42:43 -0700191
Ben Widawsky146937e2012-06-29 10:30:39 -0700192 return ctx;
Ben Widawsky40521052012-06-04 14:42:43 -0700193
194err_out:
Mika Kuoppaladce32712013-04-30 13:30:33 +0300195 i915_gem_context_unreference(ctx);
Ben Widawsky146937e2012-06-29 10:30:39 -0700196 return ERR_PTR(ret);
Ben Widawsky40521052012-06-04 14:42:43 -0700197}
198
Ben Widawskye0556842012-06-04 14:42:46 -0700199static inline bool is_default_context(struct i915_hw_context *ctx)
200{
201 return (ctx == ctx->ring->default_context);
202}
203
Ben Widawsky254f9652012-06-04 14:42:42 -0700204/**
205 * The default context needs to exist per ring that uses contexts. It stores the
206 * context state of the GPU for applications that don't utilize HW contexts, as
207 * well as an idle case.
208 */
209static int create_default_context(struct drm_i915_private *dev_priv)
210{
Ben Widawsky40521052012-06-04 14:42:43 -0700211 struct i915_hw_context *ctx;
212 int ret;
213
214 BUG_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
215
Ben Widawsky146937e2012-06-29 10:30:39 -0700216 ctx = create_hw_context(dev_priv->dev, NULL);
217 if (IS_ERR(ctx))
218 return PTR_ERR(ctx);
Ben Widawsky40521052012-06-04 14:42:43 -0700219
220 /* We may need to do things with the shrinker which require us to
221 * immediately switch back to the default context. This can cause a
222 * problem as pinning the default context also requires GTT space which
223 * may not be available. To avoid this we always pin the
224 * default context.
225 */
Ben Widawskyc37e2202013-07-31 16:59:58 -0700226 ret = i915_gem_obj_ggtt_pin(ctx->obj, CONTEXT_ALIGN, false, false);
Ben Widawskybb036412013-05-25 12:26:38 -0700227 if (ret) {
228 DRM_DEBUG_DRIVER("Couldn't pin %d\n", ret);
Chris Wilson9a3b5302012-07-15 12:34:24 +0100229 goto err_destroy;
Ben Widawskybb036412013-05-25 12:26:38 -0700230 }
Ben Widawsky40521052012-06-04 14:42:43 -0700231
Chris Wilson9a3b5302012-07-15 12:34:24 +0100232 ret = do_switch(ctx);
Ben Widawskybb036412013-05-25 12:26:38 -0700233 if (ret) {
234 DRM_DEBUG_DRIVER("Switch failed %d\n", ret);
Chris Wilson9a3b5302012-07-15 12:34:24 +0100235 goto err_unpin;
Ben Widawskybb036412013-05-25 12:26:38 -0700236 }
Ben Widawskydfabbcb2012-06-04 14:42:51 -0700237
Ben Widawsky71b76d02013-10-14 10:01:37 -0700238 dev_priv->ring[RCS].default_context = ctx;
239
Chris Wilson9a3b5302012-07-15 12:34:24 +0100240 DRM_DEBUG_DRIVER("Default HW context loaded\n");
241 return 0;
242
243err_unpin:
Ben Widawskyd7f46fc2013-12-06 14:10:55 -0800244 i915_gem_object_ggtt_unpin(ctx->obj);
Chris Wilson9a3b5302012-07-15 12:34:24 +0100245err_destroy:
Mika Kuoppaladce32712013-04-30 13:30:33 +0300246 i915_gem_context_unreference(ctx);
Ben Widawsky40521052012-06-04 14:42:43 -0700247 return ret;
Ben Widawsky254f9652012-06-04 14:42:42 -0700248}
249
Ben Widawsky8245be32013-11-06 13:56:29 -0200250int i915_gem_context_init(struct drm_device *dev)
Ben Widawsky254f9652012-06-04 14:42:42 -0700251{
252 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawsky8245be32013-11-06 13:56:29 -0200253 int ret;
Ben Widawsky254f9652012-06-04 14:42:42 -0700254
Ben Widawsky8245be32013-11-06 13:56:29 -0200255 if (!HAS_HW_CONTEXTS(dev))
256 return 0;
Ben Widawsky254f9652012-06-04 14:42:42 -0700257
258 /* If called from reset, or thaw... we've been here already */
Ben Widawsky8245be32013-11-06 13:56:29 -0200259 if (dev_priv->ring[RCS].default_context)
260 return 0;
Ben Widawsky254f9652012-06-04 14:42:42 -0700261
Ben Widawsky07ea0d82013-02-07 13:34:19 -0800262 dev_priv->hw_context_size = round_up(get_context_size(dev), 4096);
Ben Widawsky254f9652012-06-04 14:42:42 -0700263
Ben Widawsky07ea0d82013-02-07 13:34:19 -0800264 if (dev_priv->hw_context_size > (1<<20)) {
Ben Widawskybb036412013-05-25 12:26:38 -0700265 DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size\n");
Ben Widawsky8245be32013-11-06 13:56:29 -0200266 return -E2BIG;
Ben Widawsky254f9652012-06-04 14:42:42 -0700267 }
268
Ben Widawsky8245be32013-11-06 13:56:29 -0200269 ret = create_default_context(dev_priv);
270 if (ret) {
271 DRM_DEBUG_DRIVER("Disabling HW Contexts; create failed %d\n",
272 ret);
273 return ret;
Ben Widawsky254f9652012-06-04 14:42:42 -0700274 }
275
276 DRM_DEBUG_DRIVER("HW context support initialized\n");
Ben Widawsky8245be32013-11-06 13:56:29 -0200277 return 0;
Ben Widawsky254f9652012-06-04 14:42:42 -0700278}
279
280void i915_gem_context_fini(struct drm_device *dev)
281{
282 struct drm_i915_private *dev_priv = dev->dev_private;
Mika Kuoppaladce32712013-04-30 13:30:33 +0300283 struct i915_hw_context *dctx = dev_priv->ring[RCS].default_context;
Ben Widawsky254f9652012-06-04 14:42:42 -0700284
Ben Widawsky8245be32013-11-06 13:56:29 -0200285 if (!HAS_HW_CONTEXTS(dev))
Ben Widawsky254f9652012-06-04 14:42:42 -0700286 return;
Ben Widawsky40521052012-06-04 14:42:43 -0700287
Daniel Vetter55a66622012-06-19 21:55:32 +0200288 /* The only known way to stop the gpu from accessing the hw context is
289 * to reset it. Do this as the very last operation to avoid confusing
290 * other code, leading to spurious errors. */
291 intel_gpu_reset(dev);
292
Mika Kuoppala168f8362013-05-03 16:29:08 +0300293 /* When default context is created and switched to, base object refcount
294 * will be 2 (+1 from object creation and +1 from do_switch()).
295 * i915_gem_context_fini() will be called after gpu_idle() has switched
296 * to default context. So we need to unreference the base object once
297 * to offset the do_switch part, so that i915_gem_context_unreference()
298 * can then free the base object correctly. */
Ben Widawsky71b76d02013-10-14 10:01:37 -0700299 WARN_ON(!dev_priv->ring[RCS].last_context);
300 if (dev_priv->ring[RCS].last_context == dctx) {
301 /* Fake switch to NULL context */
302 WARN_ON(dctx->obj->active);
Ben Widawskyd7f46fc2013-12-06 14:10:55 -0800303 i915_gem_object_ggtt_unpin(dctx->obj);
Ben Widawsky71b76d02013-10-14 10:01:37 -0700304 i915_gem_context_unreference(dctx);
305 }
306
Ben Widawskyd7f46fc2013-12-06 14:10:55 -0800307 i915_gem_object_ggtt_unpin(dctx->obj);
Mika Kuoppaladce32712013-04-30 13:30:33 +0300308 i915_gem_context_unreference(dctx);
Ben Widawsky71b76d02013-10-14 10:01:37 -0700309 dev_priv->ring[RCS].default_context = NULL;
310 dev_priv->ring[RCS].last_context = NULL;
Ben Widawsky254f9652012-06-04 14:42:42 -0700311}
312
Ben Widawsky40521052012-06-04 14:42:43 -0700313static int context_idr_cleanup(int id, void *p, void *data)
314{
Daniel Vetter73c273e2012-06-19 20:27:39 +0200315 struct i915_hw_context *ctx = p;
Ben Widawsky40521052012-06-04 14:42:43 -0700316
317 BUG_ON(id == DEFAULT_CONTEXT_ID);
Ben Widawsky40521052012-06-04 14:42:43 -0700318
Mika Kuoppaladce32712013-04-30 13:30:33 +0300319 i915_gem_context_unreference(ctx);
Ben Widawsky40521052012-06-04 14:42:43 -0700320 return 0;
Ben Widawsky254f9652012-06-04 14:42:42 -0700321}
322
Mika Kuoppalac0bb6172013-06-12 12:35:29 +0300323struct i915_ctx_hang_stats *
Chris Wilson11fa3382013-07-03 17:22:06 +0300324i915_gem_context_get_hang_stats(struct drm_device *dev,
Mika Kuoppalac0bb6172013-06-12 12:35:29 +0300325 struct drm_file *file,
326 u32 id)
327{
Mika Kuoppalac0bb6172013-06-12 12:35:29 +0300328 struct drm_i915_file_private *file_priv = file->driver_priv;
Chris Wilson11fa3382013-07-03 17:22:06 +0300329 struct i915_hw_context *ctx;
Mika Kuoppalac0bb6172013-06-12 12:35:29 +0300330
331 if (id == DEFAULT_CONTEXT_ID)
332 return &file_priv->hang_stats;
333
Ben Widawsky8245be32013-11-06 13:56:29 -0200334 if (!HAS_HW_CONTEXTS(dev))
335 return ERR_PTR(-ENOENT);
336
337 ctx = i915_gem_context_get(file->driver_priv, id);
Chris Wilson11fa3382013-07-03 17:22:06 +0300338 if (ctx == NULL)
Mika Kuoppalac0bb6172013-06-12 12:35:29 +0300339 return ERR_PTR(-ENOENT);
340
Chris Wilson11fa3382013-07-03 17:22:06 +0300341 return &ctx->hang_stats;
Mika Kuoppalac0bb6172013-06-12 12:35:29 +0300342}
343
Ben Widawsky254f9652012-06-04 14:42:42 -0700344void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
345{
Ben Widawsky40521052012-06-04 14:42:43 -0700346 struct drm_i915_file_private *file_priv = file->driver_priv;
Ben Widawsky254f9652012-06-04 14:42:42 -0700347
Ben Widawsky40521052012-06-04 14:42:43 -0700348 mutex_lock(&dev->struct_mutex);
Daniel Vetter73c273e2012-06-19 20:27:39 +0200349 idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
Ben Widawsky40521052012-06-04 14:42:43 -0700350 idr_destroy(&file_priv->context_idr);
351 mutex_unlock(&dev->struct_mutex);
352}
353
Ben Widawskye0556842012-06-04 14:42:46 -0700354static struct i915_hw_context *
Ben Widawsky40521052012-06-04 14:42:43 -0700355i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
356{
357 return (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
Ben Widawsky254f9652012-06-04 14:42:42 -0700358}
Ben Widawskye0556842012-06-04 14:42:46 -0700359
360static inline int
361mi_set_context(struct intel_ring_buffer *ring,
362 struct i915_hw_context *new_context,
363 u32 hw_flags)
364{
365 int ret;
366
Ben Widawsky12b02862012-06-04 14:42:50 -0700367 /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
368 * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
369 * explicitly, so we rely on the value at ring init, stored in
370 * itlb_before_ctx_switch.
371 */
372 if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) {
Chris Wilsonac82ea22012-10-01 14:27:04 +0100373 ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
Ben Widawsky12b02862012-06-04 14:42:50 -0700374 if (ret)
375 return ret;
376 }
377
Ben Widawskye37ec392012-06-04 14:42:48 -0700378 ret = intel_ring_begin(ring, 6);
Ben Widawskye0556842012-06-04 14:42:46 -0700379 if (ret)
380 return ret;
381
Damien Lespiau8693a822013-05-03 18:48:11 +0100382 /* WaProgramMiArbOnOffAroundMiSetContext:ivb,vlv,hsw */
Ben Widawskye37ec392012-06-04 14:42:48 -0700383 if (IS_GEN7(ring->dev))
384 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
385 else
386 intel_ring_emit(ring, MI_NOOP);
387
Ben Widawskye0556842012-06-04 14:42:46 -0700388 intel_ring_emit(ring, MI_NOOP);
389 intel_ring_emit(ring, MI_SET_CONTEXT);
Ben Widawskyf343c5f2013-07-05 14:41:04 -0700390 intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->obj) |
Ben Widawskye0556842012-06-04 14:42:46 -0700391 MI_MM_SPACE_GTT |
392 MI_SAVE_EXT_STATE_EN |
393 MI_RESTORE_EXT_STATE_EN |
394 hw_flags);
395 /* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */
396 intel_ring_emit(ring, MI_NOOP);
397
Ben Widawskye37ec392012-06-04 14:42:48 -0700398 if (IS_GEN7(ring->dev))
399 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);
400 else
401 intel_ring_emit(ring, MI_NOOP);
402
Ben Widawskye0556842012-06-04 14:42:46 -0700403 intel_ring_advance(ring);
404
405 return ret;
406}
407
Chris Wilson9a3b5302012-07-15 12:34:24 +0100408static int do_switch(struct i915_hw_context *to)
Ben Widawskye0556842012-06-04 14:42:46 -0700409{
Chris Wilson9a3b5302012-07-15 12:34:24 +0100410 struct intel_ring_buffer *ring = to->ring;
Ben Widawsky6f65e292013-12-06 14:10:56 -0800411 struct drm_i915_private *dev_priv = ring->dev->dev_private;
Chris Wilson112522f2013-05-02 16:48:07 +0300412 struct i915_hw_context *from = ring->last_context;
Ben Widawskye0556842012-06-04 14:42:46 -0700413 u32 hw_flags = 0;
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700414 int ret, i;
Ben Widawskye0556842012-06-04 14:42:46 -0700415
Ben Widawskyd7f46fc2013-12-06 14:10:55 -0800416 BUG_ON(from != NULL && from->obj != NULL && !i915_gem_obj_is_pinned(from->obj));
Ben Widawskye0556842012-06-04 14:42:46 -0700417
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700418 if (from == to && !to->remap_slice)
Chris Wilson9a3b5302012-07-15 12:34:24 +0100419 return 0;
420
Ben Widawskyc37e2202013-07-31 16:59:58 -0700421 ret = i915_gem_obj_ggtt_pin(to->obj, CONTEXT_ALIGN, false, false);
Ben Widawskye0556842012-06-04 14:42:46 -0700422 if (ret)
423 return ret;
424
Chris Wilsond3373a22012-07-15 12:34:22 +0100425 /* Clear this page out of any CPU caches for coherent swap-in/out. Note
426 * that thanks to write = false in this call and us not setting any gpu
427 * write domains when putting a context object onto the active list
428 * (when switching away from it), this won't block.
429 * XXX: We need a real interface to do this instead of trickery. */
430 ret = i915_gem_object_set_to_gtt_domain(to->obj, false);
431 if (ret) {
Ben Widawskyd7f46fc2013-12-06 14:10:55 -0800432 i915_gem_object_ggtt_unpin(to->obj);
Chris Wilsond3373a22012-07-15 12:34:22 +0100433 return ret;
434 }
435
Ben Widawsky6f65e292013-12-06 14:10:56 -0800436 if (!to->obj->has_global_gtt_mapping) {
437 struct i915_vma *vma = i915_gem_obj_to_vma(to->obj,
438 &dev_priv->gtt.base);
439 vma->bind_vma(vma, to->obj->cache_level, GLOBAL_BIND);
440 }
Daniel Vetter3af7b852012-06-14 00:08:32 +0200441
Ben Widawskye0556842012-06-04 14:42:46 -0700442 if (!to->is_initialized || is_default_context(to))
443 hw_flags |= MI_RESTORE_INHIBIT;
Ben Widawskye0556842012-06-04 14:42:46 -0700444
Ben Widawskye0556842012-06-04 14:42:46 -0700445 ret = mi_set_context(ring, to, hw_flags);
446 if (ret) {
Ben Widawskyd7f46fc2013-12-06 14:10:55 -0800447 i915_gem_object_ggtt_unpin(to->obj);
Ben Widawskye0556842012-06-04 14:42:46 -0700448 return ret;
449 }
450
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700451 for (i = 0; i < MAX_L3_SLICES; i++) {
452 if (!(to->remap_slice & (1<<i)))
453 continue;
454
455 ret = i915_gem_l3_remap(ring, i);
456 /* If it failed, try again next round */
457 if (ret)
458 DRM_DEBUG_DRIVER("L3 remapping failed\n");
459 else
460 to->remap_slice &= ~(1<<i);
461 }
462
Ben Widawskye0556842012-06-04 14:42:46 -0700463 /* The backing object for the context is done after switching to the
464 * *next* context. Therefore we cannot retire the previous context until
465 * the next context has already started running. In fact, the below code
466 * is a bit suboptimal because the retiring can occur simply after the
467 * MI_SET_CONTEXT instead of when the next seqno has completed.
468 */
Chris Wilson112522f2013-05-02 16:48:07 +0300469 if (from != NULL) {
470 from->obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
Ben Widawskye2d05a82013-09-24 09:57:58 -0700471 i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->obj), ring);
Ben Widawskye0556842012-06-04 14:42:46 -0700472 /* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
473 * whole damn pipeline, we don't need to explicitly mark the
474 * object dirty. The only exception is that the context must be
475 * correct in case the object gets swapped out. Ideally we'd be
476 * able to defer doing this until we know the object would be
477 * swapped, but there is no way to do that yet.
478 */
Chris Wilson112522f2013-05-02 16:48:07 +0300479 from->obj->dirty = 1;
480 BUG_ON(from->obj->ring != ring);
Chris Wilsonb259b312012-07-15 12:34:23 +0100481
Chris Wilsonc0321e22013-08-26 19:50:53 -0300482 /* obj is kept alive until the next request by its active ref */
Ben Widawskyd7f46fc2013-12-06 14:10:55 -0800483 i915_gem_object_ggtt_unpin(from->obj);
Chris Wilson112522f2013-05-02 16:48:07 +0300484 i915_gem_context_unreference(from);
Ben Widawskye0556842012-06-04 14:42:46 -0700485 }
486
Chris Wilson112522f2013-05-02 16:48:07 +0300487 i915_gem_context_reference(to);
488 ring->last_context = to;
Ben Widawskye0556842012-06-04 14:42:46 -0700489 to->is_initialized = true;
490
491 return 0;
492}
493
494/**
495 * i915_switch_context() - perform a GPU context switch.
496 * @ring: ring for which we'll execute the context switch
497 * @file_priv: file_priv associated with the context, may be NULL
498 * @id: context id number
Ben Widawskye0556842012-06-04 14:42:46 -0700499 *
500 * The context life cycle is simple. The context refcount is incremented and
501 * decremented by 1 and create and destroy. If the context is in use by the GPU,
502 * it will have a refoucnt > 1. This allows us to destroy the context abstract
503 * object while letting the normal object tracking destroy the backing BO.
504 */
505int i915_switch_context(struct intel_ring_buffer *ring,
506 struct drm_file *file,
507 int to_id)
508{
509 struct drm_i915_private *dev_priv = ring->dev->dev_private;
Ben Widawskye0556842012-06-04 14:42:46 -0700510 struct i915_hw_context *to;
Ben Widawskye0556842012-06-04 14:42:46 -0700511
Ben Widawsky8245be32013-11-06 13:56:29 -0200512 if (!HAS_HW_CONTEXTS(ring->dev))
Ben Widawskye0556842012-06-04 14:42:46 -0700513 return 0;
514
Ben Widawsky186507e2013-04-23 23:15:29 -0700515 WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
516
Ben Widawskye0556842012-06-04 14:42:46 -0700517 if (ring != &dev_priv->ring[RCS])
518 return 0;
519
Ben Widawskye0556842012-06-04 14:42:46 -0700520 if (to_id == DEFAULT_CONTEXT_ID) {
521 to = ring->default_context;
522 } else {
Chris Wilson9a3b5302012-07-15 12:34:24 +0100523 if (file == NULL)
524 return -EINVAL;
525
526 to = i915_gem_context_get(file->driver_priv, to_id);
Ben Widawskye0556842012-06-04 14:42:46 -0700527 if (to == NULL)
Daniel Vetter0d326012012-06-19 16:52:31 +0200528 return -ENOENT;
Ben Widawskye0556842012-06-04 14:42:46 -0700529 }
530
Chris Wilson9a3b5302012-07-15 12:34:24 +0100531 return do_switch(to);
Ben Widawskye0556842012-06-04 14:42:46 -0700532}
Ben Widawsky84624812012-06-04 14:42:54 -0700533
534int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
535 struct drm_file *file)
536{
Ben Widawsky84624812012-06-04 14:42:54 -0700537 struct drm_i915_gem_context_create *args = data;
538 struct drm_i915_file_private *file_priv = file->driver_priv;
539 struct i915_hw_context *ctx;
540 int ret;
541
542 if (!(dev->driver->driver_features & DRIVER_GEM))
543 return -ENODEV;
544
Ben Widawsky8245be32013-11-06 13:56:29 -0200545 if (!HAS_HW_CONTEXTS(dev))
Daniel Vetter5fa8be62012-06-19 17:16:01 +0200546 return -ENODEV;
547
Ben Widawsky84624812012-06-04 14:42:54 -0700548 ret = i915_mutex_lock_interruptible(dev);
549 if (ret)
550 return ret;
551
Ben Widawsky146937e2012-06-29 10:30:39 -0700552 ctx = create_hw_context(dev, file_priv);
Ben Widawsky84624812012-06-04 14:42:54 -0700553 mutex_unlock(&dev->struct_mutex);
Dan Carpenterbe636382012-07-17 09:44:49 +0300554 if (IS_ERR(ctx))
555 return PTR_ERR(ctx);
Ben Widawsky84624812012-06-04 14:42:54 -0700556
557 args->ctx_id = ctx->id;
558 DRM_DEBUG_DRIVER("HW context %d created\n", args->ctx_id);
559
Dan Carpenterbe636382012-07-17 09:44:49 +0300560 return 0;
Ben Widawsky84624812012-06-04 14:42:54 -0700561}
562
563int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
564 struct drm_file *file)
565{
566 struct drm_i915_gem_context_destroy *args = data;
567 struct drm_i915_file_private *file_priv = file->driver_priv;
Ben Widawsky84624812012-06-04 14:42:54 -0700568 struct i915_hw_context *ctx;
569 int ret;
570
571 if (!(dev->driver->driver_features & DRIVER_GEM))
572 return -ENODEV;
573
574 ret = i915_mutex_lock_interruptible(dev);
575 if (ret)
576 return ret;
577
578 ctx = i915_gem_context_get(file_priv, args->ctx_id);
579 if (!ctx) {
580 mutex_unlock(&dev->struct_mutex);
Daniel Vetter0d326012012-06-19 16:52:31 +0200581 return -ENOENT;
Ben Widawsky84624812012-06-04 14:42:54 -0700582 }
583
Mika Kuoppaladce32712013-04-30 13:30:33 +0300584 idr_remove(&ctx->file_priv->context_idr, ctx->id);
585 i915_gem_context_unreference(ctx);
Ben Widawsky84624812012-06-04 14:42:54 -0700586 mutex_unlock(&dev->struct_mutex);
587
588 DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id);
589 return 0;
590}