Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 1 | /dts-v1/; |
| 2 | |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 3 | /include/ "tegra20.dtsi" |
| 4 | |
| 5 | / { |
| 6 | model = "NVIDIA Seaboard"; |
| 7 | compatible = "nvidia,seaboard", "nvidia,tegra20"; |
| 8 | |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 9 | memory { |
Stephen Warren | 95decf8 | 2012-05-11 16:11:38 -0600 | [diff] [blame] | 10 | reg = <0x00000000 0x40000000>; |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 11 | }; |
| 12 | |
Stephen Warren | a75191e | 2013-01-02 14:53:20 -0700 | [diff] [blame] | 13 | host1x { |
| 14 | hdmi { |
| 15 | status = "okay"; |
| 16 | |
| 17 | vdd-supply = <&hdmi_vdd_reg>; |
| 18 | pll-supply = <&hdmi_pll_reg>; |
| 19 | |
| 20 | nvidia,ddc-i2c-bus = <&hdmi_ddc>; |
| 21 | nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ |
| 22 | }; |
| 23 | }; |
| 24 | |
Stephen Warren | f9eb26a | 2012-05-11 16:17:47 -0600 | [diff] [blame] | 25 | pinmux { |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 26 | pinctrl-names = "default"; |
| 27 | pinctrl-0 = <&state_default>; |
| 28 | |
| 29 | state_default: pinmux { |
| 30 | ata { |
| 31 | nvidia,pins = "ata"; |
| 32 | nvidia,function = "ide"; |
| 33 | }; |
| 34 | atb { |
| 35 | nvidia,pins = "atb", "gma", "gme"; |
| 36 | nvidia,function = "sdio4"; |
| 37 | }; |
| 38 | atc { |
| 39 | nvidia,pins = "atc"; |
| 40 | nvidia,function = "nand"; |
| 41 | }; |
| 42 | atd { |
| 43 | nvidia,pins = "atd", "ate", "gmb", "spia", |
| 44 | "spib", "spic"; |
| 45 | nvidia,function = "gmi"; |
| 46 | }; |
| 47 | cdev1 { |
| 48 | nvidia,pins = "cdev1"; |
| 49 | nvidia,function = "plla_out"; |
| 50 | }; |
| 51 | cdev2 { |
| 52 | nvidia,pins = "cdev2"; |
| 53 | nvidia,function = "pllp_out4"; |
| 54 | }; |
| 55 | crtp { |
| 56 | nvidia,pins = "crtp", "lm1"; |
| 57 | nvidia,function = "crt"; |
| 58 | }; |
| 59 | csus { |
| 60 | nvidia,pins = "csus"; |
| 61 | nvidia,function = "vi_sensor_clk"; |
| 62 | }; |
| 63 | dap1 { |
| 64 | nvidia,pins = "dap1"; |
| 65 | nvidia,function = "dap1"; |
| 66 | }; |
| 67 | dap2 { |
| 68 | nvidia,pins = "dap2"; |
| 69 | nvidia,function = "dap2"; |
| 70 | }; |
| 71 | dap3 { |
| 72 | nvidia,pins = "dap3"; |
| 73 | nvidia,function = "dap3"; |
| 74 | }; |
| 75 | dap4 { |
| 76 | nvidia,pins = "dap4"; |
| 77 | nvidia,function = "dap4"; |
| 78 | }; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 79 | dta { |
| 80 | nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; |
| 81 | nvidia,function = "vi"; |
| 82 | }; |
| 83 | dtf { |
| 84 | nvidia,pins = "dtf"; |
| 85 | nvidia,function = "i2c3"; |
| 86 | }; |
| 87 | gmc { |
| 88 | nvidia,pins = "gmc"; |
| 89 | nvidia,function = "uartd"; |
| 90 | }; |
| 91 | gmd { |
| 92 | nvidia,pins = "gmd"; |
| 93 | nvidia,function = "sflash"; |
| 94 | }; |
| 95 | gpu { |
| 96 | nvidia,pins = "gpu"; |
| 97 | nvidia,function = "pwm"; |
| 98 | }; |
| 99 | gpu7 { |
| 100 | nvidia,pins = "gpu7"; |
| 101 | nvidia,function = "rtck"; |
| 102 | }; |
| 103 | gpv { |
| 104 | nvidia,pins = "gpv", "slxa", "slxk"; |
| 105 | nvidia,function = "pcie"; |
| 106 | }; |
| 107 | hdint { |
| 108 | nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1", |
Stephen Warren | 802a849 | 2012-04-26 11:21:54 -0600 | [diff] [blame] | 109 | "lsck", "lsda"; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 110 | nvidia,function = "hdmi"; |
| 111 | }; |
| 112 | i2cp { |
| 113 | nvidia,pins = "i2cp"; |
| 114 | nvidia,function = "i2cp"; |
| 115 | }; |
| 116 | irrx { |
| 117 | nvidia,pins = "irrx", "irtx"; |
| 118 | nvidia,function = "uartb"; |
| 119 | }; |
| 120 | kbca { |
| 121 | nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", |
| 122 | "kbce", "kbcf"; |
| 123 | nvidia,function = "kbc"; |
| 124 | }; |
| 125 | lcsn { |
| 126 | nvidia,pins = "lcsn", "ldc", "lm0", "lpw1", |
| 127 | "lsdi", "lvp0"; |
| 128 | nvidia,function = "rsvd4"; |
| 129 | }; |
| 130 | ld0 { |
| 131 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", |
| 132 | "ld5", "ld6", "ld7", "ld8", "ld9", |
| 133 | "ld10", "ld11", "ld12", "ld13", "ld14", |
| 134 | "ld15", "ld16", "ld17", "ldi", "lhp0", |
| 135 | "lhp1", "lhp2", "lhs", "lpp", "lsc0", |
| 136 | "lspi", "lvp1", "lvs"; |
| 137 | nvidia,function = "displaya"; |
| 138 | }; |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 139 | owc { |
| 140 | nvidia,pins = "owc", "spdi", "spdo", "uac"; |
| 141 | nvidia,function = "rsvd2"; |
| 142 | }; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 143 | pmc { |
| 144 | nvidia,pins = "pmc"; |
| 145 | nvidia,function = "pwr_on"; |
| 146 | }; |
| 147 | rm { |
| 148 | nvidia,pins = "rm"; |
| 149 | nvidia,function = "i2c1"; |
| 150 | }; |
| 151 | sdb { |
| 152 | nvidia,pins = "sdb", "sdc", "sdd"; |
| 153 | nvidia,function = "sdio3"; |
| 154 | }; |
| 155 | sdio1 { |
| 156 | nvidia,pins = "sdio1"; |
| 157 | nvidia,function = "sdio1"; |
| 158 | }; |
| 159 | slxc { |
| 160 | nvidia,pins = "slxc", "slxd"; |
| 161 | nvidia,function = "spdif"; |
| 162 | }; |
| 163 | spid { |
| 164 | nvidia,pins = "spid", "spie", "spif"; |
| 165 | nvidia,function = "spi1"; |
| 166 | }; |
| 167 | spig { |
| 168 | nvidia,pins = "spig", "spih"; |
| 169 | nvidia,function = "spi2_alt"; |
| 170 | }; |
| 171 | uaa { |
| 172 | nvidia,pins = "uaa", "uab", "uda"; |
| 173 | nvidia,function = "ulpi"; |
| 174 | }; |
| 175 | uad { |
| 176 | nvidia,pins = "uad"; |
| 177 | nvidia,function = "irda"; |
| 178 | }; |
| 179 | uca { |
| 180 | nvidia,pins = "uca", "ucb"; |
| 181 | nvidia,function = "uartc"; |
| 182 | }; |
| 183 | conf_ata { |
| 184 | nvidia,pins = "ata", "atb", "atc", "atd", |
| 185 | "cdev1", "cdev2", "dap1", "dap2", |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 186 | "dap4", "ddc", "dtf", "gma", "gmc", "gmd", |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 187 | "gme", "gpu", "gpu7", "i2cp", "irrx", |
| 188 | "irtx", "pta", "rm", "sdc", "sdd", |
| 189 | "slxd", "slxk", "spdi", "spdo", "uac", |
| 190 | "uad", "uca", "ucb", "uda"; |
| 191 | nvidia,pull = <0>; |
| 192 | nvidia,tristate = <0>; |
| 193 | }; |
| 194 | conf_ate { |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 195 | nvidia,pins = "ate", "csus", "dap3", |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 196 | "gpv", "owc", "slxc", "spib", "spid", |
| 197 | "spie"; |
| 198 | nvidia,pull = <0>; |
| 199 | nvidia,tristate = <1>; |
| 200 | }; |
| 201 | conf_ck32 { |
| 202 | nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", |
| 203 | "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; |
| 204 | nvidia,pull = <0>; |
| 205 | }; |
| 206 | conf_crtp { |
| 207 | nvidia,pins = "crtp", "gmb", "slxa", "spia", |
| 208 | "spig", "spih"; |
| 209 | nvidia,pull = <2>; |
| 210 | nvidia,tristate = <1>; |
| 211 | }; |
| 212 | conf_dta { |
| 213 | nvidia,pins = "dta", "dtb", "dtc", "dtd"; |
| 214 | nvidia,pull = <1>; |
| 215 | nvidia,tristate = <0>; |
| 216 | }; |
| 217 | conf_dte { |
| 218 | nvidia,pins = "dte", "spif"; |
| 219 | nvidia,pull = <1>; |
| 220 | nvidia,tristate = <1>; |
| 221 | }; |
| 222 | conf_hdint { |
| 223 | nvidia,pins = "hdint", "lcsn", "ldc", "lm1", |
| 224 | "lpw1", "lsc1", "lsck", "lsda", "lsdi", |
| 225 | "lvp0"; |
| 226 | nvidia,tristate = <1>; |
| 227 | }; |
| 228 | conf_kbca { |
| 229 | nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", |
| 230 | "kbce", "kbcf", "sdio1", "spic", "uaa", |
| 231 | "uab"; |
| 232 | nvidia,pull = <2>; |
| 233 | nvidia,tristate = <0>; |
| 234 | }; |
| 235 | conf_lc { |
| 236 | nvidia,pins = "lc", "ls"; |
| 237 | nvidia,pull = <2>; |
| 238 | }; |
| 239 | conf_ld0 { |
| 240 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", |
| 241 | "ld5", "ld6", "ld7", "ld8", "ld9", |
| 242 | "ld10", "ld11", "ld12", "ld13", "ld14", |
| 243 | "ld15", "ld16", "ld17", "ldi", "lhp0", |
| 244 | "lhp1", "lhp2", "lhs", "lm0", "lpp", |
| 245 | "lpw0", "lpw2", "lsc0", "lspi", "lvp1", |
| 246 | "lvs", "pmc", "sdb"; |
| 247 | nvidia,tristate = <0>; |
| 248 | }; |
| 249 | conf_ld17_0 { |
| 250 | nvidia,pins = "ld17_0", "ld19_18", "ld21_20", |
| 251 | "ld23_22"; |
| 252 | nvidia,pull = <1>; |
| 253 | }; |
| 254 | drive_sdio1 { |
| 255 | nvidia,pins = "drive_sdio1"; |
| 256 | nvidia,high-speed-mode = <0>; |
| 257 | nvidia,schmitt = <0>; |
| 258 | nvidia,low-power-mode = <3>; |
| 259 | nvidia,pull-down-strength = <31>; |
| 260 | nvidia,pull-up-strength = <31>; |
| 261 | nvidia,slew-rate-rising = <3>; |
| 262 | nvidia,slew-rate-falling = <3>; |
| 263 | }; |
| 264 | }; |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 265 | |
| 266 | state_i2cmux_ddc: pinmux_i2cmux_ddc { |
| 267 | ddc { |
| 268 | nvidia,pins = "ddc"; |
| 269 | nvidia,function = "i2c2"; |
| 270 | }; |
| 271 | pta { |
| 272 | nvidia,pins = "pta"; |
| 273 | nvidia,function = "rsvd4"; |
| 274 | }; |
| 275 | }; |
| 276 | |
| 277 | state_i2cmux_pta: pinmux_i2cmux_pta { |
| 278 | ddc { |
| 279 | nvidia,pins = "ddc"; |
| 280 | nvidia,function = "rsvd4"; |
| 281 | }; |
| 282 | pta { |
| 283 | nvidia,pins = "pta"; |
| 284 | nvidia,function = "i2c2"; |
| 285 | }; |
| 286 | }; |
| 287 | |
| 288 | state_i2cmux_idle: pinmux_i2cmux_idle { |
| 289 | ddc { |
| 290 | nvidia,pins = "ddc"; |
| 291 | nvidia,function = "rsvd4"; |
| 292 | }; |
| 293 | pta { |
| 294 | nvidia,pins = "pta"; |
| 295 | nvidia,function = "rsvd4"; |
| 296 | }; |
| 297 | }; |
Stephen Warren | ecc295b | 2012-03-15 16:27:36 -0600 | [diff] [blame] | 298 | }; |
| 299 | |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 300 | i2s@70002800 { |
| 301 | status = "okay"; |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 302 | }; |
| 303 | |
| 304 | serial@70006300 { |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 305 | status = "okay"; |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 306 | }; |
| 307 | |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 308 | i2c@7000c000 { |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 309 | status = "okay"; |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 310 | clock-frequency = <400000>; |
Stephen Warren | 797acf7 | 2012-01-11 16:09:57 -0700 | [diff] [blame] | 311 | |
| 312 | wm8903: wm8903@1a { |
| 313 | compatible = "wlf,wm8903"; |
| 314 | reg = <0x1a>; |
| 315 | interrupt-parent = <&gpio>; |
Stephen Warren | 95decf8 | 2012-05-11 16:11:38 -0600 | [diff] [blame] | 316 | interrupts = <187 0x04>; |
Stephen Warren | 797acf7 | 2012-01-11 16:09:57 -0700 | [diff] [blame] | 317 | |
| 318 | gpio-controller; |
| 319 | #gpio-cells = <2>; |
| 320 | |
| 321 | micdet-cfg = <0>; |
| 322 | micdet-delay = <100>; |
Stephen Warren | 95decf8 | 2012-05-11 16:11:38 -0600 | [diff] [blame] | 323 | gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; |
Stephen Warren | 797acf7 | 2012-01-11 16:09:57 -0700 | [diff] [blame] | 324 | }; |
Laxman Dewangan | b46b0b5 | 2012-04-23 17:41:36 +0530 | [diff] [blame] | 325 | |
| 326 | /* ALS and proximity sensor */ |
| 327 | isl29018@44 { |
| 328 | compatible = "isil,isl29018"; |
| 329 | reg = <0x44>; |
| 330 | interrupt-parent = <&gpio>; |
Stephen Warren | 95decf8 | 2012-05-11 16:11:38 -0600 | [diff] [blame] | 331 | interrupts = <202 0x04>; /* GPIO PZ2 */ |
Laxman Dewangan | b46b0b5 | 2012-04-23 17:41:36 +0530 | [diff] [blame] | 332 | }; |
Olof Johansson | 45dbe9d | 2011-12-22 16:33:13 +0000 | [diff] [blame] | 333 | |
| 334 | gyrometer@68 { |
| 335 | compatible = "invn,mpu3050"; |
| 336 | reg = <0x68>; |
| 337 | interrupt-parent = <&gpio>; |
| 338 | interrupts = <204 0x04>; /* gpio PZ4 */ |
| 339 | }; |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 340 | }; |
| 341 | |
| 342 | i2c@7000c400 { |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 343 | status = "okay"; |
Stephen Warren | 22bd1f7 | 2012-04-26 11:19:03 -0600 | [diff] [blame] | 344 | clock-frequency = <100000>; |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 345 | }; |
| 346 | |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 347 | i2cmux { |
| 348 | compatible = "i2c-mux-pinctrl"; |
| 349 | #address-cells = <1>; |
| 350 | #size-cells = <0>; |
| 351 | |
| 352 | i2c-parent = <&{/i2c@7000c400}>; |
| 353 | |
| 354 | pinctrl-names = "ddc", "pta", "idle"; |
| 355 | pinctrl-0 = <&state_i2cmux_ddc>; |
| 356 | pinctrl-1 = <&state_i2cmux_pta>; |
| 357 | pinctrl-2 = <&state_i2cmux_idle>; |
| 358 | |
Stephen Warren | a75191e | 2013-01-02 14:53:20 -0700 | [diff] [blame] | 359 | hdmi_ddc: i2c@0 { |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 360 | reg = <0>; |
| 361 | #address-cells = <1>; |
| 362 | #size-cells = <0>; |
| 363 | }; |
| 364 | |
| 365 | i2c@1 { |
| 366 | reg = <1>; |
| 367 | #address-cells = <1>; |
| 368 | #size-cells = <0>; |
Stephen Warren | 0879c5f | 2012-04-25 16:57:28 -0600 | [diff] [blame] | 369 | |
| 370 | smart-battery@b { |
| 371 | compatible = "ti,bq20z75", "smart-battery-1.1"; |
| 372 | reg = <0xb>; |
| 373 | ti,i2c-retry-count = <2>; |
| 374 | ti,poll-retry-count = <10>; |
| 375 | }; |
Stephen Warren | a18cf6d | 2012-04-16 17:41:17 -0600 | [diff] [blame] | 376 | }; |
| 377 | }; |
| 378 | |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 379 | i2c@7000c500 { |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 380 | status = "okay"; |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 381 | clock-frequency = <400000>; |
| 382 | }; |
| 383 | |
| 384 | i2c@7000d000 { |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 385 | status = "okay"; |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 386 | clock-frequency = <400000>; |
Stephen Warren | 401c9a5 | 2011-12-17 23:29:32 -0700 | [diff] [blame] | 387 | |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 388 | pmic: tps6586x@34 { |
| 389 | compatible = "ti,tps6586x"; |
| 390 | reg = <0x34>; |
| 391 | interrupts = <0 86 0x4>; |
| 392 | |
Stephen Warren | 44b12ef | 2012-09-11 11:42:26 -0600 | [diff] [blame] | 393 | ti,system-power-controller; |
| 394 | |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 395 | #gpio-cells = <2>; |
| 396 | gpio-controller; |
| 397 | |
| 398 | sys-supply = <&vdd_5v0_reg>; |
| 399 | vin-sm0-supply = <&sys_reg>; |
| 400 | vin-sm1-supply = <&sys_reg>; |
| 401 | vin-sm2-supply = <&sys_reg>; |
| 402 | vinldo01-supply = <&sm2_reg>; |
| 403 | vinldo23-supply = <&sm2_reg>; |
| 404 | vinldo4-supply = <&sm2_reg>; |
| 405 | vinldo678-supply = <&sm2_reg>; |
| 406 | vinldo9-supply = <&sm2_reg>; |
| 407 | |
| 408 | regulators { |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 409 | sys_reg: sys { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 410 | regulator-name = "vdd_sys"; |
| 411 | regulator-always-on; |
| 412 | }; |
| 413 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 414 | sm0 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 415 | regulator-name = "vdd_sm0,vdd_core"; |
| 416 | regulator-min-microvolt = <1300000>; |
| 417 | regulator-max-microvolt = <1300000>; |
| 418 | regulator-always-on; |
| 419 | }; |
| 420 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 421 | sm1 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 422 | regulator-name = "vdd_sm1,vdd_cpu"; |
| 423 | regulator-min-microvolt = <1125000>; |
| 424 | regulator-max-microvolt = <1125000>; |
| 425 | regulator-always-on; |
| 426 | }; |
| 427 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 428 | sm2_reg: sm2 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 429 | regulator-name = "vdd_sm2,vin_ldo*"; |
| 430 | regulator-min-microvolt = <3700000>; |
| 431 | regulator-max-microvolt = <3700000>; |
| 432 | regulator-always-on; |
| 433 | }; |
| 434 | |
| 435 | /* LDO0 is not connected to anything */ |
| 436 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 437 | ldo1 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 438 | regulator-name = "vdd_ldo1,avdd_pll*"; |
| 439 | regulator-min-microvolt = <1100000>; |
| 440 | regulator-max-microvolt = <1100000>; |
| 441 | regulator-always-on; |
| 442 | }; |
| 443 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 444 | ldo2 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 445 | regulator-name = "vdd_ldo2,vdd_rtc"; |
| 446 | regulator-min-microvolt = <1200000>; |
| 447 | regulator-max-microvolt = <1200000>; |
| 448 | }; |
| 449 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 450 | ldo3 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 451 | regulator-name = "vdd_ldo3,avdd_usb*"; |
| 452 | regulator-min-microvolt = <3300000>; |
| 453 | regulator-max-microvolt = <3300000>; |
| 454 | regulator-always-on; |
| 455 | }; |
| 456 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 457 | ldo4 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 458 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; |
| 459 | regulator-min-microvolt = <1800000>; |
| 460 | regulator-max-microvolt = <1800000>; |
| 461 | regulator-always-on; |
| 462 | }; |
| 463 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 464 | ldo5 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 465 | regulator-name = "vdd_ldo5,vcore_mmc"; |
| 466 | regulator-min-microvolt = <2850000>; |
| 467 | regulator-max-microvolt = <2850000>; |
| 468 | regulator-always-on; |
| 469 | }; |
| 470 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 471 | ldo6 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 472 | regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam"; |
| 473 | regulator-min-microvolt = <1800000>; |
| 474 | regulator-max-microvolt = <1800000>; |
| 475 | }; |
| 476 | |
Stephen Warren | a75191e | 2013-01-02 14:53:20 -0700 | [diff] [blame] | 477 | hdmi_vdd_reg: ldo7 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 478 | regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; |
| 479 | regulator-min-microvolt = <3300000>; |
| 480 | regulator-max-microvolt = <3300000>; |
| 481 | }; |
| 482 | |
Stephen Warren | a75191e | 2013-01-02 14:53:20 -0700 | [diff] [blame] | 483 | hdmi_pll_reg: ldo8 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 484 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
| 485 | regulator-min-microvolt = <1800000>; |
| 486 | regulator-max-microvolt = <1800000>; |
| 487 | }; |
| 488 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 489 | ldo9 { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 490 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; |
| 491 | regulator-min-microvolt = <2850000>; |
| 492 | regulator-max-microvolt = <2850000>; |
| 493 | regulator-always-on; |
| 494 | }; |
| 495 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 496 | ldo_rtc { |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 497 | regulator-name = "vdd_rtc_out,vdd_cell"; |
| 498 | regulator-min-microvolt = <3300000>; |
| 499 | regulator-max-microvolt = <3300000>; |
| 500 | regulator-always-on; |
| 501 | }; |
| 502 | }; |
| 503 | }; |
| 504 | |
Olof Johansson | 45dbe9d | 2011-12-22 16:33:13 +0000 | [diff] [blame] | 505 | temperature-sensor@4c { |
Stephen Warren | 9846210 | 2012-11-19 15:34:44 -0700 | [diff] [blame] | 506 | compatible = "onnn,nct1008"; |
Stephen Warren | 401c9a5 | 2011-12-17 23:29:32 -0700 | [diff] [blame] | 507 | reg = <0x4c>; |
| 508 | }; |
Olof Johansson | 45dbe9d | 2011-12-22 16:33:13 +0000 | [diff] [blame] | 509 | |
| 510 | magnetometer@c { |
Stephen Warren | 9846210 | 2012-11-19 15:34:44 -0700 | [diff] [blame] | 511 | compatible = "ak,ak8975"; |
Olof Johansson | 45dbe9d | 2011-12-22 16:33:13 +0000 | [diff] [blame] | 512 | reg = <0xc>; |
| 513 | interrupt-parent = <&gpio>; |
| 514 | interrupts = <109 0x04>; /* gpio PN5 */ |
| 515 | }; |
Stephen Warren | 88950f3b | 2011-11-21 14:44:09 -0700 | [diff] [blame] | 516 | }; |
| 517 | |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 518 | pmc { |
| 519 | nvidia,invert-interrupt; |
| 520 | }; |
| 521 | |
Stephen Warren | bbfc33b | 2012-10-02 13:10:47 -0600 | [diff] [blame] | 522 | memory-controller@7000f400 { |
Olof Johansson | d8017a9 | 2011-10-18 11:06:06 -0700 | [diff] [blame] | 523 | emc-table@190000 { |
Stephen Warren | 95decf8 | 2012-05-11 16:11:38 -0600 | [diff] [blame] | 524 | reg = <190000>; |
Olof Johansson | d8017a9 | 2011-10-18 11:06:06 -0700 | [diff] [blame] | 525 | compatible = "nvidia,tegra20-emc-table"; |
Stephen Warren | 95decf8 | 2012-05-11 16:11:38 -0600 | [diff] [blame] | 526 | clock-frequency = <190000>; |
| 527 | nvidia,emc-registers = <0x0000000c 0x00000026 |
Olof Johansson | d8017a9 | 2011-10-18 11:06:06 -0700 | [diff] [blame] | 528 | 0x00000009 0x00000003 0x00000004 0x00000004 |
| 529 | 0x00000002 0x0000000c 0x00000003 0x00000003 |
| 530 | 0x00000002 0x00000001 0x00000004 0x00000005 |
| 531 | 0x00000004 0x00000009 0x0000000d 0x0000059f |
| 532 | 0x00000000 0x00000003 0x00000003 0x00000003 |
| 533 | 0x00000003 0x00000001 0x0000000b 0x000000c8 |
| 534 | 0x00000003 0x00000007 0x00000004 0x0000000f |
| 535 | 0x00000002 0x00000000 0x00000000 0x00000002 |
| 536 | 0x00000000 0x00000000 0x00000083 0xa06204ae |
| 537 | 0x007dc010 0x00000000 0x00000000 0x00000000 |
Stephen Warren | 95decf8 | 2012-05-11 16:11:38 -0600 | [diff] [blame] | 538 | 0x00000000 0x00000000 0x00000000 0x00000000>; |
Olof Johansson | d8017a9 | 2011-10-18 11:06:06 -0700 | [diff] [blame] | 539 | }; |
| 540 | |
| 541 | emc-table@380000 { |
Stephen Warren | 95decf8 | 2012-05-11 16:11:38 -0600 | [diff] [blame] | 542 | reg = <380000>; |
Olof Johansson | d8017a9 | 2011-10-18 11:06:06 -0700 | [diff] [blame] | 543 | compatible = "nvidia,tegra20-emc-table"; |
Stephen Warren | 95decf8 | 2012-05-11 16:11:38 -0600 | [diff] [blame] | 544 | clock-frequency = <380000>; |
| 545 | nvidia,emc-registers = <0x00000017 0x0000004b |
Olof Johansson | d8017a9 | 2011-10-18 11:06:06 -0700 | [diff] [blame] | 546 | 0x00000012 0x00000006 0x00000004 0x00000005 |
| 547 | 0x00000003 0x0000000c 0x00000006 0x00000006 |
| 548 | 0x00000003 0x00000001 0x00000004 0x00000005 |
| 549 | 0x00000004 0x00000009 0x0000000d 0x00000b5f |
| 550 | 0x00000000 0x00000003 0x00000003 0x00000006 |
| 551 | 0x00000006 0x00000001 0x00000011 0x000000c8 |
| 552 | 0x00000003 0x0000000e 0x00000007 0x0000000f |
| 553 | 0x00000002 0x00000000 0x00000000 0x00000002 |
| 554 | 0x00000000 0x00000000 0x00000083 0xe044048b |
| 555 | 0x007d8010 0x00000000 0x00000000 0x00000000 |
Stephen Warren | 95decf8 | 2012-05-11 16:11:38 -0600 | [diff] [blame] | 556 | 0x00000000 0x00000000 0x00000000 0x00000000>; |
Olof Johansson | d8017a9 | 2011-10-18 11:06:06 -0700 | [diff] [blame] | 557 | }; |
| 558 | }; |
Stephen Warren | aa607eb | 2012-04-12 15:46:49 -0600 | [diff] [blame] | 559 | |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 560 | usb@c5000000 { |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 561 | status = "okay"; |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 562 | nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */ |
| 563 | dr_mode = "otg"; |
| 564 | }; |
| 565 | |
Stephen Warren | aa607eb | 2012-04-12 15:46:49 -0600 | [diff] [blame] | 566 | usb@c5004000 { |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 567 | status = "okay"; |
Stephen Warren | aa607eb | 2012-04-12 15:46:49 -0600 | [diff] [blame] | 568 | nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ |
| 569 | }; |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 570 | |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 571 | usb@c5008000 { |
| 572 | status = "okay"; |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 573 | }; |
| 574 | |
Venu Byravarasu | 40e8b3a | 2013-01-24 15:46:46 +0530 | [diff] [blame] | 575 | usb-phy@c5004400 { |
| 576 | nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ |
| 577 | }; |
| 578 | |
Wei Ni | da2fc65 | 2012-09-21 16:54:57 +0800 | [diff] [blame] | 579 | sdhci@c8000000 { |
| 580 | status = "okay"; |
| 581 | power-gpios = <&gpio 86 0>; /* gpio PK6 */ |
| 582 | bus-width = <4>; |
| 583 | }; |
| 584 | |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 585 | sdhci@c8000400 { |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 586 | status = "okay"; |
Joseph Lo | 908ab93 | 2013-02-22 11:23:39 +0800 | [diff] [blame] | 587 | cd-gpios = <&gpio 69 1>; /* gpio PI5 */ |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 588 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ |
| 589 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ |
Arnd Bergmann | 7f21779 | 2012-05-13 00:14:24 -0400 | [diff] [blame] | 590 | bus-width = <4>; |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 591 | }; |
| 592 | |
| 593 | sdhci@c8000600 { |
Stephen Warren | 2a5fdc9 | 2012-05-11 17:32:56 -0600 | [diff] [blame] | 594 | status = "okay"; |
Arnd Bergmann | 7f21779 | 2012-05-13 00:14:24 -0400 | [diff] [blame] | 595 | bus-width = <8>; |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 596 | }; |
| 597 | |
Joseph Lo | 7021d12 | 2013-04-03 19:31:27 +0800 | [diff] [blame^] | 598 | clocks { |
| 599 | compatible = "simple-bus"; |
| 600 | #address-cells = <1>; |
| 601 | #size-cells = <0>; |
| 602 | |
| 603 | clk32k_in: clock { |
| 604 | compatible = "fixed-clock"; |
| 605 | reg=<0>; |
| 606 | #clock-cells = <0>; |
| 607 | clock-frequency = <32768>; |
| 608 | }; |
| 609 | }; |
| 610 | |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 611 | gpio-keys { |
| 612 | compatible = "gpio-keys"; |
| 613 | |
| 614 | power { |
| 615 | label = "Power"; |
| 616 | gpios = <&gpio 170 1>; /* gpio PV2, active low */ |
| 617 | linux,code = <116>; /* KEY_POWER */ |
| 618 | gpio-key,wakeup; |
| 619 | }; |
| 620 | |
| 621 | lid { |
| 622 | label = "Lid"; |
| 623 | gpios = <&gpio 23 0>; /* gpio PC7 */ |
| 624 | linux,input-type = <5>; /* EV_SW */ |
| 625 | linux,code = <0>; /* SW_LID */ |
| 626 | debounce-interval = <1>; |
| 627 | gpio-key,wakeup; |
| 628 | }; |
| 629 | }; |
| 630 | |
Laxman Dewangan | beb0e32 | 2013-01-15 12:54:49 +0530 | [diff] [blame] | 631 | kbc { |
| 632 | status = "okay"; |
| 633 | nvidia,debounce-delay-ms = <32>; |
| 634 | nvidia,repeat-delay-ms = <160>; |
| 635 | nvidia,ghost-filter; |
| 636 | nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; |
| 637 | nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>; |
| 638 | linux,keymap = <0x00020011 /* KEY_W */ |
| 639 | 0x0003001F /* KEY_S */ |
| 640 | 0x0004001E /* KEY_A */ |
| 641 | 0x0005002C /* KEY_Z */ |
| 642 | 0x000701d0 /* KEY_FN */ |
| 643 | |
| 644 | 0x0107007D /* KEY_LEFTMETA */ |
| 645 | 0x02060064 /* KEY_RIGHTALT */ |
| 646 | 0x02070038 /* KEY_LEFTALT */ |
| 647 | |
| 648 | 0x03000006 /* KEY_5 */ |
| 649 | 0x03010005 /* KEY_4 */ |
| 650 | 0x03020013 /* KEY_R */ |
| 651 | 0x03030012 /* KEY_E */ |
| 652 | 0x03040021 /* KEY_F */ |
| 653 | 0x03050020 /* KEY_D */ |
| 654 | 0x0306002D /* KEY_X */ |
| 655 | |
| 656 | 0x04000008 /* KEY_7 */ |
| 657 | 0x04010007 /* KEY_6 */ |
| 658 | 0x04020014 /* KEY_T */ |
| 659 | 0x04030023 /* KEY_H */ |
| 660 | 0x04040022 /* KEY_G */ |
| 661 | 0x0405002F /* KEY_V */ |
| 662 | 0x0406002E /* KEY_C */ |
| 663 | 0x04070039 /* KEY_SPACE */ |
| 664 | |
| 665 | 0x0500000A /* KEY_9 */ |
| 666 | 0x05010009 /* KEY_8 */ |
| 667 | 0x05020016 /* KEY_U */ |
| 668 | 0x05030015 /* KEY_Y */ |
| 669 | 0x05040024 /* KEY_J */ |
| 670 | 0x05050031 /* KEY_N */ |
| 671 | 0x05060030 /* KEY_B */ |
| 672 | 0x0507002B /* KEY_BACKSLASH */ |
| 673 | |
| 674 | 0x0600000C /* KEY_MINUS */ |
| 675 | 0x0601000B /* KEY_0 */ |
| 676 | 0x06020018 /* KEY_O */ |
| 677 | 0x06030017 /* KEY_I */ |
| 678 | 0x06040026 /* KEY_L */ |
| 679 | 0x06050025 /* KEY_K */ |
| 680 | 0x06060033 /* KEY_COMMA */ |
| 681 | 0x06070032 /* KEY_M */ |
| 682 | |
| 683 | 0x0701000D /* KEY_EQUAL */ |
| 684 | 0x0702001B /* KEY_RIGHTBRACE */ |
| 685 | 0x0703001C /* KEY_ENTER */ |
| 686 | 0x0707008B /* KEY_MENU */ |
| 687 | |
| 688 | 0x08040036 /* KEY_RIGHTSHIFT */ |
| 689 | 0x0805002A /* KEY_LEFTSHIFT */ |
| 690 | |
| 691 | 0x09050061 /* KEY_RIGHTCTRL */ |
| 692 | 0x0907001D /* KEY_LEFTCTRL */ |
| 693 | |
| 694 | 0x0B00001A /* KEY_LEFTBRACE */ |
| 695 | 0x0B010019 /* KEY_P */ |
| 696 | 0x0B020028 /* KEY_APOSTROPHE */ |
| 697 | 0x0B030027 /* KEY_SEMICOLON */ |
| 698 | 0x0B040035 /* KEY_SLASH */ |
| 699 | 0x0B050034 /* KEY_DOT */ |
| 700 | |
| 701 | 0x0C000044 /* KEY_F10 */ |
| 702 | 0x0C010043 /* KEY_F9 */ |
| 703 | 0x0C02000E /* KEY_BACKSPACE */ |
| 704 | 0x0C030004 /* KEY_3 */ |
| 705 | 0x0C040003 /* KEY_2 */ |
| 706 | 0x0C050067 /* KEY_UP */ |
| 707 | 0x0C0600D2 /* KEY_PRINT */ |
| 708 | 0x0C070077 /* KEY_PAUSE */ |
| 709 | |
| 710 | 0x0D00006E /* KEY_INSERT */ |
| 711 | 0x0D01006F /* KEY_DELETE */ |
| 712 | 0x0D030068 /* KEY_PAGEUP */ |
| 713 | 0x0D04006D /* KEY_PAGEDOWN */ |
| 714 | 0x0D05006A /* KEY_RIGHT */ |
| 715 | 0x0D06006C /* KEY_DOWN */ |
| 716 | 0x0D070069 /* KEY_LEFT */ |
| 717 | |
| 718 | 0x0E000057 /* KEY_F11 */ |
| 719 | 0x0E010058 /* KEY_F12 */ |
| 720 | 0x0E020042 /* KEY_F8 */ |
| 721 | 0x0E030010 /* KEY_Q */ |
| 722 | 0x0E04003E /* KEY_F4 */ |
| 723 | 0x0E05003D /* KEY_F3 */ |
| 724 | 0x0E060002 /* KEY_1 */ |
| 725 | 0x0E070041 /* KEY_F7 */ |
| 726 | |
| 727 | 0x0F000001 /* KEY_ESC */ |
| 728 | 0x0F010029 /* KEY_GRAVE */ |
| 729 | 0x0F02003F /* KEY_F5 */ |
| 730 | 0x0F03000F /* KEY_TAB */ |
| 731 | 0x0F04003B /* KEY_F1 */ |
| 732 | 0x0F05003C /* KEY_F2 */ |
| 733 | 0x0F06003A /* KEY_CAPSLOCK */ |
| 734 | 0x0F070040 /* KEY_F6 */ |
| 735 | |
| 736 | /* Software Handled Function Keys */ |
| 737 | 0x14000047 /* KEY_KP7 */ |
| 738 | |
| 739 | 0x15000049 /* KEY_KP9 */ |
| 740 | 0x15010048 /* KEY_KP8 */ |
| 741 | 0x1502004B /* KEY_KP4 */ |
| 742 | 0x1504004F /* KEY_KP1 */ |
| 743 | |
| 744 | 0x1601004E /* KEY_KPSLASH */ |
| 745 | 0x1602004D /* KEY_KP6 */ |
| 746 | 0x1603004C /* KEY_KP5 */ |
| 747 | 0x16040051 /* KEY_KP3 */ |
| 748 | 0x16050050 /* KEY_KP2 */ |
| 749 | 0x16070052 /* KEY_KP0 */ |
| 750 | |
| 751 | 0x1B010037 /* KEY_KPASTERISK */ |
| 752 | 0x1B03004A /* KEY_KPMINUS */ |
| 753 | 0x1B04004E /* KEY_KPPLUS */ |
| 754 | 0x1B050053 /* KEY_KPDOT */ |
| 755 | |
| 756 | 0x1C050073 /* KEY_VOLUMEUP */ |
| 757 | |
| 758 | 0x1D030066 /* KEY_HOME */ |
| 759 | 0x1D04006B /* KEY_END */ |
| 760 | 0x1D0500E0 /* KEY_BRIGHTNESSDOWN */ |
| 761 | 0x1D060072 /* KEY_VOLUMEDOWN */ |
| 762 | 0x1D0700E1 /* KEY_BRIGHTNESSUP */ |
| 763 | |
| 764 | 0x1E000045 /* KEY_NUMLOCK */ |
| 765 | 0x1E010046 /* KEY_SCROLLLOCK */ |
| 766 | 0x1E020071 /* KEY_MUTE */ |
| 767 | |
| 768 | 0x1F04008A>; /* KEY_HELP */ |
| 769 | }; |
Stephen Warren | 6529e63 | 2012-06-20 15:58:34 -0600 | [diff] [blame] | 770 | regulators { |
| 771 | compatible = "simple-bus"; |
| 772 | #address-cells = <1>; |
| 773 | #size-cells = <0>; |
| 774 | |
| 775 | vdd_5v0_reg: regulator@0 { |
| 776 | compatible = "regulator-fixed"; |
| 777 | reg = <0>; |
| 778 | regulator-name = "vdd_5v0"; |
| 779 | regulator-min-microvolt = <5000000>; |
| 780 | regulator-max-microvolt = <5000000>; |
| 781 | regulator-always-on; |
| 782 | }; |
| 783 | |
| 784 | regulator@1 { |
| 785 | compatible = "regulator-fixed"; |
| 786 | reg = <1>; |
| 787 | regulator-name = "vdd_1v5"; |
| 788 | regulator-min-microvolt = <1500000>; |
| 789 | regulator-max-microvolt = <1500000>; |
| 790 | gpio = <&pmic 0 0>; |
| 791 | }; |
| 792 | |
| 793 | regulator@2 { |
| 794 | compatible = "regulator-fixed"; |
| 795 | reg = <2>; |
| 796 | regulator-name = "vdd_1v2"; |
| 797 | regulator-min-microvolt = <1200000>; |
| 798 | regulator-max-microvolt = <1200000>; |
| 799 | gpio = <&pmic 1 0>; |
| 800 | enable-active-high; |
| 801 | }; |
| 802 | }; |
| 803 | |
Stephen Warren | c04abb3 | 2012-05-11 17:03:26 -0600 | [diff] [blame] | 804 | sound { |
| 805 | compatible = "nvidia,tegra-audio-wm8903-seaboard", |
| 806 | "nvidia,tegra-audio-wm8903"; |
| 807 | nvidia,model = "NVIDIA Tegra Seaboard"; |
| 808 | |
| 809 | nvidia,audio-routing = |
| 810 | "Headphone Jack", "HPOUTR", |
| 811 | "Headphone Jack", "HPOUTL", |
| 812 | "Int Spk", "ROP", |
| 813 | "Int Spk", "RON", |
| 814 | "Int Spk", "LOP", |
| 815 | "Int Spk", "LON", |
| 816 | "Mic Jack", "MICBIAS", |
| 817 | "IN1R", "Mic Jack"; |
| 818 | |
| 819 | nvidia,i2s-controller = <&tegra_i2s1>; |
| 820 | nvidia,audio-codec = <&wm8903>; |
| 821 | |
| 822 | nvidia,spkr-en-gpios = <&wm8903 2 0>; |
| 823 | nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */ |
| 824 | }; |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 825 | }; |