Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * forcedeth: Ethernet driver for NVIDIA nForce media access controllers. |
| 3 | * |
| 4 | * Note: This driver is a cleanroom reimplementation based on reverse |
| 5 | * engineered documentation written by Carl-Daniel Hailfinger |
Ayaz Abdulla | 87046e5 | 2006-12-19 23:33:32 -0500 | [diff] [blame] | 6 | * and Andrew de Quincey. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * |
| 8 | * NVIDIA, nForce and other NVIDIA marks are trademarks or registered |
| 9 | * trademarks of NVIDIA Corporation in the United States and other |
| 10 | * countries. |
| 11 | * |
Manfred Spraul | 1836098 | 2005-12-24 14:19:24 +0100 | [diff] [blame] | 12 | * Copyright (C) 2003,4,5 Manfred Spraul |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | * Copyright (C) 2004 Andrew de Quincey (wol support) |
| 14 | * Copyright (C) 2004 Carl-Daniel Hailfinger (invalid MAC handling, insane |
| 15 | * IRQ rate fixes, bigendian fixes, cleanups, verification) |
Ayaz Abdulla | f1405d32 | 2009-01-09 11:03:54 +0000 | [diff] [blame] | 16 | * Copyright (c) 2004,2005,2006,2007,2008,2009 NVIDIA Corporation |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | * |
| 18 | * This program is free software; you can redistribute it and/or modify |
| 19 | * it under the terms of the GNU General Public License as published by |
| 20 | * the Free Software Foundation; either version 2 of the License, or |
| 21 | * (at your option) any later version. |
| 22 | * |
| 23 | * This program is distributed in the hope that it will be useful, |
| 24 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 25 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 26 | * GNU General Public License for more details. |
| 27 | * |
| 28 | * You should have received a copy of the GNU General Public License |
| 29 | * along with this program; if not, write to the Free Software |
| 30 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 31 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | * Known bugs: |
| 33 | * We suspect that on some hardware no TX done interrupts are generated. |
| 34 | * This means recovery from netif_stop_queue only happens if the hw timer |
| 35 | * interrupt fires (100 times/second, configurable with NVREG_POLL_DEFAULT) |
| 36 | * and the timer is active in the IRQMask, or if a rx packet arrives by chance. |
| 37 | * If your hardware reliably generates tx done interrupts, then you can remove |
| 38 | * DEV_NEED_TIMERIRQ from the driver_data flags. |
| 39 | * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few |
| 40 | * superfluous timer interrupts from the nic. |
| 41 | */ |
Joe Perches | 294a554 | 2010-11-29 07:41:56 +0000 | [diff] [blame] | 42 | |
| 43 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 44 | |
Ayaz Abdulla | 3e1a3ce | 2009-03-05 08:02:38 +0000 | [diff] [blame] | 45 | #define FORCEDETH_VERSION "0.64" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | #define DRV_NAME "forcedeth" |
| 47 | |
| 48 | #include <linux/module.h> |
| 49 | #include <linux/types.h> |
| 50 | #include <linux/pci.h> |
| 51 | #include <linux/interrupt.h> |
| 52 | #include <linux/netdevice.h> |
| 53 | #include <linux/etherdevice.h> |
| 54 | #include <linux/delay.h> |
Alexey Dobriyan | d43c36d | 2009-10-07 17:09:06 +0400 | [diff] [blame] | 55 | #include <linux/sched.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 | #include <linux/spinlock.h> |
| 57 | #include <linux/ethtool.h> |
| 58 | #include <linux/timer.h> |
| 59 | #include <linux/skbuff.h> |
| 60 | #include <linux/mii.h> |
| 61 | #include <linux/random.h> |
| 62 | #include <linux/init.h> |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 63 | #include <linux/if_vlan.h> |
Matthias Gehre | 910638a | 2006-03-28 01:56:48 -0800 | [diff] [blame] | 64 | #include <linux/dma-mapping.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 65 | #include <linux/slab.h> |
Szymon Janc | 5504e13 | 2010-11-27 08:39:45 +0000 | [diff] [blame] | 66 | #include <linux/uaccess.h> |
| 67 | #include <linux/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 68 | |
| 69 | #include <asm/irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | #include <asm/system.h> |
| 71 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 72 | #define TX_WORK_PER_LOOP 64 |
| 73 | #define RX_WORK_PER_LOOP 64 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | |
| 75 | /* |
| 76 | * Hardware access: |
| 77 | */ |
| 78 | |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 79 | #define DEV_NEED_TIMERIRQ 0x0000001 /* set the timer irq flag in the irq mask */ |
| 80 | #define DEV_NEED_LINKTIMER 0x0000002 /* poll link settings. Relies on the timer irq */ |
| 81 | #define DEV_HAS_LARGEDESC 0x0000004 /* device supports jumbo frames and needs packet format 2 */ |
| 82 | #define DEV_HAS_HIGH_DMA 0x0000008 /* device supports 64bit dma */ |
| 83 | #define DEV_HAS_CHECKSUM 0x0000010 /* device supports tx and rx checksum offloads */ |
| 84 | #define DEV_HAS_VLAN 0x0000020 /* device supports vlan tagging and striping */ |
| 85 | #define DEV_HAS_MSI 0x0000040 /* device supports MSI */ |
| 86 | #define DEV_HAS_MSI_X 0x0000080 /* device supports MSI-X */ |
| 87 | #define DEV_HAS_POWER_CNTRL 0x0000100 /* device supports power savings */ |
| 88 | #define DEV_HAS_STATISTICS_V1 0x0000200 /* device supports hw statistics version 1 */ |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 89 | #define DEV_HAS_STATISTICS_V2 0x0000400 /* device supports hw statistics version 2 */ |
| 90 | #define DEV_HAS_STATISTICS_V3 0x0000800 /* device supports hw statistics version 3 */ |
| 91 | #define DEV_HAS_STATISTICS_V12 0x0000600 /* device supports hw statistics version 1 and 2 */ |
| 92 | #define DEV_HAS_STATISTICS_V123 0x0000e00 /* device supports hw statistics version 1, 2, and 3 */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 93 | #define DEV_HAS_TEST_EXTENDED 0x0001000 /* device supports extended diagnostic test */ |
| 94 | #define DEV_HAS_MGMT_UNIT 0x0002000 /* device supports management unit */ |
| 95 | #define DEV_HAS_CORRECT_MACADDR 0x0004000 /* device supports correct mac address order */ |
| 96 | #define DEV_HAS_COLLISION_FIX 0x0008000 /* device supports tx collision fix */ |
| 97 | #define DEV_HAS_PAUSEFRAME_TX_V1 0x0010000 /* device supports tx pause frames version 1 */ |
| 98 | #define DEV_HAS_PAUSEFRAME_TX_V2 0x0020000 /* device supports tx pause frames version 2 */ |
| 99 | #define DEV_HAS_PAUSEFRAME_TX_V3 0x0040000 /* device supports tx pause frames version 3 */ |
| 100 | #define DEV_NEED_TX_LIMIT 0x0080000 /* device needs to limit tx */ |
| 101 | #define DEV_NEED_TX_LIMIT2 0x0180000 /* device needs to limit tx, expect for some revs */ |
| 102 | #define DEV_HAS_GEAR_MODE 0x0200000 /* device supports gear mode */ |
| 103 | #define DEV_NEED_PHY_INIT_FIX 0x0400000 /* device needs specific phy workaround */ |
| 104 | #define DEV_NEED_LOW_POWER_FIX 0x0800000 /* device needs special power up workaround */ |
| 105 | #define DEV_NEED_MSI_FIX 0x1000000 /* device needs msi workaround */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | |
| 107 | enum { |
| 108 | NvRegIrqStatus = 0x000, |
| 109 | #define NVREG_IRQSTAT_MIIEVENT 0x040 |
Ayaz Abdulla | daa91a9 | 2009-02-07 00:25:00 -0800 | [diff] [blame] | 110 | #define NVREG_IRQSTAT_MASK 0x83ff |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 111 | NvRegIrqMask = 0x004, |
| 112 | #define NVREG_IRQ_RX_ERROR 0x0001 |
| 113 | #define NVREG_IRQ_RX 0x0002 |
| 114 | #define NVREG_IRQ_RX_NOBUF 0x0004 |
| 115 | #define NVREG_IRQ_TX_ERR 0x0008 |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 116 | #define NVREG_IRQ_TX_OK 0x0010 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 117 | #define NVREG_IRQ_TIMER 0x0020 |
| 118 | #define NVREG_IRQ_LINK 0x0040 |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 119 | #define NVREG_IRQ_RX_FORCED 0x0080 |
| 120 | #define NVREG_IRQ_TX_FORCED 0x0100 |
Ayaz Abdulla | daa91a9 | 2009-02-07 00:25:00 -0800 | [diff] [blame] | 121 | #define NVREG_IRQ_RECOVER_ERROR 0x8200 |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 122 | #define NVREG_IRQMASK_THROUGHPUT 0x00df |
Ayaz Abdulla | 096a458 | 2007-05-21 20:23:11 -0400 | [diff] [blame] | 123 | #define NVREG_IRQMASK_CPU 0x0060 |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 124 | #define NVREG_IRQ_TX_ALL (NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED) |
| 125 | #define NVREG_IRQ_RX_ALL (NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_RX_FORCED) |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 126 | #define NVREG_IRQ_OTHER (NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RECOVER_ERROR) |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 127 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 128 | NvRegUnknownSetupReg6 = 0x008, |
| 129 | #define NVREG_UNKSETUP6_VAL 3 |
| 130 | |
| 131 | /* |
| 132 | * NVREG_POLL_DEFAULT is the interval length of the timer source on the nic |
| 133 | * NVREG_POLL_DEFAULT=97 would result in an interval length of 1 ms |
| 134 | */ |
| 135 | NvRegPollingInterval = 0x00c, |
Ayaz Abdulla | 6cef67a | 2009-03-05 08:02:30 +0000 | [diff] [blame] | 136 | #define NVREG_POLL_DEFAULT_THROUGHPUT 65535 /* backup tx cleanup if loop max reached */ |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 137 | #define NVREG_POLL_DEFAULT_CPU 13 |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 138 | NvRegMSIMap0 = 0x020, |
| 139 | NvRegMSIMap1 = 0x024, |
| 140 | NvRegMSIIrqMask = 0x030, |
| 141 | #define NVREG_MSI_VECTOR_0_ENABLED 0x01 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | NvRegMisc1 = 0x080, |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 143 | #define NVREG_MISC1_PAUSE_TX 0x01 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | #define NVREG_MISC1_HD 0x02 |
| 145 | #define NVREG_MISC1_FORCE 0x3b0f3c |
| 146 | |
Ayaz Abdulla | 0a62677 | 2008-01-13 16:02:42 -0500 | [diff] [blame] | 147 | NvRegMacReset = 0x34, |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 148 | #define NVREG_MAC_RESET_ASSERT 0x0F3 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 149 | NvRegTransmitterControl = 0x084, |
| 150 | #define NVREG_XMITCTL_START 0x01 |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 151 | #define NVREG_XMITCTL_MGMT_ST 0x40000000 |
| 152 | #define NVREG_XMITCTL_SYNC_MASK 0x000f0000 |
| 153 | #define NVREG_XMITCTL_SYNC_NOT_READY 0x0 |
| 154 | #define NVREG_XMITCTL_SYNC_PHY_INIT 0x00040000 |
| 155 | #define NVREG_XMITCTL_MGMT_SEMA_MASK 0x00000f00 |
| 156 | #define NVREG_XMITCTL_MGMT_SEMA_FREE 0x0 |
| 157 | #define NVREG_XMITCTL_HOST_SEMA_MASK 0x0000f000 |
| 158 | #define NVREG_XMITCTL_HOST_SEMA_ACQ 0x0000f000 |
| 159 | #define NVREG_XMITCTL_HOST_LOADED 0x00004000 |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 160 | #define NVREG_XMITCTL_TX_PATH_EN 0x01000000 |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 161 | #define NVREG_XMITCTL_DATA_START 0x00100000 |
| 162 | #define NVREG_XMITCTL_DATA_READY 0x00010000 |
| 163 | #define NVREG_XMITCTL_DATA_ERROR 0x00020000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 164 | NvRegTransmitterStatus = 0x088, |
| 165 | #define NVREG_XMITSTAT_BUSY 0x01 |
| 166 | |
| 167 | NvRegPacketFilterFlags = 0x8c, |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 168 | #define NVREG_PFF_PAUSE_RX 0x08 |
| 169 | #define NVREG_PFF_ALWAYS 0x7F0000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 170 | #define NVREG_PFF_PROMISC 0x80 |
| 171 | #define NVREG_PFF_MYADDR 0x20 |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 172 | #define NVREG_PFF_LOOPBACK 0x10 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | |
| 174 | NvRegOffloadConfig = 0x90, |
| 175 | #define NVREG_OFFLOAD_HOMEPHY 0x601 |
| 176 | #define NVREG_OFFLOAD_NORMAL RX_NIC_BUFSIZE |
| 177 | NvRegReceiverControl = 0x094, |
| 178 | #define NVREG_RCVCTL_START 0x01 |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 179 | #define NVREG_RCVCTL_RX_PATH_EN 0x01000000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 180 | NvRegReceiverStatus = 0x98, |
| 181 | #define NVREG_RCVSTAT_BUSY 0x01 |
| 182 | |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 183 | NvRegSlotTime = 0x9c, |
| 184 | #define NVREG_SLOTTIME_LEGBF_ENABLED 0x80000000 |
| 185 | #define NVREG_SLOTTIME_10_100_FULL 0x00007f00 |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 186 | #define NVREG_SLOTTIME_1000_FULL 0x0003ff00 |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 187 | #define NVREG_SLOTTIME_HALF 0x0000ff00 |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 188 | #define NVREG_SLOTTIME_DEFAULT 0x00007f00 |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 189 | #define NVREG_SLOTTIME_MASK 0x000000ff |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 191 | NvRegTxDeferral = 0xA0, |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 192 | #define NVREG_TX_DEFERRAL_DEFAULT 0x15050f |
| 193 | #define NVREG_TX_DEFERRAL_RGMII_10_100 0x16070f |
| 194 | #define NVREG_TX_DEFERRAL_RGMII_1000 0x14050f |
| 195 | #define NVREG_TX_DEFERRAL_RGMII_STRETCH_10 0x16190f |
| 196 | #define NVREG_TX_DEFERRAL_RGMII_STRETCH_100 0x16300f |
| 197 | #define NVREG_TX_DEFERRAL_MII_STRETCH 0x152000 |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 198 | NvRegRxDeferral = 0xA4, |
| 199 | #define NVREG_RX_DEFERRAL_DEFAULT 0x16 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 200 | NvRegMacAddrA = 0xA8, |
| 201 | NvRegMacAddrB = 0xAC, |
| 202 | NvRegMulticastAddrA = 0xB0, |
| 203 | #define NVREG_MCASTADDRA_FORCE 0x01 |
| 204 | NvRegMulticastAddrB = 0xB4, |
| 205 | NvRegMulticastMaskA = 0xB8, |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 206 | #define NVREG_MCASTMASKA_NONE 0xffffffff |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 207 | NvRegMulticastMaskB = 0xBC, |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 208 | #define NVREG_MCASTMASKB_NONE 0xffff |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 209 | |
| 210 | NvRegPhyInterface = 0xC0, |
| 211 | #define PHY_RGMII 0x10000000 |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 212 | NvRegBackOffControl = 0xC4, |
| 213 | #define NVREG_BKOFFCTRL_DEFAULT 0x70000000 |
| 214 | #define NVREG_BKOFFCTRL_SEED_MASK 0x000003ff |
| 215 | #define NVREG_BKOFFCTRL_SELECT 24 |
| 216 | #define NVREG_BKOFFCTRL_GEAR 12 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 217 | |
| 218 | NvRegTxRingPhysAddr = 0x100, |
| 219 | NvRegRxRingPhysAddr = 0x104, |
| 220 | NvRegRingSizes = 0x108, |
| 221 | #define NVREG_RINGSZ_TXSHIFT 0 |
| 222 | #define NVREG_RINGSZ_RXSHIFT 16 |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 223 | NvRegTransmitPoll = 0x10c, |
| 224 | #define NVREG_TRANSMITPOLL_MAC_ADDR_REV 0x00008000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | NvRegLinkSpeed = 0x110, |
| 226 | #define NVREG_LINKSPEED_FORCE 0x10000 |
| 227 | #define NVREG_LINKSPEED_10 1000 |
| 228 | #define NVREG_LINKSPEED_100 100 |
| 229 | #define NVREG_LINKSPEED_1000 50 |
| 230 | #define NVREG_LINKSPEED_MASK (0xFFF) |
| 231 | NvRegUnknownSetupReg5 = 0x130, |
| 232 | #define NVREG_UNKSETUP5_BIT31 (1<<31) |
Ayaz Abdulla | 95d161c | 2006-07-06 16:46:25 -0400 | [diff] [blame] | 233 | NvRegTxWatermark = 0x13c, |
| 234 | #define NVREG_TX_WM_DESC1_DEFAULT 0x0200010 |
| 235 | #define NVREG_TX_WM_DESC2_3_DEFAULT 0x1e08000 |
| 236 | #define NVREG_TX_WM_DESC2_3_1000 0xfe08000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 237 | NvRegTxRxControl = 0x144, |
| 238 | #define NVREG_TXRXCTL_KICK 0x0001 |
| 239 | #define NVREG_TXRXCTL_BIT1 0x0002 |
| 240 | #define NVREG_TXRXCTL_BIT2 0x0004 |
| 241 | #define NVREG_TXRXCTL_IDLE 0x0008 |
| 242 | #define NVREG_TXRXCTL_RESET 0x0010 |
| 243 | #define NVREG_TXRXCTL_RXCHECK 0x0400 |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 244 | #define NVREG_TXRXCTL_DESC_1 0 |
Ayaz Abdulla | d2f7841 | 2007-01-09 13:30:02 -0500 | [diff] [blame] | 245 | #define NVREG_TXRXCTL_DESC_2 0x002100 |
| 246 | #define NVREG_TXRXCTL_DESC_3 0xc02200 |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 247 | #define NVREG_TXRXCTL_VLANSTRIP 0x00040 |
| 248 | #define NVREG_TXRXCTL_VLANINS 0x00080 |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 249 | NvRegTxRingPhysAddrHigh = 0x148, |
| 250 | NvRegRxRingPhysAddrHigh = 0x14C, |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 251 | NvRegTxPauseFrame = 0x170, |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 252 | #define NVREG_TX_PAUSEFRAME_DISABLE 0x0fff0080 |
| 253 | #define NVREG_TX_PAUSEFRAME_ENABLE_V1 0x01800010 |
| 254 | #define NVREG_TX_PAUSEFRAME_ENABLE_V2 0x056003f0 |
| 255 | #define NVREG_TX_PAUSEFRAME_ENABLE_V3 0x09f00880 |
Ayaz Abdulla | 9a33e88 | 2008-08-06 12:12:34 -0400 | [diff] [blame] | 256 | NvRegTxPauseFrameLimit = 0x174, |
| 257 | #define NVREG_TX_PAUSEFRAMELIMIT_ENABLE 0x00010000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | NvRegMIIStatus = 0x180, |
| 259 | #define NVREG_MIISTAT_ERROR 0x0001 |
| 260 | #define NVREG_MIISTAT_LINKCHANGE 0x0008 |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 261 | #define NVREG_MIISTAT_MASK_RW 0x0007 |
| 262 | #define NVREG_MIISTAT_MASK_ALL 0x000f |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 263 | NvRegMIIMask = 0x184, |
| 264 | #define NVREG_MII_LINKCHANGE 0x0008 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | |
| 266 | NvRegAdapterControl = 0x188, |
| 267 | #define NVREG_ADAPTCTL_START 0x02 |
| 268 | #define NVREG_ADAPTCTL_LINKUP 0x04 |
| 269 | #define NVREG_ADAPTCTL_PHYVALID 0x40000 |
| 270 | #define NVREG_ADAPTCTL_RUNNING 0x100000 |
| 271 | #define NVREG_ADAPTCTL_PHYSHIFT 24 |
| 272 | NvRegMIISpeed = 0x18c, |
| 273 | #define NVREG_MIISPEED_BIT8 (1<<8) |
| 274 | #define NVREG_MIIDELAY 5 |
| 275 | NvRegMIIControl = 0x190, |
| 276 | #define NVREG_MIICTL_INUSE 0x08000 |
| 277 | #define NVREG_MIICTL_WRITE 0x00400 |
| 278 | #define NVREG_MIICTL_ADDRSHIFT 5 |
| 279 | NvRegMIIData = 0x194, |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 280 | NvRegTxUnicast = 0x1a0, |
| 281 | NvRegTxMulticast = 0x1a4, |
| 282 | NvRegTxBroadcast = 0x1a8, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 283 | NvRegWakeUpFlags = 0x200, |
| 284 | #define NVREG_WAKEUPFLAGS_VAL 0x7770 |
| 285 | #define NVREG_WAKEUPFLAGS_BUSYSHIFT 24 |
| 286 | #define NVREG_WAKEUPFLAGS_ENABLESHIFT 16 |
| 287 | #define NVREG_WAKEUPFLAGS_D3SHIFT 12 |
| 288 | #define NVREG_WAKEUPFLAGS_D2SHIFT 8 |
| 289 | #define NVREG_WAKEUPFLAGS_D1SHIFT 4 |
| 290 | #define NVREG_WAKEUPFLAGS_D0SHIFT 0 |
| 291 | #define NVREG_WAKEUPFLAGS_ACCEPT_MAGPAT 0x01 |
| 292 | #define NVREG_WAKEUPFLAGS_ACCEPT_WAKEUPPAT 0x02 |
| 293 | #define NVREG_WAKEUPFLAGS_ACCEPT_LINKCHANGE 0x04 |
| 294 | #define NVREG_WAKEUPFLAGS_ENABLE 0x1111 |
| 295 | |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 296 | NvRegMgmtUnitGetVersion = 0x204, |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 297 | #define NVREG_MGMTUNITGETVERSION 0x01 |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 298 | NvRegMgmtUnitVersion = 0x208, |
| 299 | #define NVREG_MGMTUNITVERSION 0x08 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 300 | NvRegPowerCap = 0x268, |
| 301 | #define NVREG_POWERCAP_D3SUPP (1<<30) |
| 302 | #define NVREG_POWERCAP_D2SUPP (1<<26) |
| 303 | #define NVREG_POWERCAP_D1SUPP (1<<25) |
| 304 | NvRegPowerState = 0x26c, |
| 305 | #define NVREG_POWERSTATE_POWEREDUP 0x8000 |
| 306 | #define NVREG_POWERSTATE_VALID 0x0100 |
| 307 | #define NVREG_POWERSTATE_MASK 0x0003 |
| 308 | #define NVREG_POWERSTATE_D0 0x0000 |
| 309 | #define NVREG_POWERSTATE_D1 0x0001 |
| 310 | #define NVREG_POWERSTATE_D2 0x0002 |
| 311 | #define NVREG_POWERSTATE_D3 0x0003 |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 312 | NvRegMgmtUnitControl = 0x278, |
| 313 | #define NVREG_MGMTUNITCONTROL_INUSE 0x20000 |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 314 | NvRegTxCnt = 0x280, |
| 315 | NvRegTxZeroReXmt = 0x284, |
| 316 | NvRegTxOneReXmt = 0x288, |
| 317 | NvRegTxManyReXmt = 0x28c, |
| 318 | NvRegTxLateCol = 0x290, |
| 319 | NvRegTxUnderflow = 0x294, |
| 320 | NvRegTxLossCarrier = 0x298, |
| 321 | NvRegTxExcessDef = 0x29c, |
| 322 | NvRegTxRetryErr = 0x2a0, |
| 323 | NvRegRxFrameErr = 0x2a4, |
| 324 | NvRegRxExtraByte = 0x2a8, |
| 325 | NvRegRxLateCol = 0x2ac, |
| 326 | NvRegRxRunt = 0x2b0, |
| 327 | NvRegRxFrameTooLong = 0x2b4, |
| 328 | NvRegRxOverflow = 0x2b8, |
| 329 | NvRegRxFCSErr = 0x2bc, |
| 330 | NvRegRxFrameAlignErr = 0x2c0, |
| 331 | NvRegRxLenErr = 0x2c4, |
| 332 | NvRegRxUnicast = 0x2c8, |
| 333 | NvRegRxMulticast = 0x2cc, |
| 334 | NvRegRxBroadcast = 0x2d0, |
| 335 | NvRegTxDef = 0x2d4, |
| 336 | NvRegTxFrame = 0x2d8, |
| 337 | NvRegRxCnt = 0x2dc, |
| 338 | NvRegTxPause = 0x2e0, |
| 339 | NvRegRxPause = 0x2e4, |
| 340 | NvRegRxDropFrame = 0x2e8, |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 341 | NvRegVlanControl = 0x300, |
| 342 | #define NVREG_VLANCONTROL_ENABLE 0x2000 |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 343 | NvRegMSIXMap0 = 0x3e0, |
| 344 | NvRegMSIXMap1 = 0x3e4, |
| 345 | NvRegMSIXIrqStatus = 0x3f0, |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 346 | |
| 347 | NvRegPowerState2 = 0x600, |
Ayaz Abdulla | 1545e20 | 2008-09-22 09:55:35 -0400 | [diff] [blame] | 348 | #define NVREG_POWERSTATE2_POWERUP_MASK 0x0F15 |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 349 | #define NVREG_POWERSTATE2_POWERUP_REV_A3 0x0001 |
Ayaz Abdulla | 22ae03a | 2008-07-25 15:31:29 -0400 | [diff] [blame] | 350 | #define NVREG_POWERSTATE2_PHY_RESET 0x0004 |
Ayaz Abdulla | 88d7d8b | 2009-05-01 01:41:50 +0000 | [diff] [blame] | 351 | #define NVREG_POWERSTATE2_GATE_CLOCKS 0x0F00 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 352 | }; |
| 353 | |
| 354 | /* Big endian: should work, but is untested */ |
| 355 | struct ring_desc { |
Stephen Hemminger | a8bed49 | 2006-07-27 18:50:09 -0700 | [diff] [blame] | 356 | __le32 buf; |
| 357 | __le32 flaglen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 358 | }; |
| 359 | |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 360 | struct ring_desc_ex { |
Stephen Hemminger | a8bed49 | 2006-07-27 18:50:09 -0700 | [diff] [blame] | 361 | __le32 bufhigh; |
| 362 | __le32 buflow; |
| 363 | __le32 txvlan; |
| 364 | __le32 flaglen; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 365 | }; |
| 366 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 367 | union ring_type { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 368 | struct ring_desc *orig; |
| 369 | struct ring_desc_ex *ex; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 370 | }; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 371 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 372 | #define FLAG_MASK_V1 0xffff0000 |
| 373 | #define FLAG_MASK_V2 0xffffc000 |
| 374 | #define LEN_MASK_V1 (0xffffffff ^ FLAG_MASK_V1) |
| 375 | #define LEN_MASK_V2 (0xffffffff ^ FLAG_MASK_V2) |
| 376 | |
| 377 | #define NV_TX_LASTPACKET (1<<16) |
| 378 | #define NV_TX_RETRYERROR (1<<19) |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 379 | #define NV_TX_RETRYCOUNT_MASK (0xF<<20) |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 380 | #define NV_TX_FORCED_INTERRUPT (1<<24) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 381 | #define NV_TX_DEFERRED (1<<26) |
| 382 | #define NV_TX_CARRIERLOST (1<<27) |
| 383 | #define NV_TX_LATECOLLISION (1<<28) |
| 384 | #define NV_TX_UNDERFLOW (1<<29) |
| 385 | #define NV_TX_ERROR (1<<30) |
| 386 | #define NV_TX_VALID (1<<31) |
| 387 | |
| 388 | #define NV_TX2_LASTPACKET (1<<29) |
| 389 | #define NV_TX2_RETRYERROR (1<<18) |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 390 | #define NV_TX2_RETRYCOUNT_MASK (0xF<<19) |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 391 | #define NV_TX2_FORCED_INTERRUPT (1<<30) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 392 | #define NV_TX2_DEFERRED (1<<25) |
| 393 | #define NV_TX2_CARRIERLOST (1<<26) |
| 394 | #define NV_TX2_LATECOLLISION (1<<27) |
| 395 | #define NV_TX2_UNDERFLOW (1<<28) |
| 396 | /* error and valid are the same for both */ |
| 397 | #define NV_TX2_ERROR (1<<30) |
| 398 | #define NV_TX2_VALID (1<<31) |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 399 | #define NV_TX2_TSO (1<<28) |
| 400 | #define NV_TX2_TSO_SHIFT 14 |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 401 | #define NV_TX2_TSO_MAX_SHIFT 14 |
| 402 | #define NV_TX2_TSO_MAX_SIZE (1<<NV_TX2_TSO_MAX_SHIFT) |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 403 | #define NV_TX2_CHECKSUM_L3 (1<<27) |
| 404 | #define NV_TX2_CHECKSUM_L4 (1<<26) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 405 | |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 406 | #define NV_TX3_VLAN_TAG_PRESENT (1<<18) |
| 407 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 408 | #define NV_RX_DESCRIPTORVALID (1<<16) |
| 409 | #define NV_RX_MISSEDFRAME (1<<17) |
| 410 | #define NV_RX_SUBSTRACT1 (1<<18) |
| 411 | #define NV_RX_ERROR1 (1<<23) |
| 412 | #define NV_RX_ERROR2 (1<<24) |
| 413 | #define NV_RX_ERROR3 (1<<25) |
| 414 | #define NV_RX_ERROR4 (1<<26) |
| 415 | #define NV_RX_CRCERR (1<<27) |
| 416 | #define NV_RX_OVERFLOW (1<<28) |
| 417 | #define NV_RX_FRAMINGERR (1<<29) |
| 418 | #define NV_RX_ERROR (1<<30) |
| 419 | #define NV_RX_AVAIL (1<<31) |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 420 | #define NV_RX_ERROR_MASK (NV_RX_ERROR1|NV_RX_ERROR2|NV_RX_ERROR3|NV_RX_ERROR4|NV_RX_CRCERR|NV_RX_OVERFLOW|NV_RX_FRAMINGERR) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 421 | |
| 422 | #define NV_RX2_CHECKSUMMASK (0x1C000000) |
Ayaz Abdulla | bfaffe8 | 2008-01-13 16:02:55 -0500 | [diff] [blame] | 423 | #define NV_RX2_CHECKSUM_IP (0x10000000) |
| 424 | #define NV_RX2_CHECKSUM_IP_TCP (0x14000000) |
| 425 | #define NV_RX2_CHECKSUM_IP_UDP (0x18000000) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 426 | #define NV_RX2_DESCRIPTORVALID (1<<29) |
| 427 | #define NV_RX2_SUBSTRACT1 (1<<25) |
| 428 | #define NV_RX2_ERROR1 (1<<18) |
| 429 | #define NV_RX2_ERROR2 (1<<19) |
| 430 | #define NV_RX2_ERROR3 (1<<20) |
| 431 | #define NV_RX2_ERROR4 (1<<21) |
| 432 | #define NV_RX2_CRCERR (1<<22) |
| 433 | #define NV_RX2_OVERFLOW (1<<23) |
| 434 | #define NV_RX2_FRAMINGERR (1<<24) |
| 435 | /* error and avail are the same for both */ |
| 436 | #define NV_RX2_ERROR (1<<30) |
| 437 | #define NV_RX2_AVAIL (1<<31) |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 438 | #define NV_RX2_ERROR_MASK (NV_RX2_ERROR1|NV_RX2_ERROR2|NV_RX2_ERROR3|NV_RX2_ERROR4|NV_RX2_CRCERR|NV_RX2_OVERFLOW|NV_RX2_FRAMINGERR) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 439 | |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 440 | #define NV_RX3_VLAN_TAG_PRESENT (1<<16) |
| 441 | #define NV_RX3_VLAN_TAG_MASK (0x0000FFFF) |
| 442 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 443 | /* Miscellaneous hardware related defines: */ |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 444 | #define NV_PCI_REGSZ_VER1 0x270 |
| 445 | #define NV_PCI_REGSZ_VER2 0x2d4 |
| 446 | #define NV_PCI_REGSZ_VER3 0x604 |
| 447 | #define NV_PCI_REGSZ_MAX 0x604 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 448 | |
| 449 | /* various timeout delays: all in usec */ |
| 450 | #define NV_TXRX_RESET_DELAY 4 |
| 451 | #define NV_TXSTOP_DELAY1 10 |
| 452 | #define NV_TXSTOP_DELAY1MAX 500000 |
| 453 | #define NV_TXSTOP_DELAY2 100 |
| 454 | #define NV_RXSTOP_DELAY1 10 |
| 455 | #define NV_RXSTOP_DELAY1MAX 500000 |
| 456 | #define NV_RXSTOP_DELAY2 100 |
| 457 | #define NV_SETUP5_DELAY 5 |
| 458 | #define NV_SETUP5_DELAYMAX 50000 |
| 459 | #define NV_POWERUP_DELAY 5 |
| 460 | #define NV_POWERUP_DELAYMAX 5000 |
| 461 | #define NV_MIIBUSY_DELAY 50 |
| 462 | #define NV_MIIPHY_DELAY 10 |
| 463 | #define NV_MIIPHY_DELAYMAX 10000 |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 464 | #define NV_MAC_RESET_DELAY 64 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | |
| 466 | #define NV_WAKEUPPATTERNS 5 |
| 467 | #define NV_WAKEUPMASKENTRIES 4 |
| 468 | |
| 469 | /* General driver defaults */ |
| 470 | #define NV_WATCHDOG_TIMEO (5*HZ) |
| 471 | |
Ayaz Abdulla | 6cef67a | 2009-03-05 08:02:30 +0000 | [diff] [blame] | 472 | #define RX_RING_DEFAULT 512 |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 473 | #define TX_RING_DEFAULT 256 |
| 474 | #define RX_RING_MIN 128 |
| 475 | #define TX_RING_MIN 64 |
| 476 | #define RING_MAX_DESC_VER_1 1024 |
| 477 | #define RING_MAX_DESC_VER_2_3 16384 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 478 | |
| 479 | /* rx/tx mac addr + type + vlan + align + slack*/ |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 480 | #define NV_RX_HEADERS (64) |
| 481 | /* even more slack. */ |
| 482 | #define NV_RX_ALLOC_PAD (64) |
| 483 | |
| 484 | /* maximum mtu size */ |
| 485 | #define NV_PKTLIMIT_1 ETH_DATA_LEN /* hard limit not known */ |
| 486 | #define NV_PKTLIMIT_2 9100 /* Actual limit according to NVidia: 9202 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 487 | |
| 488 | #define OOM_REFILL (1+HZ/20) |
| 489 | #define POLL_WAIT (1+HZ/100) |
| 490 | #define LINK_TIMEOUT (3*HZ) |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 491 | #define STATS_INTERVAL (10*HZ) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 492 | |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 493 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 494 | * desc_ver values: |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 495 | * The nic supports three different descriptor types: |
| 496 | * - DESC_VER_1: Original |
| 497 | * - DESC_VER_2: support for jumbo frames. |
| 498 | * - DESC_VER_3: 64-bit format. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 499 | */ |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 500 | #define DESC_VER_1 1 |
| 501 | #define DESC_VER_2 2 |
| 502 | #define DESC_VER_3 3 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 503 | |
| 504 | /* PHY defines */ |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 505 | #define PHY_OUI_MARVELL 0x5043 |
| 506 | #define PHY_OUI_CICADA 0x03f1 |
| 507 | #define PHY_OUI_VITESSE 0x01c1 |
| 508 | #define PHY_OUI_REALTEK 0x0732 |
| 509 | #define PHY_OUI_REALTEK2 0x0020 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 510 | #define PHYID1_OUI_MASK 0x03ff |
| 511 | #define PHYID1_OUI_SHFT 6 |
| 512 | #define PHYID2_OUI_MASK 0xfc00 |
| 513 | #define PHYID2_OUI_SHFT 10 |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 514 | #define PHYID2_MODEL_MASK 0x03f0 |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 515 | #define PHY_MODEL_REALTEK_8211 0x0110 |
| 516 | #define PHY_REV_MASK 0x0001 |
| 517 | #define PHY_REV_REALTEK_8211B 0x0000 |
| 518 | #define PHY_REV_REALTEK_8211C 0x0001 |
| 519 | #define PHY_MODEL_REALTEK_8201 0x0200 |
| 520 | #define PHY_MODEL_MARVELL_E3016 0x0220 |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 521 | #define PHY_MARVELL_E3016_INITMASK 0x0300 |
Ayaz Abdulla | 14a67f3 | 2007-07-15 06:50:28 -0400 | [diff] [blame] | 522 | #define PHY_CICADA_INIT1 0x0f000 |
| 523 | #define PHY_CICADA_INIT2 0x0e00 |
| 524 | #define PHY_CICADA_INIT3 0x01000 |
| 525 | #define PHY_CICADA_INIT4 0x0200 |
| 526 | #define PHY_CICADA_INIT5 0x0004 |
| 527 | #define PHY_CICADA_INIT6 0x02000 |
Ayaz Abdulla | d215d8a | 2007-07-15 06:50:53 -0400 | [diff] [blame] | 528 | #define PHY_VITESSE_INIT_REG1 0x1f |
| 529 | #define PHY_VITESSE_INIT_REG2 0x10 |
| 530 | #define PHY_VITESSE_INIT_REG3 0x11 |
| 531 | #define PHY_VITESSE_INIT_REG4 0x12 |
| 532 | #define PHY_VITESSE_INIT_MSK1 0xc |
| 533 | #define PHY_VITESSE_INIT_MSK2 0x0180 |
| 534 | #define PHY_VITESSE_INIT1 0x52b5 |
| 535 | #define PHY_VITESSE_INIT2 0xaf8a |
| 536 | #define PHY_VITESSE_INIT3 0x8 |
| 537 | #define PHY_VITESSE_INIT4 0x8f8a |
| 538 | #define PHY_VITESSE_INIT5 0xaf86 |
| 539 | #define PHY_VITESSE_INIT6 0x8f86 |
| 540 | #define PHY_VITESSE_INIT7 0xaf82 |
| 541 | #define PHY_VITESSE_INIT8 0x0100 |
| 542 | #define PHY_VITESSE_INIT9 0x8f82 |
| 543 | #define PHY_VITESSE_INIT10 0x0 |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 544 | #define PHY_REALTEK_INIT_REG1 0x1f |
| 545 | #define PHY_REALTEK_INIT_REG2 0x19 |
| 546 | #define PHY_REALTEK_INIT_REG3 0x13 |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 547 | #define PHY_REALTEK_INIT_REG4 0x14 |
| 548 | #define PHY_REALTEK_INIT_REG5 0x18 |
| 549 | #define PHY_REALTEK_INIT_REG6 0x11 |
Ayaz Abdulla | 22ae03a | 2008-07-25 15:31:29 -0400 | [diff] [blame] | 550 | #define PHY_REALTEK_INIT_REG7 0x01 |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 551 | #define PHY_REALTEK_INIT1 0x0000 |
| 552 | #define PHY_REALTEK_INIT2 0x8e00 |
| 553 | #define PHY_REALTEK_INIT3 0x0001 |
| 554 | #define PHY_REALTEK_INIT4 0xad17 |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 555 | #define PHY_REALTEK_INIT5 0xfb54 |
| 556 | #define PHY_REALTEK_INIT6 0xf5c7 |
| 557 | #define PHY_REALTEK_INIT7 0x1000 |
| 558 | #define PHY_REALTEK_INIT8 0x0003 |
Ayaz Abdulla | 22ae03a | 2008-07-25 15:31:29 -0400 | [diff] [blame] | 559 | #define PHY_REALTEK_INIT9 0x0008 |
| 560 | #define PHY_REALTEK_INIT10 0x0005 |
| 561 | #define PHY_REALTEK_INIT11 0x0200 |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 562 | #define PHY_REALTEK_INIT_MSK1 0x0003 |
Ayaz Abdulla | d215d8a | 2007-07-15 06:50:53 -0400 | [diff] [blame] | 563 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 564 | #define PHY_GIGABIT 0x0100 |
| 565 | |
| 566 | #define PHY_TIMEOUT 0x1 |
| 567 | #define PHY_ERROR 0x2 |
| 568 | |
| 569 | #define PHY_100 0x1 |
| 570 | #define PHY_1000 0x2 |
| 571 | #define PHY_HALF 0x100 |
| 572 | |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 573 | #define NV_PAUSEFRAME_RX_CAPABLE 0x0001 |
| 574 | #define NV_PAUSEFRAME_TX_CAPABLE 0x0002 |
| 575 | #define NV_PAUSEFRAME_RX_ENABLE 0x0004 |
| 576 | #define NV_PAUSEFRAME_TX_ENABLE 0x0008 |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 577 | #define NV_PAUSEFRAME_RX_REQ 0x0010 |
| 578 | #define NV_PAUSEFRAME_TX_REQ 0x0020 |
| 579 | #define NV_PAUSEFRAME_AUTONEG 0x0040 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 580 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 581 | /* MSI/MSI-X defines */ |
| 582 | #define NV_MSI_X_MAX_VECTORS 8 |
| 583 | #define NV_MSI_X_VECTORS_MASK 0x000f |
| 584 | #define NV_MSI_CAPABLE 0x0010 |
| 585 | #define NV_MSI_X_CAPABLE 0x0020 |
| 586 | #define NV_MSI_ENABLED 0x0040 |
| 587 | #define NV_MSI_X_ENABLED 0x0080 |
| 588 | |
| 589 | #define NV_MSI_X_VECTOR_ALL 0x0 |
| 590 | #define NV_MSI_X_VECTOR_RX 0x0 |
| 591 | #define NV_MSI_X_VECTOR_TX 0x1 |
| 592 | #define NV_MSI_X_VECTOR_OTHER 0x2 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 593 | |
Ayaz Abdulla | b6e4405 | 2009-02-07 00:24:15 -0800 | [diff] [blame] | 594 | #define NV_MSI_PRIV_OFFSET 0x68 |
| 595 | #define NV_MSI_PRIV_VALUE 0xffffffff |
| 596 | |
Ayaz Abdulla | b2976d2 | 2008-02-04 15:13:59 -0500 | [diff] [blame] | 597 | #define NV_RESTART_TX 0x1 |
| 598 | #define NV_RESTART_RX 0x2 |
| 599 | |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 600 | #define NV_TX_LIMIT_COUNT 16 |
| 601 | |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 602 | #define NV_DYNAMIC_THRESHOLD 4 |
| 603 | #define NV_DYNAMIC_MAX_QUIET_COUNT 2048 |
| 604 | |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 605 | /* statistics */ |
| 606 | struct nv_ethtool_str { |
| 607 | char name[ETH_GSTRING_LEN]; |
| 608 | }; |
| 609 | |
| 610 | static const struct nv_ethtool_str nv_estats_str[] = { |
| 611 | { "tx_bytes" }, |
| 612 | { "tx_zero_rexmt" }, |
| 613 | { "tx_one_rexmt" }, |
| 614 | { "tx_many_rexmt" }, |
| 615 | { "tx_late_collision" }, |
| 616 | { "tx_fifo_errors" }, |
| 617 | { "tx_carrier_errors" }, |
| 618 | { "tx_excess_deferral" }, |
| 619 | { "tx_retry_error" }, |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 620 | { "rx_frame_error" }, |
| 621 | { "rx_extra_byte" }, |
| 622 | { "rx_late_collision" }, |
| 623 | { "rx_runt" }, |
| 624 | { "rx_frame_too_long" }, |
| 625 | { "rx_over_errors" }, |
| 626 | { "rx_crc_errors" }, |
| 627 | { "rx_frame_align_error" }, |
| 628 | { "rx_length_error" }, |
| 629 | { "rx_unicast" }, |
| 630 | { "rx_multicast" }, |
| 631 | { "rx_broadcast" }, |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 632 | { "rx_packets" }, |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 633 | { "rx_errors_total" }, |
| 634 | { "tx_errors_total" }, |
| 635 | |
| 636 | /* version 2 stats */ |
| 637 | { "tx_deferral" }, |
| 638 | { "tx_packets" }, |
| 639 | { "rx_bytes" }, |
| 640 | { "tx_pause" }, |
| 641 | { "rx_pause" }, |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 642 | { "rx_drop_frame" }, |
| 643 | |
| 644 | /* version 3 stats */ |
| 645 | { "tx_unicast" }, |
| 646 | { "tx_multicast" }, |
| 647 | { "tx_broadcast" } |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 648 | }; |
| 649 | |
| 650 | struct nv_ethtool_stats { |
| 651 | u64 tx_bytes; |
| 652 | u64 tx_zero_rexmt; |
| 653 | u64 tx_one_rexmt; |
| 654 | u64 tx_many_rexmt; |
| 655 | u64 tx_late_collision; |
| 656 | u64 tx_fifo_errors; |
| 657 | u64 tx_carrier_errors; |
| 658 | u64 tx_excess_deferral; |
| 659 | u64 tx_retry_error; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 660 | u64 rx_frame_error; |
| 661 | u64 rx_extra_byte; |
| 662 | u64 rx_late_collision; |
| 663 | u64 rx_runt; |
| 664 | u64 rx_frame_too_long; |
| 665 | u64 rx_over_errors; |
| 666 | u64 rx_crc_errors; |
| 667 | u64 rx_frame_align_error; |
| 668 | u64 rx_length_error; |
| 669 | u64 rx_unicast; |
| 670 | u64 rx_multicast; |
| 671 | u64 rx_broadcast; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 672 | u64 rx_packets; |
| 673 | u64 rx_errors_total; |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 674 | u64 tx_errors_total; |
| 675 | |
| 676 | /* version 2 stats */ |
| 677 | u64 tx_deferral; |
| 678 | u64 tx_packets; |
| 679 | u64 rx_bytes; |
| 680 | u64 tx_pause; |
| 681 | u64 rx_pause; |
| 682 | u64 rx_drop_frame; |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 683 | |
| 684 | /* version 3 stats */ |
| 685 | u64 tx_unicast; |
| 686 | u64 tx_multicast; |
| 687 | u64 tx_broadcast; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 688 | }; |
| 689 | |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 690 | #define NV_DEV_STATISTICS_V3_COUNT (sizeof(struct nv_ethtool_stats)/sizeof(u64)) |
| 691 | #define NV_DEV_STATISTICS_V2_COUNT (NV_DEV_STATISTICS_V3_COUNT - 3) |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 692 | #define NV_DEV_STATISTICS_V1_COUNT (NV_DEV_STATISTICS_V2_COUNT - 6) |
| 693 | |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 694 | /* diagnostics */ |
| 695 | #define NV_TEST_COUNT_BASE 3 |
| 696 | #define NV_TEST_COUNT_EXTENDED 4 |
| 697 | |
| 698 | static const struct nv_ethtool_str nv_etests_str[] = { |
| 699 | { "link (online/offline)" }, |
| 700 | { "register (offline) " }, |
| 701 | { "interrupt (offline) " }, |
| 702 | { "loopback (offline) " } |
| 703 | }; |
| 704 | |
| 705 | struct register_test { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 706 | __u32 reg; |
| 707 | __u32 mask; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 708 | }; |
| 709 | |
| 710 | static const struct register_test nv_registers_test[] = { |
| 711 | { NvRegUnknownSetupReg6, 0x01 }, |
| 712 | { NvRegMisc1, 0x03c }, |
| 713 | { NvRegOffloadConfig, 0x03ff }, |
| 714 | { NvRegMulticastAddrA, 0xffffffff }, |
Ayaz Abdulla | 95d161c | 2006-07-06 16:46:25 -0400 | [diff] [blame] | 715 | { NvRegTxWatermark, 0x0ff }, |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 716 | { NvRegWakeUpFlags, 0x07777 }, |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 717 | { 0, 0 } |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 718 | }; |
| 719 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 720 | struct nv_skb_map { |
| 721 | struct sk_buff *skb; |
| 722 | dma_addr_t dma; |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 723 | unsigned int dma_len:31; |
| 724 | unsigned int dma_single:1; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 725 | struct ring_desc_ex *first_tx_desc; |
| 726 | struct nv_skb_map *next_tx_ctx; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 727 | }; |
| 728 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 729 | /* |
| 730 | * SMP locking: |
Wang Chen | b74ca3a | 2008-12-08 01:14:16 -0800 | [diff] [blame] | 731 | * All hardware access under netdev_priv(dev)->lock, except the performance |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 732 | * critical parts: |
| 733 | * - rx is (pseudo-) lockless: it relies on the single-threading provided |
| 734 | * by the arch code for interrupts. |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 735 | * - tx setup is lockless: it relies on netif_tx_lock. Actual submission |
Wang Chen | b74ca3a | 2008-12-08 01:14:16 -0800 | [diff] [blame] | 736 | * needs netdev_priv(dev)->lock :-( |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 737 | * - set_multicast_list: preparation lockless, relies on netif_tx_lock. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 738 | */ |
| 739 | |
| 740 | /* in dev: base, irq */ |
| 741 | struct fe_priv { |
| 742 | spinlock_t lock; |
| 743 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 744 | struct net_device *dev; |
| 745 | struct napi_struct napi; |
| 746 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 747 | /* General data: |
| 748 | * Locking: spin_lock(&np->lock); */ |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 749 | struct nv_ethtool_stats estats; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 750 | int in_shutdown; |
| 751 | u32 linkspeed; |
| 752 | int duplex; |
| 753 | int autoneg; |
| 754 | int fixed_mode; |
| 755 | int phyaddr; |
| 756 | int wolenabled; |
| 757 | unsigned int phy_oui; |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 758 | unsigned int phy_model; |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 759 | unsigned int phy_rev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 760 | u16 gigabit; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 761 | int intr_test; |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 762 | int recover_error; |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 763 | int quiet_count; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 764 | |
| 765 | /* General data: RO fields */ |
| 766 | dma_addr_t ring_addr; |
| 767 | struct pci_dev *pci_dev; |
| 768 | u32 orig_mac[2]; |
Ayaz Abdulla | 582806b | 2009-03-05 08:02:03 +0000 | [diff] [blame] | 769 | u32 events; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 770 | u32 irqmask; |
| 771 | u32 desc_ver; |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 772 | u32 txrxctl_bits; |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 773 | u32 vlanctl_bits; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 774 | u32 driver_data; |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 775 | u32 device_id; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 776 | u32 register_size; |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 777 | u32 mac_in_use; |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 778 | int mgmt_version; |
| 779 | int mgmt_sema; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 780 | |
| 781 | void __iomem *base; |
| 782 | |
| 783 | /* rx specific fields. |
| 784 | * Locking: Within irq hander or disable_irq+spin_lock(&np->lock); |
| 785 | */ |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 786 | union ring_type get_rx, put_rx, first_rx, last_rx; |
| 787 | struct nv_skb_map *get_rx_ctx, *put_rx_ctx; |
| 788 | struct nv_skb_map *first_rx_ctx, *last_rx_ctx; |
| 789 | struct nv_skb_map *rx_skb; |
| 790 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 791 | union ring_type rx_ring; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 792 | unsigned int rx_buf_sz; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 793 | unsigned int pkt_limit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | struct timer_list oom_kick; |
| 795 | struct timer_list nic_poll; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 796 | struct timer_list stats_poll; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 797 | u32 nic_poll_irq; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 798 | int rx_ring_size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 799 | |
| 800 | /* media detection workaround. |
| 801 | * Locking: Within irq hander or disable_irq+spin_lock(&np->lock); |
| 802 | */ |
| 803 | int need_linktimer; |
| 804 | unsigned long link_timeout; |
| 805 | /* |
| 806 | * tx specific fields. |
| 807 | */ |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 808 | union ring_type get_tx, put_tx, first_tx, last_tx; |
| 809 | struct nv_skb_map *get_tx_ctx, *put_tx_ctx; |
| 810 | struct nv_skb_map *first_tx_ctx, *last_tx_ctx; |
| 811 | struct nv_skb_map *tx_skb; |
| 812 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 813 | union ring_type tx_ring; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 814 | u32 tx_flags; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 815 | int tx_ring_size; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 816 | int tx_limit; |
| 817 | u32 tx_pkts_in_progress; |
| 818 | struct nv_skb_map *tx_change_owner; |
| 819 | struct nv_skb_map *tx_end_flip; |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 820 | int tx_stop; |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 821 | |
| 822 | /* vlan fields */ |
| 823 | struct vlan_group *vlangrp; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 824 | |
| 825 | /* msi/msi-x fields */ |
| 826 | u32 msi_flags; |
| 827 | struct msix_entry msi_x_entry[NV_MSI_X_MAX_VECTORS]; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 828 | |
| 829 | /* flow control */ |
| 830 | u32 pause_flags; |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 831 | |
| 832 | /* power saved state */ |
| 833 | u32 saved_config_space[NV_PCI_REGSZ_MAX/4]; |
Yinghai Lu | ddb213f | 2009-02-06 01:29:23 -0800 | [diff] [blame] | 834 | |
| 835 | /* for different msi-x irq type */ |
| 836 | char name_rx[IFNAMSIZ + 3]; /* -rx */ |
| 837 | char name_tx[IFNAMSIZ + 3]; /* -tx */ |
| 838 | char name_other[IFNAMSIZ + 6]; /* -other */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 839 | }; |
| 840 | |
| 841 | /* |
| 842 | * Maximum number of loops until we assume that a bit in the irq mask |
| 843 | * is stuck. Overridable with module param. |
| 844 | */ |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 845 | static int max_interrupt_work = 4; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 846 | |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 847 | /* |
| 848 | * Optimization can be either throuput mode or cpu mode |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 849 | * |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 850 | * Throughput Mode: Every tx and rx packet will generate an interrupt. |
| 851 | * CPU Mode: Interrupts are controlled by a timer. |
| 852 | */ |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 853 | enum { |
| 854 | NV_OPTIMIZATION_MODE_THROUGHPUT, |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 855 | NV_OPTIMIZATION_MODE_CPU, |
| 856 | NV_OPTIMIZATION_MODE_DYNAMIC |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 857 | }; |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 858 | static int optimization_mode = NV_OPTIMIZATION_MODE_DYNAMIC; |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 859 | |
| 860 | /* |
| 861 | * Poll interval for timer irq |
| 862 | * |
| 863 | * This interval determines how frequent an interrupt is generated. |
| 864 | * The is value is determined by [(time_in_micro_secs * 100) / (2^10)] |
| 865 | * Min = 0, and Max = 65535 |
| 866 | */ |
| 867 | static int poll_interval = -1; |
| 868 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 869 | /* |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 870 | * MSI interrupts |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 871 | */ |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 872 | enum { |
| 873 | NV_MSI_INT_DISABLED, |
| 874 | NV_MSI_INT_ENABLED |
| 875 | }; |
| 876 | static int msi = NV_MSI_INT_ENABLED; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 877 | |
| 878 | /* |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 879 | * MSIX interrupts |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 880 | */ |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 881 | enum { |
| 882 | NV_MSIX_INT_DISABLED, |
| 883 | NV_MSIX_INT_ENABLED |
| 884 | }; |
Yinghai Lu | 3948279 | 2009-02-06 01:31:12 -0800 | [diff] [blame] | 885 | static int msix = NV_MSIX_INT_ENABLED; |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 886 | |
| 887 | /* |
| 888 | * DMA 64bit |
| 889 | */ |
| 890 | enum { |
| 891 | NV_DMA_64BIT_DISABLED, |
| 892 | NV_DMA_64BIT_ENABLED |
| 893 | }; |
| 894 | static int dma_64bit = NV_DMA_64BIT_ENABLED; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 895 | |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 896 | /* |
| 897 | * Crossover Detection |
| 898 | * Realtek 8201 phy + some OEM boards do not work properly. |
| 899 | */ |
| 900 | enum { |
| 901 | NV_CROSSOVER_DETECTION_DISABLED, |
| 902 | NV_CROSSOVER_DETECTION_ENABLED |
| 903 | }; |
| 904 | static int phy_cross = NV_CROSSOVER_DETECTION_DISABLED; |
| 905 | |
Ed Swierk | 5a9a8e3 | 2009-06-02 00:19:52 -0700 | [diff] [blame] | 906 | /* |
| 907 | * Power down phy when interface is down (persists through reboot; |
| 908 | * older Linux and other OSes may not power it up again) |
| 909 | */ |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 910 | static int phy_power_down; |
Ed Swierk | 5a9a8e3 | 2009-06-02 00:19:52 -0700 | [diff] [blame] | 911 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 912 | static inline struct fe_priv *get_nvpriv(struct net_device *dev) |
| 913 | { |
| 914 | return netdev_priv(dev); |
| 915 | } |
| 916 | |
| 917 | static inline u8 __iomem *get_hwbase(struct net_device *dev) |
| 918 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 919 | return ((struct fe_priv *)netdev_priv(dev))->base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 920 | } |
| 921 | |
| 922 | static inline void pci_push(u8 __iomem *base) |
| 923 | { |
| 924 | /* force out pending posted writes */ |
| 925 | readl(base); |
| 926 | } |
| 927 | |
| 928 | static inline u32 nv_descr_getlength(struct ring_desc *prd, u32 v) |
| 929 | { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 930 | return le32_to_cpu(prd->flaglen) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 931 | & ((v == DESC_VER_1) ? LEN_MASK_V1 : LEN_MASK_V2); |
| 932 | } |
| 933 | |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 934 | static inline u32 nv_descr_getlength_ex(struct ring_desc_ex *prd, u32 v) |
| 935 | { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 936 | return le32_to_cpu(prd->flaglen) & LEN_MASK_V2; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 937 | } |
| 938 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 939 | static bool nv_optimized(struct fe_priv *np) |
| 940 | { |
| 941 | if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) |
| 942 | return false; |
| 943 | return true; |
| 944 | } |
| 945 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 946 | static int reg_delay(struct net_device *dev, int offset, u32 mask, u32 target, |
Joe Perches | 344d0dc | 2010-11-29 07:41:52 +0000 | [diff] [blame] | 947 | int delay, int delaymax) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 948 | { |
| 949 | u8 __iomem *base = get_hwbase(dev); |
| 950 | |
| 951 | pci_push(base); |
| 952 | do { |
| 953 | udelay(delay); |
| 954 | delaymax -= delay; |
Joe Perches | 344d0dc | 2010-11-29 07:41:52 +0000 | [diff] [blame] | 955 | if (delaymax < 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 956 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 957 | } while ((readl(base + offset) & mask) != target); |
| 958 | return 0; |
| 959 | } |
| 960 | |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 961 | #define NV_SETUP_RX_RING 0x01 |
| 962 | #define NV_SETUP_TX_RING 0x02 |
| 963 | |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 964 | static inline u32 dma_low(dma_addr_t addr) |
| 965 | { |
| 966 | return addr; |
| 967 | } |
| 968 | |
| 969 | static inline u32 dma_high(dma_addr_t addr) |
| 970 | { |
| 971 | return addr>>31>>1; /* 0 if 32bit, shift down by 32 if 64bit */ |
| 972 | } |
| 973 | |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 974 | static void setup_hw_rings(struct net_device *dev, int rxtx_flags) |
| 975 | { |
| 976 | struct fe_priv *np = get_nvpriv(dev); |
| 977 | u8 __iomem *base = get_hwbase(dev); |
| 978 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 979 | if (!nv_optimized(np)) { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 980 | if (rxtx_flags & NV_SETUP_RX_RING) |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 981 | writel(dma_low(np->ring_addr), base + NvRegRxRingPhysAddr); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 982 | if (rxtx_flags & NV_SETUP_TX_RING) |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 983 | writel(dma_low(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 984 | } else { |
| 985 | if (rxtx_flags & NV_SETUP_RX_RING) { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 986 | writel(dma_low(np->ring_addr), base + NvRegRxRingPhysAddr); |
| 987 | writel(dma_high(np->ring_addr), base + NvRegRxRingPhysAddrHigh); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 988 | } |
| 989 | if (rxtx_flags & NV_SETUP_TX_RING) { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 990 | writel(dma_low(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr); |
| 991 | writel(dma_high(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddrHigh); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 992 | } |
| 993 | } |
| 994 | } |
| 995 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 996 | static void free_rings(struct net_device *dev) |
| 997 | { |
| 998 | struct fe_priv *np = get_nvpriv(dev); |
| 999 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1000 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1001 | if (np->rx_ring.orig) |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 1002 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size), |
| 1003 | np->rx_ring.orig, np->ring_addr); |
| 1004 | } else { |
| 1005 | if (np->rx_ring.ex) |
| 1006 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (np->rx_ring_size + np->tx_ring_size), |
| 1007 | np->rx_ring.ex, np->ring_addr); |
| 1008 | } |
Szymon Janc | 9b03b06 | 2010-11-27 08:39:44 +0000 | [diff] [blame] | 1009 | kfree(np->rx_skb); |
| 1010 | kfree(np->tx_skb); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 1011 | } |
| 1012 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1013 | static int using_multi_irqs(struct net_device *dev) |
| 1014 | { |
| 1015 | struct fe_priv *np = get_nvpriv(dev); |
| 1016 | |
| 1017 | if (!(np->msi_flags & NV_MSI_X_ENABLED) || |
| 1018 | ((np->msi_flags & NV_MSI_X_ENABLED) && |
| 1019 | ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1))) |
| 1020 | return 0; |
| 1021 | else |
| 1022 | return 1; |
| 1023 | } |
| 1024 | |
Ayaz Abdulla | 88d7d8b | 2009-05-01 01:41:50 +0000 | [diff] [blame] | 1025 | static void nv_txrx_gate(struct net_device *dev, bool gate) |
| 1026 | { |
| 1027 | struct fe_priv *np = get_nvpriv(dev); |
| 1028 | u8 __iomem *base = get_hwbase(dev); |
| 1029 | u32 powerstate; |
| 1030 | |
| 1031 | if (!np->mac_in_use && |
| 1032 | (np->driver_data & DEV_HAS_POWER_CNTRL)) { |
| 1033 | powerstate = readl(base + NvRegPowerState2); |
| 1034 | if (gate) |
| 1035 | powerstate |= NVREG_POWERSTATE2_GATE_CLOCKS; |
| 1036 | else |
| 1037 | powerstate &= ~NVREG_POWERSTATE2_GATE_CLOCKS; |
| 1038 | writel(powerstate, base + NvRegPowerState2); |
| 1039 | } |
| 1040 | } |
| 1041 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1042 | static void nv_enable_irq(struct net_device *dev) |
| 1043 | { |
| 1044 | struct fe_priv *np = get_nvpriv(dev); |
| 1045 | |
| 1046 | if (!using_multi_irqs(dev)) { |
| 1047 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 1048 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
| 1049 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 1050 | enable_irq(np->pci_dev->irq); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1051 | } else { |
| 1052 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
| 1053 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector); |
| 1054 | enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector); |
| 1055 | } |
| 1056 | } |
| 1057 | |
| 1058 | static void nv_disable_irq(struct net_device *dev) |
| 1059 | { |
| 1060 | struct fe_priv *np = get_nvpriv(dev); |
| 1061 | |
| 1062 | if (!using_multi_irqs(dev)) { |
| 1063 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 1064 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
| 1065 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 1066 | disable_irq(np->pci_dev->irq); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 1067 | } else { |
| 1068 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
| 1069 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector); |
| 1070 | disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector); |
| 1071 | } |
| 1072 | } |
| 1073 | |
| 1074 | /* In MSIX mode, a write to irqmask behaves as XOR */ |
| 1075 | static void nv_enable_hw_interrupts(struct net_device *dev, u32 mask) |
| 1076 | { |
| 1077 | u8 __iomem *base = get_hwbase(dev); |
| 1078 | |
| 1079 | writel(mask, base + NvRegIrqMask); |
| 1080 | } |
| 1081 | |
| 1082 | static void nv_disable_hw_interrupts(struct net_device *dev, u32 mask) |
| 1083 | { |
| 1084 | struct fe_priv *np = get_nvpriv(dev); |
| 1085 | u8 __iomem *base = get_hwbase(dev); |
| 1086 | |
| 1087 | if (np->msi_flags & NV_MSI_X_ENABLED) { |
| 1088 | writel(mask, base + NvRegIrqMask); |
| 1089 | } else { |
| 1090 | if (np->msi_flags & NV_MSI_ENABLED) |
| 1091 | writel(0, base + NvRegMSIIrqMask); |
| 1092 | writel(0, base + NvRegIrqMask); |
| 1093 | } |
| 1094 | } |
| 1095 | |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 1096 | static void nv_napi_enable(struct net_device *dev) |
| 1097 | { |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 1098 | struct fe_priv *np = get_nvpriv(dev); |
| 1099 | |
| 1100 | napi_enable(&np->napi); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 1101 | } |
| 1102 | |
| 1103 | static void nv_napi_disable(struct net_device *dev) |
| 1104 | { |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 1105 | struct fe_priv *np = get_nvpriv(dev); |
| 1106 | |
| 1107 | napi_disable(&np->napi); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 1108 | } |
| 1109 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1110 | #define MII_READ (-1) |
| 1111 | /* mii_rw: read/write a register on the PHY. |
| 1112 | * |
| 1113 | * Caller must guarantee serialization |
| 1114 | */ |
| 1115 | static int mii_rw(struct net_device *dev, int addr, int miireg, int value) |
| 1116 | { |
| 1117 | u8 __iomem *base = get_hwbase(dev); |
| 1118 | u32 reg; |
| 1119 | int retval; |
| 1120 | |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 1121 | writel(NVREG_MIISTAT_MASK_RW, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1122 | |
| 1123 | reg = readl(base + NvRegMIIControl); |
| 1124 | if (reg & NVREG_MIICTL_INUSE) { |
| 1125 | writel(NVREG_MIICTL_INUSE, base + NvRegMIIControl); |
| 1126 | udelay(NV_MIIBUSY_DELAY); |
| 1127 | } |
| 1128 | |
| 1129 | reg = (addr << NVREG_MIICTL_ADDRSHIFT) | miireg; |
| 1130 | if (value != MII_READ) { |
| 1131 | writel(value, base + NvRegMIIData); |
| 1132 | reg |= NVREG_MIICTL_WRITE; |
| 1133 | } |
| 1134 | writel(reg, base + NvRegMIIControl); |
| 1135 | |
| 1136 | if (reg_delay(dev, NvRegMIIControl, NVREG_MIICTL_INUSE, 0, |
Joe Perches | 344d0dc | 2010-11-29 07:41:52 +0000 | [diff] [blame] | 1137 | NV_MIIPHY_DELAY, NV_MIIPHY_DELAYMAX)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1138 | retval = -1; |
| 1139 | } else if (value != MII_READ) { |
| 1140 | /* it was a write operation - fewer failures are detectable */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1141 | retval = 0; |
| 1142 | } else if (readl(base + NvRegMIIStatus) & NVREG_MIISTAT_ERROR) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1143 | retval = -1; |
| 1144 | } else { |
| 1145 | retval = readl(base + NvRegMIIData); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1146 | } |
| 1147 | |
| 1148 | return retval; |
| 1149 | } |
| 1150 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1151 | static int phy_reset(struct net_device *dev, u32 bmcr_setup) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1152 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1153 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1154 | u32 miicontrol; |
| 1155 | unsigned int tries = 0; |
| 1156 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1157 | miicontrol = BMCR_RESET | bmcr_setup; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 1158 | if (mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1159 | return -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1160 | |
| 1161 | /* wait for 500ms */ |
| 1162 | msleep(500); |
| 1163 | |
| 1164 | /* must wait till reset is deasserted */ |
| 1165 | while (miicontrol & BMCR_RESET) { |
Szymon Janc | de855b9 | 2010-11-27 08:39:48 +0000 | [diff] [blame] | 1166 | usleep_range(10000, 20000); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1167 | miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
| 1168 | /* FIXME: 100 tries seem excessive */ |
| 1169 | if (tries++ > 100) |
| 1170 | return -1; |
| 1171 | } |
| 1172 | return 0; |
| 1173 | } |
| 1174 | |
Joe Perches | c41d41e | 2010-11-29 07:41:58 +0000 | [diff] [blame] | 1175 | static int init_realtek_8211b(struct net_device *dev, struct fe_priv *np) |
| 1176 | { |
| 1177 | static const struct { |
| 1178 | int reg; |
| 1179 | int init; |
| 1180 | } ri[] = { |
| 1181 | { PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1 }, |
| 1182 | { PHY_REALTEK_INIT_REG2, PHY_REALTEK_INIT2 }, |
| 1183 | { PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3 }, |
| 1184 | { PHY_REALTEK_INIT_REG3, PHY_REALTEK_INIT4 }, |
| 1185 | { PHY_REALTEK_INIT_REG4, PHY_REALTEK_INIT5 }, |
| 1186 | { PHY_REALTEK_INIT_REG5, PHY_REALTEK_INIT6 }, |
| 1187 | { PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1 }, |
| 1188 | }; |
| 1189 | int i; |
| 1190 | |
| 1191 | for (i = 0; i < ARRAY_SIZE(ri); i++) { |
Joe Perches | cd66328 | 2010-11-29 07:41:59 +0000 | [diff] [blame] | 1192 | if (mii_rw(dev, np->phyaddr, ri[i].reg, ri[i].init)) |
Joe Perches | c41d41e | 2010-11-29 07:41:58 +0000 | [diff] [blame] | 1193 | return PHY_ERROR; |
Joe Perches | c41d41e | 2010-11-29 07:41:58 +0000 | [diff] [blame] | 1194 | } |
| 1195 | |
| 1196 | return 0; |
| 1197 | } |
| 1198 | |
Joe Perches | cd66328 | 2010-11-29 07:41:59 +0000 | [diff] [blame] | 1199 | static int init_realtek_8211c(struct net_device *dev, struct fe_priv *np) |
| 1200 | { |
| 1201 | u32 reg; |
| 1202 | u8 __iomem *base = get_hwbase(dev); |
| 1203 | u32 powerstate = readl(base + NvRegPowerState2); |
| 1204 | |
| 1205 | /* need to perform hw phy reset */ |
| 1206 | powerstate |= NVREG_POWERSTATE2_PHY_RESET; |
| 1207 | writel(powerstate, base + NvRegPowerState2); |
| 1208 | msleep(25); |
| 1209 | |
| 1210 | powerstate &= ~NVREG_POWERSTATE2_PHY_RESET; |
| 1211 | writel(powerstate, base + NvRegPowerState2); |
| 1212 | msleep(25); |
| 1213 | |
| 1214 | reg = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, MII_READ); |
| 1215 | reg |= PHY_REALTEK_INIT9; |
| 1216 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, reg)) |
| 1217 | return PHY_ERROR; |
| 1218 | if (mii_rw(dev, np->phyaddr, |
| 1219 | PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT10)) |
| 1220 | return PHY_ERROR; |
| 1221 | reg = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG7, MII_READ); |
| 1222 | if (!(reg & PHY_REALTEK_INIT11)) { |
| 1223 | reg |= PHY_REALTEK_INIT11; |
| 1224 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG7, reg)) |
| 1225 | return PHY_ERROR; |
| 1226 | } |
| 1227 | if (mii_rw(dev, np->phyaddr, |
| 1228 | PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) |
| 1229 | return PHY_ERROR; |
| 1230 | |
| 1231 | return 0; |
| 1232 | } |
| 1233 | |
| 1234 | static int init_realtek_8201(struct net_device *dev, struct fe_priv *np) |
| 1235 | { |
| 1236 | u32 phy_reserved; |
| 1237 | |
| 1238 | if (np->driver_data & DEV_NEED_PHY_INIT_FIX) { |
| 1239 | phy_reserved = mii_rw(dev, np->phyaddr, |
| 1240 | PHY_REALTEK_INIT_REG6, MII_READ); |
| 1241 | phy_reserved |= PHY_REALTEK_INIT7; |
| 1242 | if (mii_rw(dev, np->phyaddr, |
| 1243 | PHY_REALTEK_INIT_REG6, phy_reserved)) |
| 1244 | return PHY_ERROR; |
| 1245 | } |
| 1246 | |
| 1247 | return 0; |
| 1248 | } |
| 1249 | |
| 1250 | static int init_realtek_8201_cross(struct net_device *dev, struct fe_priv *np) |
| 1251 | { |
| 1252 | u32 phy_reserved; |
| 1253 | |
| 1254 | if (phy_cross == NV_CROSSOVER_DETECTION_DISABLED) { |
| 1255 | if (mii_rw(dev, np->phyaddr, |
| 1256 | PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) |
| 1257 | return PHY_ERROR; |
| 1258 | phy_reserved = mii_rw(dev, np->phyaddr, |
| 1259 | PHY_REALTEK_INIT_REG2, MII_READ); |
| 1260 | phy_reserved &= ~PHY_REALTEK_INIT_MSK1; |
| 1261 | phy_reserved |= PHY_REALTEK_INIT3; |
| 1262 | if (mii_rw(dev, np->phyaddr, |
| 1263 | PHY_REALTEK_INIT_REG2, phy_reserved)) |
| 1264 | return PHY_ERROR; |
| 1265 | if (mii_rw(dev, np->phyaddr, |
| 1266 | PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) |
| 1267 | return PHY_ERROR; |
| 1268 | } |
| 1269 | |
| 1270 | return 0; |
| 1271 | } |
| 1272 | |
| 1273 | static int init_cicada(struct net_device *dev, struct fe_priv *np, |
| 1274 | u32 phyinterface) |
| 1275 | { |
| 1276 | u32 phy_reserved; |
| 1277 | |
| 1278 | if (phyinterface & PHY_RGMII) { |
| 1279 | phy_reserved = mii_rw(dev, np->phyaddr, MII_RESV1, MII_READ); |
| 1280 | phy_reserved &= ~(PHY_CICADA_INIT1 | PHY_CICADA_INIT2); |
| 1281 | phy_reserved |= (PHY_CICADA_INIT3 | PHY_CICADA_INIT4); |
| 1282 | if (mii_rw(dev, np->phyaddr, MII_RESV1, phy_reserved)) |
| 1283 | return PHY_ERROR; |
| 1284 | phy_reserved = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ); |
| 1285 | phy_reserved |= PHY_CICADA_INIT5; |
| 1286 | if (mii_rw(dev, np->phyaddr, MII_NCONFIG, phy_reserved)) |
| 1287 | return PHY_ERROR; |
| 1288 | } |
| 1289 | phy_reserved = mii_rw(dev, np->phyaddr, MII_SREVISION, MII_READ); |
| 1290 | phy_reserved |= PHY_CICADA_INIT6; |
| 1291 | if (mii_rw(dev, np->phyaddr, MII_SREVISION, phy_reserved)) |
| 1292 | return PHY_ERROR; |
| 1293 | |
| 1294 | return 0; |
| 1295 | } |
| 1296 | |
| 1297 | static int init_vitesse(struct net_device *dev, struct fe_priv *np) |
| 1298 | { |
| 1299 | u32 phy_reserved; |
| 1300 | |
| 1301 | if (mii_rw(dev, np->phyaddr, |
| 1302 | PHY_VITESSE_INIT_REG1, PHY_VITESSE_INIT1)) |
| 1303 | return PHY_ERROR; |
| 1304 | if (mii_rw(dev, np->phyaddr, |
| 1305 | PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT2)) |
| 1306 | return PHY_ERROR; |
| 1307 | phy_reserved = mii_rw(dev, np->phyaddr, |
| 1308 | PHY_VITESSE_INIT_REG4, MII_READ); |
| 1309 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) |
| 1310 | return PHY_ERROR; |
| 1311 | phy_reserved = mii_rw(dev, np->phyaddr, |
| 1312 | PHY_VITESSE_INIT_REG3, MII_READ); |
| 1313 | phy_reserved &= ~PHY_VITESSE_INIT_MSK1; |
| 1314 | phy_reserved |= PHY_VITESSE_INIT3; |
| 1315 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) |
| 1316 | return PHY_ERROR; |
| 1317 | if (mii_rw(dev, np->phyaddr, |
| 1318 | PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT4)) |
| 1319 | return PHY_ERROR; |
| 1320 | if (mii_rw(dev, np->phyaddr, |
| 1321 | PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT5)) |
| 1322 | return PHY_ERROR; |
| 1323 | phy_reserved = mii_rw(dev, np->phyaddr, |
| 1324 | PHY_VITESSE_INIT_REG4, MII_READ); |
| 1325 | phy_reserved &= ~PHY_VITESSE_INIT_MSK1; |
| 1326 | phy_reserved |= PHY_VITESSE_INIT3; |
| 1327 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) |
| 1328 | return PHY_ERROR; |
| 1329 | phy_reserved = mii_rw(dev, np->phyaddr, |
| 1330 | PHY_VITESSE_INIT_REG3, MII_READ); |
| 1331 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) |
| 1332 | return PHY_ERROR; |
| 1333 | if (mii_rw(dev, np->phyaddr, |
| 1334 | PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT6)) |
| 1335 | return PHY_ERROR; |
| 1336 | if (mii_rw(dev, np->phyaddr, |
| 1337 | PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT7)) |
| 1338 | return PHY_ERROR; |
| 1339 | phy_reserved = mii_rw(dev, np->phyaddr, |
| 1340 | PHY_VITESSE_INIT_REG4, MII_READ); |
| 1341 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) |
| 1342 | return PHY_ERROR; |
| 1343 | phy_reserved = mii_rw(dev, np->phyaddr, |
| 1344 | PHY_VITESSE_INIT_REG3, MII_READ); |
| 1345 | phy_reserved &= ~PHY_VITESSE_INIT_MSK2; |
| 1346 | phy_reserved |= PHY_VITESSE_INIT8; |
| 1347 | if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) |
| 1348 | return PHY_ERROR; |
| 1349 | if (mii_rw(dev, np->phyaddr, |
| 1350 | PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT9)) |
| 1351 | return PHY_ERROR; |
| 1352 | if (mii_rw(dev, np->phyaddr, |
| 1353 | PHY_VITESSE_INIT_REG1, PHY_VITESSE_INIT10)) |
| 1354 | return PHY_ERROR; |
| 1355 | |
| 1356 | return 0; |
| 1357 | } |
| 1358 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1359 | static int phy_init(struct net_device *dev) |
| 1360 | { |
| 1361 | struct fe_priv *np = get_nvpriv(dev); |
| 1362 | u8 __iomem *base = get_hwbase(dev); |
Joe Perches | cd66328 | 2010-11-29 07:41:59 +0000 | [diff] [blame] | 1363 | u32 phyinterface; |
| 1364 | u32 mii_status, mii_control, mii_control_1000, reg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1365 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1366 | /* phy errata for E3016 phy */ |
| 1367 | if (np->phy_model == PHY_MODEL_MARVELL_E3016) { |
| 1368 | reg = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ); |
| 1369 | reg &= ~PHY_MARVELL_E3016_INITMASK; |
| 1370 | if (mii_rw(dev, np->phyaddr, MII_NCONFIG, reg)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 1371 | netdev_info(dev, "%s: phy write to errata reg failed\n", |
| 1372 | pci_name(np->pci_dev)); |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1373 | return PHY_ERROR; |
| 1374 | } |
| 1375 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1376 | if (np->phy_oui == PHY_OUI_REALTEK) { |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 1377 | if (np->phy_model == PHY_MODEL_REALTEK_8211 && |
| 1378 | np->phy_rev == PHY_REV_REALTEK_8211B) { |
Joe Perches | cd66328 | 2010-11-29 07:41:59 +0000 | [diff] [blame] | 1379 | if (init_realtek_8211b(dev, np)) { |
| 1380 | netdev_info(dev, "%s: phy init failed\n", |
| 1381 | pci_name(np->pci_dev)); |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 1382 | return PHY_ERROR; |
Joe Perches | cd66328 | 2010-11-29 07:41:59 +0000 | [diff] [blame] | 1383 | } |
Joe Perches | c41d41e | 2010-11-29 07:41:58 +0000 | [diff] [blame] | 1384 | } else if (np->phy_model == PHY_MODEL_REALTEK_8211 && |
| 1385 | np->phy_rev == PHY_REV_REALTEK_8211C) { |
Joe Perches | cd66328 | 2010-11-29 07:41:59 +0000 | [diff] [blame] | 1386 | if (init_realtek_8211c(dev, np)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 1387 | netdev_info(dev, "%s: phy init failed\n", |
| 1388 | pci_name(np->pci_dev)); |
Ayaz Abdulla | 22ae03a | 2008-07-25 15:31:29 -0400 | [diff] [blame] | 1389 | return PHY_ERROR; |
| 1390 | } |
Joe Perches | cd66328 | 2010-11-29 07:41:59 +0000 | [diff] [blame] | 1391 | } else if (np->phy_model == PHY_MODEL_REALTEK_8201) { |
| 1392 | if (init_realtek_8201(dev, np)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 1393 | netdev_info(dev, "%s: phy init failed\n", |
| 1394 | pci_name(np->pci_dev)); |
Ayaz Abdulla | 22ae03a | 2008-07-25 15:31:29 -0400 | [diff] [blame] | 1395 | return PHY_ERROR; |
| 1396 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1397 | } |
| 1398 | } |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1399 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1400 | /* set advertise register */ |
| 1401 | reg = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
Joe Perches | cd66328 | 2010-11-29 07:41:59 +0000 | [diff] [blame] | 1402 | reg |= (ADVERTISE_10HALF | ADVERTISE_10FULL | |
| 1403 | ADVERTISE_100HALF | ADVERTISE_100FULL | |
| 1404 | ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1405 | if (mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 1406 | netdev_info(dev, "%s: phy write to advertise failed\n", |
| 1407 | pci_name(np->pci_dev)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1408 | return PHY_ERROR; |
| 1409 | } |
| 1410 | |
| 1411 | /* get phy interface type */ |
| 1412 | phyinterface = readl(base + NvRegPhyInterface); |
| 1413 | |
| 1414 | /* see if gigabit phy */ |
| 1415 | mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 1416 | if (mii_status & PHY_GIGABIT) { |
| 1417 | np->gigabit = PHY_GIGABIT; |
Joe Perches | cd66328 | 2010-11-29 07:41:59 +0000 | [diff] [blame] | 1418 | mii_control_1000 = mii_rw(dev, np->phyaddr, |
| 1419 | MII_CTRL1000, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1420 | mii_control_1000 &= ~ADVERTISE_1000HALF; |
| 1421 | if (phyinterface & PHY_RGMII) |
| 1422 | mii_control_1000 |= ADVERTISE_1000FULL; |
| 1423 | else |
| 1424 | mii_control_1000 &= ~ADVERTISE_1000FULL; |
| 1425 | |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 1426 | if (mii_rw(dev, np->phyaddr, MII_CTRL1000, mii_control_1000)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 1427 | netdev_info(dev, "%s: phy init failed\n", |
| 1428 | pci_name(np->pci_dev)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1429 | return PHY_ERROR; |
| 1430 | } |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 1431 | } else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1432 | np->gigabit = 0; |
| 1433 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 1434 | mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
| 1435 | mii_control |= BMCR_ANENABLE; |
| 1436 | |
Ayaz Abdulla | 22ae03a | 2008-07-25 15:31:29 -0400 | [diff] [blame] | 1437 | if (np->phy_oui == PHY_OUI_REALTEK && |
| 1438 | np->phy_model == PHY_MODEL_REALTEK_8211 && |
| 1439 | np->phy_rev == PHY_REV_REALTEK_8211C) { |
| 1440 | /* start autoneg since we already performed hw reset above */ |
| 1441 | mii_control |= BMCR_ANRESTART; |
| 1442 | if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 1443 | netdev_info(dev, "%s: phy init failed\n", |
| 1444 | pci_name(np->pci_dev)); |
Ayaz Abdulla | 22ae03a | 2008-07-25 15:31:29 -0400 | [diff] [blame] | 1445 | return PHY_ERROR; |
| 1446 | } |
| 1447 | } else { |
| 1448 | /* reset the phy |
| 1449 | * (certain phys need bmcr to be setup with reset) |
| 1450 | */ |
| 1451 | if (phy_reset(dev, mii_control)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 1452 | netdev_info(dev, "%s: phy reset failed\n", |
| 1453 | pci_name(np->pci_dev)); |
Ayaz Abdulla | 22ae03a | 2008-07-25 15:31:29 -0400 | [diff] [blame] | 1454 | return PHY_ERROR; |
| 1455 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1456 | } |
| 1457 | |
| 1458 | /* phy vendor specific configuration */ |
Joe Perches | cd66328 | 2010-11-29 07:41:59 +0000 | [diff] [blame] | 1459 | if ((np->phy_oui == PHY_OUI_CICADA)) { |
| 1460 | if (init_cicada(dev, np, phyinterface)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 1461 | netdev_info(dev, "%s: phy init failed\n", |
| 1462 | pci_name(np->pci_dev)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1463 | return PHY_ERROR; |
| 1464 | } |
Joe Perches | cd66328 | 2010-11-29 07:41:59 +0000 | [diff] [blame] | 1465 | } else if (np->phy_oui == PHY_OUI_VITESSE) { |
| 1466 | if (init_vitesse(dev, np)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 1467 | netdev_info(dev, "%s: phy init failed\n", |
| 1468 | pci_name(np->pci_dev)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1469 | return PHY_ERROR; |
| 1470 | } |
Joe Perches | cd66328 | 2010-11-29 07:41:59 +0000 | [diff] [blame] | 1471 | } else if (np->phy_oui == PHY_OUI_REALTEK) { |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 1472 | if (np->phy_model == PHY_MODEL_REALTEK_8211 && |
| 1473 | np->phy_rev == PHY_REV_REALTEK_8211B) { |
| 1474 | /* reset could have cleared these out, set them back */ |
Joe Perches | cd66328 | 2010-11-29 07:41:59 +0000 | [diff] [blame] | 1475 | if (init_realtek_8211b(dev, np)) { |
| 1476 | netdev_info(dev, "%s: phy init failed\n", |
| 1477 | pci_name(np->pci_dev)); |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 1478 | return PHY_ERROR; |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 1479 | } |
Joe Perches | cd66328 | 2010-11-29 07:41:59 +0000 | [diff] [blame] | 1480 | } else if (np->phy_model == PHY_MODEL_REALTEK_8201) { |
| 1481 | if (init_realtek_8201(dev, np) || |
| 1482 | init_realtek_8201_cross(dev, np)) { |
| 1483 | netdev_info(dev, "%s: phy init failed\n", |
| 1484 | pci_name(np->pci_dev)); |
| 1485 | return PHY_ERROR; |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 1486 | } |
Ayaz Abdulla | c5e3ae8 | 2007-07-15 06:51:03 -0400 | [diff] [blame] | 1487 | } |
| 1488 | } |
| 1489 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1490 | /* some phys clear out pause advertisement on reset, set it back */ |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 1491 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1492 | |
Ed Swierk | cb52deb | 2008-12-01 12:24:43 +0000 | [diff] [blame] | 1493 | /* restart auto negotiation, power down phy */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1494 | mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
Ed Swierk | 5a9a8e3 | 2009-06-02 00:19:52 -0700 | [diff] [blame] | 1495 | mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 1496 | if (phy_power_down) |
Ed Swierk | 5a9a8e3 | 2009-06-02 00:19:52 -0700 | [diff] [blame] | 1497 | mii_control |= BMCR_PDOWN; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 1498 | if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1499 | return PHY_ERROR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1500 | |
| 1501 | return 0; |
| 1502 | } |
| 1503 | |
| 1504 | static void nv_start_rx(struct net_device *dev) |
| 1505 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1506 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1507 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1508 | u32 rx_ctrl = readl(base + NvRegReceiverControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1509 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1510 | /* Already running? Stop it. */ |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1511 | if ((readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) && !np->mac_in_use) { |
| 1512 | rx_ctrl &= ~NVREG_RCVCTL_START; |
| 1513 | writel(rx_ctrl, base + NvRegReceiverControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1514 | pci_push(base); |
| 1515 | } |
| 1516 | writel(np->linkspeed, base + NvRegLinkSpeed); |
| 1517 | pci_push(base); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 1518 | rx_ctrl |= NVREG_RCVCTL_START; |
| 1519 | if (np->mac_in_use) |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1520 | rx_ctrl &= ~NVREG_RCVCTL_RX_PATH_EN; |
| 1521 | writel(rx_ctrl, base + NvRegReceiverControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1522 | pci_push(base); |
| 1523 | } |
| 1524 | |
| 1525 | static void nv_stop_rx(struct net_device *dev) |
| 1526 | { |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1527 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1528 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1529 | u32 rx_ctrl = readl(base + NvRegReceiverControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1530 | |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1531 | if (!np->mac_in_use) |
| 1532 | rx_ctrl &= ~NVREG_RCVCTL_START; |
| 1533 | else |
| 1534 | rx_ctrl |= NVREG_RCVCTL_RX_PATH_EN; |
| 1535 | writel(rx_ctrl, base + NvRegReceiverControl); |
Joe Perches | 344d0dc | 2010-11-29 07:41:52 +0000 | [diff] [blame] | 1536 | if (reg_delay(dev, NvRegReceiverStatus, NVREG_RCVSTAT_BUSY, 0, |
| 1537 | NV_RXSTOP_DELAY1, NV_RXSTOP_DELAY1MAX)) |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 1538 | netdev_info(dev, "%s: ReceiverStatus remained busy\n", |
| 1539 | __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1540 | |
| 1541 | udelay(NV_RXSTOP_DELAY2); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1542 | if (!np->mac_in_use) |
| 1543 | writel(0, base + NvRegLinkSpeed); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1544 | } |
| 1545 | |
| 1546 | static void nv_start_tx(struct net_device *dev) |
| 1547 | { |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1548 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1549 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1550 | u32 tx_ctrl = readl(base + NvRegTransmitterControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1551 | |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1552 | tx_ctrl |= NVREG_XMITCTL_START; |
| 1553 | if (np->mac_in_use) |
| 1554 | tx_ctrl &= ~NVREG_XMITCTL_TX_PATH_EN; |
| 1555 | writel(tx_ctrl, base + NvRegTransmitterControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1556 | pci_push(base); |
| 1557 | } |
| 1558 | |
| 1559 | static void nv_stop_tx(struct net_device *dev) |
| 1560 | { |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1561 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1562 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1563 | u32 tx_ctrl = readl(base + NvRegTransmitterControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1564 | |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1565 | if (!np->mac_in_use) |
| 1566 | tx_ctrl &= ~NVREG_XMITCTL_START; |
| 1567 | else |
| 1568 | tx_ctrl |= NVREG_XMITCTL_TX_PATH_EN; |
| 1569 | writel(tx_ctrl, base + NvRegTransmitterControl); |
Joe Perches | 344d0dc | 2010-11-29 07:41:52 +0000 | [diff] [blame] | 1570 | if (reg_delay(dev, NvRegTransmitterStatus, NVREG_XMITSTAT_BUSY, 0, |
| 1571 | NV_TXSTOP_DELAY1, NV_TXSTOP_DELAY1MAX)) |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 1572 | netdev_info(dev, "%s: TransmitterStatus remained busy\n", |
| 1573 | __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1574 | |
| 1575 | udelay(NV_TXSTOP_DELAY2); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 1576 | if (!np->mac_in_use) |
| 1577 | writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV, |
| 1578 | base + NvRegTransmitPoll); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1579 | } |
| 1580 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1581 | static void nv_start_rxtx(struct net_device *dev) |
| 1582 | { |
| 1583 | nv_start_rx(dev); |
| 1584 | nv_start_tx(dev); |
| 1585 | } |
| 1586 | |
| 1587 | static void nv_stop_rxtx(struct net_device *dev) |
| 1588 | { |
| 1589 | nv_stop_rx(dev); |
| 1590 | nv_stop_tx(dev); |
| 1591 | } |
| 1592 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1593 | static void nv_txrx_reset(struct net_device *dev) |
| 1594 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1595 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1596 | u8 __iomem *base = get_hwbase(dev); |
| 1597 | |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 1598 | writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1599 | pci_push(base); |
| 1600 | udelay(NV_TXRX_RESET_DELAY); |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 1601 | writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1602 | pci_push(base); |
| 1603 | } |
| 1604 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1605 | static void nv_mac_reset(struct net_device *dev) |
| 1606 | { |
| 1607 | struct fe_priv *np = netdev_priv(dev); |
| 1608 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | 4e84f9b | 2008-02-04 15:14:09 -0500 | [diff] [blame] | 1609 | u32 temp1, temp2, temp3; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1610 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1611 | writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); |
| 1612 | pci_push(base); |
Ayaz Abdulla | 4e84f9b | 2008-02-04 15:14:09 -0500 | [diff] [blame] | 1613 | |
| 1614 | /* save registers since they will be cleared on reset */ |
| 1615 | temp1 = readl(base + NvRegMacAddrA); |
| 1616 | temp2 = readl(base + NvRegMacAddrB); |
| 1617 | temp3 = readl(base + NvRegTransmitPoll); |
| 1618 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1619 | writel(NVREG_MAC_RESET_ASSERT, base + NvRegMacReset); |
| 1620 | pci_push(base); |
| 1621 | udelay(NV_MAC_RESET_DELAY); |
| 1622 | writel(0, base + NvRegMacReset); |
| 1623 | pci_push(base); |
| 1624 | udelay(NV_MAC_RESET_DELAY); |
Ayaz Abdulla | 4e84f9b | 2008-02-04 15:14:09 -0500 | [diff] [blame] | 1625 | |
| 1626 | /* restore saved registers */ |
| 1627 | writel(temp1, base + NvRegMacAddrA); |
| 1628 | writel(temp2, base + NvRegMacAddrB); |
| 1629 | writel(temp3, base + NvRegTransmitPoll); |
| 1630 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 1631 | writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl); |
| 1632 | pci_push(base); |
| 1633 | } |
| 1634 | |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 1635 | static void nv_get_hw_stats(struct net_device *dev) |
| 1636 | { |
| 1637 | struct fe_priv *np = netdev_priv(dev); |
| 1638 | u8 __iomem *base = get_hwbase(dev); |
| 1639 | |
| 1640 | np->estats.tx_bytes += readl(base + NvRegTxCnt); |
| 1641 | np->estats.tx_zero_rexmt += readl(base + NvRegTxZeroReXmt); |
| 1642 | np->estats.tx_one_rexmt += readl(base + NvRegTxOneReXmt); |
| 1643 | np->estats.tx_many_rexmt += readl(base + NvRegTxManyReXmt); |
| 1644 | np->estats.tx_late_collision += readl(base + NvRegTxLateCol); |
| 1645 | np->estats.tx_fifo_errors += readl(base + NvRegTxUnderflow); |
| 1646 | np->estats.tx_carrier_errors += readl(base + NvRegTxLossCarrier); |
| 1647 | np->estats.tx_excess_deferral += readl(base + NvRegTxExcessDef); |
| 1648 | np->estats.tx_retry_error += readl(base + NvRegTxRetryErr); |
| 1649 | np->estats.rx_frame_error += readl(base + NvRegRxFrameErr); |
| 1650 | np->estats.rx_extra_byte += readl(base + NvRegRxExtraByte); |
| 1651 | np->estats.rx_late_collision += readl(base + NvRegRxLateCol); |
| 1652 | np->estats.rx_runt += readl(base + NvRegRxRunt); |
| 1653 | np->estats.rx_frame_too_long += readl(base + NvRegRxFrameTooLong); |
| 1654 | np->estats.rx_over_errors += readl(base + NvRegRxOverflow); |
| 1655 | np->estats.rx_crc_errors += readl(base + NvRegRxFCSErr); |
| 1656 | np->estats.rx_frame_align_error += readl(base + NvRegRxFrameAlignErr); |
| 1657 | np->estats.rx_length_error += readl(base + NvRegRxLenErr); |
| 1658 | np->estats.rx_unicast += readl(base + NvRegRxUnicast); |
| 1659 | np->estats.rx_multicast += readl(base + NvRegRxMulticast); |
| 1660 | np->estats.rx_broadcast += readl(base + NvRegRxBroadcast); |
| 1661 | np->estats.rx_packets = |
| 1662 | np->estats.rx_unicast + |
| 1663 | np->estats.rx_multicast + |
| 1664 | np->estats.rx_broadcast; |
| 1665 | np->estats.rx_errors_total = |
| 1666 | np->estats.rx_crc_errors + |
| 1667 | np->estats.rx_over_errors + |
| 1668 | np->estats.rx_frame_error + |
| 1669 | (np->estats.rx_frame_align_error - np->estats.rx_extra_byte) + |
| 1670 | np->estats.rx_late_collision + |
| 1671 | np->estats.rx_runt + |
| 1672 | np->estats.rx_frame_too_long; |
| 1673 | np->estats.tx_errors_total = |
| 1674 | np->estats.tx_late_collision + |
| 1675 | np->estats.tx_fifo_errors + |
| 1676 | np->estats.tx_carrier_errors + |
| 1677 | np->estats.tx_excess_deferral + |
| 1678 | np->estats.tx_retry_error; |
| 1679 | |
| 1680 | if (np->driver_data & DEV_HAS_STATISTICS_V2) { |
| 1681 | np->estats.tx_deferral += readl(base + NvRegTxDef); |
| 1682 | np->estats.tx_packets += readl(base + NvRegTxFrame); |
| 1683 | np->estats.rx_bytes += readl(base + NvRegRxCnt); |
| 1684 | np->estats.tx_pause += readl(base + NvRegTxPause); |
| 1685 | np->estats.rx_pause += readl(base + NvRegRxPause); |
| 1686 | np->estats.rx_drop_frame += readl(base + NvRegRxDropFrame); |
| 1687 | } |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 1688 | |
| 1689 | if (np->driver_data & DEV_HAS_STATISTICS_V3) { |
| 1690 | np->estats.tx_unicast += readl(base + NvRegTxUnicast); |
| 1691 | np->estats.tx_multicast += readl(base + NvRegTxMulticast); |
| 1692 | np->estats.tx_broadcast += readl(base + NvRegTxBroadcast); |
| 1693 | } |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 1694 | } |
| 1695 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1696 | /* |
| 1697 | * nv_get_stats: dev->get_stats function |
| 1698 | * Get latest stats value from the nic. |
| 1699 | * Called with read_lock(&dev_base_lock) held for read - |
| 1700 | * only synchronized against unregister_netdevice. |
| 1701 | */ |
| 1702 | static struct net_device_stats *nv_get_stats(struct net_device *dev) |
| 1703 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1704 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1705 | |
Ayaz Abdulla | 2182816 | 2007-01-23 12:27:21 -0500 | [diff] [blame] | 1706 | /* If the nic supports hw counters then retrieve latest values */ |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 1707 | if (np->driver_data & (DEV_HAS_STATISTICS_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_STATISTICS_V3)) { |
Ayaz Abdulla | 2182816 | 2007-01-23 12:27:21 -0500 | [diff] [blame] | 1708 | nv_get_hw_stats(dev); |
| 1709 | |
| 1710 | /* copy to net_device stats */ |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 1711 | dev->stats.tx_bytes = np->estats.tx_bytes; |
| 1712 | dev->stats.tx_fifo_errors = np->estats.tx_fifo_errors; |
| 1713 | dev->stats.tx_carrier_errors = np->estats.tx_carrier_errors; |
| 1714 | dev->stats.rx_crc_errors = np->estats.rx_crc_errors; |
| 1715 | dev->stats.rx_over_errors = np->estats.rx_over_errors; |
| 1716 | dev->stats.rx_errors = np->estats.rx_errors_total; |
| 1717 | dev->stats.tx_errors = np->estats.tx_errors_total; |
Ayaz Abdulla | 2182816 | 2007-01-23 12:27:21 -0500 | [diff] [blame] | 1718 | } |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 1719 | |
| 1720 | return &dev->stats; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1721 | } |
| 1722 | |
| 1723 | /* |
| 1724 | * nv_alloc_rx: fill rx ring entries. |
| 1725 | * Return 1 if the allocations for the skbs failed and the |
| 1726 | * rx engine is without Available descriptors |
| 1727 | */ |
| 1728 | static int nv_alloc_rx(struct net_device *dev) |
| 1729 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1730 | struct fe_priv *np = netdev_priv(dev); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 1731 | struct ring_desc *less_rx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1732 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1733 | less_rx = np->get_rx.orig; |
| 1734 | if (less_rx-- == np->first_rx.orig) |
| 1735 | less_rx = np->last_rx.orig; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1736 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1737 | while (np->put_rx.orig != less_rx) { |
| 1738 | struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD); |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 1739 | if (skb) { |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1740 | np->put_rx_ctx->skb = skb; |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1741 | np->put_rx_ctx->dma = pci_map_single(np->pci_dev, |
| 1742 | skb->data, |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 1743 | skb_tailroom(skb), |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1744 | PCI_DMA_FROMDEVICE); |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 1745 | np->put_rx_ctx->dma_len = skb_tailroom(skb); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1746 | np->put_rx.orig->buf = cpu_to_le32(np->put_rx_ctx->dma); |
| 1747 | wmb(); |
| 1748 | np->put_rx.orig->flaglen = cpu_to_le32(np->rx_buf_sz | NV_RX_AVAIL); |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 1749 | if (unlikely(np->put_rx.orig++ == np->last_rx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1750 | np->put_rx.orig = np->first_rx.orig; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 1751 | if (unlikely(np->put_rx_ctx++ == np->last_rx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1752 | np->put_rx_ctx = np->first_rx_ctx; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 1753 | } else |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1754 | return 1; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1755 | } |
| 1756 | return 0; |
| 1757 | } |
| 1758 | |
| 1759 | static int nv_alloc_rx_optimized(struct net_device *dev) |
| 1760 | { |
| 1761 | struct fe_priv *np = netdev_priv(dev); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 1762 | struct ring_desc_ex *less_rx; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1763 | |
| 1764 | less_rx = np->get_rx.ex; |
| 1765 | if (less_rx-- == np->first_rx.ex) |
| 1766 | less_rx = np->last_rx.ex; |
| 1767 | |
| 1768 | while (np->put_rx.ex != less_rx) { |
| 1769 | struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD); |
| 1770 | if (skb) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1771 | np->put_rx_ctx->skb = skb; |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1772 | np->put_rx_ctx->dma = pci_map_single(np->pci_dev, |
| 1773 | skb->data, |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 1774 | skb_tailroom(skb), |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1775 | PCI_DMA_FROMDEVICE); |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 1776 | np->put_rx_ctx->dma_len = skb_tailroom(skb); |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 1777 | np->put_rx.ex->bufhigh = cpu_to_le32(dma_high(np->put_rx_ctx->dma)); |
| 1778 | np->put_rx.ex->buflow = cpu_to_le32(dma_low(np->put_rx_ctx->dma)); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1779 | wmb(); |
| 1780 | np->put_rx.ex->flaglen = cpu_to_le32(np->rx_buf_sz | NV_RX2_AVAIL); |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 1781 | if (unlikely(np->put_rx.ex++ == np->last_rx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1782 | np->put_rx.ex = np->first_rx.ex; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 1783 | if (unlikely(np->put_rx_ctx++ == np->last_rx_ctx)) |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 1784 | np->put_rx_ctx = np->first_rx_ctx; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 1785 | } else |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 1786 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1787 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1788 | return 0; |
| 1789 | } |
| 1790 | |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 1791 | /* If rx bufs are exhausted called after 50ms to attempt to refresh */ |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 1792 | static void nv_do_rx_refill(unsigned long data) |
| 1793 | { |
| 1794 | struct net_device *dev = (struct net_device *) data; |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 1795 | struct fe_priv *np = netdev_priv(dev); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 1796 | |
| 1797 | /* Just reschedule NAPI rx processing */ |
Ben Hutchings | 288379f | 2009-01-19 16:43:59 -0800 | [diff] [blame] | 1798 | napi_schedule(&np->napi); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 1799 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1800 | |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 1801 | static void nv_init_rx(struct net_device *dev) |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1802 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1803 | struct fe_priv *np = netdev_priv(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1804 | int i; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1805 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1806 | np->get_rx = np->put_rx = np->first_rx = np->rx_ring; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1807 | |
| 1808 | if (!nv_optimized(np)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1809 | np->last_rx.orig = &np->rx_ring.orig[np->rx_ring_size-1]; |
| 1810 | else |
| 1811 | np->last_rx.ex = &np->rx_ring.ex[np->rx_ring_size-1]; |
| 1812 | np->get_rx_ctx = np->put_rx_ctx = np->first_rx_ctx = np->rx_skb; |
| 1813 | np->last_rx_ctx = &np->rx_skb[np->rx_ring_size-1]; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1814 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1815 | for (i = 0; i < np->rx_ring_size; i++) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1816 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1817 | np->rx_ring.orig[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1818 | np->rx_ring.orig[i].buf = 0; |
| 1819 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1820 | np->rx_ring.ex[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1821 | np->rx_ring.ex[i].txvlan = 0; |
| 1822 | np->rx_ring.ex[i].bufhigh = 0; |
| 1823 | np->rx_ring.ex[i].buflow = 0; |
| 1824 | } |
| 1825 | np->rx_skb[i].skb = NULL; |
| 1826 | np->rx_skb[i].dma = 0; |
| 1827 | } |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1828 | } |
| 1829 | |
| 1830 | static void nv_init_tx(struct net_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1831 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1832 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1833 | int i; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1834 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1835 | np->get_tx = np->put_tx = np->first_tx = np->tx_ring; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1836 | |
| 1837 | if (!nv_optimized(np)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1838 | np->last_tx.orig = &np->tx_ring.orig[np->tx_ring_size-1]; |
| 1839 | else |
| 1840 | np->last_tx.ex = &np->tx_ring.ex[np->tx_ring_size-1]; |
| 1841 | np->get_tx_ctx = np->put_tx_ctx = np->first_tx_ctx = np->tx_skb; |
| 1842 | np->last_tx_ctx = &np->tx_skb[np->tx_ring_size-1]; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 1843 | np->tx_pkts_in_progress = 0; |
| 1844 | np->tx_change_owner = NULL; |
| 1845 | np->tx_end_flip = NULL; |
Ayaz Abdulla | 8f955d7 | 2009-04-25 09:17:56 +0000 | [diff] [blame] | 1846 | np->tx_stop = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1847 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 1848 | for (i = 0; i < np->tx_ring_size; i++) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1849 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1850 | np->tx_ring.orig[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1851 | np->tx_ring.orig[i].buf = 0; |
| 1852 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1853 | np->tx_ring.ex[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1854 | np->tx_ring.ex[i].txvlan = 0; |
| 1855 | np->tx_ring.ex[i].bufhigh = 0; |
| 1856 | np->tx_ring.ex[i].buflow = 0; |
| 1857 | } |
| 1858 | np->tx_skb[i].skb = NULL; |
| 1859 | np->tx_skb[i].dma = 0; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 1860 | np->tx_skb[i].dma_len = 0; |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 1861 | np->tx_skb[i].dma_single = 0; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 1862 | np->tx_skb[i].first_tx_desc = NULL; |
| 1863 | np->tx_skb[i].next_tx_ctx = NULL; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1864 | } |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1865 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1866 | |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1867 | static int nv_init_ring(struct net_device *dev) |
| 1868 | { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1869 | struct fe_priv *np = netdev_priv(dev); |
| 1870 | |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 1871 | nv_init_tx(dev); |
| 1872 | nv_init_rx(dev); |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1873 | |
| 1874 | if (!nv_optimized(np)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 1875 | return nv_alloc_rx(dev); |
| 1876 | else |
| 1877 | return nv_alloc_rx_optimized(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1878 | } |
| 1879 | |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 1880 | static void nv_unmap_txskb(struct fe_priv *np, struct nv_skb_map *tx_skb) |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1881 | { |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1882 | if (tx_skb->dma) { |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 1883 | if (tx_skb->dma_single) |
| 1884 | pci_unmap_single(np->pci_dev, tx_skb->dma, |
| 1885 | tx_skb->dma_len, |
| 1886 | PCI_DMA_TODEVICE); |
| 1887 | else |
| 1888 | pci_unmap_page(np->pci_dev, tx_skb->dma, |
| 1889 | tx_skb->dma_len, |
| 1890 | PCI_DMA_TODEVICE); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1891 | tx_skb->dma = 0; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1892 | } |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 1893 | } |
| 1894 | |
| 1895 | static int nv_release_txskb(struct fe_priv *np, struct nv_skb_map *tx_skb) |
| 1896 | { |
| 1897 | nv_unmap_txskb(np, tx_skb); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1898 | if (tx_skb->skb) { |
| 1899 | dev_kfree_skb_any(tx_skb->skb); |
| 1900 | tx_skb->skb = NULL; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 1901 | return 1; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 1902 | } |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 1903 | return 0; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1904 | } |
| 1905 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1906 | static void nv_drain_tx(struct net_device *dev) |
| 1907 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1908 | struct fe_priv *np = netdev_priv(dev); |
| 1909 | unsigned int i; |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 1910 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 1911 | for (i = 0; i < np->tx_ring_size; i++) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1912 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1913 | np->tx_ring.orig[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1914 | np->tx_ring.orig[i].buf = 0; |
| 1915 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1916 | np->tx_ring.ex[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1917 | np->tx_ring.ex[i].txvlan = 0; |
| 1918 | np->tx_ring.ex[i].bufhigh = 0; |
| 1919 | np->tx_ring.ex[i].buflow = 0; |
| 1920 | } |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 1921 | if (nv_release_txskb(np, &np->tx_skb[i])) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 1922 | dev->stats.tx_dropped++; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 1923 | np->tx_skb[i].dma = 0; |
| 1924 | np->tx_skb[i].dma_len = 0; |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 1925 | np->tx_skb[i].dma_single = 0; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 1926 | np->tx_skb[i].first_tx_desc = NULL; |
| 1927 | np->tx_skb[i].next_tx_ctx = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1928 | } |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 1929 | np->tx_pkts_in_progress = 0; |
| 1930 | np->tx_change_owner = NULL; |
| 1931 | np->tx_end_flip = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1932 | } |
| 1933 | |
| 1934 | static void nv_drain_rx(struct net_device *dev) |
| 1935 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 1936 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1937 | int i; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1938 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 1939 | for (i = 0; i < np->rx_ring_size; i++) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1940 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1941 | np->rx_ring.orig[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1942 | np->rx_ring.orig[i].buf = 0; |
| 1943 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 1944 | np->rx_ring.ex[i].flaglen = 0; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1945 | np->rx_ring.ex[i].txvlan = 0; |
| 1946 | np->rx_ring.ex[i].bufhigh = 0; |
| 1947 | np->rx_ring.ex[i].buflow = 0; |
| 1948 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1949 | wmb(); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1950 | if (np->rx_skb[i].skb) { |
| 1951 | pci_unmap_single(np->pci_dev, np->rx_skb[i].dma, |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 1952 | (skb_end_pointer(np->rx_skb[i].skb) - |
| 1953 | np->rx_skb[i].skb->data), |
| 1954 | PCI_DMA_FROMDEVICE); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1955 | dev_kfree_skb(np->rx_skb[i].skb); |
| 1956 | np->rx_skb[i].skb = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1957 | } |
| 1958 | } |
| 1959 | } |
| 1960 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 1961 | static void nv_drain_rxtx(struct net_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1962 | { |
| 1963 | nv_drain_tx(dev); |
| 1964 | nv_drain_rx(dev); |
| 1965 | } |
| 1966 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 1967 | static inline u32 nv_get_empty_tx_slots(struct fe_priv *np) |
| 1968 | { |
| 1969 | return (u32)(np->tx_ring_size - ((np->tx_ring_size + (np->put_tx_ctx - np->get_tx_ctx)) % np->tx_ring_size)); |
| 1970 | } |
| 1971 | |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 1972 | static void nv_legacybackoff_reseed(struct net_device *dev) |
| 1973 | { |
| 1974 | u8 __iomem *base = get_hwbase(dev); |
| 1975 | u32 reg; |
| 1976 | u32 low; |
| 1977 | int tx_status = 0; |
| 1978 | |
| 1979 | reg = readl(base + NvRegSlotTime) & ~NVREG_SLOTTIME_MASK; |
| 1980 | get_random_bytes(&low, sizeof(low)); |
| 1981 | reg |= low & NVREG_SLOTTIME_MASK; |
| 1982 | |
| 1983 | /* Need to stop tx before change takes effect. |
| 1984 | * Caller has already gained np->lock. |
| 1985 | */ |
| 1986 | tx_status = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_START; |
| 1987 | if (tx_status) |
| 1988 | nv_stop_tx(dev); |
| 1989 | nv_stop_rx(dev); |
| 1990 | writel(reg, base + NvRegSlotTime); |
| 1991 | if (tx_status) |
| 1992 | nv_start_tx(dev); |
| 1993 | nv_start_rx(dev); |
| 1994 | } |
| 1995 | |
| 1996 | /* Gear Backoff Seeds */ |
| 1997 | #define BACKOFF_SEEDSET_ROWS 8 |
| 1998 | #define BACKOFF_SEEDSET_LFSRS 15 |
| 1999 | |
| 2000 | /* Known Good seed sets */ |
| 2001 | static const u32 main_seedset[BACKOFF_SEEDSET_ROWS][BACKOFF_SEEDSET_LFSRS] = { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2002 | {145, 155, 165, 175, 185, 196, 235, 245, 255, 265, 275, 285, 660, 690, 874}, |
| 2003 | {245, 255, 265, 575, 385, 298, 335, 345, 355, 366, 375, 385, 761, 790, 974}, |
| 2004 | {145, 155, 165, 175, 185, 196, 235, 245, 255, 265, 275, 285, 660, 690, 874}, |
| 2005 | {245, 255, 265, 575, 385, 298, 335, 345, 355, 366, 375, 386, 761, 790, 974}, |
| 2006 | {266, 265, 276, 585, 397, 208, 345, 355, 365, 376, 385, 396, 771, 700, 984}, |
| 2007 | {266, 265, 276, 586, 397, 208, 346, 355, 365, 376, 285, 396, 771, 700, 984}, |
| 2008 | {366, 365, 376, 686, 497, 308, 447, 455, 466, 476, 485, 496, 871, 800, 84}, |
| 2009 | {466, 465, 476, 786, 597, 408, 547, 555, 566, 576, 585, 597, 971, 900, 184} }; |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 2010 | |
| 2011 | static const u32 gear_seedset[BACKOFF_SEEDSET_ROWS][BACKOFF_SEEDSET_LFSRS] = { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2012 | {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295}, |
| 2013 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395}, |
| 2014 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 397}, |
| 2015 | {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295}, |
| 2016 | {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295}, |
| 2017 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395}, |
| 2018 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395}, |
| 2019 | {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395} }; |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 2020 | |
| 2021 | static void nv_gear_backoff_reseed(struct net_device *dev) |
| 2022 | { |
| 2023 | u8 __iomem *base = get_hwbase(dev); |
| 2024 | u32 miniseed1, miniseed2, miniseed2_reversed, miniseed3, miniseed3_reversed; |
| 2025 | u32 temp, seedset, combinedSeed; |
| 2026 | int i; |
| 2027 | |
| 2028 | /* Setup seed for free running LFSR */ |
| 2029 | /* We are going to read the time stamp counter 3 times |
| 2030 | and swizzle bits around to increase randomness */ |
| 2031 | get_random_bytes(&miniseed1, sizeof(miniseed1)); |
| 2032 | miniseed1 &= 0x0fff; |
| 2033 | if (miniseed1 == 0) |
| 2034 | miniseed1 = 0xabc; |
| 2035 | |
| 2036 | get_random_bytes(&miniseed2, sizeof(miniseed2)); |
| 2037 | miniseed2 &= 0x0fff; |
| 2038 | if (miniseed2 == 0) |
| 2039 | miniseed2 = 0xabc; |
| 2040 | miniseed2_reversed = |
| 2041 | ((miniseed2 & 0xF00) >> 8) | |
| 2042 | (miniseed2 & 0x0F0) | |
| 2043 | ((miniseed2 & 0x00F) << 8); |
| 2044 | |
| 2045 | get_random_bytes(&miniseed3, sizeof(miniseed3)); |
| 2046 | miniseed3 &= 0x0fff; |
| 2047 | if (miniseed3 == 0) |
| 2048 | miniseed3 = 0xabc; |
| 2049 | miniseed3_reversed = |
| 2050 | ((miniseed3 & 0xF00) >> 8) | |
| 2051 | (miniseed3 & 0x0F0) | |
| 2052 | ((miniseed3 & 0x00F) << 8); |
| 2053 | |
| 2054 | combinedSeed = ((miniseed1 ^ miniseed2_reversed) << 12) | |
| 2055 | (miniseed2 ^ miniseed3_reversed); |
| 2056 | |
| 2057 | /* Seeds can not be zero */ |
| 2058 | if ((combinedSeed & NVREG_BKOFFCTRL_SEED_MASK) == 0) |
| 2059 | combinedSeed |= 0x08; |
| 2060 | if ((combinedSeed & (NVREG_BKOFFCTRL_SEED_MASK << NVREG_BKOFFCTRL_GEAR)) == 0) |
| 2061 | combinedSeed |= 0x8000; |
| 2062 | |
| 2063 | /* No need to disable tx here */ |
| 2064 | temp = NVREG_BKOFFCTRL_DEFAULT | (0 << NVREG_BKOFFCTRL_SELECT); |
| 2065 | temp |= combinedSeed & NVREG_BKOFFCTRL_SEED_MASK; |
| 2066 | temp |= combinedSeed >> NVREG_BKOFFCTRL_GEAR; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2067 | writel(temp, base + NvRegBackOffControl); |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 2068 | |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2069 | /* Setup seeds for all gear LFSRs. */ |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 2070 | get_random_bytes(&seedset, sizeof(seedset)); |
| 2071 | seedset = seedset % BACKOFF_SEEDSET_ROWS; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2072 | for (i = 1; i <= BACKOFF_SEEDSET_LFSRS; i++) { |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 2073 | temp = NVREG_BKOFFCTRL_DEFAULT | (i << NVREG_BKOFFCTRL_SELECT); |
| 2074 | temp |= main_seedset[seedset][i-1] & 0x3ff; |
| 2075 | temp |= ((gear_seedset[seedset][i-1] & 0x3ff) << NVREG_BKOFFCTRL_GEAR); |
| 2076 | writel(temp, base + NvRegBackOffControl); |
| 2077 | } |
| 2078 | } |
| 2079 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2080 | /* |
| 2081 | * nv_start_xmit: dev->hard_start_xmit function |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2082 | * Called with netif_tx_lock held. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2083 | */ |
Stephen Hemminger | 61357325 | 2009-08-31 19:50:58 +0000 | [diff] [blame] | 2084 | static netdev_tx_t nv_start_xmit(struct sk_buff *skb, struct net_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2085 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2086 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2087 | u32 tx_flags = 0; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2088 | u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET); |
| 2089 | unsigned int fragments = skb_shinfo(skb)->nr_frags; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2090 | unsigned int i; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2091 | u32 offset = 0; |
| 2092 | u32 bcnt; |
Eric Dumazet | e743d31 | 2010-04-14 15:59:40 -0700 | [diff] [blame] | 2093 | u32 size = skb_headlen(skb); |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2094 | u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2095 | u32 empty_slots; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2096 | struct ring_desc *put_tx; |
| 2097 | struct ring_desc *start_tx; |
| 2098 | struct ring_desc *prev_tx; |
| 2099 | struct nv_skb_map *prev_tx_ctx; |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2100 | unsigned long flags; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2101 | |
| 2102 | /* add fragments to entries count */ |
| 2103 | for (i = 0; i < fragments; i++) { |
| 2104 | entries += (skb_shinfo(skb)->frags[i].size >> NV_TX2_TSO_MAX_SHIFT) + |
| 2105 | ((skb_shinfo(skb)->frags[i].size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0); |
| 2106 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2107 | |
Ayaz Abdulla | 001eb84 | 2009-01-09 11:03:44 +0000 | [diff] [blame] | 2108 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2109 | empty_slots = nv_get_empty_tx_slots(np); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2110 | if (unlikely(empty_slots <= entries)) { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2111 | netif_stop_queue(dev); |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2112 | np->tx_stop = 1; |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2113 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2114 | return NETDEV_TX_BUSY; |
| 2115 | } |
Ayaz Abdulla | 001eb84 | 2009-01-09 11:03:44 +0000 | [diff] [blame] | 2116 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2117 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2118 | start_tx = put_tx = np->put_tx.orig; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2119 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2120 | /* setup the header buffer */ |
| 2121 | do { |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2122 | prev_tx = put_tx; |
| 2123 | prev_tx_ctx = np->put_tx_ctx; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2124 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2125 | np->put_tx_ctx->dma = pci_map_single(np->pci_dev, skb->data + offset, bcnt, |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2126 | PCI_DMA_TODEVICE); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2127 | np->put_tx_ctx->dma_len = bcnt; |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 2128 | np->put_tx_ctx->dma_single = 1; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2129 | put_tx->buf = cpu_to_le32(np->put_tx_ctx->dma); |
| 2130 | put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2131 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2132 | tx_flags = np->tx_flags; |
| 2133 | offset += bcnt; |
| 2134 | size -= bcnt; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2135 | if (unlikely(put_tx++ == np->last_tx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2136 | put_tx = np->first_tx.orig; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2137 | if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2138 | np->put_tx_ctx = np->first_tx_ctx; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2139 | } while (size); |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2140 | |
| 2141 | /* setup the fragments */ |
| 2142 | for (i = 0; i < fragments; i++) { |
| 2143 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; |
| 2144 | u32 size = frag->size; |
| 2145 | offset = 0; |
| 2146 | |
| 2147 | do { |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2148 | prev_tx = put_tx; |
| 2149 | prev_tx_ctx = np->put_tx_ctx; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2150 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2151 | np->put_tx_ctx->dma = pci_map_page(np->pci_dev, frag->page, frag->page_offset+offset, bcnt, |
| 2152 | PCI_DMA_TODEVICE); |
| 2153 | np->put_tx_ctx->dma_len = bcnt; |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 2154 | np->put_tx_ctx->dma_single = 0; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2155 | put_tx->buf = cpu_to_le32(np->put_tx_ctx->dma); |
| 2156 | put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2157 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2158 | offset += bcnt; |
| 2159 | size -= bcnt; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2160 | if (unlikely(put_tx++ == np->last_tx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2161 | put_tx = np->first_tx.orig; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2162 | if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2163 | np->put_tx_ctx = np->first_tx_ctx; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2164 | } while (size); |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2165 | } |
| 2166 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2167 | /* set last fragment flag */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2168 | prev_tx->flaglen |= cpu_to_le32(tx_flags_extra); |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2169 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2170 | /* save skb in this slot's context area */ |
| 2171 | prev_tx_ctx->skb = skb; |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2172 | |
Herbert Xu | 89114af | 2006-07-08 13:34:32 -0700 | [diff] [blame] | 2173 | if (skb_is_gso(skb)) |
Herbert Xu | 7967168 | 2006-06-22 02:40:14 -0700 | [diff] [blame] | 2174 | tx_flags_extra = NV_TX2_TSO | (skb_shinfo(skb)->gso_size << NV_TX2_TSO_SHIFT); |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 2175 | else |
Arjan van de Ven | 1d39ed5 | 2006-12-12 14:06:23 +0100 | [diff] [blame] | 2176 | tx_flags_extra = skb->ip_summed == CHECKSUM_PARTIAL ? |
Patrick McHardy | 84fa793 | 2006-08-29 16:44:56 -0700 | [diff] [blame] | 2177 | NV_TX2_CHECKSUM_L3 | NV_TX2_CHECKSUM_L4 : 0; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2178 | |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2179 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 164a86e | 2007-01-09 13:30:10 -0500 | [diff] [blame] | 2180 | |
Ayaz Abdulla | fa45459 | 2006-01-05 22:45:45 -0800 | [diff] [blame] | 2181 | /* set tx flags */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2182 | start_tx->flaglen |= cpu_to_le32(tx_flags | tx_flags_extra); |
| 2183 | np->put_tx.orig = put_tx; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2184 | |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2185 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2186 | |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 2187 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2188 | return NETDEV_TX_OK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2189 | } |
| 2190 | |
Stephen Hemminger | 61357325 | 2009-08-31 19:50:58 +0000 | [diff] [blame] | 2191 | static netdev_tx_t nv_start_xmit_optimized(struct sk_buff *skb, |
| 2192 | struct net_device *dev) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2193 | { |
| 2194 | struct fe_priv *np = netdev_priv(dev); |
| 2195 | u32 tx_flags = 0; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2196 | u32 tx_flags_extra; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2197 | unsigned int fragments = skb_shinfo(skb)->nr_frags; |
| 2198 | unsigned int i; |
| 2199 | u32 offset = 0; |
| 2200 | u32 bcnt; |
Eric Dumazet | e743d31 | 2010-04-14 15:59:40 -0700 | [diff] [blame] | 2201 | u32 size = skb_headlen(skb); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2202 | u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0); |
| 2203 | u32 empty_slots; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2204 | struct ring_desc_ex *put_tx; |
| 2205 | struct ring_desc_ex *start_tx; |
| 2206 | struct ring_desc_ex *prev_tx; |
| 2207 | struct nv_skb_map *prev_tx_ctx; |
| 2208 | struct nv_skb_map *start_tx_ctx; |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2209 | unsigned long flags; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2210 | |
| 2211 | /* add fragments to entries count */ |
| 2212 | for (i = 0; i < fragments; i++) { |
| 2213 | entries += (skb_shinfo(skb)->frags[i].size >> NV_TX2_TSO_MAX_SHIFT) + |
| 2214 | ((skb_shinfo(skb)->frags[i].size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0); |
| 2215 | } |
| 2216 | |
Ayaz Abdulla | 001eb84 | 2009-01-09 11:03:44 +0000 | [diff] [blame] | 2217 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2218 | empty_slots = nv_get_empty_tx_slots(np); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2219 | if (unlikely(empty_slots <= entries)) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2220 | netif_stop_queue(dev); |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2221 | np->tx_stop = 1; |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2222 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2223 | return NETDEV_TX_BUSY; |
| 2224 | } |
Ayaz Abdulla | 001eb84 | 2009-01-09 11:03:44 +0000 | [diff] [blame] | 2225 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2226 | |
| 2227 | start_tx = put_tx = np->put_tx.ex; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2228 | start_tx_ctx = np->put_tx_ctx; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2229 | |
| 2230 | /* setup the header buffer */ |
| 2231 | do { |
| 2232 | prev_tx = put_tx; |
| 2233 | prev_tx_ctx = np->put_tx_ctx; |
| 2234 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; |
| 2235 | np->put_tx_ctx->dma = pci_map_single(np->pci_dev, skb->data + offset, bcnt, |
| 2236 | PCI_DMA_TODEVICE); |
| 2237 | np->put_tx_ctx->dma_len = bcnt; |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 2238 | np->put_tx_ctx->dma_single = 1; |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 2239 | put_tx->bufhigh = cpu_to_le32(dma_high(np->put_tx_ctx->dma)); |
| 2240 | put_tx->buflow = cpu_to_le32(dma_low(np->put_tx_ctx->dma)); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2241 | put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2242 | |
| 2243 | tx_flags = NV_TX2_VALID; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2244 | offset += bcnt; |
| 2245 | size -= bcnt; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2246 | if (unlikely(put_tx++ == np->last_tx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2247 | put_tx = np->first_tx.ex; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2248 | if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2249 | np->put_tx_ctx = np->first_tx_ctx; |
| 2250 | } while (size); |
| 2251 | |
| 2252 | /* setup the fragments */ |
| 2253 | for (i = 0; i < fragments; i++) { |
| 2254 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; |
| 2255 | u32 size = frag->size; |
| 2256 | offset = 0; |
| 2257 | |
| 2258 | do { |
| 2259 | prev_tx = put_tx; |
| 2260 | prev_tx_ctx = np->put_tx_ctx; |
| 2261 | bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size; |
| 2262 | np->put_tx_ctx->dma = pci_map_page(np->pci_dev, frag->page, frag->page_offset+offset, bcnt, |
| 2263 | PCI_DMA_TODEVICE); |
| 2264 | np->put_tx_ctx->dma_len = bcnt; |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 2265 | np->put_tx_ctx->dma_single = 0; |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 2266 | put_tx->bufhigh = cpu_to_le32(dma_high(np->put_tx_ctx->dma)); |
| 2267 | put_tx->buflow = cpu_to_le32(dma_low(np->put_tx_ctx->dma)); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2268 | put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2269 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2270 | offset += bcnt; |
| 2271 | size -= bcnt; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2272 | if (unlikely(put_tx++ == np->last_tx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2273 | put_tx = np->first_tx.ex; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2274 | if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2275 | np->put_tx_ctx = np->first_tx_ctx; |
| 2276 | } while (size); |
| 2277 | } |
| 2278 | |
| 2279 | /* set last fragment flag */ |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2280 | prev_tx->flaglen |= cpu_to_le32(NV_TX2_LASTPACKET); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2281 | |
| 2282 | /* save skb in this slot's context area */ |
| 2283 | prev_tx_ctx->skb = skb; |
| 2284 | |
| 2285 | if (skb_is_gso(skb)) |
| 2286 | tx_flags_extra = NV_TX2_TSO | (skb_shinfo(skb)->gso_size << NV_TX2_TSO_SHIFT); |
| 2287 | else |
| 2288 | tx_flags_extra = skb->ip_summed == CHECKSUM_PARTIAL ? |
| 2289 | NV_TX2_CHECKSUM_L3 | NV_TX2_CHECKSUM_L4 : 0; |
| 2290 | |
| 2291 | /* vlan tag */ |
Jesse Gross | eab6d18 | 2010-10-20 13:56:03 +0000 | [diff] [blame] | 2292 | if (vlan_tx_tag_present(skb)) |
| 2293 | start_tx->txvlan = cpu_to_le32(NV_TX3_VLAN_TAG_PRESENT | |
| 2294 | vlan_tx_tag_get(skb)); |
| 2295 | else |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2296 | start_tx->txvlan = 0; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2297 | |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2298 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2299 | |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2300 | if (np->tx_limit) { |
| 2301 | /* Limit the number of outstanding tx. Setup all fragments, but |
| 2302 | * do not set the VALID bit on the first descriptor. Save a pointer |
| 2303 | * to that descriptor and also for next skb_map element. |
| 2304 | */ |
| 2305 | |
| 2306 | if (np->tx_pkts_in_progress == NV_TX_LIMIT_COUNT) { |
| 2307 | if (!np->tx_change_owner) |
| 2308 | np->tx_change_owner = start_tx_ctx; |
| 2309 | |
| 2310 | /* remove VALID bit */ |
| 2311 | tx_flags &= ~NV_TX2_VALID; |
| 2312 | start_tx_ctx->first_tx_desc = start_tx; |
| 2313 | start_tx_ctx->next_tx_ctx = np->put_tx_ctx; |
| 2314 | np->tx_end_flip = np->put_tx_ctx; |
| 2315 | } else { |
| 2316 | np->tx_pkts_in_progress++; |
| 2317 | } |
| 2318 | } |
| 2319 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2320 | /* set tx flags */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2321 | start_tx->flaglen |= cpu_to_le32(tx_flags | tx_flags_extra); |
| 2322 | np->put_tx.ex = put_tx; |
| 2323 | |
Ingo Molnar | bd6ca63 | 2008-03-28 14:41:30 -0700 | [diff] [blame] | 2324 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2325 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2326 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2327 | return NETDEV_TX_OK; |
| 2328 | } |
| 2329 | |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2330 | static inline void nv_tx_flip_ownership(struct net_device *dev) |
| 2331 | { |
| 2332 | struct fe_priv *np = netdev_priv(dev); |
| 2333 | |
| 2334 | np->tx_pkts_in_progress--; |
| 2335 | if (np->tx_change_owner) { |
Al Viro | 30ecce9 | 2008-03-26 05:57:12 +0000 | [diff] [blame] | 2336 | np->tx_change_owner->first_tx_desc->flaglen |= |
| 2337 | cpu_to_le32(NV_TX2_VALID); |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2338 | np->tx_pkts_in_progress++; |
| 2339 | |
| 2340 | np->tx_change_owner = np->tx_change_owner->next_tx_ctx; |
| 2341 | if (np->tx_change_owner == np->tx_end_flip) |
| 2342 | np->tx_change_owner = NULL; |
| 2343 | |
| 2344 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 2345 | } |
| 2346 | } |
| 2347 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2348 | /* |
| 2349 | * nv_tx_done: check for completed packets, release the skbs. |
| 2350 | * |
| 2351 | * Caller must own np->lock. |
| 2352 | */ |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2353 | static int nv_tx_done(struct net_device *dev, int limit) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2354 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2355 | struct fe_priv *np = netdev_priv(dev); |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2356 | u32 flags; |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2357 | int tx_work = 0; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2358 | struct ring_desc *orig_get_tx = np->get_tx.orig; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2359 | |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2360 | while ((np->get_tx.orig != np->put_tx.orig) && |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2361 | !((flags = le32_to_cpu(np->get_tx.orig->flaglen)) & NV_TX_VALID) && |
| 2362 | (tx_work < limit)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2363 | |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 2364 | nv_unmap_txskb(np, np->get_tx_ctx); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2365 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2366 | if (np->desc_ver == DESC_VER_1) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2367 | if (flags & NV_TX_LASTPACKET) { |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2368 | if (flags & NV_TX_ERROR) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2369 | if (flags & NV_TX_UNDERFLOW) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2370 | dev->stats.tx_fifo_errors++; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2371 | if (flags & NV_TX_CARRIERLOST) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2372 | dev->stats.tx_carrier_errors++; |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 2373 | if ((flags & NV_TX_RETRYERROR) && !(flags & NV_TX_RETRYCOUNT_MASK)) |
| 2374 | nv_legacybackoff_reseed(dev); |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2375 | dev->stats.tx_errors++; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2376 | } else { |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2377 | dev->stats.tx_packets++; |
| 2378 | dev->stats.tx_bytes += np->get_tx_ctx->skb->len; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2379 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2380 | dev_kfree_skb_any(np->get_tx_ctx->skb); |
| 2381 | np->get_tx_ctx->skb = NULL; |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2382 | tx_work++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2383 | } |
| 2384 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2385 | if (flags & NV_TX2_LASTPACKET) { |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2386 | if (flags & NV_TX2_ERROR) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2387 | if (flags & NV_TX2_UNDERFLOW) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2388 | dev->stats.tx_fifo_errors++; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2389 | if (flags & NV_TX2_CARRIERLOST) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2390 | dev->stats.tx_carrier_errors++; |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 2391 | if ((flags & NV_TX2_RETRYERROR) && !(flags & NV_TX2_RETRYCOUNT_MASK)) |
| 2392 | nv_legacybackoff_reseed(dev); |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2393 | dev->stats.tx_errors++; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2394 | } else { |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2395 | dev->stats.tx_packets++; |
| 2396 | dev->stats.tx_bytes += np->get_tx_ctx->skb->len; |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 2397 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2398 | dev_kfree_skb_any(np->get_tx_ctx->skb); |
| 2399 | np->get_tx_ctx->skb = NULL; |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2400 | tx_work++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2401 | } |
| 2402 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2403 | if (unlikely(np->get_tx.orig++ == np->last_tx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2404 | np->get_tx.orig = np->first_tx.orig; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2405 | if (unlikely(np->get_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2406 | np->get_tx_ctx = np->first_tx_ctx; |
| 2407 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2408 | if (unlikely((np->tx_stop == 1) && (np->get_tx.orig != orig_get_tx))) { |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2409 | np->tx_stop = 0; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2410 | netif_wake_queue(dev); |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2411 | } |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2412 | return tx_work; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2413 | } |
| 2414 | |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2415 | static int nv_tx_done_optimized(struct net_device *dev, int limit) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2416 | { |
| 2417 | struct fe_priv *np = netdev_priv(dev); |
| 2418 | u32 flags; |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2419 | int tx_work = 0; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2420 | struct ring_desc_ex *orig_get_tx = np->get_tx.ex; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2421 | |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2422 | while ((np->get_tx.ex != np->put_tx.ex) && |
Julia Lawall | 217d32d | 2010-07-05 22:15:47 -0700 | [diff] [blame] | 2423 | !((flags = le32_to_cpu(np->get_tx.ex->flaglen)) & NV_TX2_VALID) && |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2424 | (tx_work < limit)) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2425 | |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 2426 | nv_unmap_txskb(np, np->get_tx_ctx); |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2427 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2428 | if (flags & NV_TX2_LASTPACKET) { |
Ayaz Abdulla | 2182816 | 2007-01-23 12:27:21 -0500 | [diff] [blame] | 2429 | if (!(flags & NV_TX2_ERROR)) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2430 | dev->stats.tx_packets++; |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 2431 | else { |
| 2432 | if ((flags & NV_TX2_RETRYERROR) && !(flags & NV_TX2_RETRYCOUNT_MASK)) { |
| 2433 | if (np->driver_data & DEV_HAS_GEAR_MODE) |
| 2434 | nv_gear_backoff_reseed(dev); |
| 2435 | else |
| 2436 | nv_legacybackoff_reseed(dev); |
| 2437 | } |
| 2438 | } |
| 2439 | |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2440 | dev_kfree_skb_any(np->get_tx_ctx->skb); |
| 2441 | np->get_tx_ctx->skb = NULL; |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2442 | tx_work++; |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2443 | |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2444 | if (np->tx_limit) |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 2445 | nv_tx_flip_ownership(dev); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2446 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2447 | if (unlikely(np->get_tx.ex++ == np->last_tx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2448 | np->get_tx.ex = np->first_tx.ex; |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2449 | if (unlikely(np->get_tx_ctx++ == np->last_tx_ctx)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2450 | np->get_tx_ctx = np->first_tx_ctx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2451 | } |
Ayaz Abdulla | 445583b | 2007-01-21 18:10:47 -0500 | [diff] [blame] | 2452 | if (unlikely((np->tx_stop == 1) && (np->get_tx.ex != orig_get_tx))) { |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2453 | np->tx_stop = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2454 | netif_wake_queue(dev); |
Ayaz Abdulla | aaa37d2 | 2007-01-21 18:10:42 -0500 | [diff] [blame] | 2455 | } |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2456 | return tx_work; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2457 | } |
| 2458 | |
| 2459 | /* |
| 2460 | * nv_tx_timeout: dev->tx_timeout function |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2461 | * Called with netif_tx_lock held. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2462 | */ |
| 2463 | static void nv_tx_timeout(struct net_device *dev) |
| 2464 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2465 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2466 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 2467 | u32 status; |
Ayaz Abdulla | 8f955d7 | 2009-04-25 09:17:56 +0000 | [diff] [blame] | 2468 | union ring_type put_tx; |
| 2469 | int saved_tx_limit; |
Joe Perches | 294a554 | 2010-11-29 07:41:56 +0000 | [diff] [blame] | 2470 | int i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2471 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 2472 | if (np->msi_flags & NV_MSI_X_ENABLED) |
| 2473 | status = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK; |
| 2474 | else |
| 2475 | status = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; |
| 2476 | |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 2477 | netdev_info(dev, "Got tx_timeout. irq: %08x\n", status); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2478 | |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 2479 | netdev_info(dev, "Ring at %lx\n", (unsigned long)np->ring_addr); |
| 2480 | netdev_info(dev, "Dumping tx registers\n"); |
Joe Perches | 294a554 | 2010-11-29 07:41:56 +0000 | [diff] [blame] | 2481 | for (i = 0; i <= np->register_size; i += 32) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 2482 | netdev_info(dev, |
| 2483 | "%3x: %08x %08x %08x %08x %08x %08x %08x %08x\n", |
| 2484 | i, |
| 2485 | readl(base + i + 0), readl(base + i + 4), |
| 2486 | readl(base + i + 8), readl(base + i + 12), |
| 2487 | readl(base + i + 16), readl(base + i + 20), |
| 2488 | readl(base + i + 24), readl(base + i + 28)); |
Joe Perches | 294a554 | 2010-11-29 07:41:56 +0000 | [diff] [blame] | 2489 | } |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 2490 | netdev_info(dev, "Dumping tx ring\n"); |
Joe Perches | 294a554 | 2010-11-29 07:41:56 +0000 | [diff] [blame] | 2491 | for (i = 0; i < np->tx_ring_size; i += 4) { |
| 2492 | if (!nv_optimized(np)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 2493 | netdev_info(dev, |
| 2494 | "%03x: %08x %08x // %08x %08x // %08x %08x // %08x %08x\n", |
| 2495 | i, |
| 2496 | le32_to_cpu(np->tx_ring.orig[i].buf), |
| 2497 | le32_to_cpu(np->tx_ring.orig[i].flaglen), |
| 2498 | le32_to_cpu(np->tx_ring.orig[i+1].buf), |
| 2499 | le32_to_cpu(np->tx_ring.orig[i+1].flaglen), |
| 2500 | le32_to_cpu(np->tx_ring.orig[i+2].buf), |
| 2501 | le32_to_cpu(np->tx_ring.orig[i+2].flaglen), |
| 2502 | le32_to_cpu(np->tx_ring.orig[i+3].buf), |
| 2503 | le32_to_cpu(np->tx_ring.orig[i+3].flaglen)); |
Joe Perches | 294a554 | 2010-11-29 07:41:56 +0000 | [diff] [blame] | 2504 | } else { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 2505 | netdev_info(dev, |
| 2506 | "%03x: %08x %08x %08x // %08x %08x %08x // %08x %08x %08x // %08x %08x %08x\n", |
| 2507 | i, |
| 2508 | le32_to_cpu(np->tx_ring.ex[i].bufhigh), |
| 2509 | le32_to_cpu(np->tx_ring.ex[i].buflow), |
| 2510 | le32_to_cpu(np->tx_ring.ex[i].flaglen), |
| 2511 | le32_to_cpu(np->tx_ring.ex[i+1].bufhigh), |
| 2512 | le32_to_cpu(np->tx_ring.ex[i+1].buflow), |
| 2513 | le32_to_cpu(np->tx_ring.ex[i+1].flaglen), |
| 2514 | le32_to_cpu(np->tx_ring.ex[i+2].bufhigh), |
| 2515 | le32_to_cpu(np->tx_ring.ex[i+2].buflow), |
| 2516 | le32_to_cpu(np->tx_ring.ex[i+2].flaglen), |
| 2517 | le32_to_cpu(np->tx_ring.ex[i+3].bufhigh), |
| 2518 | le32_to_cpu(np->tx_ring.ex[i+3].buflow), |
| 2519 | le32_to_cpu(np->tx_ring.ex[i+3].flaglen)); |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 2520 | } |
| 2521 | } |
| 2522 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2523 | spin_lock_irq(&np->lock); |
| 2524 | |
| 2525 | /* 1) stop tx engine */ |
| 2526 | nv_stop_tx(dev); |
| 2527 | |
Ayaz Abdulla | 8f955d7 | 2009-04-25 09:17:56 +0000 | [diff] [blame] | 2528 | /* 2) complete any outstanding tx and do not give HW any limited tx pkts */ |
| 2529 | saved_tx_limit = np->tx_limit; |
| 2530 | np->tx_limit = 0; /* prevent giving HW any limited pkts */ |
| 2531 | np->tx_stop = 0; /* prevent waking tx queue */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 2532 | if (!nv_optimized(np)) |
Ayaz Abdulla | 33912e7 | 2009-03-05 08:02:10 +0000 | [diff] [blame] | 2533 | nv_tx_done(dev, np->tx_ring_size); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2534 | else |
Ayaz Abdulla | 4e16ed1 | 2007-01-23 12:00:56 -0500 | [diff] [blame] | 2535 | nv_tx_done_optimized(dev, np->tx_ring_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2536 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 2537 | /* save current HW position */ |
Ayaz Abdulla | 8f955d7 | 2009-04-25 09:17:56 +0000 | [diff] [blame] | 2538 | if (np->tx_change_owner) |
| 2539 | put_tx.ex = np->tx_change_owner->first_tx_desc; |
| 2540 | else |
| 2541 | put_tx = np->put_tx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2542 | |
Ayaz Abdulla | 8f955d7 | 2009-04-25 09:17:56 +0000 | [diff] [blame] | 2543 | /* 3) clear all tx state */ |
| 2544 | nv_drain_tx(dev); |
| 2545 | nv_init_tx(dev); |
Ayaz Abdulla | 3ba4d09 | 2007-03-23 05:50:02 -0500 | [diff] [blame] | 2546 | |
Ayaz Abdulla | 8f955d7 | 2009-04-25 09:17:56 +0000 | [diff] [blame] | 2547 | /* 4) restore state to current HW position */ |
| 2548 | np->get_tx = np->put_tx = put_tx; |
| 2549 | np->tx_limit = saved_tx_limit; |
| 2550 | |
| 2551 | /* 5) restart tx engine */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2552 | nv_start_tx(dev); |
Ayaz Abdulla | 8f955d7 | 2009-04-25 09:17:56 +0000 | [diff] [blame] | 2553 | netif_wake_queue(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2554 | spin_unlock_irq(&np->lock); |
| 2555 | } |
| 2556 | |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2557 | /* |
| 2558 | * Called when the nic notices a mismatch between the actual data len on the |
| 2559 | * wire and the len indicated in the 802 header |
| 2560 | */ |
| 2561 | static int nv_getlen(struct net_device *dev, void *packet, int datalen) |
| 2562 | { |
| 2563 | int hdrlen; /* length of the 802 header */ |
| 2564 | int protolen; /* length as stored in the proto field */ |
| 2565 | |
| 2566 | /* 1) calculate len according to header */ |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2567 | if (((struct vlan_ethhdr *)packet)->h_vlan_proto == htons(ETH_P_8021Q)) { |
| 2568 | protolen = ntohs(((struct vlan_ethhdr *)packet)->h_vlan_encapsulated_proto); |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2569 | hdrlen = VLAN_HLEN; |
| 2570 | } else { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2571 | protolen = ntohs(((struct ethhdr *)packet)->h_proto); |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2572 | hdrlen = ETH_HLEN; |
| 2573 | } |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2574 | if (protolen > ETH_DATA_LEN) |
| 2575 | return datalen; /* Value in proto field not a len, no checks possible */ |
| 2576 | |
| 2577 | protolen += hdrlen; |
| 2578 | /* consistency checks: */ |
| 2579 | if (datalen > ETH_ZLEN) { |
| 2580 | if (datalen >= protolen) { |
| 2581 | /* more data on wire than in 802 header, trim of |
| 2582 | * additional data. |
| 2583 | */ |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2584 | return protolen; |
| 2585 | } else { |
| 2586 | /* less data on wire than mentioned in header. |
| 2587 | * Discard the packet. |
| 2588 | */ |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2589 | return -1; |
| 2590 | } |
| 2591 | } else { |
| 2592 | /* short packet. Accept only if 802 values are also short */ |
| 2593 | if (protolen > ETH_ZLEN) { |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2594 | return -1; |
| 2595 | } |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2596 | return datalen; |
| 2597 | } |
| 2598 | } |
| 2599 | |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 2600 | static int nv_rx_process(struct net_device *dev, int limit) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2601 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2602 | struct fe_priv *np = netdev_priv(dev); |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2603 | u32 flags; |
Ingo Molnar | bcb5feb | 2007-10-16 20:44:59 -0400 | [diff] [blame] | 2604 | int rx_work = 0; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2605 | struct sk_buff *skb; |
| 2606 | int len; |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 2607 | |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2608 | while ((np->get_rx.orig != np->put_rx.orig) && |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2609 | !((flags = le32_to_cpu(np->get_rx.orig->flaglen)) & NV_RX_AVAIL) && |
Ingo Molnar | bcb5feb | 2007-10-16 20:44:59 -0400 | [diff] [blame] | 2610 | (rx_work < limit)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2611 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2612 | /* |
| 2613 | * the packet is for us - immediately tear down the pci mapping. |
| 2614 | * TODO: check if a prefetch of the first cacheline improves |
| 2615 | * the performance. |
| 2616 | */ |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2617 | pci_unmap_single(np->pci_dev, np->get_rx_ctx->dma, |
| 2618 | np->get_rx_ctx->dma_len, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2619 | PCI_DMA_FROMDEVICE); |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 2620 | skb = np->get_rx_ctx->skb; |
| 2621 | np->get_rx_ctx->skb = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2622 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2623 | /* look at what we actually got: */ |
| 2624 | if (np->desc_ver == DESC_VER_1) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2625 | if (likely(flags & NV_RX_DESCRIPTORVALID)) { |
| 2626 | len = flags & LEN_MASK_V1; |
| 2627 | if (unlikely(flags & NV_RX_ERROR)) { |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 2628 | if ((flags & NV_RX_ERROR_MASK) == NV_RX_ERROR4) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2629 | len = nv_getlen(dev, skb->data, len); |
| 2630 | if (len < 0) { |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2631 | dev->stats.rx_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2632 | dev_kfree_skb(skb); |
| 2633 | goto next_pkt; |
| 2634 | } |
| 2635 | } |
| 2636 | /* framing errors are soft errors */ |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 2637 | else if ((flags & NV_RX_ERROR_MASK) == NV_RX_FRAMINGERR) { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2638 | if (flags & NV_RX_SUBSTRACT1) |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2639 | len--; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2640 | } |
| 2641 | /* the rest are hard errors */ |
| 2642 | else { |
| 2643 | if (flags & NV_RX_MISSEDFRAME) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2644 | dev->stats.rx_missed_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2645 | if (flags & NV_RX_CRCERR) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2646 | dev->stats.rx_crc_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2647 | if (flags & NV_RX_OVERFLOW) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2648 | dev->stats.rx_over_errors++; |
| 2649 | dev->stats.rx_errors++; |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 2650 | dev_kfree_skb(skb); |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 2651 | goto next_pkt; |
| 2652 | } |
| 2653 | } |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2654 | } else { |
| 2655 | dev_kfree_skb(skb); |
| 2656 | goto next_pkt; |
Manfred Spraul | 22c6d14 | 2005-04-19 21:17:09 +0200 | [diff] [blame] | 2657 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2658 | } else { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2659 | if (likely(flags & NV_RX2_DESCRIPTORVALID)) { |
| 2660 | len = flags & LEN_MASK_V2; |
| 2661 | if (unlikely(flags & NV_RX2_ERROR)) { |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 2662 | if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_ERROR4) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2663 | len = nv_getlen(dev, skb->data, len); |
| 2664 | if (len < 0) { |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2665 | dev->stats.rx_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2666 | dev_kfree_skb(skb); |
| 2667 | goto next_pkt; |
| 2668 | } |
| 2669 | } |
| 2670 | /* framing errors are soft errors */ |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 2671 | else if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_FRAMINGERR) { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2672 | if (flags & NV_RX2_SUBSTRACT1) |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2673 | len--; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2674 | } |
| 2675 | /* the rest are hard errors */ |
| 2676 | else { |
| 2677 | if (flags & NV_RX2_CRCERR) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2678 | dev->stats.rx_crc_errors++; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2679 | if (flags & NV_RX2_OVERFLOW) |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2680 | dev->stats.rx_over_errors++; |
| 2681 | dev->stats.rx_errors++; |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 2682 | dev_kfree_skb(skb); |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 2683 | goto next_pkt; |
| 2684 | } |
| 2685 | } |
Ayaz Abdulla | bfaffe8 | 2008-01-13 16:02:55 -0500 | [diff] [blame] | 2686 | if (((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_TCP) || /*ip and tcp */ |
| 2687 | ((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_UDP)) /*ip and udp */ |
Ayaz Abdulla | 0d63fb3 | 2007-01-09 13:30:13 -0500 | [diff] [blame] | 2688 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2689 | } else { |
| 2690 | dev_kfree_skb(skb); |
| 2691 | goto next_pkt; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2692 | } |
| 2693 | } |
| 2694 | /* got a valid packet - forward it to the network core */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2695 | skb_put(skb, len); |
| 2696 | skb->protocol = eth_type_trans(skb, dev); |
Tom Herbert | 53f224c | 2010-05-03 19:08:45 +0000 | [diff] [blame] | 2697 | napi_gro_receive(&np->napi, skb); |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2698 | dev->stats.rx_packets++; |
| 2699 | dev->stats.rx_bytes += len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2700 | next_pkt: |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2701 | if (unlikely(np->get_rx.orig++ == np->last_rx.orig)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2702 | np->get_rx.orig = np->first_rx.orig; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2703 | if (unlikely(np->get_rx_ctx++ == np->last_rx_ctx)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2704 | np->get_rx_ctx = np->first_rx_ctx; |
Ingo Molnar | bcb5feb | 2007-10-16 20:44:59 -0400 | [diff] [blame] | 2705 | |
| 2706 | rx_work++; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2707 | } |
| 2708 | |
Ingo Molnar | bcb5feb | 2007-10-16 20:44:59 -0400 | [diff] [blame] | 2709 | return rx_work; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2710 | } |
| 2711 | |
| 2712 | static int nv_rx_process_optimized(struct net_device *dev, int limit) |
| 2713 | { |
| 2714 | struct fe_priv *np = netdev_priv(dev); |
| 2715 | u32 flags; |
| 2716 | u32 vlanflags = 0; |
Ingo Molnar | c1b7151 | 2007-10-17 12:18:23 +0200 | [diff] [blame] | 2717 | int rx_work = 0; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2718 | struct sk_buff *skb; |
| 2719 | int len; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2720 | |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2721 | while ((np->get_rx.ex != np->put_rx.ex) && |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2722 | !((flags = le32_to_cpu(np->get_rx.ex->flaglen)) & NV_RX2_AVAIL) && |
Ingo Molnar | c1b7151 | 2007-10-17 12:18:23 +0200 | [diff] [blame] | 2723 | (rx_work < limit)) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2724 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2725 | /* |
| 2726 | * the packet is for us - immediately tear down the pci mapping. |
| 2727 | * TODO: check if a prefetch of the first cacheline improves |
| 2728 | * the performance. |
| 2729 | */ |
| 2730 | pci_unmap_single(np->pci_dev, np->get_rx_ctx->dma, |
| 2731 | np->get_rx_ctx->dma_len, |
| 2732 | PCI_DMA_FROMDEVICE); |
| 2733 | skb = np->get_rx_ctx->skb; |
| 2734 | np->get_rx_ctx->skb = NULL; |
| 2735 | |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2736 | /* look at what we actually got: */ |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2737 | if (likely(flags & NV_RX2_DESCRIPTORVALID)) { |
| 2738 | len = flags & LEN_MASK_V2; |
| 2739 | if (unlikely(flags & NV_RX2_ERROR)) { |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 2740 | if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_ERROR4) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2741 | len = nv_getlen(dev, skb->data, len); |
| 2742 | if (len < 0) { |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2743 | dev_kfree_skb(skb); |
| 2744 | goto next_pkt; |
| 2745 | } |
| 2746 | } |
| 2747 | /* framing errors are soft errors */ |
Ayaz Abdulla | 1ef6841 | 2008-08-06 12:11:03 -0400 | [diff] [blame] | 2748 | else if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_FRAMINGERR) { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2749 | if (flags & NV_RX2_SUBSTRACT1) |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2750 | len--; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2751 | } |
| 2752 | /* the rest are hard errors */ |
| 2753 | else { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2754 | dev_kfree_skb(skb); |
| 2755 | goto next_pkt; |
| 2756 | } |
| 2757 | } |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2758 | |
Ayaz Abdulla | bfaffe8 | 2008-01-13 16:02:55 -0500 | [diff] [blame] | 2759 | if (((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_TCP) || /*ip and tcp */ |
| 2760 | ((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_UDP)) /*ip and udp */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2761 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2762 | |
| 2763 | /* got a valid packet - forward it to the network core */ |
| 2764 | skb_put(skb, len); |
| 2765 | skb->protocol = eth_type_trans(skb, dev); |
| 2766 | prefetch(skb->data); |
| 2767 | |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2768 | if (likely(!np->vlangrp)) { |
Tom Herbert | 53f224c | 2010-05-03 19:08:45 +0000 | [diff] [blame] | 2769 | napi_gro_receive(&np->napi, skb); |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2770 | } else { |
| 2771 | vlanflags = le32_to_cpu(np->get_rx.ex->buflow); |
| 2772 | if (vlanflags & NV_RX3_VLAN_TAG_PRESENT) { |
Tom Herbert | 53f224c | 2010-05-03 19:08:45 +0000 | [diff] [blame] | 2773 | vlan_gro_receive(&np->napi, np->vlangrp, |
| 2774 | vlanflags & NV_RX3_VLAN_TAG_MASK, skb); |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2775 | } else { |
Tom Herbert | 53f224c | 2010-05-03 19:08:45 +0000 | [diff] [blame] | 2776 | napi_gro_receive(&np->napi, skb); |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2777 | } |
| 2778 | } |
| 2779 | |
Jeff Garzik | 8148ff4 | 2007-10-16 20:56:09 -0400 | [diff] [blame] | 2780 | dev->stats.rx_packets++; |
| 2781 | dev->stats.rx_bytes += len; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2782 | } else { |
| 2783 | dev_kfree_skb(skb); |
| 2784 | } |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2785 | next_pkt: |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2786 | if (unlikely(np->get_rx.ex++ == np->last_rx.ex)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 2787 | np->get_rx.ex = np->first_rx.ex; |
Ayaz Abdulla | b01867c | 2007-01-21 18:10:52 -0500 | [diff] [blame] | 2788 | if (unlikely(np->get_rx_ctx++ == np->last_rx_ctx)) |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 2789 | np->get_rx_ctx = np->first_rx_ctx; |
Ingo Molnar | c1b7151 | 2007-10-17 12:18:23 +0200 | [diff] [blame] | 2790 | |
| 2791 | rx_work++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2792 | } |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 2793 | |
Ingo Molnar | c1b7151 | 2007-10-17 12:18:23 +0200 | [diff] [blame] | 2794 | return rx_work; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2795 | } |
| 2796 | |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2797 | static void set_bufsize(struct net_device *dev) |
| 2798 | { |
| 2799 | struct fe_priv *np = netdev_priv(dev); |
| 2800 | |
| 2801 | if (dev->mtu <= ETH_DATA_LEN) |
| 2802 | np->rx_buf_sz = ETH_DATA_LEN + NV_RX_HEADERS; |
| 2803 | else |
| 2804 | np->rx_buf_sz = dev->mtu + NV_RX_HEADERS; |
| 2805 | } |
| 2806 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2807 | /* |
| 2808 | * nv_change_mtu: dev->change_mtu function |
| 2809 | * Called with dev_base_lock held for read. |
| 2810 | */ |
| 2811 | static int nv_change_mtu(struct net_device *dev, int new_mtu) |
| 2812 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2813 | struct fe_priv *np = netdev_priv(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2814 | int old_mtu; |
| 2815 | |
| 2816 | if (new_mtu < 64 || new_mtu > np->pkt_limit) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2817 | return -EINVAL; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2818 | |
| 2819 | old_mtu = dev->mtu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2820 | dev->mtu = new_mtu; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2821 | |
| 2822 | /* return early if the buffer sizes will not change */ |
| 2823 | if (old_mtu <= ETH_DATA_LEN && new_mtu <= ETH_DATA_LEN) |
| 2824 | return 0; |
| 2825 | if (old_mtu == new_mtu) |
| 2826 | return 0; |
| 2827 | |
| 2828 | /* synchronized against open : rtnl_lock() held by caller */ |
| 2829 | if (netif_running(dev)) { |
viro@ftp.linux.org.uk | 25097d4 | 2005-09-06 01:36:58 +0100 | [diff] [blame] | 2830 | u8 __iomem *base = get_hwbase(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2831 | /* |
| 2832 | * It seems that the nic preloads valid ring entries into an |
| 2833 | * internal buffer. The procedure for flushing everything is |
| 2834 | * guessed, there is probably a simpler approach. |
| 2835 | * Changing the MTU is a rare event, it shouldn't matter. |
| 2836 | */ |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 2837 | nv_disable_irq(dev); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 2838 | nv_napi_disable(dev); |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2839 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 2840 | netif_addr_lock(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2841 | spin_lock(&np->lock); |
| 2842 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 2843 | nv_stop_rxtx(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2844 | nv_txrx_reset(dev); |
| 2845 | /* drain rx queue */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 2846 | nv_drain_rxtx(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2847 | /* reinit driver view of the rx queue */ |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2848 | set_bufsize(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 2849 | if (nv_init_ring(dev)) { |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2850 | if (!np->in_shutdown) |
| 2851 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 2852 | } |
| 2853 | /* reinit nic view of the rx queue */ |
| 2854 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 2855 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2856 | writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2857 | base + NvRegRingSizes); |
| 2858 | pci_push(base); |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 2859 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2860 | pci_push(base); |
| 2861 | |
| 2862 | /* restart rx engine */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 2863 | nv_start_rxtx(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2864 | spin_unlock(&np->lock); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 2865 | netif_addr_unlock(dev); |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2866 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 2867 | nv_napi_enable(dev); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 2868 | nv_enable_irq(dev); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 2869 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2870 | return 0; |
| 2871 | } |
| 2872 | |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 2873 | static void nv_copy_mac_to_hw(struct net_device *dev) |
| 2874 | { |
viro@ftp.linux.org.uk | 25097d4 | 2005-09-06 01:36:58 +0100 | [diff] [blame] | 2875 | u8 __iomem *base = get_hwbase(dev); |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 2876 | u32 mac[2]; |
| 2877 | |
| 2878 | mac[0] = (dev->dev_addr[0] << 0) + (dev->dev_addr[1] << 8) + |
| 2879 | (dev->dev_addr[2] << 16) + (dev->dev_addr[3] << 24); |
| 2880 | mac[1] = (dev->dev_addr[4] << 0) + (dev->dev_addr[5] << 8); |
| 2881 | |
| 2882 | writel(mac[0], base + NvRegMacAddrA); |
| 2883 | writel(mac[1], base + NvRegMacAddrB); |
| 2884 | } |
| 2885 | |
| 2886 | /* |
| 2887 | * nv_set_mac_address: dev->set_mac_address function |
| 2888 | * Called with rtnl_lock() held. |
| 2889 | */ |
| 2890 | static int nv_set_mac_address(struct net_device *dev, void *addr) |
| 2891 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2892 | struct fe_priv *np = netdev_priv(dev); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 2893 | struct sockaddr *macaddr = (struct sockaddr *)addr; |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 2894 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 2895 | if (!is_valid_ether_addr(macaddr->sa_data)) |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 2896 | return -EADDRNOTAVAIL; |
| 2897 | |
| 2898 | /* synchronized against open : rtnl_lock() held by caller */ |
| 2899 | memcpy(dev->dev_addr, macaddr->sa_data, ETH_ALEN); |
| 2900 | |
| 2901 | if (netif_running(dev)) { |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2902 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 2903 | netif_addr_lock(dev); |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 2904 | spin_lock_irq(&np->lock); |
| 2905 | |
| 2906 | /* stop rx engine */ |
| 2907 | nv_stop_rx(dev); |
| 2908 | |
| 2909 | /* set mac address */ |
| 2910 | nv_copy_mac_to_hw(dev); |
| 2911 | |
| 2912 | /* restart rx engine */ |
| 2913 | nv_start_rx(dev); |
| 2914 | spin_unlock_irq(&np->lock); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 2915 | netif_addr_unlock(dev); |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2916 | netif_tx_unlock_bh(dev); |
Manfred Spraul | 72b3178 | 2005-07-31 18:33:34 +0200 | [diff] [blame] | 2917 | } else { |
| 2918 | nv_copy_mac_to_hw(dev); |
| 2919 | } |
| 2920 | return 0; |
| 2921 | } |
| 2922 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2923 | /* |
| 2924 | * nv_set_multicast: dev->set_multicast function |
Herbert Xu | 932ff27 | 2006-06-09 12:20:56 -0700 | [diff] [blame] | 2925 | * Called with netif_tx_lock held. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2926 | */ |
| 2927 | static void nv_set_multicast(struct net_device *dev) |
| 2928 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 2929 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2930 | u8 __iomem *base = get_hwbase(dev); |
| 2931 | u32 addr[2]; |
| 2932 | u32 mask[2]; |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 2933 | u32 pff = readl(base + NvRegPacketFilterFlags) & NVREG_PFF_PAUSE_RX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2934 | |
| 2935 | memset(addr, 0, sizeof(addr)); |
| 2936 | memset(mask, 0, sizeof(mask)); |
| 2937 | |
| 2938 | if (dev->flags & IFF_PROMISC) { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 2939 | pff |= NVREG_PFF_PROMISC; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2940 | } else { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 2941 | pff |= NVREG_PFF_MYADDR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2942 | |
Jiri Pirko | 48e2f18 | 2010-02-22 09:22:26 +0000 | [diff] [blame] | 2943 | if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2944 | u32 alwaysOff[2]; |
| 2945 | u32 alwaysOn[2]; |
| 2946 | |
| 2947 | alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0xffffffff; |
| 2948 | if (dev->flags & IFF_ALLMULTI) { |
| 2949 | alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0; |
| 2950 | } else { |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 2951 | struct netdev_hw_addr *ha; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2952 | |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 2953 | netdev_for_each_mc_addr(ha, dev) { |
| 2954 | unsigned char *addr = ha->addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2955 | u32 a, b; |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 2956 | |
| 2957 | a = le32_to_cpu(*(__le32 *) addr); |
| 2958 | b = le16_to_cpu(*(__le16 *) (&addr[4])); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2959 | alwaysOn[0] &= a; |
| 2960 | alwaysOff[0] &= ~a; |
| 2961 | alwaysOn[1] &= b; |
| 2962 | alwaysOff[1] &= ~b; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2963 | } |
| 2964 | } |
| 2965 | addr[0] = alwaysOn[0]; |
| 2966 | addr[1] = alwaysOn[1]; |
| 2967 | mask[0] = alwaysOn[0] | alwaysOff[0]; |
| 2968 | mask[1] = alwaysOn[1] | alwaysOff[1]; |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 2969 | } else { |
| 2970 | mask[0] = NVREG_MCASTMASKA_NONE; |
| 2971 | mask[1] = NVREG_MCASTMASKB_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2972 | } |
| 2973 | } |
| 2974 | addr[0] |= NVREG_MCASTADDRA_FORCE; |
| 2975 | pff |= NVREG_PFF_ALWAYS; |
| 2976 | spin_lock_irq(&np->lock); |
| 2977 | nv_stop_rx(dev); |
| 2978 | writel(addr[0], base + NvRegMulticastAddrA); |
| 2979 | writel(addr[1], base + NvRegMulticastAddrB); |
| 2980 | writel(mask[0], base + NvRegMulticastMaskA); |
| 2981 | writel(mask[1], base + NvRegMulticastMaskB); |
| 2982 | writel(pff, base + NvRegPacketFilterFlags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2983 | nv_start_rx(dev); |
| 2984 | spin_unlock_irq(&np->lock); |
| 2985 | } |
| 2986 | |
Adrian Bunk | c798505 | 2006-06-22 12:03:29 +0200 | [diff] [blame] | 2987 | static void nv_update_pause(struct net_device *dev, u32 pause_flags) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 2988 | { |
| 2989 | struct fe_priv *np = netdev_priv(dev); |
| 2990 | u8 __iomem *base = get_hwbase(dev); |
| 2991 | |
| 2992 | np->pause_flags &= ~(NV_PAUSEFRAME_TX_ENABLE | NV_PAUSEFRAME_RX_ENABLE); |
| 2993 | |
| 2994 | if (np->pause_flags & NV_PAUSEFRAME_RX_CAPABLE) { |
| 2995 | u32 pff = readl(base + NvRegPacketFilterFlags) & ~NVREG_PFF_PAUSE_RX; |
| 2996 | if (pause_flags & NV_PAUSEFRAME_RX_ENABLE) { |
| 2997 | writel(pff|NVREG_PFF_PAUSE_RX, base + NvRegPacketFilterFlags); |
| 2998 | np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 2999 | } else { |
| 3000 | writel(pff, base + NvRegPacketFilterFlags); |
| 3001 | } |
| 3002 | } |
| 3003 | if (np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE) { |
| 3004 | u32 regmisc = readl(base + NvRegMisc1) & ~NVREG_MISC1_PAUSE_TX; |
| 3005 | if (pause_flags & NV_PAUSEFRAME_TX_ENABLE) { |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 3006 | u32 pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V1; |
| 3007 | if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V2) |
| 3008 | pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V2; |
Ayaz Abdulla | 9a33e88 | 2008-08-06 12:12:34 -0400 | [diff] [blame] | 3009 | if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V3) { |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 3010 | pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V3; |
Ayaz Abdulla | 9a33e88 | 2008-08-06 12:12:34 -0400 | [diff] [blame] | 3011 | /* limit the number of tx pause frames to a default of 8 */ |
| 3012 | writel(readl(base + NvRegTxPauseFrameLimit)|NVREG_TX_PAUSEFRAMELIMIT_ENABLE, base + NvRegTxPauseFrameLimit); |
| 3013 | } |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 3014 | writel(pause_enable, base + NvRegTxPauseFrame); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3015 | writel(regmisc|NVREG_MISC1_PAUSE_TX, base + NvRegMisc1); |
| 3016 | np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 3017 | } else { |
| 3018 | writel(NVREG_TX_PAUSEFRAME_DISABLE, base + NvRegTxPauseFrame); |
| 3019 | writel(regmisc, base + NvRegMisc1); |
| 3020 | } |
| 3021 | } |
| 3022 | } |
| 3023 | |
Ayaz Abdulla | 4ea7f29 | 2005-11-11 08:29:59 -0500 | [diff] [blame] | 3024 | /** |
| 3025 | * nv_update_linkspeed: Setup the MAC according to the link partner |
| 3026 | * @dev: Network device to be configured |
| 3027 | * |
| 3028 | * The function queries the PHY and checks if there is a link partner. |
| 3029 | * If yes, then it sets up the MAC accordingly. Otherwise, the MAC is |
| 3030 | * set to 10 MBit HD. |
| 3031 | * |
| 3032 | * The function returns 0 if there is no link partner and 1 if there is |
| 3033 | * a good link partner. |
| 3034 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3035 | static int nv_update_linkspeed(struct net_device *dev) |
| 3036 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 3037 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3038 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3039 | int adv = 0; |
| 3040 | int lpa = 0; |
| 3041 | int adv_lpa, adv_pause, lpa_pause; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3042 | int newls = np->linkspeed; |
| 3043 | int newdup = np->duplex; |
| 3044 | int mii_status; |
| 3045 | int retval = 0; |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3046 | u32 control_1000, status_1000, phyreg, pause_flags, txreg; |
Ayaz Abdulla | b2976d2 | 2008-02-04 15:13:59 -0500 | [diff] [blame] | 3047 | u32 txrxFlags = 0; |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3048 | u32 phy_exp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3049 | |
| 3050 | /* BMSR_LSTATUS is latched, read it twice: |
| 3051 | * we want the current value. |
| 3052 | */ |
| 3053 | mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 3054 | mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 3055 | |
| 3056 | if (!(mii_status & BMSR_LSTATUS)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3057 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3058 | newdup = 0; |
| 3059 | retval = 0; |
| 3060 | goto set_speed; |
| 3061 | } |
| 3062 | |
| 3063 | if (np->autoneg == 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3064 | if (np->fixed_mode & LPA_100FULL) { |
| 3065 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
| 3066 | newdup = 1; |
| 3067 | } else if (np->fixed_mode & LPA_100HALF) { |
| 3068 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
| 3069 | newdup = 0; |
| 3070 | } else if (np->fixed_mode & LPA_10FULL) { |
| 3071 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3072 | newdup = 1; |
| 3073 | } else { |
| 3074 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3075 | newdup = 0; |
| 3076 | } |
| 3077 | retval = 1; |
| 3078 | goto set_speed; |
| 3079 | } |
| 3080 | /* check auto negotiation is complete */ |
| 3081 | if (!(mii_status & BMSR_ANEGCOMPLETE)) { |
| 3082 | /* still in autonegotiation - configure nic for 10 MBit HD and wait. */ |
| 3083 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3084 | newdup = 0; |
| 3085 | retval = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3086 | goto set_speed; |
| 3087 | } |
| 3088 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3089 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
| 3090 | lpa = mii_rw(dev, np->phyaddr, MII_LPA, MII_READ); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3091 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3092 | retval = 1; |
| 3093 | if (np->gigabit == PHY_GIGABIT) { |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3094 | control_1000 = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
| 3095 | status_1000 = mii_rw(dev, np->phyaddr, MII_STAT1000, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3096 | |
| 3097 | if ((control_1000 & ADVERTISE_1000FULL) && |
| 3098 | (status_1000 & LPA_1000FULL)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3099 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_1000; |
| 3100 | newdup = 1; |
| 3101 | goto set_speed; |
| 3102 | } |
| 3103 | } |
| 3104 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3105 | /* FIXME: handle parallel detection properly */ |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3106 | adv_lpa = lpa & adv; |
| 3107 | if (adv_lpa & LPA_100FULL) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3108 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
| 3109 | newdup = 1; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3110 | } else if (adv_lpa & LPA_100HALF) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3111 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100; |
| 3112 | newdup = 0; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3113 | } else if (adv_lpa & LPA_10FULL) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3114 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3115 | newdup = 1; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3116 | } else if (adv_lpa & LPA_10HALF) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3117 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3118 | newdup = 0; |
| 3119 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3120 | newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 3121 | newdup = 0; |
| 3122 | } |
| 3123 | |
| 3124 | set_speed: |
| 3125 | if (np->duplex == newdup && np->linkspeed == newls) |
| 3126 | return retval; |
| 3127 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3128 | np->duplex = newdup; |
| 3129 | np->linkspeed = newls; |
| 3130 | |
Ayaz Abdulla | b2976d2 | 2008-02-04 15:13:59 -0500 | [diff] [blame] | 3131 | /* The transmitter and receiver must be restarted for safe update */ |
| 3132 | if (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_START) { |
| 3133 | txrxFlags |= NV_RESTART_TX; |
| 3134 | nv_stop_tx(dev); |
| 3135 | } |
| 3136 | if (readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) { |
| 3137 | txrxFlags |= NV_RESTART_RX; |
| 3138 | nv_stop_rx(dev); |
| 3139 | } |
| 3140 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3141 | if (np->gigabit == PHY_GIGABIT) { |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 3142 | phyreg = readl(base + NvRegSlotTime); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3143 | phyreg &= ~(0x3FF00); |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 3144 | if (((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_10) || |
| 3145 | ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_100)) |
| 3146 | phyreg |= NVREG_SLOTTIME_10_100_FULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3147 | else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_1000) |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 3148 | phyreg |= NVREG_SLOTTIME_1000_FULL; |
| 3149 | writel(phyreg, base + NvRegSlotTime); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3150 | } |
| 3151 | |
| 3152 | phyreg = readl(base + NvRegPhyInterface); |
| 3153 | phyreg &= ~(PHY_HALF|PHY_100|PHY_1000); |
| 3154 | if (np->duplex == 0) |
| 3155 | phyreg |= PHY_HALF; |
| 3156 | if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_100) |
| 3157 | phyreg |= PHY_100; |
| 3158 | else if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000) |
| 3159 | phyreg |= PHY_1000; |
| 3160 | writel(phyreg, base + NvRegPhyInterface); |
| 3161 | |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3162 | phy_exp = mii_rw(dev, np->phyaddr, MII_EXPANSION, MII_READ) & EXPANSION_NWAY; /* autoneg capable */ |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3163 | if (phyreg & PHY_RGMII) { |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3164 | if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000) { |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3165 | txreg = NVREG_TX_DEFERRAL_RGMII_1000; |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3166 | } else { |
| 3167 | if (!phy_exp && !np->duplex && (np->driver_data & DEV_HAS_COLLISION_FIX)) { |
| 3168 | if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_10) |
| 3169 | txreg = NVREG_TX_DEFERRAL_RGMII_STRETCH_10; |
| 3170 | else |
| 3171 | txreg = NVREG_TX_DEFERRAL_RGMII_STRETCH_100; |
| 3172 | } else { |
| 3173 | txreg = NVREG_TX_DEFERRAL_RGMII_10_100; |
| 3174 | } |
| 3175 | } |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3176 | } else { |
Ayaz Abdulla | fd9b558 | 2008-02-05 12:29:49 -0500 | [diff] [blame] | 3177 | if (!phy_exp && !np->duplex && (np->driver_data & DEV_HAS_COLLISION_FIX)) |
| 3178 | txreg = NVREG_TX_DEFERRAL_MII_STRETCH; |
| 3179 | else |
| 3180 | txreg = NVREG_TX_DEFERRAL_DEFAULT; |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 3181 | } |
| 3182 | writel(txreg, base + NvRegTxDeferral); |
| 3183 | |
Ayaz Abdulla | 95d161c | 2006-07-06 16:46:25 -0400 | [diff] [blame] | 3184 | if (np->desc_ver == DESC_VER_1) { |
| 3185 | txreg = NVREG_TX_WM_DESC1_DEFAULT; |
| 3186 | } else { |
| 3187 | if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000) |
| 3188 | txreg = NVREG_TX_WM_DESC2_3_1000; |
| 3189 | else |
| 3190 | txreg = NVREG_TX_WM_DESC2_3_DEFAULT; |
| 3191 | } |
| 3192 | writel(txreg, base + NvRegTxWatermark); |
| 3193 | |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 3194 | writel(NVREG_MISC1_FORCE | (np->duplex ? 0 : NVREG_MISC1_HD), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3195 | base + NvRegMisc1); |
| 3196 | pci_push(base); |
| 3197 | writel(np->linkspeed, base + NvRegLinkSpeed); |
| 3198 | pci_push(base); |
| 3199 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3200 | pause_flags = 0; |
| 3201 | /* setup pause frame */ |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3202 | if (np->duplex != 0) { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3203 | if (np->autoneg && np->pause_flags & NV_PAUSEFRAME_AUTONEG) { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 3204 | adv_pause = adv & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
| 3205 | lpa_pause = lpa & (LPA_PAUSE_CAP | LPA_PAUSE_ASYM); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3206 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3207 | switch (adv_pause) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 3208 | case ADVERTISE_PAUSE_CAP: |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3209 | if (lpa_pause & LPA_PAUSE_CAP) { |
| 3210 | pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 3211 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) |
| 3212 | pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 3213 | } |
| 3214 | break; |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 3215 | case ADVERTISE_PAUSE_ASYM: |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 3216 | if (lpa_pause == (LPA_PAUSE_CAP | LPA_PAUSE_ASYM)) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3217 | pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3218 | break; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 3219 | case ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM: |
| 3220 | if (lpa_pause & LPA_PAUSE_CAP) { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3221 | pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 3222 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) |
| 3223 | pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 3224 | } |
| 3225 | if (lpa_pause == LPA_PAUSE_ASYM) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3226 | pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3227 | break; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3228 | } |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3229 | } else { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3230 | pause_flags = np->pause_flags; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3231 | } |
| 3232 | } |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 3233 | nv_update_pause(dev, pause_flags); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 3234 | |
Ayaz Abdulla | b2976d2 | 2008-02-04 15:13:59 -0500 | [diff] [blame] | 3235 | if (txrxFlags & NV_RESTART_TX) |
| 3236 | nv_start_tx(dev); |
| 3237 | if (txrxFlags & NV_RESTART_RX) |
| 3238 | nv_start_rx(dev); |
| 3239 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3240 | return retval; |
| 3241 | } |
| 3242 | |
| 3243 | static void nv_linkchange(struct net_device *dev) |
| 3244 | { |
| 3245 | if (nv_update_linkspeed(dev)) { |
Ayaz Abdulla | 4ea7f29 | 2005-11-11 08:29:59 -0500 | [diff] [blame] | 3246 | if (!netif_carrier_ok(dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3247 | netif_carrier_on(dev); |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 3248 | netdev_info(dev, "link up\n"); |
Ayaz Abdulla | 88d7d8b | 2009-05-01 01:41:50 +0000 | [diff] [blame] | 3249 | nv_txrx_gate(dev, false); |
Ayaz Abdulla | 4ea7f29 | 2005-11-11 08:29:59 -0500 | [diff] [blame] | 3250 | nv_start_rx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3251 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3252 | } else { |
| 3253 | if (netif_carrier_ok(dev)) { |
| 3254 | netif_carrier_off(dev); |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 3255 | netdev_info(dev, "link down\n"); |
Ayaz Abdulla | 88d7d8b | 2009-05-01 01:41:50 +0000 | [diff] [blame] | 3256 | nv_txrx_gate(dev, true); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3257 | nv_stop_rx(dev); |
| 3258 | } |
| 3259 | } |
| 3260 | } |
| 3261 | |
| 3262 | static void nv_link_irq(struct net_device *dev) |
| 3263 | { |
| 3264 | u8 __iomem *base = get_hwbase(dev); |
| 3265 | u32 miistat; |
| 3266 | |
| 3267 | miistat = readl(base + NvRegMIIStatus); |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 3268 | writel(NVREG_MIISTAT_LINKCHANGE, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3269 | |
| 3270 | if (miistat & (NVREG_MIISTAT_LINKCHANGE)) |
| 3271 | nv_linkchange(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3272 | } |
| 3273 | |
Ayaz Abdulla | 4db0ee17 | 2008-06-09 16:51:06 -0700 | [diff] [blame] | 3274 | static void nv_msi_workaround(struct fe_priv *np) |
| 3275 | { |
| 3276 | |
| 3277 | /* Need to toggle the msi irq mask within the ethernet device, |
| 3278 | * otherwise, future interrupts will not be detected. |
| 3279 | */ |
| 3280 | if (np->msi_flags & NV_MSI_ENABLED) { |
| 3281 | u8 __iomem *base = np->base; |
| 3282 | |
| 3283 | writel(0, base + NvRegMSIIrqMask); |
| 3284 | writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask); |
| 3285 | } |
| 3286 | } |
| 3287 | |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3288 | static inline int nv_change_interrupt_mode(struct net_device *dev, int total_work) |
| 3289 | { |
| 3290 | struct fe_priv *np = netdev_priv(dev); |
| 3291 | |
| 3292 | if (optimization_mode == NV_OPTIMIZATION_MODE_DYNAMIC) { |
| 3293 | if (total_work > NV_DYNAMIC_THRESHOLD) { |
| 3294 | /* transition to poll based interrupts */ |
| 3295 | np->quiet_count = 0; |
| 3296 | if (np->irqmask != NVREG_IRQMASK_CPU) { |
| 3297 | np->irqmask = NVREG_IRQMASK_CPU; |
| 3298 | return 1; |
| 3299 | } |
| 3300 | } else { |
| 3301 | if (np->quiet_count < NV_DYNAMIC_MAX_QUIET_COUNT) { |
| 3302 | np->quiet_count++; |
| 3303 | } else { |
| 3304 | /* reached a period of low activity, switch |
| 3305 | to per tx/rx packet interrupts */ |
| 3306 | if (np->irqmask != NVREG_IRQMASK_THROUGHPUT) { |
| 3307 | np->irqmask = NVREG_IRQMASK_THROUGHPUT; |
| 3308 | return 1; |
| 3309 | } |
| 3310 | } |
| 3311 | } |
| 3312 | } |
| 3313 | return 0; |
| 3314 | } |
| 3315 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3316 | static irqreturn_t nv_nic_irq(int foo, void *data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3317 | { |
| 3318 | struct net_device *dev = (struct net_device *) data; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 3319 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3320 | u8 __iomem *base = get_hwbase(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3321 | |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3322 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { |
| 3323 | np->events = readl(base + NvRegIrqStatus); |
Ayaz Abdulla | 1b2bb76 | 2009-03-05 08:02:34 +0000 | [diff] [blame] | 3324 | writel(np->events, base + NvRegIrqStatus); |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3325 | } else { |
| 3326 | np->events = readl(base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | 1b2bb76 | 2009-03-05 08:02:34 +0000 | [diff] [blame] | 3327 | writel(np->events, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3328 | } |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3329 | if (!(np->events & np->irqmask)) |
| 3330 | return IRQ_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3331 | |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3332 | nv_msi_workaround(np); |
Ayaz Abdulla | 4db0ee17 | 2008-06-09 16:51:06 -0700 | [diff] [blame] | 3333 | |
Eric Dumazet | 78c29bd | 2009-07-02 04:04:45 +0000 | [diff] [blame] | 3334 | if (napi_schedule_prep(&np->napi)) { |
| 3335 | /* |
| 3336 | * Disable further irq's (msix not enabled with napi) |
| 3337 | */ |
| 3338 | writel(0, base + NvRegIrqMask); |
| 3339 | __napi_schedule(&np->napi); |
| 3340 | } |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3341 | |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3342 | return IRQ_HANDLED; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3343 | } |
| 3344 | |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3345 | /** |
| 3346 | * All _optimized functions are used to help increase performance |
| 3347 | * (reduce CPU and increase throughput). They use descripter version 3, |
| 3348 | * compiler directives, and reduce memory accesses. |
| 3349 | */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3350 | static irqreturn_t nv_nic_irq_optimized(int foo, void *data) |
| 3351 | { |
| 3352 | struct net_device *dev = (struct net_device *) data; |
| 3353 | struct fe_priv *np = netdev_priv(dev); |
| 3354 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3355 | |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3356 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { |
| 3357 | np->events = readl(base + NvRegIrqStatus); |
Ayaz Abdulla | 1b2bb76 | 2009-03-05 08:02:34 +0000 | [diff] [blame] | 3358 | writel(np->events, base + NvRegIrqStatus); |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3359 | } else { |
| 3360 | np->events = readl(base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | 1b2bb76 | 2009-03-05 08:02:34 +0000 | [diff] [blame] | 3361 | writel(np->events, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3362 | } |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3363 | if (!(np->events & np->irqmask)) |
| 3364 | return IRQ_NONE; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3365 | |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3366 | nv_msi_workaround(np); |
Ayaz Abdulla | 4db0ee17 | 2008-06-09 16:51:06 -0700 | [diff] [blame] | 3367 | |
Eric Dumazet | 78c29bd | 2009-07-02 04:04:45 +0000 | [diff] [blame] | 3368 | if (napi_schedule_prep(&np->napi)) { |
| 3369 | /* |
| 3370 | * Disable further irq's (msix not enabled with napi) |
| 3371 | */ |
| 3372 | writel(0, base + NvRegIrqMask); |
| 3373 | __napi_schedule(&np->napi); |
| 3374 | } |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3375 | |
Ayaz Abdulla | b67874a | 2009-03-05 08:02:22 +0000 | [diff] [blame] | 3376 | return IRQ_HANDLED; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3377 | } |
| 3378 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3379 | static irqreturn_t nv_nic_irq_tx(int foo, void *data) |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3380 | { |
| 3381 | struct net_device *dev = (struct net_device *) data; |
| 3382 | struct fe_priv *np = netdev_priv(dev); |
| 3383 | u8 __iomem *base = get_hwbase(dev); |
| 3384 | u32 events; |
| 3385 | int i; |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3386 | unsigned long flags; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3387 | |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 3388 | for (i = 0;; i++) { |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3389 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_TX_ALL; |
| 3390 | writel(NVREG_IRQ_TX_ALL, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3391 | if (!(events & np->irqmask)) |
| 3392 | break; |
| 3393 | |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3394 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | 4e16ed1 | 2007-01-23 12:00:56 -0500 | [diff] [blame] | 3395 | nv_tx_done_optimized(dev, TX_WORK_PER_LOOP); |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3396 | spin_unlock_irqrestore(&np->lock, flags); |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 3397 | |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3398 | if (unlikely(i > max_interrupt_work)) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3399 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3400 | /* disable interrupts on the nic */ |
| 3401 | writel(NVREG_IRQ_TX_ALL, base + NvRegIrqMask); |
| 3402 | pci_push(base); |
| 3403 | |
| 3404 | if (!np->in_shutdown) { |
| 3405 | np->nic_poll_irq |= NVREG_IRQ_TX_ALL; |
| 3406 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3407 | } |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3408 | spin_unlock_irqrestore(&np->lock, flags); |
Joe Perches | c20ec76 | 2010-11-29 07:42:02 +0000 | [diff] [blame] | 3409 | netdev_dbg(dev, "%s: too many iterations (%d)\n", |
| 3410 | __func__, i); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3411 | break; |
| 3412 | } |
| 3413 | |
| 3414 | } |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3415 | |
| 3416 | return IRQ_RETVAL(i); |
| 3417 | } |
| 3418 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3419 | static int nv_napi_poll(struct napi_struct *napi, int budget) |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3420 | { |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3421 | struct fe_priv *np = container_of(napi, struct fe_priv, napi); |
| 3422 | struct net_device *dev = np->dev; |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3423 | u8 __iomem *base = get_hwbase(dev); |
Francois Romieu | d15e9c4 | 2006-12-17 23:03:15 +0100 | [diff] [blame] | 3424 | unsigned long flags; |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3425 | int retcode; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 3426 | int rx_count, tx_work = 0, rx_work = 0; |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3427 | |
stephen hemminger | 81a2e36 | 2010-04-28 08:25:28 +0000 | [diff] [blame] | 3428 | do { |
| 3429 | if (!nv_optimized(np)) { |
| 3430 | spin_lock_irqsave(&np->lock, flags); |
| 3431 | tx_work += nv_tx_done(dev, np->tx_ring_size); |
| 3432 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3433 | |
Tom Herbert | d951f72 | 2010-05-05 18:15:21 +0000 | [diff] [blame] | 3434 | rx_count = nv_rx_process(dev, budget - rx_work); |
stephen hemminger | 81a2e36 | 2010-04-28 08:25:28 +0000 | [diff] [blame] | 3435 | retcode = nv_alloc_rx(dev); |
| 3436 | } else { |
| 3437 | spin_lock_irqsave(&np->lock, flags); |
| 3438 | tx_work += nv_tx_done_optimized(dev, np->tx_ring_size); |
| 3439 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3440 | |
Tom Herbert | d951f72 | 2010-05-05 18:15:21 +0000 | [diff] [blame] | 3441 | rx_count = nv_rx_process_optimized(dev, |
| 3442 | budget - rx_work); |
stephen hemminger | 81a2e36 | 2010-04-28 08:25:28 +0000 | [diff] [blame] | 3443 | retcode = nv_alloc_rx_optimized(dev); |
| 3444 | } |
| 3445 | } while (retcode == 0 && |
| 3446 | rx_count > 0 && (rx_work += rx_count) < budget); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3447 | |
Ayaz Abdulla | e0379a1 | 2007-02-20 03:34:30 -0500 | [diff] [blame] | 3448 | if (retcode) { |
Francois Romieu | d15e9c4 | 2006-12-17 23:03:15 +0100 | [diff] [blame] | 3449 | spin_lock_irqsave(&np->lock, flags); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3450 | if (!np->in_shutdown) |
| 3451 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
Francois Romieu | d15e9c4 | 2006-12-17 23:03:15 +0100 | [diff] [blame] | 3452 | spin_unlock_irqrestore(&np->lock, flags); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3453 | } |
| 3454 | |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3455 | nv_change_interrupt_mode(dev, tx_work + rx_work); |
| 3456 | |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3457 | if (unlikely(np->events & NVREG_IRQ_LINK)) { |
| 3458 | spin_lock_irqsave(&np->lock, flags); |
| 3459 | nv_link_irq(dev); |
| 3460 | spin_unlock_irqrestore(&np->lock, flags); |
| 3461 | } |
| 3462 | if (unlikely(np->need_linktimer && time_after(jiffies, np->link_timeout))) { |
| 3463 | spin_lock_irqsave(&np->lock, flags); |
| 3464 | nv_linkchange(dev); |
| 3465 | spin_unlock_irqrestore(&np->lock, flags); |
| 3466 | np->link_timeout = jiffies + LINK_TIMEOUT; |
| 3467 | } |
| 3468 | if (unlikely(np->events & NVREG_IRQ_RECOVER_ERROR)) { |
| 3469 | spin_lock_irqsave(&np->lock, flags); |
| 3470 | if (!np->in_shutdown) { |
| 3471 | np->nic_poll_irq = np->irqmask; |
| 3472 | np->recover_error = 1; |
| 3473 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3474 | } |
| 3475 | spin_unlock_irqrestore(&np->lock, flags); |
David S. Miller | 6c2da9c | 2009-04-09 01:09:33 -0700 | [diff] [blame] | 3476 | napi_complete(napi); |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3477 | return rx_work; |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3478 | } |
| 3479 | |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3480 | if (rx_work < budget) { |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3481 | /* re-enable interrupts |
| 3482 | (msix not enabled in napi) */ |
David S. Miller | 6c2da9c | 2009-04-09 01:09:33 -0700 | [diff] [blame] | 3483 | napi_complete(napi); |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3484 | |
Ayaz Abdulla | f27e6f3 | 2009-03-05 08:02:14 +0000 | [diff] [blame] | 3485 | writel(np->irqmask, base + NvRegIrqMask); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3486 | } |
Ayaz Abdulla | 4145ade | 2009-03-05 08:02:26 +0000 | [diff] [blame] | 3487 | return rx_work; |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3488 | } |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 3489 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3490 | static irqreturn_t nv_nic_irq_rx(int foo, void *data) |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3491 | { |
| 3492 | struct net_device *dev = (struct net_device *) data; |
| 3493 | struct fe_priv *np = netdev_priv(dev); |
| 3494 | u8 __iomem *base = get_hwbase(dev); |
| 3495 | u32 events; |
| 3496 | int i; |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3497 | unsigned long flags; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3498 | |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 3499 | for (i = 0;; i++) { |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3500 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL; |
| 3501 | writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3502 | if (!(events & np->irqmask)) |
| 3503 | break; |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 3504 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 3505 | if (nv_rx_process_optimized(dev, RX_WORK_PER_LOOP)) { |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3506 | if (unlikely(nv_alloc_rx_optimized(dev))) { |
| 3507 | spin_lock_irqsave(&np->lock, flags); |
| 3508 | if (!np->in_shutdown) |
| 3509 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 3510 | spin_unlock_irqrestore(&np->lock, flags); |
| 3511 | } |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3512 | } |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 3513 | |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3514 | if (unlikely(i > max_interrupt_work)) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3515 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3516 | /* disable interrupts on the nic */ |
| 3517 | writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask); |
| 3518 | pci_push(base); |
| 3519 | |
| 3520 | if (!np->in_shutdown) { |
| 3521 | np->nic_poll_irq |= NVREG_IRQ_RX_ALL; |
| 3522 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3523 | } |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3524 | spin_unlock_irqrestore(&np->lock, flags); |
Joe Perches | c20ec76 | 2010-11-29 07:42:02 +0000 | [diff] [blame] | 3525 | netdev_dbg(dev, "%s: too many iterations (%d)\n", |
| 3526 | __func__, i); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3527 | break; |
| 3528 | } |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3529 | } |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3530 | |
| 3531 | return IRQ_RETVAL(i); |
| 3532 | } |
| 3533 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3534 | static irqreturn_t nv_nic_irq_other(int foo, void *data) |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3535 | { |
| 3536 | struct net_device *dev = (struct net_device *) data; |
| 3537 | struct fe_priv *np = netdev_priv(dev); |
| 3538 | u8 __iomem *base = get_hwbase(dev); |
| 3539 | u32 events; |
| 3540 | int i; |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3541 | unsigned long flags; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3542 | |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 3543 | for (i = 0;; i++) { |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3544 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_OTHER; |
| 3545 | writel(NVREG_IRQ_OTHER, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3546 | if (!(events & np->irqmask)) |
| 3547 | break; |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 3548 | |
Ayaz Abdulla | 4e16ed1 | 2007-01-23 12:00:56 -0500 | [diff] [blame] | 3549 | /* check tx in case we reached max loop limit in tx isr */ |
| 3550 | spin_lock_irqsave(&np->lock, flags); |
| 3551 | nv_tx_done_optimized(dev, TX_WORK_PER_LOOP); |
| 3552 | spin_unlock_irqrestore(&np->lock, flags); |
| 3553 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3554 | if (events & NVREG_IRQ_LINK) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3555 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3556 | nv_link_irq(dev); |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3557 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3558 | } |
| 3559 | if (np->need_linktimer && time_after(jiffies, np->link_timeout)) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3560 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3561 | nv_linkchange(dev); |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3562 | spin_unlock_irqrestore(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3563 | np->link_timeout = jiffies + LINK_TIMEOUT; |
| 3564 | } |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3565 | if (events & NVREG_IRQ_RECOVER_ERROR) { |
| 3566 | spin_lock_irq(&np->lock); |
| 3567 | /* disable interrupts on the nic */ |
| 3568 | writel(NVREG_IRQ_OTHER, base + NvRegIrqMask); |
| 3569 | pci_push(base); |
| 3570 | |
| 3571 | if (!np->in_shutdown) { |
| 3572 | np->nic_poll_irq |= NVREG_IRQ_OTHER; |
| 3573 | np->recover_error = 1; |
| 3574 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3575 | } |
| 3576 | spin_unlock_irq(&np->lock); |
| 3577 | break; |
| 3578 | } |
Ayaz Abdulla | f0734ab | 2007-01-21 18:10:57 -0500 | [diff] [blame] | 3579 | if (unlikely(i > max_interrupt_work)) { |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3580 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3581 | /* disable interrupts on the nic */ |
| 3582 | writel(NVREG_IRQ_OTHER, base + NvRegIrqMask); |
| 3583 | pci_push(base); |
| 3584 | |
| 3585 | if (!np->in_shutdown) { |
| 3586 | np->nic_poll_irq |= NVREG_IRQ_OTHER; |
| 3587 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
| 3588 | } |
Peter Zijlstra | 0a07bc6 | 2006-09-19 14:55:22 +0200 | [diff] [blame] | 3589 | spin_unlock_irqrestore(&np->lock, flags); |
Joe Perches | c20ec76 | 2010-11-29 07:42:02 +0000 | [diff] [blame] | 3590 | netdev_dbg(dev, "%s: too many iterations (%d)\n", |
| 3591 | __func__, i); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3592 | break; |
| 3593 | } |
| 3594 | |
| 3595 | } |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3596 | |
| 3597 | return IRQ_RETVAL(i); |
| 3598 | } |
| 3599 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3600 | static irqreturn_t nv_nic_irq_test(int foo, void *data) |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3601 | { |
| 3602 | struct net_device *dev = (struct net_device *) data; |
| 3603 | struct fe_priv *np = netdev_priv(dev); |
| 3604 | u8 __iomem *base = get_hwbase(dev); |
| 3605 | u32 events; |
| 3606 | |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3607 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) { |
| 3608 | events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; |
| 3609 | writel(NVREG_IRQ_TIMER, base + NvRegIrqStatus); |
| 3610 | } else { |
| 3611 | events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK; |
| 3612 | writel(NVREG_IRQ_TIMER, base + NvRegMSIXIrqStatus); |
| 3613 | } |
| 3614 | pci_push(base); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3615 | if (!(events & NVREG_IRQ_TIMER)) |
| 3616 | return IRQ_RETVAL(0); |
| 3617 | |
Ayaz Abdulla | 4db0ee17 | 2008-06-09 16:51:06 -0700 | [diff] [blame] | 3618 | nv_msi_workaround(np); |
| 3619 | |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3620 | spin_lock(&np->lock); |
| 3621 | np->intr_test = 1; |
| 3622 | spin_unlock(&np->lock); |
| 3623 | |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3624 | return IRQ_RETVAL(1); |
| 3625 | } |
| 3626 | |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3627 | static void set_msix_vector_map(struct net_device *dev, u32 vector, u32 irqmask) |
| 3628 | { |
| 3629 | u8 __iomem *base = get_hwbase(dev); |
| 3630 | int i; |
| 3631 | u32 msixmap = 0; |
| 3632 | |
| 3633 | /* Each interrupt bit can be mapped to a MSIX vector (4 bits). |
| 3634 | * MSIXMap0 represents the first 8 interrupts and MSIXMap1 represents |
| 3635 | * the remaining 8 interrupts. |
| 3636 | */ |
| 3637 | for (i = 0; i < 8; i++) { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 3638 | if ((irqmask >> i) & 0x1) |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3639 | msixmap |= vector << (i << 2); |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3640 | } |
| 3641 | writel(readl(base + NvRegMSIXMap0) | msixmap, base + NvRegMSIXMap0); |
| 3642 | |
| 3643 | msixmap = 0; |
| 3644 | for (i = 0; i < 8; i++) { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 3645 | if ((irqmask >> (i + 8)) & 0x1) |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3646 | msixmap |= vector << (i << 2); |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3647 | } |
| 3648 | writel(readl(base + NvRegMSIXMap1) | msixmap, base + NvRegMSIXMap1); |
| 3649 | } |
| 3650 | |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3651 | static int nv_request_irq(struct net_device *dev, int intr_test) |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3652 | { |
| 3653 | struct fe_priv *np = get_nvpriv(dev); |
| 3654 | u8 __iomem *base = get_hwbase(dev); |
| 3655 | int ret = 1; |
| 3656 | int i; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3657 | irqreturn_t (*handler)(int foo, void *data); |
| 3658 | |
| 3659 | if (intr_test) { |
| 3660 | handler = nv_nic_irq_test; |
| 3661 | } else { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 3662 | if (nv_optimized(np)) |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3663 | handler = nv_nic_irq_optimized; |
| 3664 | else |
| 3665 | handler = nv_nic_irq; |
| 3666 | } |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3667 | |
| 3668 | if (np->msi_flags & NV_MSI_X_CAPABLE) { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 3669 | for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3670 | np->msi_x_entry[i].entry = i; |
Szymon Janc | 34cf97e | 2010-11-27 08:39:46 +0000 | [diff] [blame] | 3671 | ret = pci_enable_msix(np->pci_dev, np->msi_x_entry, (np->msi_flags & NV_MSI_X_VECTORS_MASK)); |
| 3672 | if (ret == 0) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3673 | np->msi_flags |= NV_MSI_X_ENABLED; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3674 | if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT && !intr_test) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3675 | /* Request irq for rx handling */ |
Yinghai Lu | ddb213f | 2009-02-06 01:29:23 -0800 | [diff] [blame] | 3676 | sprintf(np->name_rx, "%s-rx", dev->name); |
| 3677 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, |
Joe Perches | a0607fd | 2009-11-18 23:29:17 -0800 | [diff] [blame] | 3678 | nv_nic_irq_rx, IRQF_SHARED, np->name_rx, dev) != 0) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 3679 | netdev_info(dev, |
| 3680 | "request_irq failed for rx %d\n", |
| 3681 | ret); |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3682 | pci_disable_msix(np->pci_dev); |
| 3683 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 3684 | goto out_err; |
| 3685 | } |
| 3686 | /* Request irq for tx handling */ |
Yinghai Lu | ddb213f | 2009-02-06 01:29:23 -0800 | [diff] [blame] | 3687 | sprintf(np->name_tx, "%s-tx", dev->name); |
| 3688 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, |
Joe Perches | a0607fd | 2009-11-18 23:29:17 -0800 | [diff] [blame] | 3689 | nv_nic_irq_tx, IRQF_SHARED, np->name_tx, dev) != 0) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 3690 | netdev_info(dev, |
| 3691 | "request_irq failed for tx %d\n", |
| 3692 | ret); |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3693 | pci_disable_msix(np->pci_dev); |
| 3694 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 3695 | goto out_free_rx; |
| 3696 | } |
| 3697 | /* Request irq for link and timer handling */ |
Yinghai Lu | ddb213f | 2009-02-06 01:29:23 -0800 | [diff] [blame] | 3698 | sprintf(np->name_other, "%s-other", dev->name); |
| 3699 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector, |
Joe Perches | a0607fd | 2009-11-18 23:29:17 -0800 | [diff] [blame] | 3700 | nv_nic_irq_other, IRQF_SHARED, np->name_other, dev) != 0) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 3701 | netdev_info(dev, |
| 3702 | "request_irq failed for link %d\n", |
| 3703 | ret); |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3704 | pci_disable_msix(np->pci_dev); |
| 3705 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 3706 | goto out_free_tx; |
| 3707 | } |
| 3708 | /* map interrupts to their respective vector */ |
| 3709 | writel(0, base + NvRegMSIXMap0); |
| 3710 | writel(0, base + NvRegMSIXMap1); |
| 3711 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_RX, NVREG_IRQ_RX_ALL); |
| 3712 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_TX, NVREG_IRQ_TX_ALL); |
| 3713 | set_msix_vector_map(dev, NV_MSI_X_VECTOR_OTHER, NVREG_IRQ_OTHER); |
| 3714 | } else { |
| 3715 | /* Request irq for all interrupts */ |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3716 | if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector, handler, IRQF_SHARED, dev->name, dev) != 0) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 3717 | netdev_info(dev, |
| 3718 | "request_irq failed %d\n", |
| 3719 | ret); |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3720 | pci_disable_msix(np->pci_dev); |
| 3721 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 3722 | goto out_err; |
| 3723 | } |
| 3724 | |
| 3725 | /* map interrupts to vector 0 */ |
| 3726 | writel(0, base + NvRegMSIXMap0); |
| 3727 | writel(0, base + NvRegMSIXMap1); |
| 3728 | } |
| 3729 | } |
| 3730 | } |
| 3731 | if (ret != 0 && np->msi_flags & NV_MSI_CAPABLE) { |
Szymon Janc | 34cf97e | 2010-11-27 08:39:46 +0000 | [diff] [blame] | 3732 | ret = pci_enable_msi(np->pci_dev); |
| 3733 | if (ret == 0) { |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3734 | np->msi_flags |= NV_MSI_ENABLED; |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 3735 | dev->irq = np->pci_dev->irq; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3736 | if (request_irq(np->pci_dev->irq, handler, IRQF_SHARED, dev->name, dev) != 0) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 3737 | netdev_info(dev, "request_irq failed %d\n", |
| 3738 | ret); |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3739 | pci_disable_msi(np->pci_dev); |
| 3740 | np->msi_flags &= ~NV_MSI_ENABLED; |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 3741 | dev->irq = np->pci_dev->irq; |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3742 | goto out_err; |
| 3743 | } |
| 3744 | |
| 3745 | /* map interrupts to vector 0 */ |
| 3746 | writel(0, base + NvRegMSIMap0); |
| 3747 | writel(0, base + NvRegMSIMap1); |
| 3748 | /* enable msi vector 0 */ |
| 3749 | writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask); |
| 3750 | } |
| 3751 | } |
| 3752 | if (ret != 0) { |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 3753 | if (request_irq(np->pci_dev->irq, handler, IRQF_SHARED, dev->name, dev) != 0) |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3754 | goto out_err; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 3755 | |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3756 | } |
| 3757 | |
| 3758 | return 0; |
| 3759 | out_free_tx: |
| 3760 | free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, dev); |
| 3761 | out_free_rx: |
| 3762 | free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, dev); |
| 3763 | out_err: |
| 3764 | return 1; |
| 3765 | } |
| 3766 | |
| 3767 | static void nv_free_irq(struct net_device *dev) |
| 3768 | { |
| 3769 | struct fe_priv *np = get_nvpriv(dev); |
| 3770 | int i; |
| 3771 | |
| 3772 | if (np->msi_flags & NV_MSI_X_ENABLED) { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 3773 | for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3774 | free_irq(np->msi_x_entry[i].vector, dev); |
Ayaz Abdulla | 7a1854b | 2006-06-10 22:48:08 -0400 | [diff] [blame] | 3775 | pci_disable_msix(np->pci_dev); |
| 3776 | np->msi_flags &= ~NV_MSI_X_ENABLED; |
| 3777 | } else { |
| 3778 | free_irq(np->pci_dev->irq, dev); |
| 3779 | if (np->msi_flags & NV_MSI_ENABLED) { |
| 3780 | pci_disable_msi(np->pci_dev); |
| 3781 | np->msi_flags &= ~NV_MSI_ENABLED; |
| 3782 | } |
| 3783 | } |
| 3784 | } |
| 3785 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3786 | static void nv_do_nic_poll(unsigned long data) |
| 3787 | { |
| 3788 | struct net_device *dev = (struct net_device *) data; |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 3789 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3790 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3791 | u32 mask = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3792 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3793 | /* |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3794 | * First disable irq(s) and then |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3795 | * reenable interrupts on the nic, we have to do this before calling |
| 3796 | * nv_nic_irq because that may decide to do otherwise |
| 3797 | */ |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3798 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 3799 | if (!using_multi_irqs(dev)) { |
| 3800 | if (np->msi_flags & NV_MSI_X_ENABLED) |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 3801 | disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 3802 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 3803 | disable_irq_lockdep(np->pci_dev->irq); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3804 | mask = np->irqmask; |
| 3805 | } else { |
| 3806 | if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) { |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 3807 | disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3808 | mask |= NVREG_IRQ_RX_ALL; |
| 3809 | } |
| 3810 | if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) { |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 3811 | disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3812 | mask |= NVREG_IRQ_TX_ALL; |
| 3813 | } |
| 3814 | if (np->nic_poll_irq & NVREG_IRQ_OTHER) { |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 3815 | disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3816 | mask |= NVREG_IRQ_OTHER; |
| 3817 | } |
| 3818 | } |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 3819 | /* disable_irq() contains synchronize_irq, thus no irq handler can run now */ |
| 3820 | |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3821 | if (np->recover_error) { |
| 3822 | np->recover_error = 0; |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 3823 | netdev_info(dev, "MAC in recoverable error state\n"); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3824 | if (netif_running(dev)) { |
| 3825 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 3826 | netif_addr_lock(dev); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3827 | spin_lock(&np->lock); |
| 3828 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 3829 | nv_stop_rxtx(dev); |
Ayaz Abdulla | daa91a9 | 2009-02-07 00:25:00 -0800 | [diff] [blame] | 3830 | if (np->driver_data & DEV_HAS_POWER_CNTRL) |
| 3831 | nv_mac_reset(dev); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3832 | nv_txrx_reset(dev); |
| 3833 | /* drain rx queue */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 3834 | nv_drain_rxtx(dev); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3835 | /* reinit driver view of the rx queue */ |
| 3836 | set_bufsize(dev); |
| 3837 | if (nv_init_ring(dev)) { |
| 3838 | if (!np->in_shutdown) |
| 3839 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 3840 | } |
| 3841 | /* reinit nic view of the rx queue */ |
| 3842 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
| 3843 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 3844 | writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3845 | base + NvRegRingSizes); |
| 3846 | pci_push(base); |
| 3847 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 3848 | pci_push(base); |
Ayaz Abdulla | daa91a9 | 2009-02-07 00:25:00 -0800 | [diff] [blame] | 3849 | /* clear interrupts */ |
| 3850 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) |
| 3851 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
| 3852 | else |
| 3853 | writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3854 | |
| 3855 | /* restart rx engine */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 3856 | nv_start_rxtx(dev); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3857 | spin_unlock(&np->lock); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 3858 | netif_addr_unlock(dev); |
Ayaz Abdulla | c5cf910 | 2006-10-30 17:32:01 -0500 | [diff] [blame] | 3859 | netif_tx_unlock_bh(dev); |
| 3860 | } |
| 3861 | } |
| 3862 | |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3863 | writel(mask, base + NvRegIrqMask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3864 | pci_push(base); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3865 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 3866 | if (!using_multi_irqs(dev)) { |
Yinghai Lu | 79d30a5 | 2009-02-06 01:30:01 -0800 | [diff] [blame] | 3867 | np->nic_poll_irq = 0; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 3868 | if (nv_optimized(np)) |
Ayaz Abdulla | fcc5f26 | 2007-03-23 05:49:37 -0500 | [diff] [blame] | 3869 | nv_nic_irq_optimized(0, dev); |
| 3870 | else |
| 3871 | nv_nic_irq(0, dev); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 3872 | if (np->msi_flags & NV_MSI_X_ENABLED) |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 3873 | enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 3874 | else |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 3875 | enable_irq_lockdep(np->pci_dev->irq); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3876 | } else { |
| 3877 | if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) { |
Yinghai Lu | 79d30a5 | 2009-02-06 01:30:01 -0800 | [diff] [blame] | 3878 | np->nic_poll_irq &= ~NVREG_IRQ_RX_ALL; |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3879 | nv_nic_irq_rx(0, dev); |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 3880 | enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3881 | } |
| 3882 | if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) { |
Yinghai Lu | 79d30a5 | 2009-02-06 01:30:01 -0800 | [diff] [blame] | 3883 | np->nic_poll_irq &= ~NVREG_IRQ_TX_ALL; |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3884 | nv_nic_irq_tx(0, dev); |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 3885 | enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3886 | } |
| 3887 | if (np->nic_poll_irq & NVREG_IRQ_OTHER) { |
Yinghai Lu | 79d30a5 | 2009-02-06 01:30:01 -0800 | [diff] [blame] | 3888 | np->nic_poll_irq &= ~NVREG_IRQ_OTHER; |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3889 | nv_nic_irq_other(0, dev); |
Ingo Molnar | 8688cfc | 2006-07-03 00:25:39 -0700 | [diff] [blame] | 3890 | enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 3891 | } |
| 3892 | } |
Yinghai Lu | 79d30a5 | 2009-02-06 01:30:01 -0800 | [diff] [blame] | 3893 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3894 | } |
| 3895 | |
Michal Schmidt | 2918c35 | 2005-05-12 19:42:06 -0400 | [diff] [blame] | 3896 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 3897 | static void nv_poll_controller(struct net_device *dev) |
| 3898 | { |
| 3899 | nv_do_nic_poll((unsigned long) dev); |
| 3900 | } |
| 3901 | #endif |
| 3902 | |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 3903 | static void nv_do_stats_poll(unsigned long data) |
| 3904 | { |
| 3905 | struct net_device *dev = (struct net_device *) data; |
| 3906 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 3907 | |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 3908 | nv_get_hw_stats(dev); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 3909 | |
| 3910 | if (!np->in_shutdown) |
Daniel Drake | bfebbb8 | 2008-03-18 11:07:18 +0000 | [diff] [blame] | 3911 | mod_timer(&np->stats_poll, |
| 3912 | round_jiffies(jiffies + STATS_INTERVAL)); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 3913 | } |
| 3914 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3915 | static void nv_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
| 3916 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 3917 | struct fe_priv *np = netdev_priv(dev); |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 3918 | strcpy(info->driver, DRV_NAME); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3919 | strcpy(info->version, FORCEDETH_VERSION); |
| 3920 | strcpy(info->bus_info, pci_name(np->pci_dev)); |
| 3921 | } |
| 3922 | |
| 3923 | static void nv_get_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo) |
| 3924 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 3925 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3926 | wolinfo->supported = WAKE_MAGIC; |
| 3927 | |
| 3928 | spin_lock_irq(&np->lock); |
| 3929 | if (np->wolenabled) |
| 3930 | wolinfo->wolopts = WAKE_MAGIC; |
| 3931 | spin_unlock_irq(&np->lock); |
| 3932 | } |
| 3933 | |
| 3934 | static int nv_set_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo) |
| 3935 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 3936 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3937 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 3938 | u32 flags = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3939 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3940 | if (wolinfo->wolopts == 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3941 | np->wolenabled = 0; |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 3942 | } else if (wolinfo->wolopts & WAKE_MAGIC) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3943 | np->wolenabled = 1; |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 3944 | flags = NVREG_WAKEUPFLAGS_ENABLE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3945 | } |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 3946 | if (netif_running(dev)) { |
| 3947 | spin_lock_irq(&np->lock); |
| 3948 | writel(flags, base + NvRegWakeUpFlags); |
| 3949 | spin_unlock_irq(&np->lock); |
| 3950 | } |
Rafael J. Wysocki | dba5a68 | 2011-01-07 11:12:05 +0000 | [diff] [blame] | 3951 | device_set_wakeup_enable(&np->pci_dev->dev, np->wolenabled); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3952 | return 0; |
| 3953 | } |
| 3954 | |
| 3955 | static int nv_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) |
| 3956 | { |
| 3957 | struct fe_priv *np = netdev_priv(dev); |
| 3958 | int adv; |
| 3959 | |
| 3960 | spin_lock_irq(&np->lock); |
| 3961 | ecmd->port = PORT_MII; |
| 3962 | if (!netif_running(dev)) { |
| 3963 | /* We do not track link speed / duplex setting if the |
| 3964 | * interface is disabled. Force a link check */ |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 3965 | if (nv_update_linkspeed(dev)) { |
| 3966 | if (!netif_carrier_ok(dev)) |
| 3967 | netif_carrier_on(dev); |
| 3968 | } else { |
| 3969 | if (netif_carrier_ok(dev)) |
| 3970 | netif_carrier_off(dev); |
| 3971 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3972 | } |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 3973 | |
| 3974 | if (netif_carrier_ok(dev)) { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 3975 | switch (np->linkspeed & (NVREG_LINKSPEED_MASK)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3976 | case NVREG_LINKSPEED_10: |
| 3977 | ecmd->speed = SPEED_10; |
| 3978 | break; |
| 3979 | case NVREG_LINKSPEED_100: |
| 3980 | ecmd->speed = SPEED_100; |
| 3981 | break; |
| 3982 | case NVREG_LINKSPEED_1000: |
| 3983 | ecmd->speed = SPEED_1000; |
| 3984 | break; |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 3985 | } |
| 3986 | ecmd->duplex = DUPLEX_HALF; |
| 3987 | if (np->duplex) |
| 3988 | ecmd->duplex = DUPLEX_FULL; |
| 3989 | } else { |
| 3990 | ecmd->speed = -1; |
| 3991 | ecmd->duplex = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3992 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3993 | |
| 3994 | ecmd->autoneg = np->autoneg; |
| 3995 | |
| 3996 | ecmd->advertising = ADVERTISED_MII; |
| 3997 | if (np->autoneg) { |
| 3998 | ecmd->advertising |= ADVERTISED_Autoneg; |
| 3999 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4000 | if (adv & ADVERTISE_10HALF) |
| 4001 | ecmd->advertising |= ADVERTISED_10baseT_Half; |
| 4002 | if (adv & ADVERTISE_10FULL) |
| 4003 | ecmd->advertising |= ADVERTISED_10baseT_Full; |
| 4004 | if (adv & ADVERTISE_100HALF) |
| 4005 | ecmd->advertising |= ADVERTISED_100baseT_Half; |
| 4006 | if (adv & ADVERTISE_100FULL) |
| 4007 | ecmd->advertising |= ADVERTISED_100baseT_Full; |
| 4008 | if (np->gigabit == PHY_GIGABIT) { |
| 4009 | adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
| 4010 | if (adv & ADVERTISE_1000FULL) |
| 4011 | ecmd->advertising |= ADVERTISED_1000baseT_Full; |
| 4012 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4013 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4014 | ecmd->supported = (SUPPORTED_Autoneg | |
| 4015 | SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | |
| 4016 | SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | |
| 4017 | SUPPORTED_MII); |
| 4018 | if (np->gigabit == PHY_GIGABIT) |
| 4019 | ecmd->supported |= SUPPORTED_1000baseT_Full; |
| 4020 | |
| 4021 | ecmd->phy_address = np->phyaddr; |
| 4022 | ecmd->transceiver = XCVR_EXTERNAL; |
| 4023 | |
| 4024 | /* ignore maxtxpkt, maxrxpkt for now */ |
| 4025 | spin_unlock_irq(&np->lock); |
| 4026 | return 0; |
| 4027 | } |
| 4028 | |
| 4029 | static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) |
| 4030 | { |
| 4031 | struct fe_priv *np = netdev_priv(dev); |
David Decotigny | 25db033 | 2011-04-27 18:32:39 +0000 | [diff] [blame^] | 4032 | u32 speed = ethtool_cmd_speed(ecmd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4033 | |
| 4034 | if (ecmd->port != PORT_MII) |
| 4035 | return -EINVAL; |
| 4036 | if (ecmd->transceiver != XCVR_EXTERNAL) |
| 4037 | return -EINVAL; |
| 4038 | if (ecmd->phy_address != np->phyaddr) { |
| 4039 | /* TODO: support switching between multiple phys. Should be |
| 4040 | * trivial, but not enabled due to lack of test hardware. */ |
| 4041 | return -EINVAL; |
| 4042 | } |
| 4043 | if (ecmd->autoneg == AUTONEG_ENABLE) { |
| 4044 | u32 mask; |
| 4045 | |
| 4046 | mask = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full | |
| 4047 | ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full; |
| 4048 | if (np->gigabit == PHY_GIGABIT) |
| 4049 | mask |= ADVERTISED_1000baseT_Full; |
| 4050 | |
| 4051 | if ((ecmd->advertising & mask) == 0) |
| 4052 | return -EINVAL; |
| 4053 | |
| 4054 | } else if (ecmd->autoneg == AUTONEG_DISABLE) { |
| 4055 | /* Note: autonegotiation disable, speed 1000 intentionally |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 4056 | * forbidden - no one should need that. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4057 | |
David Decotigny | 25db033 | 2011-04-27 18:32:39 +0000 | [diff] [blame^] | 4058 | if (speed != SPEED_10 && speed != SPEED_100) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4059 | return -EINVAL; |
| 4060 | if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL) |
| 4061 | return -EINVAL; |
| 4062 | } else { |
| 4063 | return -EINVAL; |
| 4064 | } |
| 4065 | |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4066 | netif_carrier_off(dev); |
| 4067 | if (netif_running(dev)) { |
Tobias Diedrich | 97bff09 | 2008-07-03 23:54:56 -0700 | [diff] [blame] | 4068 | unsigned long flags; |
| 4069 | |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4070 | nv_disable_irq(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4071 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4072 | netif_addr_lock(dev); |
Tobias Diedrich | 97bff09 | 2008-07-03 23:54:56 -0700 | [diff] [blame] | 4073 | /* with plain spinlock lockdep complains */ |
| 4074 | spin_lock_irqsave(&np->lock, flags); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4075 | /* stop engines */ |
Tobias Diedrich | 97bff09 | 2008-07-03 23:54:56 -0700 | [diff] [blame] | 4076 | /* FIXME: |
| 4077 | * this can take some time, and interrupts are disabled |
| 4078 | * due to spin_lock_irqsave, but let's hope no daemon |
| 4079 | * is going to change the settings very often... |
| 4080 | * Worst case: |
| 4081 | * NV_RXSTOP_DELAY1MAX + NV_TXSTOP_DELAY1MAX |
| 4082 | * + some minor delays, which is up to a second approximately |
| 4083 | */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4084 | nv_stop_rxtx(dev); |
Tobias Diedrich | 97bff09 | 2008-07-03 23:54:56 -0700 | [diff] [blame] | 4085 | spin_unlock_irqrestore(&np->lock, flags); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4086 | netif_addr_unlock(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4087 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4088 | } |
| 4089 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4090 | if (ecmd->autoneg == AUTONEG_ENABLE) { |
| 4091 | int adv, bmcr; |
| 4092 | |
| 4093 | np->autoneg = 1; |
| 4094 | |
| 4095 | /* advertise only what has been requested */ |
| 4096 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4097 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4098 | if (ecmd->advertising & ADVERTISED_10baseT_Half) |
| 4099 | adv |= ADVERTISE_10HALF; |
| 4100 | if (ecmd->advertising & ADVERTISED_10baseT_Full) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4101 | adv |= ADVERTISE_10FULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4102 | if (ecmd->advertising & ADVERTISED_100baseT_Half) |
| 4103 | adv |= ADVERTISE_100HALF; |
| 4104 | if (ecmd->advertising & ADVERTISED_100baseT_Full) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4105 | adv |= ADVERTISE_100FULL; |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 4106 | if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) /* for rx we set both advertisements but disable tx pause */ |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4107 | adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
| 4108 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) |
| 4109 | adv |= ADVERTISE_PAUSE_ASYM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4110 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); |
| 4111 | |
| 4112 | if (np->gigabit == PHY_GIGABIT) { |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4113 | adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4114 | adv &= ~ADVERTISE_1000FULL; |
| 4115 | if (ecmd->advertising & ADVERTISED_1000baseT_Full) |
| 4116 | adv |= ADVERTISE_1000FULL; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4117 | mii_rw(dev, np->phyaddr, MII_CTRL1000, adv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4118 | } |
| 4119 | |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4120 | if (netif_running(dev)) |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 4121 | netdev_info(dev, "link down\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4122 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 4123 | if (np->phy_model == PHY_MODEL_MARVELL_E3016) { |
| 4124 | bmcr |= BMCR_ANENABLE; |
| 4125 | /* reset the phy in order for settings to stick, |
| 4126 | * and cause autoneg to start */ |
| 4127 | if (phy_reset(dev, bmcr)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 4128 | netdev_info(dev, "phy reset failed\n"); |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 4129 | return -EINVAL; |
| 4130 | } |
| 4131 | } else { |
| 4132 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); |
| 4133 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
| 4134 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4135 | } else { |
| 4136 | int adv, bmcr; |
| 4137 | |
| 4138 | np->autoneg = 0; |
| 4139 | |
| 4140 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4141 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
David Decotigny | 25db033 | 2011-04-27 18:32:39 +0000 | [diff] [blame^] | 4142 | if (speed == SPEED_10 && ecmd->duplex == DUPLEX_HALF) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4143 | adv |= ADVERTISE_10HALF; |
David Decotigny | 25db033 | 2011-04-27 18:32:39 +0000 | [diff] [blame^] | 4144 | if (speed == SPEED_10 && ecmd->duplex == DUPLEX_FULL) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4145 | adv |= ADVERTISE_10FULL; |
David Decotigny | 25db033 | 2011-04-27 18:32:39 +0000 | [diff] [blame^] | 4146 | if (speed == SPEED_100 && ecmd->duplex == DUPLEX_HALF) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4147 | adv |= ADVERTISE_100HALF; |
David Decotigny | 25db033 | 2011-04-27 18:32:39 +0000 | [diff] [blame^] | 4148 | if (speed == SPEED_100 && ecmd->duplex == DUPLEX_FULL) |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4149 | adv |= ADVERTISE_100FULL; |
| 4150 | np->pause_flags &= ~(NV_PAUSEFRAME_AUTONEG|NV_PAUSEFRAME_RX_ENABLE|NV_PAUSEFRAME_TX_ENABLE); |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 4151 | if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) {/* for rx we set both advertisements but disable tx pause */ |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4152 | adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
| 4153 | np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 4154 | } |
| 4155 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) { |
| 4156 | adv |= ADVERTISE_PAUSE_ASYM; |
| 4157 | np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 4158 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4159 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); |
| 4160 | np->fixed_mode = adv; |
| 4161 | |
| 4162 | if (np->gigabit == PHY_GIGABIT) { |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4163 | adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4164 | adv &= ~ADVERTISE_1000FULL; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 4165 | mii_rw(dev, np->phyaddr, MII_CTRL1000, adv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4166 | } |
| 4167 | |
| 4168 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4169 | bmcr &= ~(BMCR_ANENABLE|BMCR_SPEED100|BMCR_SPEED1000|BMCR_FULLDPLX); |
| 4170 | if (np->fixed_mode & (ADVERTISE_10FULL|ADVERTISE_100FULL)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4171 | bmcr |= BMCR_FULLDPLX; |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4172 | if (np->fixed_mode & (ADVERTISE_100HALF|ADVERTISE_100FULL)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4173 | bmcr |= BMCR_SPEED100; |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4174 | if (np->phy_oui == PHY_OUI_MARVELL) { |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 4175 | /* reset the phy in order for forced mode settings to stick */ |
| 4176 | if (phy_reset(dev, bmcr)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 4177 | netdev_info(dev, "phy reset failed\n"); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4178 | return -EINVAL; |
| 4179 | } |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 4180 | } else { |
| 4181 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
| 4182 | if (netif_running(dev)) { |
| 4183 | /* Wait a bit and then reconfigure the nic. */ |
| 4184 | udelay(10); |
| 4185 | nv_linkchange(dev); |
| 4186 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4187 | } |
| 4188 | } |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4189 | |
| 4190 | if (netif_running(dev)) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4191 | nv_start_rxtx(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4192 | nv_enable_irq(dev); |
| 4193 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4194 | |
| 4195 | return 0; |
| 4196 | } |
| 4197 | |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4198 | #define FORCEDETH_REGS_VER 1 |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4199 | |
| 4200 | static int nv_get_regs_len(struct net_device *dev) |
| 4201 | { |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 4202 | struct fe_priv *np = netdev_priv(dev); |
| 4203 | return np->register_size; |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4204 | } |
| 4205 | |
| 4206 | static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf) |
| 4207 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 4208 | struct fe_priv *np = netdev_priv(dev); |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4209 | u8 __iomem *base = get_hwbase(dev); |
| 4210 | u32 *rbuf = buf; |
| 4211 | int i; |
| 4212 | |
| 4213 | regs->version = FORCEDETH_REGS_VER; |
| 4214 | spin_lock_irq(&np->lock); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 4215 | for (i = 0; i <= np->register_size/sizeof(u32); i++) |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4216 | rbuf[i] = readl(base + i*sizeof(u32)); |
| 4217 | spin_unlock_irq(&np->lock); |
| 4218 | } |
| 4219 | |
| 4220 | static int nv_nway_reset(struct net_device *dev) |
| 4221 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 4222 | struct fe_priv *np = netdev_priv(dev); |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4223 | int ret; |
| 4224 | |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4225 | if (np->autoneg) { |
| 4226 | int bmcr; |
| 4227 | |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4228 | netif_carrier_off(dev); |
| 4229 | if (netif_running(dev)) { |
| 4230 | nv_disable_irq(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4231 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4232 | netif_addr_lock(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4233 | spin_lock(&np->lock); |
| 4234 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4235 | nv_stop_rxtx(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4236 | spin_unlock(&np->lock); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4237 | netif_addr_unlock(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4238 | netif_tx_unlock_bh(dev); |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 4239 | netdev_info(dev, "link down\n"); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4240 | } |
| 4241 | |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4242 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 4243 | if (np->phy_model == PHY_MODEL_MARVELL_E3016) { |
| 4244 | bmcr |= BMCR_ANENABLE; |
| 4245 | /* reset the phy in order for settings to stick*/ |
| 4246 | if (phy_reset(dev, bmcr)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 4247 | netdev_info(dev, "phy reset failed\n"); |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 4248 | return -EINVAL; |
| 4249 | } |
| 4250 | } else { |
| 4251 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); |
| 4252 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
| 4253 | } |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4254 | |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4255 | if (netif_running(dev)) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4256 | nv_start_rxtx(dev); |
Ayaz Abdulla | f9430a0 | 2006-06-10 22:47:47 -0400 | [diff] [blame] | 4257 | nv_enable_irq(dev); |
| 4258 | } |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4259 | ret = 0; |
| 4260 | } else { |
| 4261 | ret = -EINVAL; |
| 4262 | } |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4263 | |
| 4264 | return ret; |
| 4265 | } |
| 4266 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4267 | static void nv_get_ringparam(struct net_device *dev, struct ethtool_ringparam* ring) |
| 4268 | { |
| 4269 | struct fe_priv *np = netdev_priv(dev); |
| 4270 | |
| 4271 | ring->rx_max_pending = (np->desc_ver == DESC_VER_1) ? RING_MAX_DESC_VER_1 : RING_MAX_DESC_VER_2_3; |
| 4272 | ring->rx_mini_max_pending = 0; |
| 4273 | ring->rx_jumbo_max_pending = 0; |
| 4274 | ring->tx_max_pending = (np->desc_ver == DESC_VER_1) ? RING_MAX_DESC_VER_1 : RING_MAX_DESC_VER_2_3; |
| 4275 | |
| 4276 | ring->rx_pending = np->rx_ring_size; |
| 4277 | ring->rx_mini_pending = 0; |
| 4278 | ring->rx_jumbo_pending = 0; |
| 4279 | ring->tx_pending = np->tx_ring_size; |
| 4280 | } |
| 4281 | |
| 4282 | static int nv_set_ringparam(struct net_device *dev, struct ethtool_ringparam* ring) |
| 4283 | { |
| 4284 | struct fe_priv *np = netdev_priv(dev); |
| 4285 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 4286 | u8 *rxtx_ring, *rx_skbuff, *tx_skbuff; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4287 | dma_addr_t ring_addr; |
| 4288 | |
| 4289 | if (ring->rx_pending < RX_RING_MIN || |
| 4290 | ring->tx_pending < TX_RING_MIN || |
| 4291 | ring->rx_mini_pending != 0 || |
| 4292 | ring->rx_jumbo_pending != 0 || |
| 4293 | (np->desc_ver == DESC_VER_1 && |
| 4294 | (ring->rx_pending > RING_MAX_DESC_VER_1 || |
| 4295 | ring->tx_pending > RING_MAX_DESC_VER_1)) || |
| 4296 | (np->desc_ver != DESC_VER_1 && |
| 4297 | (ring->rx_pending > RING_MAX_DESC_VER_2_3 || |
| 4298 | ring->tx_pending > RING_MAX_DESC_VER_2_3))) { |
| 4299 | return -EINVAL; |
| 4300 | } |
| 4301 | |
| 4302 | /* allocate new rings */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4303 | if (!nv_optimized(np)) { |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4304 | rxtx_ring = pci_alloc_consistent(np->pci_dev, |
| 4305 | sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending), |
| 4306 | &ring_addr); |
| 4307 | } else { |
| 4308 | rxtx_ring = pci_alloc_consistent(np->pci_dev, |
| 4309 | sizeof(struct ring_desc_ex) * (ring->rx_pending + ring->tx_pending), |
| 4310 | &ring_addr); |
| 4311 | } |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 4312 | rx_skbuff = kmalloc(sizeof(struct nv_skb_map) * ring->rx_pending, GFP_KERNEL); |
| 4313 | tx_skbuff = kmalloc(sizeof(struct nv_skb_map) * ring->tx_pending, GFP_KERNEL); |
| 4314 | if (!rxtx_ring || !rx_skbuff || !tx_skbuff) { |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4315 | /* fall back to old rings */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4316 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4317 | if (rxtx_ring) |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4318 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending), |
| 4319 | rxtx_ring, ring_addr); |
| 4320 | } else { |
| 4321 | if (rxtx_ring) |
| 4322 | pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (ring->rx_pending + ring->tx_pending), |
| 4323 | rxtx_ring, ring_addr); |
| 4324 | } |
Szymon Janc | 9b03b06 | 2010-11-27 08:39:44 +0000 | [diff] [blame] | 4325 | |
| 4326 | kfree(rx_skbuff); |
| 4327 | kfree(tx_skbuff); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4328 | goto exit; |
| 4329 | } |
| 4330 | |
| 4331 | if (netif_running(dev)) { |
| 4332 | nv_disable_irq(dev); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 4333 | nv_napi_disable(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4334 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4335 | netif_addr_lock(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4336 | spin_lock(&np->lock); |
| 4337 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4338 | nv_stop_rxtx(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4339 | nv_txrx_reset(dev); |
| 4340 | /* drain queues */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4341 | nv_drain_rxtx(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4342 | /* delete queues */ |
| 4343 | free_rings(dev); |
| 4344 | } |
| 4345 | |
| 4346 | /* set new values */ |
| 4347 | np->rx_ring_size = ring->rx_pending; |
| 4348 | np->tx_ring_size = ring->tx_pending; |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4349 | |
| 4350 | if (!nv_optimized(np)) { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 4351 | np->rx_ring.orig = (struct ring_desc *)rxtx_ring; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4352 | np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size]; |
| 4353 | } else { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 4354 | np->rx_ring.ex = (struct ring_desc_ex *)rxtx_ring; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4355 | np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size]; |
| 4356 | } |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 4357 | np->rx_skb = (struct nv_skb_map *)rx_skbuff; |
| 4358 | np->tx_skb = (struct nv_skb_map *)tx_skbuff; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4359 | np->ring_addr = ring_addr; |
| 4360 | |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 4361 | memset(np->rx_skb, 0, sizeof(struct nv_skb_map) * np->rx_ring_size); |
| 4362 | memset(np->tx_skb, 0, sizeof(struct nv_skb_map) * np->tx_ring_size); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4363 | |
| 4364 | if (netif_running(dev)) { |
| 4365 | /* reinit driver view of the queues */ |
| 4366 | set_bufsize(dev); |
| 4367 | if (nv_init_ring(dev)) { |
| 4368 | if (!np->in_shutdown) |
| 4369 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 4370 | } |
| 4371 | |
| 4372 | /* reinit nic view of the queues */ |
| 4373 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
| 4374 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 4375 | writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4376 | base + NvRegRingSizes); |
| 4377 | pci_push(base); |
| 4378 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 4379 | pci_push(base); |
| 4380 | |
| 4381 | /* restart engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4382 | nv_start_rxtx(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4383 | spin_unlock(&np->lock); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4384 | netif_addr_unlock(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4385 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 4386 | nv_napi_enable(dev); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4387 | nv_enable_irq(dev); |
| 4388 | } |
| 4389 | return 0; |
| 4390 | exit: |
| 4391 | return -ENOMEM; |
| 4392 | } |
| 4393 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4394 | static void nv_get_pauseparam(struct net_device *dev, struct ethtool_pauseparam* pause) |
| 4395 | { |
| 4396 | struct fe_priv *np = netdev_priv(dev); |
| 4397 | |
| 4398 | pause->autoneg = (np->pause_flags & NV_PAUSEFRAME_AUTONEG) != 0; |
| 4399 | pause->rx_pause = (np->pause_flags & NV_PAUSEFRAME_RX_ENABLE) != 0; |
| 4400 | pause->tx_pause = (np->pause_flags & NV_PAUSEFRAME_TX_ENABLE) != 0; |
| 4401 | } |
| 4402 | |
| 4403 | static int nv_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam* pause) |
| 4404 | { |
| 4405 | struct fe_priv *np = netdev_priv(dev); |
| 4406 | int adv, bmcr; |
| 4407 | |
| 4408 | if ((!np->autoneg && np->duplex == 0) || |
| 4409 | (np->autoneg && !pause->autoneg && np->duplex == 0)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 4410 | netdev_info(dev, "can not set pause settings when forced link is in half duplex\n"); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4411 | return -EINVAL; |
| 4412 | } |
| 4413 | if (pause->tx_pause && !(np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE)) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 4414 | netdev_info(dev, "hardware does not support tx pause frames\n"); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4415 | return -EINVAL; |
| 4416 | } |
| 4417 | |
| 4418 | netif_carrier_off(dev); |
| 4419 | if (netif_running(dev)) { |
| 4420 | nv_disable_irq(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4421 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4422 | netif_addr_lock(dev); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4423 | spin_lock(&np->lock); |
| 4424 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4425 | nv_stop_rxtx(dev); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4426 | spin_unlock(&np->lock); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4427 | netif_addr_unlock(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4428 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4429 | } |
| 4430 | |
| 4431 | np->pause_flags &= ~(NV_PAUSEFRAME_RX_REQ|NV_PAUSEFRAME_TX_REQ); |
| 4432 | if (pause->rx_pause) |
| 4433 | np->pause_flags |= NV_PAUSEFRAME_RX_REQ; |
| 4434 | if (pause->tx_pause) |
| 4435 | np->pause_flags |= NV_PAUSEFRAME_TX_REQ; |
| 4436 | |
| 4437 | if (np->autoneg && pause->autoneg) { |
| 4438 | np->pause_flags |= NV_PAUSEFRAME_AUTONEG; |
| 4439 | |
| 4440 | adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); |
| 4441 | adv &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 4442 | if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) /* for rx we set both advertisements but disable tx pause */ |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4443 | adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
| 4444 | if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) |
| 4445 | adv |= ADVERTISE_PAUSE_ASYM; |
| 4446 | mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); |
| 4447 | |
| 4448 | if (netif_running(dev)) |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 4449 | netdev_info(dev, "link down\n"); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4450 | bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
| 4451 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); |
| 4452 | mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); |
| 4453 | } else { |
| 4454 | np->pause_flags &= ~(NV_PAUSEFRAME_AUTONEG|NV_PAUSEFRAME_RX_ENABLE|NV_PAUSEFRAME_TX_ENABLE); |
| 4455 | if (pause->rx_pause) |
| 4456 | np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE; |
| 4457 | if (pause->tx_pause) |
| 4458 | np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE; |
| 4459 | |
| 4460 | if (!netif_running(dev)) |
| 4461 | nv_update_linkspeed(dev); |
| 4462 | else |
| 4463 | nv_update_pause(dev, np->pause_flags); |
| 4464 | } |
| 4465 | |
| 4466 | if (netif_running(dev)) { |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4467 | nv_start_rxtx(dev); |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4468 | nv_enable_irq(dev); |
| 4469 | } |
| 4470 | return 0; |
| 4471 | } |
| 4472 | |
Michał Mirosław | 569e146 | 2011-04-15 04:50:49 +0000 | [diff] [blame] | 4473 | static u32 nv_fix_features(struct net_device *dev, u32 features) |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4474 | { |
Michał Mirosław | 569e146 | 2011-04-15 04:50:49 +0000 | [diff] [blame] | 4475 | /* vlan is dependent on rx checksum offload */ |
| 4476 | if (features & (NETIF_F_HW_VLAN_TX|NETIF_F_HW_VLAN_RX)) |
| 4477 | features |= NETIF_F_RXCSUM; |
| 4478 | |
| 4479 | return features; |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4480 | } |
| 4481 | |
Michał Mirosław | 569e146 | 2011-04-15 04:50:49 +0000 | [diff] [blame] | 4482 | static int nv_set_features(struct net_device *dev, u32 features) |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4483 | { |
| 4484 | struct fe_priv *np = netdev_priv(dev); |
| 4485 | u8 __iomem *base = get_hwbase(dev); |
Michał Mirosław | 569e146 | 2011-04-15 04:50:49 +0000 | [diff] [blame] | 4486 | u32 changed = dev->features ^ features; |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4487 | |
Michał Mirosław | 569e146 | 2011-04-15 04:50:49 +0000 | [diff] [blame] | 4488 | if (changed & NETIF_F_RXCSUM) { |
| 4489 | spin_lock_irq(&np->lock); |
| 4490 | |
| 4491 | if (features & NETIF_F_RXCSUM) |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4492 | np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK; |
Michał Mirosław | 569e146 | 2011-04-15 04:50:49 +0000 | [diff] [blame] | 4493 | else |
| 4494 | np->txrxctl_bits &= ~NVREG_TXRXCTL_RXCHECK; |
| 4495 | |
| 4496 | if (netif_running(dev)) |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4497 | writel(np->txrxctl_bits, base + NvRegTxRxControl); |
Michał Mirosław | 569e146 | 2011-04-15 04:50:49 +0000 | [diff] [blame] | 4498 | |
| 4499 | spin_unlock_irq(&np->lock); |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4500 | } |
| 4501 | |
Michał Mirosław | 569e146 | 2011-04-15 04:50:49 +0000 | [diff] [blame] | 4502 | return 0; |
Ayaz Abdulla | 5ed2616 | 2006-06-10 22:47:59 -0400 | [diff] [blame] | 4503 | } |
| 4504 | |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4505 | static int nv_get_sset_count(struct net_device *dev, int sset) |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4506 | { |
| 4507 | struct fe_priv *np = netdev_priv(dev); |
| 4508 | |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4509 | switch (sset) { |
| 4510 | case ETH_SS_TEST: |
| 4511 | if (np->driver_data & DEV_HAS_TEST_EXTENDED) |
| 4512 | return NV_TEST_COUNT_EXTENDED; |
| 4513 | else |
| 4514 | return NV_TEST_COUNT_BASE; |
| 4515 | case ETH_SS_STATS: |
Ayaz Abdulla | 8ed1454 | 2009-03-05 08:01:49 +0000 | [diff] [blame] | 4516 | if (np->driver_data & DEV_HAS_STATISTICS_V3) |
| 4517 | return NV_DEV_STATISTICS_V3_COUNT; |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4518 | else if (np->driver_data & DEV_HAS_STATISTICS_V2) |
| 4519 | return NV_DEV_STATISTICS_V2_COUNT; |
Ayaz Abdulla | 8ed1454 | 2009-03-05 08:01:49 +0000 | [diff] [blame] | 4520 | else if (np->driver_data & DEV_HAS_STATISTICS_V1) |
| 4521 | return NV_DEV_STATISTICS_V1_COUNT; |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4522 | else |
| 4523 | return 0; |
| 4524 | default: |
| 4525 | return -EOPNOTSUPP; |
| 4526 | } |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4527 | } |
| 4528 | |
| 4529 | static void nv_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *estats, u64 *buffer) |
| 4530 | { |
| 4531 | struct fe_priv *np = netdev_priv(dev); |
| 4532 | |
| 4533 | /* update stats */ |
| 4534 | nv_do_stats_poll((unsigned long)dev); |
| 4535 | |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4536 | memcpy(buffer, &np->estats, nv_get_sset_count(dev, ETH_SS_STATS)*sizeof(u64)); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4537 | } |
| 4538 | |
| 4539 | static int nv_link_test(struct net_device *dev) |
| 4540 | { |
| 4541 | struct fe_priv *np = netdev_priv(dev); |
| 4542 | int mii_status; |
| 4543 | |
| 4544 | mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 4545 | mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
| 4546 | |
| 4547 | /* check phy link status */ |
| 4548 | if (!(mii_status & BMSR_LSTATUS)) |
| 4549 | return 0; |
| 4550 | else |
| 4551 | return 1; |
| 4552 | } |
| 4553 | |
| 4554 | static int nv_register_test(struct net_device *dev) |
| 4555 | { |
| 4556 | u8 __iomem *base = get_hwbase(dev); |
| 4557 | int i = 0; |
| 4558 | u32 orig_read, new_read; |
| 4559 | |
| 4560 | do { |
| 4561 | orig_read = readl(base + nv_registers_test[i].reg); |
| 4562 | |
| 4563 | /* xor with mask to toggle bits */ |
| 4564 | orig_read ^= nv_registers_test[i].mask; |
| 4565 | |
| 4566 | writel(orig_read, base + nv_registers_test[i].reg); |
| 4567 | |
| 4568 | new_read = readl(base + nv_registers_test[i].reg); |
| 4569 | |
| 4570 | if ((new_read & nv_registers_test[i].mask) != (orig_read & nv_registers_test[i].mask)) |
| 4571 | return 0; |
| 4572 | |
| 4573 | /* restore original value */ |
| 4574 | orig_read ^= nv_registers_test[i].mask; |
| 4575 | writel(orig_read, base + nv_registers_test[i].reg); |
| 4576 | |
| 4577 | } while (nv_registers_test[++i].reg != 0); |
| 4578 | |
| 4579 | return 1; |
| 4580 | } |
| 4581 | |
| 4582 | static int nv_interrupt_test(struct net_device *dev) |
| 4583 | { |
| 4584 | struct fe_priv *np = netdev_priv(dev); |
| 4585 | u8 __iomem *base = get_hwbase(dev); |
| 4586 | int ret = 1; |
| 4587 | int testcnt; |
| 4588 | u32 save_msi_flags, save_poll_interval = 0; |
| 4589 | |
| 4590 | if (netif_running(dev)) { |
| 4591 | /* free current irq */ |
| 4592 | nv_free_irq(dev); |
| 4593 | save_poll_interval = readl(base+NvRegPollingInterval); |
| 4594 | } |
| 4595 | |
| 4596 | /* flag to test interrupt handler */ |
| 4597 | np->intr_test = 0; |
| 4598 | |
| 4599 | /* setup test irq */ |
| 4600 | save_msi_flags = np->msi_flags; |
| 4601 | np->msi_flags &= ~NV_MSI_X_VECTORS_MASK; |
| 4602 | np->msi_flags |= 0x001; /* setup 1 vector */ |
| 4603 | if (nv_request_irq(dev, 1)) |
| 4604 | return 0; |
| 4605 | |
| 4606 | /* setup timer interrupt */ |
| 4607 | writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval); |
| 4608 | writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6); |
| 4609 | |
| 4610 | nv_enable_hw_interrupts(dev, NVREG_IRQ_TIMER); |
| 4611 | |
| 4612 | /* wait for at least one interrupt */ |
| 4613 | msleep(100); |
| 4614 | |
| 4615 | spin_lock_irq(&np->lock); |
| 4616 | |
| 4617 | /* flag should be set within ISR */ |
| 4618 | testcnt = np->intr_test; |
| 4619 | if (!testcnt) |
| 4620 | ret = 2; |
| 4621 | |
| 4622 | nv_disable_hw_interrupts(dev, NVREG_IRQ_TIMER); |
| 4623 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) |
| 4624 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
| 4625 | else |
| 4626 | writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); |
| 4627 | |
| 4628 | spin_unlock_irq(&np->lock); |
| 4629 | |
| 4630 | nv_free_irq(dev); |
| 4631 | |
| 4632 | np->msi_flags = save_msi_flags; |
| 4633 | |
| 4634 | if (netif_running(dev)) { |
| 4635 | writel(save_poll_interval, base + NvRegPollingInterval); |
| 4636 | writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6); |
| 4637 | /* restore original irq */ |
| 4638 | if (nv_request_irq(dev, 0)) |
| 4639 | return 0; |
| 4640 | } |
| 4641 | |
| 4642 | return ret; |
| 4643 | } |
| 4644 | |
| 4645 | static int nv_loopback_test(struct net_device *dev) |
| 4646 | { |
| 4647 | struct fe_priv *np = netdev_priv(dev); |
| 4648 | u8 __iomem *base = get_hwbase(dev); |
| 4649 | struct sk_buff *tx_skb, *rx_skb; |
| 4650 | dma_addr_t test_dma_addr; |
| 4651 | u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET); |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4652 | u32 flags; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4653 | int len, i, pkt_len; |
| 4654 | u8 *pkt_data; |
| 4655 | u32 filter_flags = 0; |
| 4656 | u32 misc1_flags = 0; |
| 4657 | int ret = 1; |
| 4658 | |
| 4659 | if (netif_running(dev)) { |
| 4660 | nv_disable_irq(dev); |
| 4661 | filter_flags = readl(base + NvRegPacketFilterFlags); |
| 4662 | misc1_flags = readl(base + NvRegMisc1); |
| 4663 | } else { |
| 4664 | nv_txrx_reset(dev); |
| 4665 | } |
| 4666 | |
| 4667 | /* reinit driver view of the rx queue */ |
| 4668 | set_bufsize(dev); |
| 4669 | nv_init_ring(dev); |
| 4670 | |
| 4671 | /* setup hardware for loopback */ |
| 4672 | writel(NVREG_MISC1_FORCE, base + NvRegMisc1); |
| 4673 | writel(NVREG_PFF_ALWAYS | NVREG_PFF_LOOPBACK, base + NvRegPacketFilterFlags); |
| 4674 | |
| 4675 | /* reinit nic view of the rx queue */ |
| 4676 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
| 4677 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 4678 | writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4679 | base + NvRegRingSizes); |
| 4680 | pci_push(base); |
| 4681 | |
| 4682 | /* restart rx engine */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4683 | nv_start_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4684 | |
| 4685 | /* setup packet for tx */ |
| 4686 | pkt_len = ETH_DATA_LEN; |
| 4687 | tx_skb = dev_alloc_skb(pkt_len); |
Jesper Juhl | 46798c8 | 2006-09-25 16:39:24 -0700 | [diff] [blame] | 4688 | if (!tx_skb) { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 4689 | netdev_err(dev, "dev_alloc_skb() failed during loopback test\n"); |
Jesper Juhl | 46798c8 | 2006-09-25 16:39:24 -0700 | [diff] [blame] | 4690 | ret = 0; |
| 4691 | goto out; |
| 4692 | } |
Arnaldo Carvalho de Melo | 8b5be26 | 2007-03-20 12:08:20 -0300 | [diff] [blame] | 4693 | test_dma_addr = pci_map_single(np->pci_dev, tx_skb->data, |
| 4694 | skb_tailroom(tx_skb), |
| 4695 | PCI_DMA_FROMDEVICE); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4696 | pkt_data = skb_put(tx_skb, pkt_len); |
| 4697 | for (i = 0; i < pkt_len; i++) |
| 4698 | pkt_data[i] = (u8)(i & 0xff); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4699 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4700 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4701 | np->tx_ring.orig[0].buf = cpu_to_le32(test_dma_addr); |
| 4702 | np->tx_ring.orig[0].flaglen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4703 | } else { |
Al Viro | 5bb7ea2 | 2007-12-09 16:06:41 +0000 | [diff] [blame] | 4704 | np->tx_ring.ex[0].bufhigh = cpu_to_le32(dma_high(test_dma_addr)); |
| 4705 | np->tx_ring.ex[0].buflow = cpu_to_le32(dma_low(test_dma_addr)); |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4706 | np->tx_ring.ex[0].flaglen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4707 | } |
| 4708 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 4709 | pci_push(get_hwbase(dev)); |
| 4710 | |
| 4711 | msleep(500); |
| 4712 | |
| 4713 | /* check for rx of the packet */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4714 | if (!nv_optimized(np)) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4715 | flags = le32_to_cpu(np->rx_ring.orig[0].flaglen); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4716 | len = nv_descr_getlength(&np->rx_ring.orig[0], np->desc_ver); |
| 4717 | |
| 4718 | } else { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4719 | flags = le32_to_cpu(np->rx_ring.ex[0].flaglen); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4720 | len = nv_descr_getlength_ex(&np->rx_ring.ex[0], np->desc_ver); |
| 4721 | } |
| 4722 | |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4723 | if (flags & NV_RX_AVAIL) { |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4724 | ret = 0; |
| 4725 | } else if (np->desc_ver == DESC_VER_1) { |
Stephen Hemminger | f82a935 | 2006-07-27 18:50:08 -0700 | [diff] [blame] | 4726 | if (flags & NV_RX_ERROR) |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4727 | ret = 0; |
| 4728 | } else { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 4729 | if (flags & NV_RX2_ERROR) |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4730 | ret = 0; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4731 | } |
| 4732 | |
| 4733 | if (ret) { |
| 4734 | if (len != pkt_len) { |
| 4735 | ret = 0; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4736 | } else { |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 4737 | rx_skb = np->rx_skb[0].skb; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4738 | for (i = 0; i < pkt_len; i++) { |
| 4739 | if (rx_skb->data[i] != (u8)(i & 0xff)) { |
| 4740 | ret = 0; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4741 | break; |
| 4742 | } |
| 4743 | } |
| 4744 | } |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4745 | } |
| 4746 | |
Eric Dumazet | 73a3707 | 2009-06-17 21:17:59 +0000 | [diff] [blame] | 4747 | pci_unmap_single(np->pci_dev, test_dma_addr, |
Arnaldo Carvalho de Melo | 4305b54 | 2007-04-19 20:43:29 -0700 | [diff] [blame] | 4748 | (skb_end_pointer(tx_skb) - tx_skb->data), |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4749 | PCI_DMA_TODEVICE); |
| 4750 | dev_kfree_skb_any(tx_skb); |
Jesper Juhl | 46798c8 | 2006-09-25 16:39:24 -0700 | [diff] [blame] | 4751 | out: |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4752 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4753 | nv_stop_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4754 | nv_txrx_reset(dev); |
| 4755 | /* drain rx queue */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4756 | nv_drain_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4757 | |
| 4758 | if (netif_running(dev)) { |
| 4759 | writel(misc1_flags, base + NvRegMisc1); |
| 4760 | writel(filter_flags, base + NvRegPacketFilterFlags); |
| 4761 | nv_enable_irq(dev); |
| 4762 | } |
| 4763 | |
| 4764 | return ret; |
| 4765 | } |
| 4766 | |
| 4767 | static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64 *buffer) |
| 4768 | { |
| 4769 | struct fe_priv *np = netdev_priv(dev); |
| 4770 | u8 __iomem *base = get_hwbase(dev); |
| 4771 | int result; |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4772 | memset(buffer, 0, nv_get_sset_count(dev, ETH_SS_TEST)*sizeof(u64)); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4773 | |
| 4774 | if (!nv_link_test(dev)) { |
| 4775 | test->flags |= ETH_TEST_FL_FAILED; |
| 4776 | buffer[0] = 1; |
| 4777 | } |
| 4778 | |
| 4779 | if (test->flags & ETH_TEST_FL_OFFLINE) { |
| 4780 | if (netif_running(dev)) { |
| 4781 | netif_stop_queue(dev); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 4782 | nv_napi_disable(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4783 | netif_tx_lock_bh(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4784 | netif_addr_lock(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4785 | spin_lock_irq(&np->lock); |
| 4786 | nv_disable_hw_interrupts(dev, np->irqmask); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 4787 | if (!(np->msi_flags & NV_MSI_X_ENABLED)) |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4788 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 4789 | else |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4790 | writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4791 | /* stop engines */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4792 | nv_stop_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4793 | nv_txrx_reset(dev); |
| 4794 | /* drain rx queue */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4795 | nv_drain_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4796 | spin_unlock_irq(&np->lock); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 4797 | netif_addr_unlock(dev); |
Herbert Xu | 58dfd9c | 2006-06-21 10:53:54 +1000 | [diff] [blame] | 4798 | netif_tx_unlock_bh(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4799 | } |
| 4800 | |
| 4801 | if (!nv_register_test(dev)) { |
| 4802 | test->flags |= ETH_TEST_FL_FAILED; |
| 4803 | buffer[1] = 1; |
| 4804 | } |
| 4805 | |
| 4806 | result = nv_interrupt_test(dev); |
| 4807 | if (result != 1) { |
| 4808 | test->flags |= ETH_TEST_FL_FAILED; |
| 4809 | buffer[2] = 1; |
| 4810 | } |
| 4811 | if (result == 0) { |
| 4812 | /* bail out */ |
| 4813 | return; |
| 4814 | } |
| 4815 | |
| 4816 | if (!nv_loopback_test(dev)) { |
| 4817 | test->flags |= ETH_TEST_FL_FAILED; |
| 4818 | buffer[3] = 1; |
| 4819 | } |
| 4820 | |
| 4821 | if (netif_running(dev)) { |
| 4822 | /* reinit driver view of the rx queue */ |
| 4823 | set_bufsize(dev); |
| 4824 | if (nv_init_ring(dev)) { |
| 4825 | if (!np->in_shutdown) |
| 4826 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
| 4827 | } |
| 4828 | /* reinit nic view of the rx queue */ |
| 4829 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
| 4830 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 4831 | writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4832 | base + NvRegRingSizes); |
| 4833 | pci_push(base); |
| 4834 | writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 4835 | pci_push(base); |
| 4836 | /* restart rx engine */ |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 4837 | nv_start_rxtx(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4838 | netif_start_queue(dev); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 4839 | nv_napi_enable(dev); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4840 | nv_enable_hw_interrupts(dev, np->irqmask); |
| 4841 | } |
| 4842 | } |
| 4843 | } |
| 4844 | |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4845 | static void nv_get_strings(struct net_device *dev, u32 stringset, u8 *buffer) |
| 4846 | { |
| 4847 | switch (stringset) { |
| 4848 | case ETH_SS_STATS: |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4849 | memcpy(buffer, &nv_estats_str, nv_get_sset_count(dev, ETH_SS_STATS)*sizeof(struct nv_ethtool_str)); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4850 | break; |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4851 | case ETH_SS_TEST: |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4852 | memcpy(buffer, &nv_etests_str, nv_get_sset_count(dev, ETH_SS_TEST)*sizeof(struct nv_ethtool_str)); |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4853 | break; |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4854 | } |
| 4855 | } |
| 4856 | |
Jeff Garzik | 7282d49 | 2006-09-13 14:30:00 -0400 | [diff] [blame] | 4857 | static const struct ethtool_ops ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4858 | .get_drvinfo = nv_get_drvinfo, |
| 4859 | .get_link = ethtool_op_get_link, |
| 4860 | .get_wol = nv_get_wol, |
| 4861 | .set_wol = nv_set_wol, |
| 4862 | .get_settings = nv_get_settings, |
| 4863 | .set_settings = nv_set_settings, |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 4864 | .get_regs_len = nv_get_regs_len, |
| 4865 | .get_regs = nv_get_regs, |
| 4866 | .nway_reset = nv_nway_reset, |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 4867 | .get_ringparam = nv_get_ringparam, |
| 4868 | .set_ringparam = nv_set_ringparam, |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 4869 | .get_pauseparam = nv_get_pauseparam, |
| 4870 | .set_pauseparam = nv_set_pauseparam, |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4871 | .get_strings = nv_get_strings, |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 4872 | .get_ethtool_stats = nv_get_ethtool_stats, |
Jeff Garzik | b9f2c04 | 2007-10-03 18:07:32 -0700 | [diff] [blame] | 4873 | .get_sset_count = nv_get_sset_count, |
Ayaz Abdulla | 9589c77 | 2006-06-10 22:48:13 -0400 | [diff] [blame] | 4874 | .self_test = nv_self_test, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4875 | }; |
| 4876 | |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 4877 | static void nv_vlan_rx_register(struct net_device *dev, struct vlan_group *grp) |
| 4878 | { |
| 4879 | struct fe_priv *np = get_nvpriv(dev); |
| 4880 | |
| 4881 | spin_lock_irq(&np->lock); |
| 4882 | |
| 4883 | /* save vlan group */ |
| 4884 | np->vlangrp = grp; |
| 4885 | |
| 4886 | if (grp) { |
| 4887 | /* enable vlan on MAC */ |
| 4888 | np->txrxctl_bits |= NVREG_TXRXCTL_VLANSTRIP | NVREG_TXRXCTL_VLANINS; |
| 4889 | } else { |
| 4890 | /* disable vlan on MAC */ |
| 4891 | np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANSTRIP; |
| 4892 | np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANINS; |
| 4893 | } |
| 4894 | |
| 4895 | writel(np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl); |
| 4896 | |
| 4897 | spin_unlock_irq(&np->lock); |
Stephen Hemminger | 25805dc | 2007-06-01 09:44:01 -0700 | [diff] [blame] | 4898 | } |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 4899 | |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 4900 | /* The mgmt unit and driver use a semaphore to access the phy during init */ |
| 4901 | static int nv_mgmt_acquire_sema(struct net_device *dev) |
| 4902 | { |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 4903 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 4904 | u8 __iomem *base = get_hwbase(dev); |
| 4905 | int i; |
| 4906 | u32 tx_ctrl, mgmt_sema; |
| 4907 | |
| 4908 | for (i = 0; i < 10; i++) { |
| 4909 | mgmt_sema = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_SEMA_MASK; |
| 4910 | if (mgmt_sema == NVREG_XMITCTL_MGMT_SEMA_FREE) |
| 4911 | break; |
| 4912 | msleep(500); |
| 4913 | } |
| 4914 | |
| 4915 | if (mgmt_sema != NVREG_XMITCTL_MGMT_SEMA_FREE) |
| 4916 | return 0; |
| 4917 | |
| 4918 | for (i = 0; i < 2; i++) { |
| 4919 | tx_ctrl = readl(base + NvRegTransmitterControl); |
| 4920 | tx_ctrl |= NVREG_XMITCTL_HOST_SEMA_ACQ; |
| 4921 | writel(tx_ctrl, base + NvRegTransmitterControl); |
| 4922 | |
| 4923 | /* verify that semaphore was acquired */ |
| 4924 | tx_ctrl = readl(base + NvRegTransmitterControl); |
| 4925 | if (((tx_ctrl & NVREG_XMITCTL_HOST_SEMA_MASK) == NVREG_XMITCTL_HOST_SEMA_ACQ) && |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 4926 | ((tx_ctrl & NVREG_XMITCTL_MGMT_SEMA_MASK) == NVREG_XMITCTL_MGMT_SEMA_FREE)) { |
| 4927 | np->mgmt_sema = 1; |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 4928 | return 1; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 4929 | } else |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 4930 | udelay(50); |
| 4931 | } |
| 4932 | |
| 4933 | return 0; |
| 4934 | } |
| 4935 | |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 4936 | static void nv_mgmt_release_sema(struct net_device *dev) |
| 4937 | { |
| 4938 | struct fe_priv *np = netdev_priv(dev); |
| 4939 | u8 __iomem *base = get_hwbase(dev); |
| 4940 | u32 tx_ctrl; |
| 4941 | |
| 4942 | if (np->driver_data & DEV_HAS_MGMT_UNIT) { |
| 4943 | if (np->mgmt_sema) { |
| 4944 | tx_ctrl = readl(base + NvRegTransmitterControl); |
| 4945 | tx_ctrl &= ~NVREG_XMITCTL_HOST_SEMA_ACQ; |
| 4946 | writel(tx_ctrl, base + NvRegTransmitterControl); |
| 4947 | } |
| 4948 | } |
| 4949 | } |
| 4950 | |
| 4951 | |
| 4952 | static int nv_mgmt_get_version(struct net_device *dev) |
| 4953 | { |
| 4954 | struct fe_priv *np = netdev_priv(dev); |
| 4955 | u8 __iomem *base = get_hwbase(dev); |
| 4956 | u32 data_ready = readl(base + NvRegTransmitterControl); |
| 4957 | u32 data_ready2 = 0; |
| 4958 | unsigned long start; |
| 4959 | int ready = 0; |
| 4960 | |
| 4961 | writel(NVREG_MGMTUNITGETVERSION, base + NvRegMgmtUnitGetVersion); |
| 4962 | writel(data_ready ^ NVREG_XMITCTL_DATA_START, base + NvRegTransmitterControl); |
| 4963 | start = jiffies; |
| 4964 | while (time_before(jiffies, start + 5*HZ)) { |
| 4965 | data_ready2 = readl(base + NvRegTransmitterControl); |
| 4966 | if ((data_ready & NVREG_XMITCTL_DATA_READY) != (data_ready2 & NVREG_XMITCTL_DATA_READY)) { |
| 4967 | ready = 1; |
| 4968 | break; |
| 4969 | } |
| 4970 | schedule_timeout_uninterruptible(1); |
| 4971 | } |
| 4972 | |
| 4973 | if (!ready || (data_ready2 & NVREG_XMITCTL_DATA_ERROR)) |
| 4974 | return 0; |
| 4975 | |
| 4976 | np->mgmt_version = readl(base + NvRegMgmtUnitVersion) & NVREG_MGMTUNITVERSION; |
| 4977 | |
| 4978 | return 1; |
| 4979 | } |
| 4980 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4981 | static int nv_open(struct net_device *dev) |
| 4982 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 4983 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4984 | u8 __iomem *base = get_hwbase(dev); |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 4985 | int ret = 1; |
| 4986 | int oom, i; |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 4987 | u32 low; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4988 | |
Ed Swierk | cb52deb | 2008-12-01 12:24:43 +0000 | [diff] [blame] | 4989 | /* power up phy */ |
| 4990 | mii_rw(dev, np->phyaddr, MII_BMCR, |
| 4991 | mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ) & ~BMCR_PDOWN); |
| 4992 | |
Ayaz Abdulla | 88d7d8b | 2009-05-01 01:41:50 +0000 | [diff] [blame] | 4993 | nv_txrx_gate(dev, false); |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 4994 | /* erase previous misconfiguration */ |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 4995 | if (np->driver_data & DEV_HAS_POWER_CNTRL) |
| 4996 | nv_mac_reset(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4997 | writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA); |
| 4998 | writel(0, base + NvRegMulticastAddrB); |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 4999 | writel(NVREG_MCASTMASKA_NONE, base + NvRegMulticastMaskA); |
| 5000 | writel(NVREG_MCASTMASKB_NONE, base + NvRegMulticastMaskB); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5001 | writel(0, base + NvRegPacketFilterFlags); |
| 5002 | |
| 5003 | writel(0, base + NvRegTransmitterControl); |
| 5004 | writel(0, base + NvRegReceiverControl); |
| 5005 | |
| 5006 | writel(0, base + NvRegAdapterControl); |
| 5007 | |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 5008 | if (np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE) |
| 5009 | writel(NVREG_TX_PAUSEFRAME_DISABLE, base + NvRegTxPauseFrame); |
| 5010 | |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5011 | /* initialize descriptor rings */ |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 5012 | set_bufsize(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5013 | oom = nv_init_ring(dev); |
| 5014 | |
| 5015 | writel(0, base + NvRegLinkSpeed); |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5016 | writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5017 | nv_txrx_reset(dev); |
| 5018 | writel(0, base + NvRegUnknownSetupReg6); |
| 5019 | |
| 5020 | np->in_shutdown = 0; |
| 5021 | |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5022 | /* give hw rings */ |
Ayaz Abdulla | 0832b25 | 2006-02-04 13:13:26 -0500 | [diff] [blame] | 5023 | setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5024 | writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5025 | base + NvRegRingSizes); |
| 5026 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5027 | writel(np->linkspeed, base + NvRegLinkSpeed); |
Ayaz Abdulla | 95d161c | 2006-07-06 16:46:25 -0400 | [diff] [blame] | 5028 | if (np->desc_ver == DESC_VER_1) |
| 5029 | writel(NVREG_TX_WM_DESC1_DEFAULT, base + NvRegTxWatermark); |
| 5030 | else |
| 5031 | writel(NVREG_TX_WM_DESC2_3_DEFAULT, base + NvRegTxWatermark); |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5032 | writel(np->txrxctl_bits, base + NvRegTxRxControl); |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 5033 | writel(np->vlanctl_bits, base + NvRegVlanControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5034 | pci_push(base); |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5035 | writel(NVREG_TXRXCTL_BIT1|np->txrxctl_bits, base + NvRegTxRxControl); |
Joe Perches | 344d0dc | 2010-11-29 07:41:52 +0000 | [diff] [blame] | 5036 | if (reg_delay(dev, NvRegUnknownSetupReg5, |
| 5037 | NVREG_UNKSETUP5_BIT31, NVREG_UNKSETUP5_BIT31, |
| 5038 | NV_SETUP5_DELAY, NV_SETUP5_DELAYMAX)) |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 5039 | netdev_info(dev, |
| 5040 | "%s: SetupReg5, Bit 31 remained off\n", __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5041 | |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5042 | writel(0, base + NvRegMIIMask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5043 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 5044 | writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5045 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5046 | writel(NVREG_MISC1_FORCE | NVREG_MISC1_HD, base + NvRegMisc1); |
| 5047 | writel(readl(base + NvRegTransmitterStatus), base + NvRegTransmitterStatus); |
| 5048 | writel(NVREG_PFF_ALWAYS, base + NvRegPacketFilterFlags); |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 5049 | writel(np->rx_buf_sz, base + NvRegOffloadConfig); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5050 | |
| 5051 | writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus); |
Ayaz Abdulla | a433686 | 2008-04-18 13:50:43 -0700 | [diff] [blame] | 5052 | |
| 5053 | get_random_bytes(&low, sizeof(low)); |
| 5054 | low &= NVREG_SLOTTIME_MASK; |
| 5055 | if (np->desc_ver == DESC_VER_1) { |
| 5056 | writel(low|NVREG_SLOTTIME_DEFAULT, base + NvRegSlotTime); |
| 5057 | } else { |
| 5058 | if (!(np->driver_data & DEV_HAS_GEAR_MODE)) { |
| 5059 | /* setup legacy backoff */ |
| 5060 | writel(NVREG_SLOTTIME_LEGBF_ENABLED|NVREG_SLOTTIME_10_100_FULL|low, base + NvRegSlotTime); |
| 5061 | } else { |
| 5062 | writel(NVREG_SLOTTIME_10_100_FULL, base + NvRegSlotTime); |
| 5063 | nv_gear_backoff_reseed(dev); |
| 5064 | } |
| 5065 | } |
Ayaz Abdulla | 9744e21 | 2006-07-06 16:45:58 -0400 | [diff] [blame] | 5066 | writel(NVREG_TX_DEFERRAL_DEFAULT, base + NvRegTxDeferral); |
| 5067 | writel(NVREG_RX_DEFERRAL_DEFAULT, base + NvRegRxDeferral); |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 5068 | if (poll_interval == -1) { |
| 5069 | if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT) |
| 5070 | writel(NVREG_POLL_DEFAULT_THROUGHPUT, base + NvRegPollingInterval); |
| 5071 | else |
| 5072 | writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5073 | } else |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 5074 | writel(poll_interval & 0xFFFF, base + NvRegPollingInterval); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5075 | writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6); |
| 5076 | writel((np->phyaddr << NVREG_ADAPTCTL_PHYSHIFT)|NVREG_ADAPTCTL_PHYVALID|NVREG_ADAPTCTL_RUNNING, |
| 5077 | base + NvRegAdapterControl); |
| 5078 | writel(NVREG_MIISPEED_BIT8|NVREG_MIIDELAY, base + NvRegMIISpeed); |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5079 | writel(NVREG_MII_LINKCHANGE, base + NvRegMIIMask); |
Ayaz Abdulla | c42d9df | 2006-06-10 22:47:52 -0400 | [diff] [blame] | 5080 | if (np->wolenabled) |
| 5081 | writel(NVREG_WAKEUPFLAGS_ENABLE , base + NvRegWakeUpFlags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5082 | |
| 5083 | i = readl(base + NvRegPowerState); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5084 | if ((i & NVREG_POWERSTATE_POWEREDUP) == 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5085 | writel(NVREG_POWERSTATE_POWEREDUP|i, base + NvRegPowerState); |
| 5086 | |
| 5087 | pci_push(base); |
| 5088 | udelay(10); |
| 5089 | writel(readl(base + NvRegPowerState) | NVREG_POWERSTATE_VALID, base + NvRegPowerState); |
| 5090 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5091 | nv_disable_hw_interrupts(dev, np->irqmask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5092 | pci_push(base); |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 5093 | writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5094 | writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); |
| 5095 | pci_push(base); |
| 5096 | |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5097 | if (nv_request_irq(dev, 0)) |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5098 | goto out_drain; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5099 | |
| 5100 | /* ask for interrupts */ |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5101 | nv_enable_hw_interrupts(dev, np->irqmask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5102 | |
| 5103 | spin_lock_irq(&np->lock); |
| 5104 | writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA); |
| 5105 | writel(0, base + NvRegMulticastAddrB); |
Ayaz Abdulla | bb9a4fd | 2008-01-13 16:03:04 -0500 | [diff] [blame] | 5106 | writel(NVREG_MCASTMASKA_NONE, base + NvRegMulticastMaskA); |
| 5107 | writel(NVREG_MCASTMASKB_NONE, base + NvRegMulticastMaskB); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5108 | writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags); |
| 5109 | /* One manual link speed update: Interrupts are enabled, future link |
| 5110 | * speed changes cause interrupts and are handled by nv_link_irq(). |
| 5111 | */ |
| 5112 | { |
| 5113 | u32 miistat; |
| 5114 | miistat = readl(base + NvRegMIIStatus); |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 5115 | writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5116 | } |
Manfred Spraul | 1b1b3c9 | 2005-08-06 23:47:55 +0200 | [diff] [blame] | 5117 | /* set linkspeed to invalid value, thus force nv_update_linkspeed |
| 5118 | * to init hw */ |
| 5119 | np->linkspeed = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5120 | ret = nv_update_linkspeed(dev); |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5121 | nv_start_rxtx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5122 | netif_start_queue(dev); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 5123 | nv_napi_enable(dev); |
Stephen Hemminger | e27cdba | 2006-07-31 20:37:19 -0700 | [diff] [blame] | 5124 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5125 | if (ret) { |
| 5126 | netif_carrier_on(dev); |
| 5127 | } else { |
Joe Perches | 1d397f3 | 2010-11-29 07:41:57 +0000 | [diff] [blame] | 5128 | netdev_info(dev, "no link during initialization\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5129 | netif_carrier_off(dev); |
| 5130 | } |
| 5131 | if (oom) |
| 5132 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5133 | |
| 5134 | /* start statistics timer */ |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 5135 | if (np->driver_data & (DEV_HAS_STATISTICS_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_STATISTICS_V3)) |
Daniel Drake | bfebbb8 | 2008-03-18 11:07:18 +0000 | [diff] [blame] | 5136 | mod_timer(&np->stats_poll, |
| 5137 | round_jiffies(jiffies + STATS_INTERVAL)); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5138 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5139 | spin_unlock_irq(&np->lock); |
| 5140 | |
| 5141 | return 0; |
| 5142 | out_drain: |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5143 | nv_drain_rxtx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5144 | return ret; |
| 5145 | } |
| 5146 | |
| 5147 | static int nv_close(struct net_device *dev) |
| 5148 | { |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5149 | struct fe_priv *np = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5150 | u8 __iomem *base; |
| 5151 | |
| 5152 | spin_lock_irq(&np->lock); |
| 5153 | np->in_shutdown = 1; |
| 5154 | spin_unlock_irq(&np->lock); |
Ayaz Abdulla | 08d9357 | 2009-03-05 08:01:55 +0000 | [diff] [blame] | 5155 | nv_napi_disable(dev); |
Manfred Spraul | a747590 | 2007-10-17 21:52:33 +0200 | [diff] [blame] | 5156 | synchronize_irq(np->pci_dev->irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5157 | |
| 5158 | del_timer_sync(&np->oom_kick); |
| 5159 | del_timer_sync(&np->nic_poll); |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5160 | del_timer_sync(&np->stats_poll); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5161 | |
| 5162 | netif_stop_queue(dev); |
| 5163 | spin_lock_irq(&np->lock); |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5164 | nv_stop_rxtx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5165 | nv_txrx_reset(dev); |
| 5166 | |
| 5167 | /* disable interrupts on the nic or we will lock up */ |
| 5168 | base = get_hwbase(dev); |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5169 | nv_disable_hw_interrupts(dev, np->irqmask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5170 | pci_push(base); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5171 | |
| 5172 | spin_unlock_irq(&np->lock); |
| 5173 | |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5174 | nv_free_irq(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5175 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5176 | nv_drain_rxtx(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5177 | |
Ed Swierk | 5a9a8e3 | 2009-06-02 00:19:52 -0700 | [diff] [blame] | 5178 | if (np->wolenabled || !phy_power_down) { |
Ayaz Abdulla | 88d7d8b | 2009-05-01 01:41:50 +0000 | [diff] [blame] | 5179 | nv_txrx_gate(dev, false); |
Tim Mann | 2cc49a5 | 2007-06-14 13:16:38 -0700 | [diff] [blame] | 5180 | writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5181 | nv_start_rx(dev); |
Ed Swierk | cb52deb | 2008-12-01 12:24:43 +0000 | [diff] [blame] | 5182 | } else { |
| 5183 | /* power down phy */ |
| 5184 | mii_rw(dev, np->phyaddr, MII_BMCR, |
| 5185 | mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ)|BMCR_PDOWN); |
Ayaz Abdulla | 88d7d8b | 2009-05-01 01:41:50 +0000 | [diff] [blame] | 5186 | nv_txrx_gate(dev, true); |
Tim Mann | 2cc49a5 | 2007-06-14 13:16:38 -0700 | [diff] [blame] | 5187 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5188 | |
| 5189 | /* FIXME: power down nic */ |
| 5190 | |
| 5191 | return 0; |
| 5192 | } |
| 5193 | |
Stephen Hemminger | b94426b | 2008-11-19 22:26:51 -0800 | [diff] [blame] | 5194 | static const struct net_device_ops nv_netdev_ops = { |
| 5195 | .ndo_open = nv_open, |
| 5196 | .ndo_stop = nv_close, |
| 5197 | .ndo_get_stats = nv_get_stats, |
Stephen Hemminger | 0082982 | 2008-11-20 20:14:53 -0800 | [diff] [blame] | 5198 | .ndo_start_xmit = nv_start_xmit, |
| 5199 | .ndo_tx_timeout = nv_tx_timeout, |
| 5200 | .ndo_change_mtu = nv_change_mtu, |
Michał Mirosław | 569e146 | 2011-04-15 04:50:49 +0000 | [diff] [blame] | 5201 | .ndo_fix_features = nv_fix_features, |
| 5202 | .ndo_set_features = nv_set_features, |
Stephen Hemminger | 0082982 | 2008-11-20 20:14:53 -0800 | [diff] [blame] | 5203 | .ndo_validate_addr = eth_validate_addr, |
| 5204 | .ndo_set_mac_address = nv_set_mac_address, |
| 5205 | .ndo_set_multicast_list = nv_set_multicast, |
| 5206 | .ndo_vlan_rx_register = nv_vlan_rx_register, |
| 5207 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 5208 | .ndo_poll_controller = nv_poll_controller, |
| 5209 | #endif |
| 5210 | }; |
| 5211 | |
| 5212 | static const struct net_device_ops nv_netdev_ops_optimized = { |
| 5213 | .ndo_open = nv_open, |
| 5214 | .ndo_stop = nv_close, |
| 5215 | .ndo_get_stats = nv_get_stats, |
| 5216 | .ndo_start_xmit = nv_start_xmit_optimized, |
Stephen Hemminger | b94426b | 2008-11-19 22:26:51 -0800 | [diff] [blame] | 5217 | .ndo_tx_timeout = nv_tx_timeout, |
| 5218 | .ndo_change_mtu = nv_change_mtu, |
Michał Mirosław | 569e146 | 2011-04-15 04:50:49 +0000 | [diff] [blame] | 5219 | .ndo_fix_features = nv_fix_features, |
| 5220 | .ndo_set_features = nv_set_features, |
Stephen Hemminger | b94426b | 2008-11-19 22:26:51 -0800 | [diff] [blame] | 5221 | .ndo_validate_addr = eth_validate_addr, |
| 5222 | .ndo_set_mac_address = nv_set_mac_address, |
| 5223 | .ndo_set_multicast_list = nv_set_multicast, |
| 5224 | .ndo_vlan_rx_register = nv_vlan_rx_register, |
| 5225 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 5226 | .ndo_poll_controller = nv_poll_controller, |
| 5227 | #endif |
| 5228 | }; |
| 5229 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5230 | static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) |
| 5231 | { |
| 5232 | struct net_device *dev; |
| 5233 | struct fe_priv *np; |
| 5234 | unsigned long addr; |
| 5235 | u8 __iomem *base; |
| 5236 | int err, i; |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5237 | u32 powerstate, txreg; |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5238 | u32 phystate_orig = 0, phystate; |
| 5239 | int phyinitialized = 0; |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5240 | static int printed_version; |
| 5241 | |
| 5242 | if (!printed_version++) |
Joe Perches | 294a554 | 2010-11-29 07:41:56 +0000 | [diff] [blame] | 5243 | pr_info("Reverse Engineered nForce ethernet driver. Version %s.\n", |
| 5244 | FORCEDETH_VERSION); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5245 | |
| 5246 | dev = alloc_etherdev(sizeof(struct fe_priv)); |
| 5247 | err = -ENOMEM; |
| 5248 | if (!dev) |
| 5249 | goto out; |
| 5250 | |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5251 | np = netdev_priv(dev); |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 5252 | np->dev = dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5253 | np->pci_dev = pci_dev; |
| 5254 | spin_lock_init(&np->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5255 | SET_NETDEV_DEV(dev, &pci_dev->dev); |
| 5256 | |
| 5257 | init_timer(&np->oom_kick); |
| 5258 | np->oom_kick.data = (unsigned long) dev; |
Joe Perches | c061b18 | 2010-08-23 18:20:03 +0000 | [diff] [blame] | 5259 | np->oom_kick.function = nv_do_rx_refill; /* timer handler */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5260 | init_timer(&np->nic_poll); |
| 5261 | np->nic_poll.data = (unsigned long) dev; |
Joe Perches | c061b18 | 2010-08-23 18:20:03 +0000 | [diff] [blame] | 5262 | np->nic_poll.function = nv_do_nic_poll; /* timer handler */ |
Ayaz Abdulla | 52da357 | 2006-06-10 22:48:04 -0400 | [diff] [blame] | 5263 | init_timer(&np->stats_poll); |
| 5264 | np->stats_poll.data = (unsigned long) dev; |
Joe Perches | c061b18 | 2010-08-23 18:20:03 +0000 | [diff] [blame] | 5265 | np->stats_poll.function = nv_do_stats_poll; /* timer handler */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5266 | |
| 5267 | err = pci_enable_device(pci_dev); |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5268 | if (err) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5269 | goto out_free; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5270 | |
| 5271 | pci_set_master(pci_dev); |
| 5272 | |
| 5273 | err = pci_request_regions(pci_dev, DRV_NAME); |
| 5274 | if (err < 0) |
| 5275 | goto out_disable; |
| 5276 | |
Ayaz Abdulla | 9c66243 | 2008-08-06 12:11:42 -0400 | [diff] [blame] | 5277 | if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V2|DEV_HAS_STATISTICS_V3)) |
Ayaz Abdulla | 57fff69 | 2007-01-23 12:27:00 -0500 | [diff] [blame] | 5278 | np->register_size = NV_PCI_REGSZ_VER3; |
| 5279 | else if (id->driver_data & DEV_HAS_STATISTICS_V1) |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5280 | np->register_size = NV_PCI_REGSZ_VER2; |
| 5281 | else |
| 5282 | np->register_size = NV_PCI_REGSZ_VER1; |
| 5283 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5284 | err = -EINVAL; |
| 5285 | addr = 0; |
| 5286 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5287 | if (pci_resource_flags(pci_dev, i) & IORESOURCE_MEM && |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5288 | pci_resource_len(pci_dev, i) >= np->register_size) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5289 | addr = pci_resource_start(pci_dev, i); |
| 5290 | break; |
| 5291 | } |
| 5292 | } |
| 5293 | if (i == DEVICE_COUNT_RESOURCE) { |
Joe Perches | b2ba08e | 2010-11-29 07:42:00 +0000 | [diff] [blame] | 5294 | dev_info(&pci_dev->dev, "Couldn't find register window\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5295 | goto out_relreg; |
| 5296 | } |
| 5297 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5298 | /* copy of driver data */ |
| 5299 | np->driver_data = id->driver_data; |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 5300 | /* copy of device id */ |
| 5301 | np->device_id = id->device; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5302 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5303 | /* handle different descriptor versions */ |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5304 | if (id->driver_data & DEV_HAS_HIGH_DMA) { |
| 5305 | /* packet format 3: supports 40-bit addressing */ |
| 5306 | np->desc_ver = DESC_VER_3; |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5307 | np->txrxctl_bits = NVREG_TXRXCTL_DESC_3; |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 5308 | if (dma_64bit) { |
Yang Hongyang | 6afd142 | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 5309 | if (pci_set_dma_mask(pci_dev, DMA_BIT_MASK(39))) |
Joe Perches | b2ba08e | 2010-11-29 07:42:00 +0000 | [diff] [blame] | 5310 | dev_info(&pci_dev->dev, |
| 5311 | "64-bit DMA failed, using 32-bit addressing\n"); |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5312 | else |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 5313 | dev->features |= NETIF_F_HIGHDMA; |
Yang Hongyang | 6afd142 | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 5314 | if (pci_set_consistent_dma_mask(pci_dev, DMA_BIT_MASK(39))) { |
Joe Perches | b2ba08e | 2010-11-29 07:42:00 +0000 | [diff] [blame] | 5315 | dev_info(&pci_dev->dev, |
| 5316 | "64-bit DMA (consistent) failed, using 32-bit ring buffers\n"); |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 5317 | } |
Ayaz Abdulla | 84b3932 | 2006-05-20 14:59:48 -0700 | [diff] [blame] | 5318 | } |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5319 | } else if (id->driver_data & DEV_HAS_LARGEDESC) { |
| 5320 | /* packet format 2: supports jumbo frames */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5321 | np->desc_ver = DESC_VER_2; |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5322 | np->txrxctl_bits = NVREG_TXRXCTL_DESC_2; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5323 | } else { |
| 5324 | /* original packet format */ |
| 5325 | np->desc_ver = DESC_VER_1; |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5326 | np->txrxctl_bits = NVREG_TXRXCTL_DESC_1; |
Manfred Spraul | d81c098 | 2005-07-31 18:20:30 +0200 | [diff] [blame] | 5327 | } |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5328 | |
| 5329 | np->pkt_limit = NV_PKTLIMIT_1; |
| 5330 | if (id->driver_data & DEV_HAS_LARGEDESC) |
| 5331 | np->pkt_limit = NV_PKTLIMIT_2; |
| 5332 | |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5333 | if (id->driver_data & DEV_HAS_CHECKSUM) { |
| 5334 | np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK; |
Michał Mirosław | 569e146 | 2011-04-15 04:50:49 +0000 | [diff] [blame] | 5335 | dev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_SG | |
| 5336 | NETIF_F_TSO | NETIF_F_RXCSUM; |
| 5337 | dev->features |= dev->hw_features; |
Ayaz Abdulla | 2182816 | 2007-01-23 12:27:21 -0500 | [diff] [blame] | 5338 | } |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5339 | |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 5340 | np->vlanctl_bits = 0; |
| 5341 | if (id->driver_data & DEV_HAS_VLAN) { |
| 5342 | np->vlanctl_bits = NVREG_VLANCONTROL_ENABLE; |
| 5343 | dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX; |
Ayaz Abdulla | ee407b0 | 2006-02-04 13:13:17 -0500 | [diff] [blame] | 5344 | } |
| 5345 | |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 5346 | np->pause_flags = NV_PAUSEFRAME_RX_CAPABLE | NV_PAUSEFRAME_RX_REQ | NV_PAUSEFRAME_AUTONEG; |
Ayaz Abdulla | 5289b4c | 2008-02-05 12:30:01 -0500 | [diff] [blame] | 5347 | if ((id->driver_data & DEV_HAS_PAUSEFRAME_TX_V1) || |
| 5348 | (id->driver_data & DEV_HAS_PAUSEFRAME_TX_V2) || |
| 5349 | (id->driver_data & DEV_HAS_PAUSEFRAME_TX_V3)) { |
Ayaz Abdulla | b6d0773 | 2006-06-10 22:47:42 -0400 | [diff] [blame] | 5350 | np->pause_flags |= NV_PAUSEFRAME_TX_CAPABLE | NV_PAUSEFRAME_TX_REQ; |
Ayaz Abdulla | eb91f61 | 2006-05-24 18:13:19 -0400 | [diff] [blame] | 5351 | } |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 5352 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5353 | err = -ENOMEM; |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5354 | np->base = ioremap(addr, np->register_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5355 | if (!np->base) |
| 5356 | goto out_relreg; |
| 5357 | dev->base_addr = (unsigned long)np->base; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5358 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5359 | dev->irq = pci_dev->irq; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5360 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5361 | np->rx_ring_size = RX_RING_DEFAULT; |
| 5362 | np->tx_ring_size = TX_RING_DEFAULT; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5363 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5364 | if (!nv_optimized(np)) { |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5365 | np->rx_ring.orig = pci_alloc_consistent(pci_dev, |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5366 | sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size), |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5367 | &np->ring_addr); |
| 5368 | if (!np->rx_ring.orig) |
| 5369 | goto out_unmap; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5370 | np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size]; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5371 | } else { |
| 5372 | np->rx_ring.ex = pci_alloc_consistent(pci_dev, |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5373 | sizeof(struct ring_desc_ex) * (np->rx_ring_size + np->tx_ring_size), |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5374 | &np->ring_addr); |
| 5375 | if (!np->rx_ring.ex) |
| 5376 | goto out_unmap; |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5377 | np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size]; |
Manfred Spraul | ee73362 | 2005-07-31 18:32:26 +0200 | [diff] [blame] | 5378 | } |
Yoann Padioleau | dd00cc4 | 2007-07-19 01:49:03 -0700 | [diff] [blame] | 5379 | np->rx_skb = kcalloc(np->rx_ring_size, sizeof(struct nv_skb_map), GFP_KERNEL); |
| 5380 | np->tx_skb = kcalloc(np->tx_ring_size, sizeof(struct nv_skb_map), GFP_KERNEL); |
Ayaz Abdulla | 761fcd9 | 2007-01-09 13:30:07 -0500 | [diff] [blame] | 5381 | if (!np->rx_skb || !np->tx_skb) |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5382 | goto out_freering; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5383 | |
Jeff Garzik | 36b30ea | 2007-10-16 01:40:30 -0400 | [diff] [blame] | 5384 | if (!nv_optimized(np)) |
Stephen Hemminger | 0082982 | 2008-11-20 20:14:53 -0800 | [diff] [blame] | 5385 | dev->netdev_ops = &nv_netdev_ops; |
Ayaz Abdulla | 86b22b0 | 2007-01-21 18:10:37 -0500 | [diff] [blame] | 5386 | else |
Stephen Hemminger | 0082982 | 2008-11-20 20:14:53 -0800 | [diff] [blame] | 5387 | dev->netdev_ops = &nv_netdev_ops_optimized; |
Stephen Hemminger | b94426b | 2008-11-19 22:26:51 -0800 | [diff] [blame] | 5388 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 5389 | netif_napi_add(dev, &np->napi, nv_napi_poll, RX_WORK_PER_LOOP); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5390 | SET_ETHTOOL_OPS(dev, &ops); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5391 | dev->watchdog_timeo = NV_WATCHDOG_TIMEO; |
| 5392 | |
| 5393 | pci_set_drvdata(pci_dev, dev); |
| 5394 | |
| 5395 | /* read the mac address */ |
| 5396 | base = get_hwbase(dev); |
| 5397 | np->orig_mac[0] = readl(base + NvRegMacAddrA); |
| 5398 | np->orig_mac[1] = readl(base + NvRegMacAddrB); |
| 5399 | |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5400 | /* check the workaround bit for correct mac address order */ |
| 5401 | txreg = readl(base + NvRegTransmitPoll); |
Ayaz Abdulla | a376e79 | 2008-04-10 21:30:35 -0700 | [diff] [blame] | 5402 | if (id->driver_data & DEV_HAS_CORRECT_MACADDR) { |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5403 | /* mac address is already in correct order */ |
| 5404 | dev->dev_addr[0] = (np->orig_mac[0] >> 0) & 0xff; |
| 5405 | dev->dev_addr[1] = (np->orig_mac[0] >> 8) & 0xff; |
| 5406 | dev->dev_addr[2] = (np->orig_mac[0] >> 16) & 0xff; |
| 5407 | dev->dev_addr[3] = (np->orig_mac[0] >> 24) & 0xff; |
| 5408 | dev->dev_addr[4] = (np->orig_mac[1] >> 0) & 0xff; |
| 5409 | dev->dev_addr[5] = (np->orig_mac[1] >> 8) & 0xff; |
Ayaz Abdulla | a376e79 | 2008-04-10 21:30:35 -0700 | [diff] [blame] | 5410 | } else if (txreg & NVREG_TRANSMITPOLL_MAC_ADDR_REV) { |
| 5411 | /* mac address is already in correct order */ |
| 5412 | dev->dev_addr[0] = (np->orig_mac[0] >> 0) & 0xff; |
| 5413 | dev->dev_addr[1] = (np->orig_mac[0] >> 8) & 0xff; |
| 5414 | dev->dev_addr[2] = (np->orig_mac[0] >> 16) & 0xff; |
| 5415 | dev->dev_addr[3] = (np->orig_mac[0] >> 24) & 0xff; |
| 5416 | dev->dev_addr[4] = (np->orig_mac[1] >> 0) & 0xff; |
| 5417 | dev->dev_addr[5] = (np->orig_mac[1] >> 8) & 0xff; |
| 5418 | /* |
| 5419 | * Set orig mac address back to the reversed version. |
| 5420 | * This flag will be cleared during low power transition. |
| 5421 | * Therefore, we should always put back the reversed address. |
| 5422 | */ |
| 5423 | np->orig_mac[0] = (dev->dev_addr[5] << 0) + (dev->dev_addr[4] << 8) + |
| 5424 | (dev->dev_addr[3] << 16) + (dev->dev_addr[2] << 24); |
| 5425 | np->orig_mac[1] = (dev->dev_addr[1] << 0) + (dev->dev_addr[0] << 8); |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5426 | } else { |
| 5427 | /* need to reverse mac address to correct order */ |
| 5428 | dev->dev_addr[0] = (np->orig_mac[1] >> 8) & 0xff; |
| 5429 | dev->dev_addr[1] = (np->orig_mac[1] >> 0) & 0xff; |
| 5430 | dev->dev_addr[2] = (np->orig_mac[0] >> 24) & 0xff; |
| 5431 | dev->dev_addr[3] = (np->orig_mac[0] >> 16) & 0xff; |
| 5432 | dev->dev_addr[4] = (np->orig_mac[0] >> 8) & 0xff; |
| 5433 | dev->dev_addr[5] = (np->orig_mac[0] >> 0) & 0xff; |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5434 | writel(txreg|NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll); |
Joe Perches | c20ec76 | 2010-11-29 07:42:02 +0000 | [diff] [blame] | 5435 | dev_dbg(&pci_dev->dev, |
| 5436 | "%s: set workaround bit for reversed mac addr\n", |
| 5437 | __func__); |
Ayaz Abdulla | 5070d34 | 2006-07-31 12:05:01 -0400 | [diff] [blame] | 5438 | } |
John W. Linville | c704b85 | 2005-09-12 10:48:56 -0400 | [diff] [blame] | 5439 | memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5440 | |
John W. Linville | c704b85 | 2005-09-12 10:48:56 -0400 | [diff] [blame] | 5441 | if (!is_valid_ether_addr(dev->perm_addr)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5442 | /* |
| 5443 | * Bad mac address. At least one bios sets the mac address |
| 5444 | * to 01:23:45:67:89:ab |
| 5445 | */ |
Joe Perches | b2ba08e | 2010-11-29 07:42:00 +0000 | [diff] [blame] | 5446 | dev_err(&pci_dev->dev, |
Joe Perches | c20ec76 | 2010-11-29 07:42:02 +0000 | [diff] [blame] | 5447 | "Invalid MAC address detected: %pM - Please complain to your hardware vendor.\n", |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5448 | dev->dev_addr); |
Stanislav O. Bezzubtsev | 655a659 | 2009-11-15 21:17:02 -0800 | [diff] [blame] | 5449 | random_ether_addr(dev->dev_addr); |
Joe Perches | c20ec76 | 2010-11-29 07:42:02 +0000 | [diff] [blame] | 5450 | dev_err(&pci_dev->dev, |
| 5451 | "Using random MAC address: %pM\n", dev->dev_addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5452 | } |
| 5453 | |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5454 | /* set mac address */ |
| 5455 | nv_copy_mac_to_hw(dev); |
| 5456 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5457 | /* disable WOL */ |
| 5458 | writel(0, base + NvRegWakeUpFlags); |
| 5459 | np->wolenabled = 0; |
Rafael J. Wysocki | dba5a68 | 2011-01-07 11:12:05 +0000 | [diff] [blame] | 5460 | device_set_wakeup_enable(&pci_dev->dev, false); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5461 | |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5462 | if (id->driver_data & DEV_HAS_POWER_CNTRL) { |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5463 | |
| 5464 | /* take phy and nic out of low power mode */ |
| 5465 | powerstate = readl(base + NvRegPowerState2); |
| 5466 | powerstate &= ~NVREG_POWERSTATE2_POWERUP_MASK; |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5467 | if ((id->driver_data & DEV_NEED_LOW_POWER_FIX) && |
Auke Kok | 44c1013 | 2007-06-08 15:46:36 -0700 | [diff] [blame] | 5468 | pci_dev->revision >= 0xA3) |
Ayaz Abdulla | 86a0f04 | 2006-04-24 18:41:31 -0400 | [diff] [blame] | 5469 | powerstate |= NVREG_POWERSTATE2_POWERUP_REV_A3; |
| 5470 | writel(powerstate, base + NvRegPowerState2); |
| 5471 | } |
| 5472 | |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5473 | if (np->desc_ver == DESC_VER_1) |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5474 | np->tx_flags = NV_TX_VALID; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5475 | else |
Ayaz Abdulla | ac9c189 | 2005-10-26 00:51:24 -0400 | [diff] [blame] | 5476 | np->tx_flags = NV_TX2_VALID; |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 5477 | |
| 5478 | np->msi_flags = 0; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5479 | if ((id->driver_data & DEV_HAS_MSI) && msi) |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 5480 | np->msi_flags |= NV_MSI_CAPABLE; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5481 | |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 5482 | if ((id->driver_data & DEV_HAS_MSI_X) && msix) { |
| 5483 | /* msix has had reported issues when modifying irqmask |
| 5484 | as in the case of napi, therefore, disable for now |
| 5485 | */ |
David S. Miller | 0a12761 | 2010-05-03 23:33:05 -0700 | [diff] [blame] | 5486 | #if 0 |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 5487 | np->msi_flags |= NV_MSI_X_CAPABLE; |
| 5488 | #endif |
| 5489 | } |
| 5490 | |
| 5491 | if (optimization_mode == NV_OPTIMIZATION_MODE_CPU) { |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 5492 | np->irqmask = NVREG_IRQMASK_CPU; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 5493 | if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */ |
| 5494 | np->msi_flags |= 0x0001; |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 5495 | } else if (optimization_mode == NV_OPTIMIZATION_MODE_DYNAMIC && |
| 5496 | !(id->driver_data & DEV_NEED_TIMERIRQ)) { |
| 5497 | /* start off in throughput mode */ |
| 5498 | np->irqmask = NVREG_IRQMASK_THROUGHPUT; |
| 5499 | /* remove support for msix mode */ |
| 5500 | np->msi_flags &= ~NV_MSI_X_CAPABLE; |
| 5501 | } else { |
| 5502 | optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT; |
| 5503 | np->irqmask = NVREG_IRQMASK_THROUGHPUT; |
| 5504 | if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */ |
| 5505 | np->msi_flags |= 0x0003; |
Ayaz Abdulla | d33a73c8 | 2006-02-04 13:13:31 -0500 | [diff] [blame] | 5506 | } |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 5507 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5508 | if (id->driver_data & DEV_NEED_TIMERIRQ) |
| 5509 | np->irqmask |= NVREG_IRQ_TIMER; |
| 5510 | if (id->driver_data & DEV_NEED_LINKTIMER) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5511 | np->need_linktimer = 1; |
| 5512 | np->link_timeout = jiffies + LINK_TIMEOUT; |
| 5513 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5514 | np->need_linktimer = 0; |
| 5515 | } |
| 5516 | |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 5517 | /* Limit the number of tx's outstanding for hw bug */ |
| 5518 | if (id->driver_data & DEV_NEED_TX_LIMIT) { |
| 5519 | np->tx_limit = 1; |
Ayaz Abdulla | 5c65932 | 2010-04-13 18:49:51 -0700 | [diff] [blame] | 5520 | if (((id->driver_data & DEV_NEED_TX_LIMIT2) == DEV_NEED_TX_LIMIT2) && |
Ayaz Abdulla | 3b446c3 | 2008-03-10 14:58:21 -0500 | [diff] [blame] | 5521 | pci_dev->revision >= 0xA2) |
| 5522 | np->tx_limit = 0; |
| 5523 | } |
| 5524 | |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5525 | /* clear phy state and temporarily halt phy interrupts */ |
| 5526 | writel(0, base + NvRegMIIMask); |
| 5527 | phystate = readl(base + NvRegAdapterControl); |
| 5528 | if (phystate & NVREG_ADAPTCTL_RUNNING) { |
| 5529 | phystate_orig = 1; |
| 5530 | phystate &= ~NVREG_ADAPTCTL_RUNNING; |
| 5531 | writel(phystate, base + NvRegAdapterControl); |
| 5532 | } |
Ayaz Abdulla | eb79842 | 2008-02-04 15:14:04 -0500 | [diff] [blame] | 5533 | writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus); |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5534 | |
| 5535 | if (id->driver_data & DEV_HAS_MGMT_UNIT) { |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5536 | /* management unit running on the mac? */ |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 5537 | if ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_ST) && |
| 5538 | (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_PHY_INIT) && |
| 5539 | nv_mgmt_acquire_sema(dev) && |
| 5540 | nv_mgmt_get_version(dev)) { |
| 5541 | np->mac_in_use = 1; |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5542 | if (np->mgmt_version > 0) |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 5543 | np->mac_in_use = readl(base + NvRegMgmtUnitControl) & NVREG_MGMTUNITCONTROL_INUSE; |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 5544 | /* management unit setup the phy already? */ |
| 5545 | if (np->mac_in_use && |
| 5546 | ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK) == |
| 5547 | NVREG_XMITCTL_SYNC_PHY_INIT)) { |
| 5548 | /* phy is inited by mgmt unit */ |
| 5549 | phyinitialized = 1; |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 5550 | } else { |
| 5551 | /* we need to init the phy */ |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5552 | } |
| 5553 | } |
| 5554 | } |
| 5555 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5556 | /* find a suitable phy */ |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5557 | for (i = 1; i <= 32; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5558 | int id1, id2; |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5559 | int phyaddr = i & 0x1F; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5560 | |
| 5561 | spin_lock_irq(&np->lock); |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5562 | id1 = mii_rw(dev, phyaddr, MII_PHYSID1, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5563 | spin_unlock_irq(&np->lock); |
| 5564 | if (id1 < 0 || id1 == 0xffff) |
| 5565 | continue; |
| 5566 | spin_lock_irq(&np->lock); |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5567 | id2 = mii_rw(dev, phyaddr, MII_PHYSID2, MII_READ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5568 | spin_unlock_irq(&np->lock); |
| 5569 | if (id2 < 0 || id2 == 0xffff) |
| 5570 | continue; |
| 5571 | |
Ayaz Abdulla | edf7e5e | 2006-08-24 15:43:42 -0400 | [diff] [blame] | 5572 | np->phy_model = id2 & PHYID2_MODEL_MASK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5573 | id1 = (id1 & PHYID1_OUI_MASK) << PHYID1_OUI_SHFT; |
| 5574 | id2 = (id2 & PHYID2_OUI_MASK) >> PHYID2_OUI_SHFT; |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5575 | np->phyaddr = phyaddr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5576 | np->phy_oui = id1 | id2; |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 5577 | |
| 5578 | /* Realtek hardcoded phy id1 to all zero's on certain phys */ |
| 5579 | if (np->phy_oui == PHY_OUI_REALTEK2) |
| 5580 | np->phy_oui = PHY_OUI_REALTEK; |
| 5581 | /* Setup phy revision for Realtek */ |
| 5582 | if (np->phy_oui == PHY_OUI_REALTEK && np->phy_model == PHY_MODEL_REALTEK_8211) |
| 5583 | np->phy_rev = mii_rw(dev, phyaddr, MII_RESV1, MII_READ) & PHY_REV_MASK; |
| 5584 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5585 | break; |
| 5586 | } |
Ayaz Abdulla | 7a33e45 | 2005-11-11 08:31:11 -0500 | [diff] [blame] | 5587 | if (i == 33) { |
Joe Perches | b2ba08e | 2010-11-29 07:42:00 +0000 | [diff] [blame] | 5588 | dev_info(&pci_dev->dev, "open: Could not find a valid PHY\n"); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5589 | goto out_error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5590 | } |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 5591 | |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5592 | if (!phyinitialized) { |
| 5593 | /* reset it */ |
| 5594 | phy_init(dev); |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 5595 | } else { |
| 5596 | /* see if it is a gigabit phy */ |
| 5597 | u32 mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5598 | if (mii_status & PHY_GIGABIT) |
Ayaz Abdulla | f35723e | 2003-02-20 03:03:54 -0500 | [diff] [blame] | 5599 | np->gigabit = PHY_GIGABIT; |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5600 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5601 | |
| 5602 | /* set default link speed settings */ |
| 5603 | np->linkspeed = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10; |
| 5604 | np->duplex = 0; |
| 5605 | np->autoneg = 1; |
| 5606 | |
| 5607 | err = register_netdev(dev); |
| 5608 | if (err) { |
Joe Perches | b2ba08e | 2010-11-29 07:42:00 +0000 | [diff] [blame] | 5609 | dev_info(&pci_dev->dev, "unable to register netdev: %d\n", err); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5610 | goto out_error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5611 | } |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5612 | |
Ivan Vecera | 0d672e9 | 2011-02-15 02:08:39 +0000 | [diff] [blame] | 5613 | netif_carrier_off(dev); |
| 5614 | |
Joe Perches | b2ba08e | 2010-11-29 07:42:00 +0000 | [diff] [blame] | 5615 | dev_info(&pci_dev->dev, "ifname %s, PHY OUI 0x%x @ %d, addr %pM\n", |
| 5616 | dev->name, np->phy_oui, np->phyaddr, dev->dev_addr); |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5617 | |
Joe Perches | b2ba08e | 2010-11-29 07:42:00 +0000 | [diff] [blame] | 5618 | dev_info(&pci_dev->dev, "%s%s%s%s%s%s%s%s%s%sdesc-v%u\n", |
| 5619 | dev->features & NETIF_F_HIGHDMA ? "highdma " : "", |
| 5620 | dev->features & (NETIF_F_IP_CSUM | NETIF_F_SG) ? |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5621 | "csum " : "", |
Joe Perches | b2ba08e | 2010-11-29 07:42:00 +0000 | [diff] [blame] | 5622 | dev->features & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX) ? |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5623 | "vlan " : "", |
Joe Perches | b2ba08e | 2010-11-29 07:42:00 +0000 | [diff] [blame] | 5624 | id->driver_data & DEV_HAS_POWER_CNTRL ? "pwrctl " : "", |
| 5625 | id->driver_data & DEV_HAS_MGMT_UNIT ? "mgmt " : "", |
| 5626 | id->driver_data & DEV_NEED_TIMERIRQ ? "timirq " : "", |
| 5627 | np->gigabit == PHY_GIGABIT ? "gbit " : "", |
| 5628 | np->need_linktimer ? "lnktim " : "", |
| 5629 | np->msi_flags & NV_MSI_CAPABLE ? "msi " : "", |
| 5630 | np->msi_flags & NV_MSI_X_CAPABLE ? "msi-x " : "", |
| 5631 | np->desc_ver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5632 | |
| 5633 | return 0; |
| 5634 | |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5635 | out_error: |
Ayaz Abdulla | 7e680c2 | 2006-10-30 17:31:51 -0500 | [diff] [blame] | 5636 | if (phystate_orig) |
| 5637 | writel(phystate|NVREG_ADAPTCTL_RUNNING, base + NvRegAdapterControl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5638 | pci_set_drvdata(pci_dev, NULL); |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5639 | out_freering: |
| 5640 | free_rings(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5641 | out_unmap: |
| 5642 | iounmap(get_hwbase(dev)); |
| 5643 | out_relreg: |
| 5644 | pci_release_regions(pci_dev); |
| 5645 | out_disable: |
| 5646 | pci_disable_device(pci_dev); |
| 5647 | out_free: |
| 5648 | free_netdev(dev); |
| 5649 | out: |
| 5650 | return err; |
| 5651 | } |
| 5652 | |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 5653 | static void nv_restore_phy(struct net_device *dev) |
| 5654 | { |
| 5655 | struct fe_priv *np = netdev_priv(dev); |
| 5656 | u16 phy_reserved, mii_control; |
| 5657 | |
| 5658 | if (np->phy_oui == PHY_OUI_REALTEK && |
| 5659 | np->phy_model == PHY_MODEL_REALTEK_8201 && |
| 5660 | phy_cross == NV_CROSSOVER_DETECTION_DISABLED) { |
| 5661 | mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3); |
| 5662 | phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, MII_READ); |
| 5663 | phy_reserved &= ~PHY_REALTEK_INIT_MSK1; |
| 5664 | phy_reserved |= PHY_REALTEK_INIT8; |
| 5665 | mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, phy_reserved); |
| 5666 | mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1); |
| 5667 | |
| 5668 | /* restart auto negotiation */ |
| 5669 | mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
| 5670 | mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE); |
| 5671 | mii_rw(dev, np->phyaddr, MII_BMCR, mii_control); |
| 5672 | } |
| 5673 | } |
| 5674 | |
Yinghai Lu | f55c21f | 2008-09-13 13:10:31 -0700 | [diff] [blame] | 5675 | static void nv_restore_mac_addr(struct pci_dev *pci_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5676 | { |
| 5677 | struct net_device *dev = pci_get_drvdata(pci_dev); |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5678 | struct fe_priv *np = netdev_priv(dev); |
| 5679 | u8 __iomem *base = get_hwbase(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5680 | |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5681 | /* special op: write back the misordered MAC address - otherwise |
| 5682 | * the next nv_probe would see a wrong address. |
| 5683 | */ |
| 5684 | writel(np->orig_mac[0], base + NvRegMacAddrA); |
| 5685 | writel(np->orig_mac[1], base + NvRegMacAddrB); |
Björn Steinbrink | 2e3884b | 2008-01-07 23:22:53 -0800 | [diff] [blame] | 5686 | writel(readl(base + NvRegTransmitPoll) & ~NVREG_TRANSMITPOLL_MAC_ADDR_REV, |
| 5687 | base + NvRegTransmitPoll); |
Yinghai Lu | f55c21f | 2008-09-13 13:10:31 -0700 | [diff] [blame] | 5688 | } |
| 5689 | |
| 5690 | static void __devexit nv_remove(struct pci_dev *pci_dev) |
| 5691 | { |
| 5692 | struct net_device *dev = pci_get_drvdata(pci_dev); |
| 5693 | |
| 5694 | unregister_netdev(dev); |
| 5695 | |
| 5696 | nv_restore_mac_addr(pci_dev); |
Ayaz Abdulla | f148965 | 2006-07-31 12:04:45 -0400 | [diff] [blame] | 5697 | |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 5698 | /* restore any phy related changes */ |
| 5699 | nv_restore_phy(dev); |
| 5700 | |
Ayaz Abdulla | cac1c52 | 2009-02-07 00:23:57 -0800 | [diff] [blame] | 5701 | nv_mgmt_release_sema(dev); |
| 5702 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5703 | /* free all structures */ |
Ayaz Abdulla | eafa59f | 2006-06-10 22:47:34 -0400 | [diff] [blame] | 5704 | free_rings(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5705 | iounmap(get_hwbase(dev)); |
| 5706 | pci_release_regions(pci_dev); |
| 5707 | pci_disable_device(pci_dev); |
| 5708 | free_netdev(dev); |
| 5709 | pci_set_drvdata(pci_dev, NULL); |
| 5710 | } |
| 5711 | |
Michel Lespinasse | 9425276 | 2011-03-06 16:14:50 +0000 | [diff] [blame] | 5712 | #ifdef CONFIG_PM_SLEEP |
Rafael J. Wysocki | dba5a68 | 2011-01-07 11:12:05 +0000 | [diff] [blame] | 5713 | static int nv_suspend(struct device *device) |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5714 | { |
Rafael J. Wysocki | dba5a68 | 2011-01-07 11:12:05 +0000 | [diff] [blame] | 5715 | struct pci_dev *pdev = to_pci_dev(device); |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5716 | struct net_device *dev = pci_get_drvdata(pdev); |
| 5717 | struct fe_priv *np = netdev_priv(dev); |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 5718 | u8 __iomem *base = get_hwbase(dev); |
| 5719 | int i; |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5720 | |
Tobias Diedrich | 25d9081 | 2008-05-18 15:04:29 +0200 | [diff] [blame] | 5721 | if (netif_running(dev)) { |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5722 | /* Gross. */ |
Tobias Diedrich | 25d9081 | 2008-05-18 15:04:29 +0200 | [diff] [blame] | 5723 | nv_close(dev); |
| 5724 | } |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5725 | netif_device_detach(dev); |
| 5726 | |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 5727 | /* save non-pci configuration space */ |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5728 | for (i = 0; i <= np->register_size/sizeof(u32); i++) |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 5729 | np->saved_config_space[i] = readl(base + i*sizeof(u32)); |
| 5730 | |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5731 | return 0; |
| 5732 | } |
| 5733 | |
Rafael J. Wysocki | dba5a68 | 2011-01-07 11:12:05 +0000 | [diff] [blame] | 5734 | static int nv_resume(struct device *device) |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5735 | { |
Rafael J. Wysocki | dba5a68 | 2011-01-07 11:12:05 +0000 | [diff] [blame] | 5736 | struct pci_dev *pdev = to_pci_dev(device); |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5737 | struct net_device *dev = pci_get_drvdata(pdev); |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 5738 | struct fe_priv *np = netdev_priv(dev); |
Ayaz Abdulla | a376e79 | 2008-04-10 21:30:35 -0700 | [diff] [blame] | 5739 | u8 __iomem *base = get_hwbase(dev); |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 5740 | int i, rc = 0; |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5741 | |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 5742 | /* restore non-pci configuration space */ |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5743 | for (i = 0; i <= np->register_size/sizeof(u32); i++) |
Tobias Diedrich | 1a1ca86 | 2008-05-18 15:03:44 +0200 | [diff] [blame] | 5744 | writel(np->saved_config_space[i], base+i*sizeof(u32)); |
Ayaz Abdulla | a376e79 | 2008-04-10 21:30:35 -0700 | [diff] [blame] | 5745 | |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5746 | if (np->driver_data & DEV_NEED_MSI_FIX) |
| 5747 | pci_write_config_dword(pdev, NV_MSI_PRIV_OFFSET, NV_MSI_PRIV_VALUE); |
Ayaz Abdulla | b6e4405 | 2009-02-07 00:24:15 -0800 | [diff] [blame] | 5748 | |
Ed Swierk | 35a7433 | 2009-04-06 17:49:12 -0700 | [diff] [blame] | 5749 | /* restore phy state, including autoneg */ |
| 5750 | phy_init(dev); |
| 5751 | |
Tobias Diedrich | 25d9081 | 2008-05-18 15:04:29 +0200 | [diff] [blame] | 5752 | netif_device_attach(dev); |
| 5753 | if (netif_running(dev)) { |
| 5754 | rc = nv_open(dev); |
| 5755 | nv_set_multicast(dev); |
| 5756 | } |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5757 | return rc; |
| 5758 | } |
Tobias Diedrich | f735a2a | 2008-05-18 15:02:37 +0200 | [diff] [blame] | 5759 | |
Rafael J. Wysocki | dba5a68 | 2011-01-07 11:12:05 +0000 | [diff] [blame] | 5760 | static SIMPLE_DEV_PM_OPS(nv_pm_ops, nv_suspend, nv_resume); |
| 5761 | #define NV_PM_OPS (&nv_pm_ops) |
| 5762 | |
Michel Lespinasse | 9425276 | 2011-03-06 16:14:50 +0000 | [diff] [blame] | 5763 | #else |
| 5764 | #define NV_PM_OPS NULL |
| 5765 | #endif /* CONFIG_PM_SLEEP */ |
| 5766 | |
| 5767 | #ifdef CONFIG_PM |
Tobias Diedrich | f735a2a | 2008-05-18 15:02:37 +0200 | [diff] [blame] | 5768 | static void nv_shutdown(struct pci_dev *pdev) |
| 5769 | { |
| 5770 | struct net_device *dev = pci_get_drvdata(pdev); |
| 5771 | struct fe_priv *np = netdev_priv(dev); |
| 5772 | |
| 5773 | if (netif_running(dev)) |
| 5774 | nv_close(dev); |
| 5775 | |
Tobias Diedrich | 34edaa8 | 2009-02-16 00:13:20 -0800 | [diff] [blame] | 5776 | /* |
| 5777 | * Restore the MAC so a kernel started by kexec won't get confused. |
| 5778 | * If we really go for poweroff, we must not restore the MAC, |
| 5779 | * otherwise the MAC for WOL will be reversed at least on some boards. |
| 5780 | */ |
Szymon Janc | 78aea4f | 2010-11-27 08:39:43 +0000 | [diff] [blame] | 5781 | if (system_state != SYSTEM_POWER_OFF) |
Tobias Diedrich | 34edaa8 | 2009-02-16 00:13:20 -0800 | [diff] [blame] | 5782 | nv_restore_mac_addr(pdev); |
Yinghai Lu | f55c21f | 2008-09-13 13:10:31 -0700 | [diff] [blame] | 5783 | |
Tobias Diedrich | f735a2a | 2008-05-18 15:02:37 +0200 | [diff] [blame] | 5784 | pci_disable_device(pdev); |
Tobias Diedrich | 34edaa8 | 2009-02-16 00:13:20 -0800 | [diff] [blame] | 5785 | /* |
| 5786 | * Apparently it is not possible to reinitialise from D3 hot, |
| 5787 | * only put the device into D3 if we really go for poweroff. |
| 5788 | */ |
Rafael J. Wysocki | 3cb5599 | 2008-09-05 14:00:19 -0700 | [diff] [blame] | 5789 | if (system_state == SYSTEM_POWER_OFF) { |
Rafael J. Wysocki | dba5a68 | 2011-01-07 11:12:05 +0000 | [diff] [blame] | 5790 | pci_wake_from_d3(pdev, np->wolenabled); |
Rafael J. Wysocki | 3cb5599 | 2008-09-05 14:00:19 -0700 | [diff] [blame] | 5791 | pci_set_power_state(pdev, PCI_D3hot); |
| 5792 | } |
Tobias Diedrich | f735a2a | 2008-05-18 15:02:37 +0200 | [diff] [blame] | 5793 | } |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5794 | #else |
Tobias Diedrich | f735a2a | 2008-05-18 15:02:37 +0200 | [diff] [blame] | 5795 | #define nv_shutdown NULL |
Francois Romieu | a189317 | 2006-10-10 14:33:27 -0700 | [diff] [blame] | 5796 | #endif /* CONFIG_PM */ |
| 5797 | |
Alexey Dobriyan | a3aa188 | 2010-01-07 11:58:11 +0000 | [diff] [blame] | 5798 | static DEFINE_PCI_DEVICE_TABLE(pci_tbl) = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5799 | { /* nForce Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5800 | PCI_DEVICE(0x10DE, 0x01C3), |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 5801 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5802 | }, |
| 5803 | { /* nForce2 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5804 | PCI_DEVICE(0x10DE, 0x0066), |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 5805 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5806 | }, |
| 5807 | { /* nForce3 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5808 | PCI_DEVICE(0x10DE, 0x00D6), |
Manfred Spraul | c2dba06 | 2005-07-31 18:29:47 +0200 | [diff] [blame] | 5809 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5810 | }, |
| 5811 | { /* nForce3 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5812 | PCI_DEVICE(0x10DE, 0x0086), |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5813 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5814 | }, |
| 5815 | { /* nForce3 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5816 | PCI_DEVICE(0x10DE, 0x008C), |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5817 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5818 | }, |
| 5819 | { /* nForce3 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5820 | PCI_DEVICE(0x10DE, 0x00E6), |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5821 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5822 | }, |
| 5823 | { /* nForce3 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5824 | PCI_DEVICE(0x10DE, 0x00DF), |
Manfred Spraul | 8a4ae7f | 2005-09-21 23:22:10 -0400 | [diff] [blame] | 5825 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5826 | }, |
| 5827 | { /* CK804 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5828 | PCI_DEVICE(0x10DE, 0x0056), |
Yinghai Lu | 033e97b | 2009-02-06 01:30:56 -0800 | [diff] [blame] | 5829 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5830 | }, |
| 5831 | { /* CK804 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5832 | PCI_DEVICE(0x10DE, 0x0057), |
Yinghai Lu | 033e97b | 2009-02-06 01:30:56 -0800 | [diff] [blame] | 5833 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5834 | }, |
| 5835 | { /* MCP04 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5836 | PCI_DEVICE(0x10DE, 0x0037), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 5837 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5838 | }, |
| 5839 | { /* MCP04 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5840 | PCI_DEVICE(0x10DE, 0x0038), |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 5841 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT, |
Manfred Spraul | dc8216c | 2005-07-31 18:26:05 +0200 | [diff] [blame] | 5842 | }, |
| 5843 | { /* MCP51 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5844 | PCI_DEVICE(0x10DE, 0x0268), |
| 5845 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V1|DEV_NEED_LOW_POWER_FIX, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5846 | }, |
Manfred Spraul | 9992d4a | 2005-06-05 17:36:11 +0200 | [diff] [blame] | 5847 | { /* MCP51 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5848 | PCI_DEVICE(0x10DE, 0x0269), |
| 5849 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V1|DEV_NEED_LOW_POWER_FIX, |
Manfred Spraul | 9992d4a | 2005-06-05 17:36:11 +0200 | [diff] [blame] | 5850 | }, |
Manfred Spraul | f49d16e | 2005-06-26 11:36:52 +0200 | [diff] [blame] | 5851 | { /* MCP55 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5852 | PCI_DEVICE(0x10DE, 0x0372), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5853 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_NEED_TX_LIMIT|DEV_NEED_MSI_FIX, |
Manfred Spraul | f49d16e | 2005-06-26 11:36:52 +0200 | [diff] [blame] | 5854 | }, |
| 5855 | { /* MCP55 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5856 | PCI_DEVICE(0x10DE, 0x0373), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5857 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_NEED_TX_LIMIT|DEV_NEED_MSI_FIX, |
Manfred Spraul | f49d16e | 2005-06-26 11:36:52 +0200 | [diff] [blame] | 5858 | }, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5859 | { /* MCP61 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5860 | PCI_DEVICE(0x10DE, 0x03E5), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5861 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5862 | }, |
| 5863 | { /* MCP61 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5864 | PCI_DEVICE(0x10DE, 0x03E6), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5865 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5866 | }, |
| 5867 | { /* MCP61 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5868 | PCI_DEVICE(0x10DE, 0x03EE), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5869 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5870 | }, |
| 5871 | { /* MCP61 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5872 | PCI_DEVICE(0x10DE, 0x03EF), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5873 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5874 | }, |
| 5875 | { /* MCP65 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5876 | PCI_DEVICE(0x10DE, 0x0450), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5877 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5878 | }, |
| 5879 | { /* MCP65 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5880 | PCI_DEVICE(0x10DE, 0x0451), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5881 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5882 | }, |
| 5883 | { /* MCP65 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5884 | PCI_DEVICE(0x10DE, 0x0452), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5885 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5886 | }, |
| 5887 | { /* MCP65 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5888 | PCI_DEVICE(0x10DE, 0x0453), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5889 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | c99ce7e | 2006-06-10 22:48:28 -0400 | [diff] [blame] | 5890 | }, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 5891 | { /* MCP67 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5892 | PCI_DEVICE(0x10DE, 0x054C), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5893 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 5894 | }, |
| 5895 | { /* MCP67 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5896 | PCI_DEVICE(0x10DE, 0x054D), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5897 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 5898 | }, |
| 5899 | { /* MCP67 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5900 | PCI_DEVICE(0x10DE, 0x054E), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5901 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 5902 | }, |
| 5903 | { /* MCP67 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5904 | PCI_DEVICE(0x10DE, 0x054F), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5905 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | f434484 | 2006-11-06 00:43:40 -0800 | [diff] [blame] | 5906 | }, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 5907 | { /* MCP73 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5908 | PCI_DEVICE(0x10DE, 0x07DC), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5909 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 5910 | }, |
| 5911 | { /* MCP73 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5912 | PCI_DEVICE(0x10DE, 0x07DD), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5913 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 5914 | }, |
| 5915 | { /* MCP73 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5916 | PCI_DEVICE(0x10DE, 0x07DE), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5917 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 5918 | }, |
| 5919 | { /* MCP73 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5920 | PCI_DEVICE(0x10DE, 0x07DF), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5921 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | 1398661 | 2007-07-22 20:43:26 -0400 | [diff] [blame] | 5922 | }, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 5923 | { /* MCP77 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5924 | PCI_DEVICE(0x10DE, 0x0760), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5925 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 5926 | }, |
| 5927 | { /* MCP77 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5928 | PCI_DEVICE(0x10DE, 0x0761), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5929 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 5930 | }, |
| 5931 | { /* MCP77 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5932 | PCI_DEVICE(0x10DE, 0x0762), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5933 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 5934 | }, |
| 5935 | { /* MCP77 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5936 | PCI_DEVICE(0x10DE, 0x0763), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5937 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | 96fd4cd | 2007-10-25 03:36:42 -0400 | [diff] [blame] | 5938 | }, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 5939 | { /* MCP79 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5940 | PCI_DEVICE(0x10DE, 0x0AB0), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5941 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 5942 | }, |
| 5943 | { /* MCP79 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5944 | PCI_DEVICE(0x10DE, 0x0AB1), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5945 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 5946 | }, |
| 5947 | { /* MCP79 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5948 | PCI_DEVICE(0x10DE, 0x0AB2), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5949 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 5950 | }, |
| 5951 | { /* MCP79 Ethernet Controller */ |
Ayaz Abdulla | 3c2e1c1 | 2009-06-03 15:05:17 +0000 | [diff] [blame] | 5952 | PCI_DEVICE(0x10DE, 0x0AB3), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5953 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX, |
Ayaz Abdulla | 490dde8 | 2007-11-23 20:54:01 -0500 | [diff] [blame] | 5954 | }, |
Ayaz Abdulla | 3df81c4 | 2009-06-03 15:05:35 +0000 | [diff] [blame] | 5955 | { /* MCP89 Ethernet Controller */ |
| 5956 | PCI_DEVICE(0x10DE, 0x0D7D), |
Mike Ditto | 7b5e078 | 2010-07-25 21:54:28 -0700 | [diff] [blame] | 5957 | .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX, |
Ayaz Abdulla | 3df81c4 | 2009-06-03 15:05:35 +0000 | [diff] [blame] | 5958 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5959 | {0,}, |
| 5960 | }; |
| 5961 | |
| 5962 | static struct pci_driver driver = { |
Jeff Garzik | 3f88ce4 | 2007-10-16 04:09:09 -0400 | [diff] [blame] | 5963 | .name = DRV_NAME, |
| 5964 | .id_table = pci_tbl, |
| 5965 | .probe = nv_probe, |
| 5966 | .remove = __devexit_p(nv_remove), |
Tobias Diedrich | f735a2a | 2008-05-18 15:02:37 +0200 | [diff] [blame] | 5967 | .shutdown = nv_shutdown, |
Rafael J. Wysocki | dba5a68 | 2011-01-07 11:12:05 +0000 | [diff] [blame] | 5968 | .driver.pm = NV_PM_OPS, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5969 | }; |
| 5970 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5971 | static int __init init_nic(void) |
| 5972 | { |
Jeff Garzik | 2991762 | 2006-08-19 17:48:59 -0400 | [diff] [blame] | 5973 | return pci_register_driver(&driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5974 | } |
| 5975 | |
| 5976 | static void __exit exit_nic(void) |
| 5977 | { |
| 5978 | pci_unregister_driver(&driver); |
| 5979 | } |
| 5980 | |
| 5981 | module_param(max_interrupt_work, int, 0); |
| 5982 | MODULE_PARM_DESC(max_interrupt_work, "forcedeth maximum events handled per interrupt"); |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 5983 | module_param(optimization_mode, int, 0); |
Ayaz Abdulla | 9e18476 | 2009-03-05 08:02:18 +0000 | [diff] [blame] | 5984 | MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer. In dynamic mode (2), the mode toggles between throughput and CPU mode based on network load."); |
Ayaz Abdulla | a971c32 | 2005-11-11 08:30:38 -0500 | [diff] [blame] | 5985 | module_param(poll_interval, int, 0); |
| 5986 | MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535."); |
Ayaz Abdulla | 69fe3fd | 2006-06-10 22:48:18 -0400 | [diff] [blame] | 5987 | module_param(msi, int, 0); |
| 5988 | MODULE_PARM_DESC(msi, "MSI interrupts are enabled by setting to 1 and disabled by setting to 0."); |
| 5989 | module_param(msix, int, 0); |
| 5990 | MODULE_PARM_DESC(msix, "MSIX interrupts are enabled by setting to 1 and disabled by setting to 0."); |
| 5991 | module_param(dma_64bit, int, 0); |
| 5992 | MODULE_PARM_DESC(dma_64bit, "High DMA is enabled by setting to 1 and disabled by setting to 0."); |
Ayaz Abdulla | 9f3f791 | 2008-04-23 14:37:30 -0400 | [diff] [blame] | 5993 | module_param(phy_cross, int, 0); |
| 5994 | MODULE_PARM_DESC(phy_cross, "Phy crossover detection for Realtek 8201 phy is enabled by setting to 1 and disabled by setting to 0."); |
Ed Swierk | 5a9a8e3 | 2009-06-02 00:19:52 -0700 | [diff] [blame] | 5995 | module_param(phy_power_down, int, 0); |
| 5996 | MODULE_PARM_DESC(phy_power_down, "Power down phy and disable link when interface is down (1), or leave phy powered up (0)."); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5997 | |
| 5998 | MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>"); |
| 5999 | MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver"); |
| 6000 | MODULE_LICENSE("GPL"); |
| 6001 | |
| 6002 | MODULE_DEVICE_TABLE(pci, pci_tbl); |
| 6003 | |
| 6004 | module_init(init_nic); |
| 6005 | module_exit(exit_nic); |