Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2006-2007 Intel Corporation |
| 3 | * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: |
| 25 | * Eric Anholt <eric@anholt.net> |
| 26 | * Dave Airlie <airlied@linux.ie> |
| 27 | * Jesse Barnes <jesse.barnes@intel.com> |
| 28 | */ |
| 29 | |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 30 | #include <acpi/button.h> |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 31 | #include <linux/dmi.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 32 | #include <linux/i2c.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 33 | #include <linux/slab.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 34 | #include "drmP.h" |
| 35 | #include "drm.h" |
| 36 | #include "drm_crtc.h" |
| 37 | #include "drm_edid.h" |
| 38 | #include "intel_drv.h" |
| 39 | #include "i915_drm.h" |
| 40 | #include "i915_drv.h" |
Zhao Yakui | e99da35 | 2009-06-26 09:46:18 +0800 | [diff] [blame] | 41 | #include <linux/acpi.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 42 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 43 | /* Private structure for the integrated LVDS support */ |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 44 | struct intel_lvds { |
| 45 | struct intel_encoder base; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 46 | |
Chris Wilson | 219adae | 2010-09-16 23:05:10 +0100 | [diff] [blame] | 47 | struct edid *edid; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 48 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 49 | int fitting_mode; |
| 50 | u32 pfit_control; |
| 51 | u32 pfit_pgm_ratios; |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 52 | bool pfit_dirty; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 53 | |
| 54 | struct drm_display_mode *fixed_mode; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 55 | }; |
| 56 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 57 | static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder) |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 58 | { |
Chris Wilson | 4ef69c7 | 2010-09-09 15:14:28 +0100 | [diff] [blame] | 59 | return container_of(encoder, struct intel_lvds, base.base); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 60 | } |
| 61 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 62 | static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector) |
| 63 | { |
| 64 | return container_of(intel_attached_encoder(connector), |
| 65 | struct intel_lvds, base); |
| 66 | } |
| 67 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 68 | /** |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 69 | * Sets the power state for the panel. |
| 70 | */ |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 71 | static void intel_lvds_enable(struct intel_lvds *intel_lvds) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 72 | { |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 73 | struct drm_device *dev = intel_lvds->base.base.dev; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 74 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 75 | u32 ctl_reg, lvds_reg; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 76 | |
Eric Anholt | c619eed | 2010-01-28 16:45:52 -0800 | [diff] [blame] | 77 | if (HAS_PCH_SPLIT(dev)) { |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 78 | ctl_reg = PCH_PP_CONTROL; |
Jesse Barnes | 469d129 | 2010-02-11 12:41:05 -0800 | [diff] [blame] | 79 | lvds_reg = PCH_LVDS; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 80 | } else { |
| 81 | ctl_reg = PP_CONTROL; |
Jesse Barnes | 469d129 | 2010-02-11 12:41:05 -0800 | [diff] [blame] | 82 | lvds_reg = LVDS; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 83 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 84 | |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 85 | I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN); |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 86 | |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 87 | if (intel_lvds->pfit_dirty) { |
| 88 | /* |
| 89 | * Enable automatic panel scaling so that non-native modes |
| 90 | * fill the screen. The panel fitter should only be |
| 91 | * adjusted whilst the pipe is disabled, according to |
| 92 | * register description and PRM. |
| 93 | */ |
| 94 | DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n", |
| 95 | intel_lvds->pfit_control, |
| 96 | intel_lvds->pfit_pgm_ratios); |
| 97 | if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) { |
| 98 | DRM_ERROR("timed out waiting for panel to power off\n"); |
| 99 | } else { |
| 100 | I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios); |
| 101 | I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control); |
Chris Wilson | 4fd21dc | 2010-09-21 14:06:12 +0100 | [diff] [blame] | 102 | intel_lvds->pfit_dirty = false; |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 103 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 104 | } |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 105 | |
| 106 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON); |
| 107 | POSTING_READ(lvds_reg); |
| 108 | |
Chris Wilson | 47356eb | 2011-01-11 17:06:04 +0000 | [diff] [blame] | 109 | intel_panel_enable_backlight(dev); |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 110 | } |
| 111 | |
| 112 | static void intel_lvds_disable(struct intel_lvds *intel_lvds) |
| 113 | { |
| 114 | struct drm_device *dev = intel_lvds->base.base.dev; |
| 115 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 116 | u32 ctl_reg, lvds_reg; |
| 117 | |
| 118 | if (HAS_PCH_SPLIT(dev)) { |
| 119 | ctl_reg = PCH_PP_CONTROL; |
| 120 | lvds_reg = PCH_LVDS; |
| 121 | } else { |
| 122 | ctl_reg = PP_CONTROL; |
| 123 | lvds_reg = LVDS; |
| 124 | } |
| 125 | |
Chris Wilson | 47356eb | 2011-01-11 17:06:04 +0000 | [diff] [blame] | 126 | intel_panel_disable_backlight(dev); |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 127 | |
| 128 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON); |
| 129 | |
| 130 | if (intel_lvds->pfit_control) { |
| 131 | if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) |
| 132 | DRM_ERROR("timed out waiting for panel to power off\n"); |
| 133 | |
| 134 | I915_WRITE(PFIT_CONTROL, 0); |
| 135 | intel_lvds->pfit_dirty = true; |
| 136 | } |
| 137 | |
| 138 | I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN); |
Chris Wilson | c9f9ccc | 2010-09-12 13:07:25 +0100 | [diff] [blame] | 139 | POSTING_READ(lvds_reg); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 140 | } |
| 141 | |
| 142 | static void intel_lvds_dpms(struct drm_encoder *encoder, int mode) |
| 143 | { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 144 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 145 | |
| 146 | if (mode == DRM_MODE_DPMS_ON) |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 147 | intel_lvds_enable(intel_lvds); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 148 | else |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 149 | intel_lvds_disable(intel_lvds); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 150 | |
| 151 | /* XXX: We never power down the LVDS pairs. */ |
| 152 | } |
| 153 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 154 | static int intel_lvds_mode_valid(struct drm_connector *connector, |
| 155 | struct drm_display_mode *mode) |
| 156 | { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 157 | struct intel_lvds *intel_lvds = intel_attached_lvds(connector); |
| 158 | struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 159 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 160 | if (mode->hdisplay > fixed_mode->hdisplay) |
| 161 | return MODE_PANEL; |
| 162 | if (mode->vdisplay > fixed_mode->vdisplay) |
| 163 | return MODE_PANEL; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 164 | |
| 165 | return MODE_OK; |
| 166 | } |
| 167 | |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 168 | static void |
| 169 | centre_horizontally(struct drm_display_mode *mode, |
| 170 | int width) |
| 171 | { |
| 172 | u32 border, sync_pos, blank_width, sync_width; |
| 173 | |
| 174 | /* keep the hsync and hblank widths constant */ |
| 175 | sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start; |
| 176 | blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start; |
| 177 | sync_pos = (blank_width - sync_width + 1) / 2; |
| 178 | |
| 179 | border = (mode->hdisplay - width + 1) / 2; |
| 180 | border += border & 1; /* make the border even */ |
| 181 | |
| 182 | mode->crtc_hdisplay = width; |
| 183 | mode->crtc_hblank_start = width + border; |
| 184 | mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width; |
| 185 | |
| 186 | mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos; |
| 187 | mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width; |
| 188 | } |
| 189 | |
| 190 | static void |
| 191 | centre_vertically(struct drm_display_mode *mode, |
| 192 | int height) |
| 193 | { |
| 194 | u32 border, sync_pos, blank_width, sync_width; |
| 195 | |
| 196 | /* keep the vsync and vblank widths constant */ |
| 197 | sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start; |
| 198 | blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start; |
| 199 | sync_pos = (blank_width - sync_width + 1) / 2; |
| 200 | |
| 201 | border = (mode->vdisplay - height + 1) / 2; |
| 202 | |
| 203 | mode->crtc_vdisplay = height; |
| 204 | mode->crtc_vblank_start = height + border; |
| 205 | mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width; |
| 206 | |
| 207 | mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos; |
| 208 | mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width; |
| 209 | } |
| 210 | |
| 211 | static inline u32 panel_fitter_scaling(u32 source, u32 target) |
| 212 | { |
| 213 | /* |
| 214 | * Floating point operation is not supported. So the FACTOR |
| 215 | * is defined, which can avoid the floating point computation |
| 216 | * when calculating the panel ratio. |
| 217 | */ |
| 218 | #define ACCURACY 12 |
| 219 | #define FACTOR (1 << ACCURACY) |
| 220 | u32 ratio = source * FACTOR / target; |
| 221 | return (FACTOR * ratio + FACTOR/2) / FACTOR; |
| 222 | } |
| 223 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 224 | static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, |
| 225 | struct drm_display_mode *mode, |
| 226 | struct drm_display_mode *adjusted_mode) |
| 227 | { |
| 228 | struct drm_device *dev = encoder->dev; |
| 229 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 230 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 231 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 232 | struct drm_encoder *tmp_encoder; |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 233 | u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 234 | |
| 235 | /* Should never happen!! */ |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 236 | if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { |
Keith Packard | 1ae8c0a | 2009-06-28 15:42:17 -0700 | [diff] [blame] | 237 | DRM_ERROR("Can't support LVDS on pipe A\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 238 | return false; |
| 239 | } |
| 240 | |
| 241 | /* Should never happen!! */ |
| 242 | list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) { |
| 243 | if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) { |
Keith Packard | 1ae8c0a | 2009-06-28 15:42:17 -0700 | [diff] [blame] | 244 | DRM_ERROR("Can't enable LVDS and another " |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 245 | "encoder on the same pipe\n"); |
| 246 | return false; |
| 247 | } |
| 248 | } |
Chris Wilson | 1d8e1c7 | 2010-08-07 11:01:28 +0100 | [diff] [blame] | 249 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 250 | /* |
Chris Wilson | 7167704 | 2010-07-17 13:38:43 +0100 | [diff] [blame] | 251 | * We have timings from the BIOS for the panel, put them in |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 252 | * to the adjusted mode. The CRTC will be set up for this mode, |
| 253 | * with the panel scaling set up to source from the H/VDisplay |
| 254 | * of the original mode. |
| 255 | */ |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 256 | intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode); |
Chris Wilson | 1d8e1c7 | 2010-08-07 11:01:28 +0100 | [diff] [blame] | 257 | |
| 258 | if (HAS_PCH_SPLIT(dev)) { |
| 259 | intel_pch_panel_fitting(dev, intel_lvds->fitting_mode, |
| 260 | mode, adjusted_mode); |
| 261 | return true; |
| 262 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 263 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 264 | /* Native modes don't need fitting */ |
| 265 | if (adjusted_mode->hdisplay == mode->hdisplay && |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 266 | adjusted_mode->vdisplay == mode->vdisplay) |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 267 | goto out; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 268 | |
| 269 | /* 965+ wants fuzzy fitting */ |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 270 | if (INTEL_INFO(dev)->gen >= 4) |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 271 | pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | |
| 272 | PFIT_FILTER_FUZZY); |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 273 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 274 | /* |
| 275 | * Enable automatic panel scaling for non-native modes so that they fill |
| 276 | * the screen. Should be enabled before the pipe is enabled, according |
| 277 | * to register description and PRM. |
| 278 | * Change the value here to see the borders for debugging |
| 279 | */ |
Chris Wilson | 1d8e1c7 | 2010-08-07 11:01:28 +0100 | [diff] [blame] | 280 | I915_WRITE(BCLRPAT_A, 0); |
| 281 | I915_WRITE(BCLRPAT_B, 0); |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 282 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 283 | switch (intel_lvds->fitting_mode) { |
Jesse Barnes | 53bd838 | 2009-07-01 10:04:40 -0700 | [diff] [blame] | 284 | case DRM_MODE_SCALE_CENTER: |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 285 | /* |
| 286 | * For centered modes, we have to calculate border widths & |
| 287 | * heights and modify the values programmed into the CRTC. |
| 288 | */ |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 289 | centre_horizontally(adjusted_mode, mode->hdisplay); |
| 290 | centre_vertically(adjusted_mode, mode->vdisplay); |
| 291 | border = LVDS_BORDER_ENABLE; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 292 | break; |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 293 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 294 | case DRM_MODE_SCALE_ASPECT: |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 295 | /* Scale but preserve the aspect ratio */ |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 296 | if (INTEL_INFO(dev)->gen >= 4) { |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 297 | u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; |
| 298 | u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; |
| 299 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 300 | /* 965+ is easy, it does everything in hw */ |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 301 | if (scaled_width > scaled_height) |
Chris Wilson | 257e48f | 2010-11-29 16:19:24 +0000 | [diff] [blame] | 302 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR; |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 303 | else if (scaled_width < scaled_height) |
Chris Wilson | 257e48f | 2010-11-29 16:19:24 +0000 | [diff] [blame] | 304 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER; |
| 305 | else if (adjusted_mode->hdisplay != mode->hdisplay) |
| 306 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 307 | } else { |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 308 | u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; |
| 309 | u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 310 | /* |
| 311 | * For earlier chips we have to calculate the scaling |
| 312 | * ratio by hand and program it into the |
| 313 | * PFIT_PGM_RATIO register |
| 314 | */ |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 315 | if (scaled_width > scaled_height) { /* pillar */ |
| 316 | centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay); |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 317 | |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 318 | border = LVDS_BORDER_ENABLE; |
| 319 | if (mode->vdisplay != adjusted_mode->vdisplay) { |
| 320 | u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay); |
| 321 | pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | |
| 322 | bits << PFIT_VERT_SCALE_SHIFT); |
| 323 | pfit_control |= (PFIT_ENABLE | |
| 324 | VERT_INTERP_BILINEAR | |
| 325 | HORIZ_INTERP_BILINEAR); |
| 326 | } |
| 327 | } else if (scaled_width < scaled_height) { /* letter */ |
| 328 | centre_vertically(adjusted_mode, scaled_width / mode->hdisplay); |
| 329 | |
| 330 | border = LVDS_BORDER_ENABLE; |
| 331 | if (mode->hdisplay != adjusted_mode->hdisplay) { |
| 332 | u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay); |
| 333 | pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | |
| 334 | bits << PFIT_VERT_SCALE_SHIFT); |
| 335 | pfit_control |= (PFIT_ENABLE | |
| 336 | VERT_INTERP_BILINEAR | |
| 337 | HORIZ_INTERP_BILINEAR); |
| 338 | } |
| 339 | } else |
| 340 | /* Aspects match, Let hw scale both directions */ |
| 341 | pfit_control |= (PFIT_ENABLE | |
| 342 | VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 343 | VERT_INTERP_BILINEAR | |
| 344 | HORIZ_INTERP_BILINEAR); |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 345 | } |
| 346 | break; |
| 347 | |
| 348 | case DRM_MODE_SCALE_FULLSCREEN: |
| 349 | /* |
| 350 | * Full scaling, even if it changes the aspect ratio. |
| 351 | * Fortunately this is all done for us in hw. |
| 352 | */ |
Chris Wilson | 257e48f | 2010-11-29 16:19:24 +0000 | [diff] [blame] | 353 | if (mode->vdisplay != adjusted_mode->vdisplay || |
| 354 | mode->hdisplay != adjusted_mode->hdisplay) { |
| 355 | pfit_control |= PFIT_ENABLE; |
| 356 | if (INTEL_INFO(dev)->gen >= 4) |
| 357 | pfit_control |= PFIT_SCALING_AUTO; |
| 358 | else |
| 359 | pfit_control |= (VERT_AUTO_SCALE | |
| 360 | VERT_INTERP_BILINEAR | |
| 361 | HORIZ_AUTO_SCALE | |
| 362 | HORIZ_INTERP_BILINEAR); |
| 363 | } |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 364 | break; |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 365 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 366 | default: |
| 367 | break; |
| 368 | } |
| 369 | |
| 370 | out: |
Chris Wilson | 72389a3 | 2011-02-06 15:50:52 +0000 | [diff] [blame^] | 371 | /* If not enabling scaling, be consistent and always use 0. */ |
Chris Wilson | bee17e5 | 2011-01-11 18:09:58 +0000 | [diff] [blame] | 372 | if ((pfit_control & PFIT_ENABLE) == 0) { |
| 373 | pfit_control = 0; |
| 374 | pfit_pgm_ratios = 0; |
| 375 | } |
Chris Wilson | 72389a3 | 2011-02-06 15:50:52 +0000 | [diff] [blame^] | 376 | |
| 377 | /* Make sure pre-965 set dither correctly */ |
| 378 | if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither) |
| 379 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; |
| 380 | |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 381 | if (pfit_control != intel_lvds->pfit_control || |
| 382 | pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) { |
| 383 | intel_lvds->pfit_control = pfit_control; |
| 384 | intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios; |
| 385 | intel_lvds->pfit_dirty = true; |
| 386 | } |
Chris Wilson | 49be663 | 2010-07-18 12:05:54 +0100 | [diff] [blame] | 387 | dev_priv->lvds_border_bits = border; |
| 388 | |
Zhao Yakui | a3e17eb | 2009-10-10 10:42:37 +0800 | [diff] [blame] | 389 | /* |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 390 | * XXX: It would be nice to support lower refresh rates on the |
| 391 | * panels to reduce power consumption, and perhaps match the |
| 392 | * user's requested refresh rate. |
| 393 | */ |
| 394 | |
| 395 | return true; |
| 396 | } |
| 397 | |
| 398 | static void intel_lvds_prepare(struct drm_encoder *encoder) |
| 399 | { |
| 400 | struct drm_device *dev = encoder->dev; |
| 401 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 402 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 403 | |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 404 | /* We try to do the minimum that is necessary in order to unlock |
| 405 | * the registers for mode setting. |
| 406 | * |
| 407 | * On Ironlake, this is quite simple as we just set the unlock key |
| 408 | * and ignore all subtleties. (This may cause some issues...) |
| 409 | * |
| 410 | * Prior to Ironlake, we must disable the pipe if we want to adjust |
| 411 | * the panel fitter. However at all other times we can just reset |
| 412 | * the registers regardless. |
| 413 | */ |
| 414 | |
| 415 | if (HAS_PCH_SPLIT(dev)) { |
| 416 | I915_WRITE(PCH_PP_CONTROL, |
| 417 | I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); |
| 418 | } else if (intel_lvds->pfit_dirty) { |
| 419 | I915_WRITE(PP_CONTROL, |
Chris Wilson | 4fd21dc | 2010-09-21 14:06:12 +0100 | [diff] [blame] | 420 | (I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS) |
| 421 | & ~POWER_TARGET_ON); |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 422 | } else { |
| 423 | I915_WRITE(PP_CONTROL, |
| 424 | I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); |
| 425 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 426 | } |
| 427 | |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 428 | static void intel_lvds_commit(struct drm_encoder *encoder) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 429 | { |
| 430 | struct drm_device *dev = encoder->dev; |
| 431 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 432 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 433 | |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 434 | /* Undo any unlocking done in prepare to prevent accidental |
| 435 | * adjustment of the registers. |
| 436 | */ |
| 437 | if (HAS_PCH_SPLIT(dev)) { |
| 438 | u32 val = I915_READ(PCH_PP_CONTROL); |
| 439 | if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS) |
| 440 | I915_WRITE(PCH_PP_CONTROL, val & 0x3); |
| 441 | } else { |
| 442 | u32 val = I915_READ(PP_CONTROL); |
| 443 | if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS) |
| 444 | I915_WRITE(PP_CONTROL, val & 0x3); |
| 445 | } |
| 446 | |
| 447 | /* Always do a full power on as we do not know what state |
| 448 | * we were left in. |
| 449 | */ |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 450 | intel_lvds_enable(intel_lvds); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 451 | } |
| 452 | |
| 453 | static void intel_lvds_mode_set(struct drm_encoder *encoder, |
| 454 | struct drm_display_mode *mode, |
| 455 | struct drm_display_mode *adjusted_mode) |
| 456 | { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 457 | /* |
| 458 | * The LVDS pin pair will already have been turned on in the |
| 459 | * intel_crtc_mode_set since it has a large impact on the DPLL |
| 460 | * settings. |
| 461 | */ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 462 | } |
| 463 | |
| 464 | /** |
| 465 | * Detect the LVDS connection. |
| 466 | * |
Jesse Barnes | b42d4c5 | 2009-09-10 15:28:04 -0700 | [diff] [blame] | 467 | * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means |
| 468 | * connected and closed means disconnected. We also send hotplug events as |
| 469 | * needed, using lid status notification from the input layer. |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 470 | */ |
Chris Wilson | 7b334fc | 2010-09-09 23:51:02 +0100 | [diff] [blame] | 471 | static enum drm_connector_status |
Chris Wilson | 930a9e2 | 2010-09-14 11:07:23 +0100 | [diff] [blame] | 472 | intel_lvds_detect(struct drm_connector *connector, bool force) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 473 | { |
Jesse Barnes | 7b9c5ab | 2010-02-12 09:30:00 -0800 | [diff] [blame] | 474 | struct drm_device *dev = connector->dev; |
Jesse Barnes | b42d4c5 | 2009-09-10 15:28:04 -0700 | [diff] [blame] | 475 | enum drm_connector_status status = connector_status_connected; |
| 476 | |
Jesse Barnes | 7b9c5ab | 2010-02-12 09:30:00 -0800 | [diff] [blame] | 477 | /* ACPI lid methods were generally unreliable in this generation, so |
| 478 | * don't even bother. |
| 479 | */ |
Eric Anholt | 6e6c822 | 2010-03-17 13:48:06 -0700 | [diff] [blame] | 480 | if (IS_GEN2(dev) || IS_GEN3(dev)) |
Jesse Barnes | 7b9c5ab | 2010-02-12 09:30:00 -0800 | [diff] [blame] | 481 | return connector_status_connected; |
| 482 | |
Jesse Barnes | b42d4c5 | 2009-09-10 15:28:04 -0700 | [diff] [blame] | 483 | return status; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 484 | } |
| 485 | |
| 486 | /** |
| 487 | * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. |
| 488 | */ |
| 489 | static int intel_lvds_get_modes(struct drm_connector *connector) |
| 490 | { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 491 | struct intel_lvds *intel_lvds = intel_attached_lvds(connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 492 | struct drm_device *dev = connector->dev; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 493 | struct drm_display_mode *mode; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 494 | |
Chris Wilson | 3f8ff0e | 2010-11-08 23:20:52 +0000 | [diff] [blame] | 495 | if (intel_lvds->edid) |
Chris Wilson | 219adae | 2010-09-16 23:05:10 +0100 | [diff] [blame] | 496 | return drm_add_edid_modes(connector, intel_lvds->edid); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 497 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 498 | mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode); |
| 499 | if (mode == 0) |
| 500 | return 0; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 501 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 502 | drm_mode_probed_add(connector, mode); |
| 503 | return 1; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 504 | } |
| 505 | |
Thomas Bächler | 0544edf | 2010-07-02 10:44:23 +0200 | [diff] [blame] | 506 | static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id) |
| 507 | { |
| 508 | DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident); |
| 509 | return 1; |
| 510 | } |
| 511 | |
| 512 | /* The GPU hangs up on these systems if modeset is performed on LID open */ |
| 513 | static const struct dmi_system_id intel_no_modeset_on_lid[] = { |
| 514 | { |
| 515 | .callback = intel_no_modeset_on_lid_dmi_callback, |
| 516 | .ident = "Toshiba Tecra A11", |
| 517 | .matches = { |
| 518 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), |
| 519 | DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"), |
| 520 | }, |
| 521 | }, |
| 522 | |
| 523 | { } /* terminating entry */ |
| 524 | }; |
| 525 | |
Linus Torvalds | c9354c8 | 2009-11-02 09:29:55 -0800 | [diff] [blame] | 526 | /* |
| 527 | * Lid events. Note the use of 'modeset_on_lid': |
| 528 | * - we set it on lid close, and reset it on open |
| 529 | * - we use it as a "only once" bit (ie we ignore |
| 530 | * duplicate events where it was already properly |
| 531 | * set/reset) |
| 532 | * - the suspend/resume paths will also set it to |
| 533 | * zero, since they restore the mode ("lid open"). |
| 534 | */ |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 535 | static int intel_lid_notify(struct notifier_block *nb, unsigned long val, |
| 536 | void *unused) |
| 537 | { |
| 538 | struct drm_i915_private *dev_priv = |
| 539 | container_of(nb, struct drm_i915_private, lid_notifier); |
| 540 | struct drm_device *dev = dev_priv->dev; |
Zhao Yakui | a256537 | 2009-12-11 09:26:11 +0800 | [diff] [blame] | 541 | struct drm_connector *connector = dev_priv->int_lvds_connector; |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 542 | |
Zhao Yakui | a256537 | 2009-12-11 09:26:11 +0800 | [diff] [blame] | 543 | /* |
| 544 | * check and update the status of LVDS connector after receiving |
| 545 | * the LID nofication event. |
| 546 | */ |
| 547 | if (connector) |
Chris Wilson | 7b334fc | 2010-09-09 23:51:02 +0100 | [diff] [blame] | 548 | connector->status = connector->funcs->detect(connector, |
Chris Wilson | 930a9e2 | 2010-09-14 11:07:23 +0100 | [diff] [blame] | 549 | false); |
Chris Wilson | 7b334fc | 2010-09-09 23:51:02 +0100 | [diff] [blame] | 550 | |
Thomas Bächler | 0544edf | 2010-07-02 10:44:23 +0200 | [diff] [blame] | 551 | /* Don't force modeset on machines where it causes a GPU lockup */ |
| 552 | if (dmi_check_system(intel_no_modeset_on_lid)) |
| 553 | return NOTIFY_OK; |
Linus Torvalds | c9354c8 | 2009-11-02 09:29:55 -0800 | [diff] [blame] | 554 | if (!acpi_lid_open()) { |
| 555 | dev_priv->modeset_on_lid = 1; |
| 556 | return NOTIFY_OK; |
Jesse Barnes | 06891e2 | 2009-09-14 10:58:48 -0700 | [diff] [blame] | 557 | } |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 558 | |
Linus Torvalds | c9354c8 | 2009-11-02 09:29:55 -0800 | [diff] [blame] | 559 | if (!dev_priv->modeset_on_lid) |
| 560 | return NOTIFY_OK; |
| 561 | |
| 562 | dev_priv->modeset_on_lid = 0; |
| 563 | |
| 564 | mutex_lock(&dev->mode_config.mutex); |
| 565 | drm_helper_resume_force_mode(dev); |
| 566 | mutex_unlock(&dev->mode_config.mutex); |
Jesse Barnes | 0632419 | 2009-09-10 15:28:05 -0700 | [diff] [blame] | 567 | |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 568 | return NOTIFY_OK; |
| 569 | } |
| 570 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 571 | /** |
| 572 | * intel_lvds_destroy - unregister and free LVDS structures |
| 573 | * @connector: connector to free |
| 574 | * |
| 575 | * Unregister the DDC bus for this connector then free the driver private |
| 576 | * structure. |
| 577 | */ |
| 578 | static void intel_lvds_destroy(struct drm_connector *connector) |
| 579 | { |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 580 | struct drm_device *dev = connector->dev; |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 581 | struct drm_i915_private *dev_priv = dev->dev_private; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 582 | |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 583 | if (dev_priv->lid_notifier.notifier_call) |
| 584 | acpi_lid_notifier_unregister(&dev_priv->lid_notifier); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 585 | drm_sysfs_connector_remove(connector); |
| 586 | drm_connector_cleanup(connector); |
| 587 | kfree(connector); |
| 588 | } |
| 589 | |
Jesse Barnes | 335041e | 2009-01-22 22:22:06 +1000 | [diff] [blame] | 590 | static int intel_lvds_set_property(struct drm_connector *connector, |
| 591 | struct drm_property *property, |
| 592 | uint64_t value) |
| 593 | { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 594 | struct intel_lvds *intel_lvds = intel_attached_lvds(connector); |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 595 | struct drm_device *dev = connector->dev; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 596 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 597 | if (property == dev->mode_config.scaling_mode_property) { |
| 598 | struct drm_crtc *crtc = intel_lvds->base.base.crtc; |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 599 | |
Jesse Barnes | 53bd838 | 2009-07-01 10:04:40 -0700 | [diff] [blame] | 600 | if (value == DRM_MODE_SCALE_NONE) { |
| 601 | DRM_DEBUG_KMS("no scaling not supported\n"); |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 602 | return -EINVAL; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 603 | } |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 604 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 605 | if (intel_lvds->fitting_mode == value) { |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 606 | /* the LVDS scaling property is not changed */ |
| 607 | return 0; |
| 608 | } |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 609 | intel_lvds->fitting_mode = value; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 610 | if (crtc && crtc->enabled) { |
| 611 | /* |
| 612 | * If the CRTC is enabled, the display will be changed |
| 613 | * according to the new panel fitting mode. |
| 614 | */ |
| 615 | drm_crtc_helper_set_mode(crtc, &crtc->mode, |
| 616 | crtc->x, crtc->y, crtc->fb); |
| 617 | } |
| 618 | } |
| 619 | |
Jesse Barnes | 335041e | 2009-01-22 22:22:06 +1000 | [diff] [blame] | 620 | return 0; |
| 621 | } |
| 622 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 623 | static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = { |
| 624 | .dpms = intel_lvds_dpms, |
| 625 | .mode_fixup = intel_lvds_mode_fixup, |
| 626 | .prepare = intel_lvds_prepare, |
| 627 | .mode_set = intel_lvds_mode_set, |
| 628 | .commit = intel_lvds_commit, |
| 629 | }; |
| 630 | |
| 631 | static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { |
| 632 | .get_modes = intel_lvds_get_modes, |
| 633 | .mode_valid = intel_lvds_mode_valid, |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 634 | .best_encoder = intel_best_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 635 | }; |
| 636 | |
| 637 | static const struct drm_connector_funcs intel_lvds_connector_funcs = { |
Keith Packard | c9fb15f | 2009-05-30 20:42:28 -0700 | [diff] [blame] | 638 | .dpms = drm_helper_connector_dpms, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 639 | .detect = intel_lvds_detect, |
| 640 | .fill_modes = drm_helper_probe_single_connector_modes, |
Jesse Barnes | 335041e | 2009-01-22 22:22:06 +1000 | [diff] [blame] | 641 | .set_property = intel_lvds_set_property, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 642 | .destroy = intel_lvds_destroy, |
| 643 | }; |
| 644 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 645 | static const struct drm_encoder_funcs intel_lvds_enc_funcs = { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 646 | .destroy = intel_encoder_destroy, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 647 | }; |
| 648 | |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 649 | static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id) |
| 650 | { |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 651 | DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident); |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 652 | return 1; |
| 653 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 654 | |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 655 | /* These systems claim to have LVDS, but really don't */ |
Jaswinder Singh Rajput | 93c05f2 | 2009-06-04 09:41:19 +1000 | [diff] [blame] | 656 | static const struct dmi_system_id intel_no_lvds[] = { |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 657 | { |
| 658 | .callback = intel_no_lvds_dmi_callback, |
| 659 | .ident = "Apple Mac Mini (Core series)", |
| 660 | .matches = { |
Keith Packard | 98acd46 | 2009-06-14 12:31:58 -0700 | [diff] [blame] | 661 | DMI_MATCH(DMI_SYS_VENDOR, "Apple"), |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 662 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), |
| 663 | }, |
| 664 | }, |
| 665 | { |
| 666 | .callback = intel_no_lvds_dmi_callback, |
| 667 | .ident = "Apple Mac Mini (Core 2 series)", |
| 668 | .matches = { |
Keith Packard | 98acd46 | 2009-06-14 12:31:58 -0700 | [diff] [blame] | 669 | DMI_MATCH(DMI_SYS_VENDOR, "Apple"), |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 670 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), |
| 671 | }, |
| 672 | }, |
| 673 | { |
| 674 | .callback = intel_no_lvds_dmi_callback, |
| 675 | .ident = "MSI IM-945GSE-A", |
| 676 | .matches = { |
| 677 | DMI_MATCH(DMI_SYS_VENDOR, "MSI"), |
| 678 | DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"), |
| 679 | }, |
| 680 | }, |
| 681 | { |
| 682 | .callback = intel_no_lvds_dmi_callback, |
| 683 | .ident = "Dell Studio Hybrid", |
| 684 | .matches = { |
| 685 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), |
| 686 | DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"), |
| 687 | }, |
| 688 | }, |
Jarod Wilson | 70aa96c | 2009-05-27 17:20:39 -0400 | [diff] [blame] | 689 | { |
| 690 | .callback = intel_no_lvds_dmi_callback, |
| 691 | .ident = "AOpen Mini PC", |
| 692 | .matches = { |
| 693 | DMI_MATCH(DMI_SYS_VENDOR, "AOpen"), |
| 694 | DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"), |
| 695 | }, |
| 696 | }, |
Michael Cousin | fa0864b | 2009-06-05 21:16:22 +0200 | [diff] [blame] | 697 | { |
| 698 | .callback = intel_no_lvds_dmi_callback, |
Tormod Volden | ed8c754 | 2009-07-13 22:26:48 +0200 | [diff] [blame] | 699 | .ident = "AOpen Mini PC MP915", |
| 700 | .matches = { |
| 701 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), |
| 702 | DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"), |
| 703 | }, |
| 704 | }, |
| 705 | { |
| 706 | .callback = intel_no_lvds_dmi_callback, |
Knut Petersen | 22ab70d | 2011-01-14 15:38:10 +0000 | [diff] [blame] | 707 | .ident = "AOpen i915GMm-HFS", |
| 708 | .matches = { |
| 709 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), |
| 710 | DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"), |
| 711 | }, |
| 712 | }, |
| 713 | { |
| 714 | .callback = intel_no_lvds_dmi_callback, |
Michael Cousin | fa0864b | 2009-06-05 21:16:22 +0200 | [diff] [blame] | 715 | .ident = "Aopen i945GTt-VFA", |
| 716 | .matches = { |
| 717 | DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), |
| 718 | }, |
| 719 | }, |
Stefan Bader | 9875557ee8 | 2010-03-29 17:53:12 +0200 | [diff] [blame] | 720 | { |
| 721 | .callback = intel_no_lvds_dmi_callback, |
| 722 | .ident = "Clientron U800", |
| 723 | .matches = { |
| 724 | DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), |
| 725 | DMI_MATCH(DMI_PRODUCT_NAME, "U800"), |
| 726 | }, |
| 727 | }, |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 728 | |
| 729 | { } /* terminating entry */ |
| 730 | }; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 731 | |
| 732 | /** |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 733 | * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID |
| 734 | * @dev: drm device |
| 735 | * @connector: LVDS connector |
| 736 | * |
| 737 | * Find the reduced downclock for LVDS in EDID. |
| 738 | */ |
| 739 | static void intel_find_lvds_downclock(struct drm_device *dev, |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 740 | struct drm_display_mode *fixed_mode, |
| 741 | struct drm_connector *connector) |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 742 | { |
| 743 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 744 | struct drm_display_mode *scan; |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 745 | int temp_downclock; |
| 746 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 747 | temp_downclock = fixed_mode->clock; |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 748 | list_for_each_entry(scan, &connector->probed_modes, head) { |
| 749 | /* |
| 750 | * If one mode has the same resolution with the fixed_panel |
| 751 | * mode while they have the different refresh rate, it means |
| 752 | * that the reduced downclock is found for the LVDS. In such |
| 753 | * case we can set the different FPx0/1 to dynamically select |
| 754 | * between low and high frequency. |
| 755 | */ |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 756 | if (scan->hdisplay == fixed_mode->hdisplay && |
| 757 | scan->hsync_start == fixed_mode->hsync_start && |
| 758 | scan->hsync_end == fixed_mode->hsync_end && |
| 759 | scan->htotal == fixed_mode->htotal && |
| 760 | scan->vdisplay == fixed_mode->vdisplay && |
| 761 | scan->vsync_start == fixed_mode->vsync_start && |
| 762 | scan->vsync_end == fixed_mode->vsync_end && |
| 763 | scan->vtotal == fixed_mode->vtotal) { |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 764 | if (scan->clock < temp_downclock) { |
| 765 | /* |
| 766 | * The downclock is already found. But we |
| 767 | * expect to find the lower downclock. |
| 768 | */ |
| 769 | temp_downclock = scan->clock; |
| 770 | } |
| 771 | } |
| 772 | } |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 773 | if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) { |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 774 | /* We found the downclock for LVDS. */ |
| 775 | dev_priv->lvds_downclock_avail = 1; |
| 776 | dev_priv->lvds_downclock = temp_downclock; |
| 777 | DRM_DEBUG_KMS("LVDS downclock is found in EDID. " |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 778 | "Normal clock %dKhz, downclock %dKhz\n", |
| 779 | fixed_mode->clock, temp_downclock); |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 780 | } |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 781 | } |
| 782 | |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 783 | /* |
| 784 | * Enumerate the child dev array parsed from VBT to check whether |
| 785 | * the LVDS is present. |
| 786 | * If it is present, return 1. |
| 787 | * If it is not present, return false. |
| 788 | * If no child dev is parsed from VBT, it assumes that the LVDS is present. |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 789 | */ |
Chris Wilson | 270eea0 | 2010-09-24 01:15:02 +0100 | [diff] [blame] | 790 | static bool lvds_is_present_in_vbt(struct drm_device *dev, |
| 791 | u8 *i2c_pin) |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 792 | { |
| 793 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | 425904d | 2010-08-22 18:21:42 +0100 | [diff] [blame] | 794 | int i; |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 795 | |
| 796 | if (!dev_priv->child_dev_num) |
Chris Wilson | 425904d | 2010-08-22 18:21:42 +0100 | [diff] [blame] | 797 | return true; |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 798 | |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 799 | for (i = 0; i < dev_priv->child_dev_num; i++) { |
Chris Wilson | 425904d | 2010-08-22 18:21:42 +0100 | [diff] [blame] | 800 | struct child_device_config *child = dev_priv->child_dev + i; |
| 801 | |
| 802 | /* If the device type is not LFP, continue. |
| 803 | * We have to check both the new identifiers as well as the |
| 804 | * old for compatibility with some BIOSes. |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 805 | */ |
Chris Wilson | 425904d | 2010-08-22 18:21:42 +0100 | [diff] [blame] | 806 | if (child->device_type != DEVICE_TYPE_INT_LFP && |
| 807 | child->device_type != DEVICE_TYPE_LFP) |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 808 | continue; |
| 809 | |
Chris Wilson | 270eea0 | 2010-09-24 01:15:02 +0100 | [diff] [blame] | 810 | if (child->i2c_pin) |
| 811 | *i2c_pin = child->i2c_pin; |
| 812 | |
Chris Wilson | 425904d | 2010-08-22 18:21:42 +0100 | [diff] [blame] | 813 | /* However, we cannot trust the BIOS writers to populate |
| 814 | * the VBT correctly. Since LVDS requires additional |
| 815 | * information from AIM blocks, a non-zero addin offset is |
| 816 | * a good indicator that the LVDS is actually present. |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 817 | */ |
Chris Wilson | 425904d | 2010-08-22 18:21:42 +0100 | [diff] [blame] | 818 | if (child->addin_offset) |
| 819 | return true; |
| 820 | |
| 821 | /* But even then some BIOS writers perform some black magic |
| 822 | * and instantiate the device without reference to any |
| 823 | * additional data. Trust that if the VBT was written into |
| 824 | * the OpRegion then they have validated the LVDS's existence. |
| 825 | */ |
| 826 | if (dev_priv->opregion.vbt) |
| 827 | return true; |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 828 | } |
Chris Wilson | 425904d | 2010-08-22 18:21:42 +0100 | [diff] [blame] | 829 | |
| 830 | return false; |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 831 | } |
| 832 | |
Chris Wilson | 270eea0 | 2010-09-24 01:15:02 +0100 | [diff] [blame] | 833 | static bool intel_lvds_ddc_probe(struct drm_device *dev, u8 pin) |
Chris Wilson | 428d2e8 | 2010-09-23 11:16:49 +0100 | [diff] [blame] | 834 | { |
| 835 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 836 | u8 buf = 0; |
| 837 | struct i2c_msg msgs[] = { |
| 838 | { |
| 839 | .addr = 0xA0, |
| 840 | .flags = 0, |
| 841 | .len = 1, |
| 842 | .buf = &buf, |
| 843 | }, |
| 844 | }; |
Chris Wilson | 270eea0 | 2010-09-24 01:15:02 +0100 | [diff] [blame] | 845 | struct i2c_adapter *i2c = &dev_priv->gmbus[pin].adapter; |
Chris Wilson | b8232e9 | 2010-09-28 16:41:32 +0100 | [diff] [blame] | 846 | /* XXX this only appears to work when using GMBUS */ |
| 847 | if (intel_gmbus_is_forced_bit(i2c)) |
| 848 | return true; |
Chris Wilson | 428d2e8 | 2010-09-23 11:16:49 +0100 | [diff] [blame] | 849 | return i2c_transfer(i2c, msgs, 1) == 1; |
| 850 | } |
| 851 | |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 852 | /** |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 853 | * intel_lvds_init - setup LVDS connectors on this device |
| 854 | * @dev: drm device |
| 855 | * |
| 856 | * Create the connector, register the LVDS DDC bus, and try to figure out what |
| 857 | * modes we can display on the LVDS panel (if present). |
| 858 | */ |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 859 | bool intel_lvds_init(struct drm_device *dev) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 860 | { |
| 861 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 862 | struct intel_lvds *intel_lvds; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 863 | struct intel_encoder *intel_encoder; |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 864 | struct intel_connector *intel_connector; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 865 | struct drm_connector *connector; |
| 866 | struct drm_encoder *encoder; |
| 867 | struct drm_display_mode *scan; /* *modes, *bios_mode; */ |
| 868 | struct drm_crtc *crtc; |
| 869 | u32 lvds; |
Chris Wilson | 270eea0 | 2010-09-24 01:15:02 +0100 | [diff] [blame] | 870 | int pipe; |
| 871 | u8 pin; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 872 | |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 873 | /* Skip init on machines we know falsely report LVDS */ |
| 874 | if (dmi_check_system(intel_no_lvds)) |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 875 | return false; |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 876 | |
Chris Wilson | 270eea0 | 2010-09-24 01:15:02 +0100 | [diff] [blame] | 877 | pin = GMBUS_PORT_PANEL; |
| 878 | if (!lvds_is_present_in_vbt(dev, &pin)) { |
Matthew Garrett | 11ba159 | 2009-12-15 13:55:24 -0500 | [diff] [blame] | 879 | DRM_DEBUG_KMS("LVDS is not present in VBT\n"); |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 880 | return false; |
Zhao Yakui | 7cf4f69 | 2009-11-24 09:48:47 +0800 | [diff] [blame] | 881 | } |
Zhao Yakui | e99da35 | 2009-06-26 09:46:18 +0800 | [diff] [blame] | 882 | |
Eric Anholt | c619eed | 2010-01-28 16:45:52 -0800 | [diff] [blame] | 883 | if (HAS_PCH_SPLIT(dev)) { |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 884 | if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 885 | return false; |
Chris Wilson | 5ceb0f9 | 2010-09-24 10:24:28 +0100 | [diff] [blame] | 886 | if (dev_priv->edp.support) { |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 887 | DRM_DEBUG_KMS("disable LVDS for eDP support\n"); |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 888 | return false; |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 889 | } |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 890 | } |
| 891 | |
Chris Wilson | 270eea0 | 2010-09-24 01:15:02 +0100 | [diff] [blame] | 892 | if (!intel_lvds_ddc_probe(dev, pin)) { |
Chris Wilson | 428d2e8 | 2010-09-23 11:16:49 +0100 | [diff] [blame] | 893 | DRM_DEBUG_KMS("LVDS did not respond to DDC probe\n"); |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 894 | return false; |
Chris Wilson | 428d2e8 | 2010-09-23 11:16:49 +0100 | [diff] [blame] | 895 | } |
| 896 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 897 | intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL); |
| 898 | if (!intel_lvds) { |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 899 | return false; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 900 | } |
| 901 | |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 902 | intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); |
| 903 | if (!intel_connector) { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 904 | kfree(intel_lvds); |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 905 | return false; |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 906 | } |
| 907 | |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 908 | if (!HAS_PCH_SPLIT(dev)) { |
| 909 | intel_lvds->pfit_control = I915_READ(PFIT_CONTROL); |
| 910 | } |
| 911 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 912 | intel_encoder = &intel_lvds->base; |
Chris Wilson | 4ef69c7 | 2010-09-09 15:14:28 +0100 | [diff] [blame] | 913 | encoder = &intel_encoder->base; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 914 | connector = &intel_connector->base; |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 915 | drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 916 | DRM_MODE_CONNECTOR_LVDS); |
| 917 | |
Chris Wilson | 4ef69c7 | 2010-09-09 15:14:28 +0100 | [diff] [blame] | 918 | drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 919 | DRM_MODE_ENCODER_LVDS); |
| 920 | |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 921 | intel_connector_attach_encoder(intel_connector, intel_encoder); |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 922 | intel_encoder->type = INTEL_OUTPUT_LVDS; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 923 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 924 | intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT); |
| 925 | intel_encoder->crtc_mask = (1 << 1); |
Chris Wilson | 4add75c | 2010-12-04 17:49:46 +0000 | [diff] [blame] | 926 | if (INTEL_INFO(dev)->gen >= 5) |
| 927 | intel_encoder->crtc_mask |= (1 << 0); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 928 | drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); |
| 929 | drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); |
| 930 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
| 931 | connector->interlace_allowed = false; |
| 932 | connector->doublescan_allowed = false; |
| 933 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 934 | /* create the scaling mode property */ |
| 935 | drm_mode_create_scaling_mode_property(dev); |
| 936 | /* |
| 937 | * the initial panel fitting mode will be FULL_SCREEN. |
| 938 | */ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 939 | |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 940 | drm_connector_attach_property(&intel_connector->base, |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 941 | dev->mode_config.scaling_mode_property, |
Jesse Barnes | dd1ea37 | 2010-06-24 11:05:10 -0700 | [diff] [blame] | 942 | DRM_MODE_SCALE_ASPECT); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 943 | intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 944 | /* |
| 945 | * LVDS discovery: |
| 946 | * 1) check for EDID on DDC |
| 947 | * 2) check for VBT data |
| 948 | * 3) check to see if LVDS is already on |
| 949 | * if none of the above, no panel |
| 950 | * 4) make sure lid is open |
| 951 | * if closed, act like it's not there for now |
| 952 | */ |
| 953 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 954 | /* |
| 955 | * Attempt to get the fixed panel mode from DDC. Assume that the |
| 956 | * preferred mode is the right one. |
| 957 | */ |
Chris Wilson | 219adae | 2010-09-16 23:05:10 +0100 | [diff] [blame] | 958 | intel_lvds->edid = drm_get_edid(connector, |
Chris Wilson | 270eea0 | 2010-09-24 01:15:02 +0100 | [diff] [blame] | 959 | &dev_priv->gmbus[pin].adapter); |
Chris Wilson | 3f8ff0e | 2010-11-08 23:20:52 +0000 | [diff] [blame] | 960 | if (intel_lvds->edid) { |
| 961 | if (drm_add_edid_modes(connector, |
| 962 | intel_lvds->edid)) { |
| 963 | drm_mode_connector_update_edid_property(connector, |
| 964 | intel_lvds->edid); |
| 965 | } else { |
| 966 | kfree(intel_lvds->edid); |
| 967 | intel_lvds->edid = NULL; |
| 968 | } |
| 969 | } |
Chris Wilson | 219adae | 2010-09-16 23:05:10 +0100 | [diff] [blame] | 970 | if (!intel_lvds->edid) { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 971 | /* Didn't get an EDID, so |
| 972 | * Set wide sync ranges so we get all modes |
| 973 | * handed to valid_mode for checking |
| 974 | */ |
| 975 | connector->display_info.min_vfreq = 0; |
| 976 | connector->display_info.max_vfreq = 200; |
| 977 | connector->display_info.min_hfreq = 0; |
| 978 | connector->display_info.max_hfreq = 200; |
| 979 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 980 | |
| 981 | list_for_each_entry(scan, &connector->probed_modes, head) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 982 | if (scan->type & DRM_MODE_TYPE_PREFERRED) { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 983 | intel_lvds->fixed_mode = |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 984 | drm_mode_duplicate(dev, scan); |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 985 | intel_find_lvds_downclock(dev, |
| 986 | intel_lvds->fixed_mode, |
| 987 | connector); |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 988 | goto out; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 989 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 990 | } |
| 991 | |
| 992 | /* Failed to get EDID, what about VBT? */ |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 993 | if (dev_priv->lfp_lvds_vbt_mode) { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 994 | intel_lvds->fixed_mode = |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 995 | drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode); |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 996 | if (intel_lvds->fixed_mode) { |
| 997 | intel_lvds->fixed_mode->type |= |
Jesse Barnes | e285f3cd | 2009-01-14 10:53:36 -0800 | [diff] [blame] | 998 | DRM_MODE_TYPE_PREFERRED; |
Jesse Barnes | e285f3cd | 2009-01-14 10:53:36 -0800 | [diff] [blame] | 999 | goto out; |
| 1000 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1001 | } |
| 1002 | |
| 1003 | /* |
| 1004 | * If we didn't get EDID, try checking if the panel is already turned |
| 1005 | * on. If so, assume that whatever is currently programmed is the |
| 1006 | * correct mode. |
| 1007 | */ |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 1008 | |
Adam Jackson | f2b115e | 2009-12-03 17:14:42 -0500 | [diff] [blame] | 1009 | /* Ironlake: FIXME if still fail, not try pipe mode now */ |
Eric Anholt | c619eed | 2010-01-28 16:45:52 -0800 | [diff] [blame] | 1010 | if (HAS_PCH_SPLIT(dev)) |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 1011 | goto failed; |
| 1012 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1013 | lvds = I915_READ(LVDS); |
| 1014 | pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; |
Chris Wilson | f875c15 | 2010-09-09 15:44:14 +0100 | [diff] [blame] | 1015 | crtc = intel_get_crtc_for_pipe(dev, pipe); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1016 | |
| 1017 | if (crtc && (lvds & LVDS_PORT_EN)) { |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 1018 | intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc); |
| 1019 | if (intel_lvds->fixed_mode) { |
| 1020 | intel_lvds->fixed_mode->type |= |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1021 | DRM_MODE_TYPE_PREFERRED; |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 1022 | goto out; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1023 | } |
| 1024 | } |
| 1025 | |
| 1026 | /* If we still don't have a mode after all that, give up. */ |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 1027 | if (!intel_lvds->fixed_mode) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1028 | goto failed; |
| 1029 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1030 | out: |
Eric Anholt | c619eed | 2010-01-28 16:45:52 -0800 | [diff] [blame] | 1031 | if (HAS_PCH_SPLIT(dev)) { |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 1032 | u32 pwm; |
Chris Wilson | 17fe698 | 2010-12-03 20:17:19 +0000 | [diff] [blame] | 1033 | |
| 1034 | pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0; |
| 1035 | |
| 1036 | /* make sure PWM is enabled and locked to the LVDS pipe */ |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 1037 | pwm = I915_READ(BLC_PWM_CPU_CTL2); |
Chris Wilson | 17fe698 | 2010-12-03 20:17:19 +0000 | [diff] [blame] | 1038 | if (pipe == 0 && (pwm & PWM_PIPE_B)) |
| 1039 | I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE); |
| 1040 | if (pipe) |
| 1041 | pwm |= PWM_PIPE_B; |
| 1042 | else |
| 1043 | pwm &= ~PWM_PIPE_B; |
| 1044 | I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE); |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 1045 | |
| 1046 | pwm = I915_READ(BLC_PWM_PCH_CTL1); |
| 1047 | pwm |= PWM_PCH_ENABLE; |
| 1048 | I915_WRITE(BLC_PWM_PCH_CTL1, pwm); |
| 1049 | } |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 1050 | dev_priv->lid_notifier.notifier_call = intel_lid_notify; |
| 1051 | if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) { |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 1052 | DRM_DEBUG_KMS("lid notifier registration failed\n"); |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 1053 | dev_priv->lid_notifier.notifier_call = NULL; |
| 1054 | } |
Zhao Yakui | a256537 | 2009-12-11 09:26:11 +0800 | [diff] [blame] | 1055 | /* keep the LVDS connector */ |
| 1056 | dev_priv->int_lvds_connector = connector; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1057 | drm_sysfs_connector_add(connector); |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 1058 | return true; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1059 | |
| 1060 | failed: |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 1061 | DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1062 | drm_connector_cleanup(connector); |
Shaohua Li | 1991bdf | 2009-11-17 17:19:23 +0800 | [diff] [blame] | 1063 | drm_encoder_cleanup(encoder); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 1064 | kfree(intel_lvds); |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 1065 | kfree(intel_connector); |
Chris Wilson | c5d1b51 | 2010-11-29 18:00:23 +0000 | [diff] [blame] | 1066 | return false; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1067 | } |