Suzuki K. Poulose | 87d1587 | 2015-10-19 14:19:27 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Kernel page table mapping |
| 3 | * |
| 4 | * Copyright (C) 2015 ARM Ltd. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 17 | */ |
| 18 | |
| 19 | #ifndef __ASM_KERNEL_PGTABLE_H |
| 20 | #define __ASM_KERNEL_PGTABLE_H |
| 21 | |
Catalin Marinas | 005bf1a | 2016-07-01 16:53:00 +0100 | [diff] [blame] | 22 | #include <asm/pgtable.h> |
Ard Biesheuvel | 06e9bf2 | 2016-03-30 14:25:47 +0200 | [diff] [blame] | 23 | #include <asm/sparsemem.h> |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 24 | |
| 25 | /* |
| 26 | * The linear mapping and the start of memory are both 2M aligned (per |
| 27 | * the arm64 booting.txt requirements). Hence we can use section mapping |
| 28 | * with 4K (section size = 2M) but not with 16K (section size = 32M) or |
| 29 | * 64K (section size = 512M). |
| 30 | */ |
| 31 | #ifdef CONFIG_ARM64_4K_PAGES |
| 32 | #define ARM64_SWAPPER_USES_SECTION_MAPS 1 |
| 33 | #else |
| 34 | #define ARM64_SWAPPER_USES_SECTION_MAPS 0 |
| 35 | #endif |
| 36 | |
Suzuki K. Poulose | 87d1587 | 2015-10-19 14:19:27 +0100 | [diff] [blame] | 37 | /* |
| 38 | * The idmap and swapper page tables need some space reserved in the kernel |
| 39 | * image. Both require pgd, pud (4 levels only) and pmd tables to (section) |
| 40 | * map the kernel. With the 64K page configuration, swapper and idmap need to |
| 41 | * map to pte level. The swapper also maps the FDT (see __create_page_tables |
| 42 | * for more information). Note that the number of ID map translation levels |
| 43 | * could be increased on the fly if system RAM is out of reach for the default |
Suzuki K. Poulose | c265af5 | 2015-10-19 14:19:30 +0100 | [diff] [blame] | 44 | * VA range, so pages required to map highest possible PA are reserved in all |
| 45 | * cases. |
Suzuki K. Poulose | 87d1587 | 2015-10-19 14:19:27 +0100 | [diff] [blame] | 46 | */ |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 47 | #if ARM64_SWAPPER_USES_SECTION_MAPS |
Suzuki K. Poulose | 87d1587 | 2015-10-19 14:19:27 +0100 | [diff] [blame] | 48 | #define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS - 1) |
Suzuki K. Poulose | c265af5 | 2015-10-19 14:19:30 +0100 | [diff] [blame] | 49 | #define IDMAP_PGTABLE_LEVELS (ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT) - 1) |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 50 | #else |
| 51 | #define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS) |
Suzuki K. Poulose | c265af5 | 2015-10-19 14:19:30 +0100 | [diff] [blame] | 52 | #define IDMAP_PGTABLE_LEVELS (ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT)) |
Suzuki K. Poulose | 87d1587 | 2015-10-19 14:19:27 +0100 | [diff] [blame] | 53 | #endif |
| 54 | |
| 55 | #define SWAPPER_DIR_SIZE (SWAPPER_PGTABLE_LEVELS * PAGE_SIZE) |
Suzuki K. Poulose | c265af5 | 2015-10-19 14:19:30 +0100 | [diff] [blame] | 56 | #define IDMAP_DIR_SIZE (IDMAP_PGTABLE_LEVELS * PAGE_SIZE) |
Suzuki K. Poulose | 87d1587 | 2015-10-19 14:19:27 +0100 | [diff] [blame] | 57 | |
Catalin Marinas | 005bf1a | 2016-07-01 16:53:00 +0100 | [diff] [blame] | 58 | #ifdef CONFIG_ARM64_SW_TTBR0_PAN |
| 59 | #define RESERVED_TTBR0_SIZE (PAGE_SIZE) |
| 60 | #else |
| 61 | #define RESERVED_TTBR0_SIZE (0) |
| 62 | #endif |
| 63 | |
Suzuki K. Poulose | 87d1587 | 2015-10-19 14:19:27 +0100 | [diff] [blame] | 64 | /* Initial memory map size */ |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 65 | #if ARM64_SWAPPER_USES_SECTION_MAPS |
Suzuki K. Poulose | 87d1587 | 2015-10-19 14:19:27 +0100 | [diff] [blame] | 66 | #define SWAPPER_BLOCK_SHIFT SECTION_SHIFT |
| 67 | #define SWAPPER_BLOCK_SIZE SECTION_SIZE |
| 68 | #define SWAPPER_TABLE_SHIFT PUD_SHIFT |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 69 | #else |
| 70 | #define SWAPPER_BLOCK_SHIFT PAGE_SHIFT |
| 71 | #define SWAPPER_BLOCK_SIZE PAGE_SIZE |
| 72 | #define SWAPPER_TABLE_SHIFT PMD_SHIFT |
Suzuki K. Poulose | 87d1587 | 2015-10-19 14:19:27 +0100 | [diff] [blame] | 73 | #endif |
| 74 | |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 75 | /* The size of the initial kernel direct mapping */ |
| 76 | #define SWAPPER_INIT_MAP_SIZE (_AC(1, UL) << SWAPPER_TABLE_SHIFT) |
Suzuki K. Poulose | 87d1587 | 2015-10-19 14:19:27 +0100 | [diff] [blame] | 77 | |
| 78 | /* |
| 79 | * Initial memory map attributes. |
| 80 | */ |
Will Deacon | fefeffe | 2018-04-03 12:09:19 +0100 | [diff] [blame] | 81 | #define SWAPPER_PTE_FLAGS (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED) |
| 82 | #define SWAPPER_PMD_FLAGS (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S) |
Suzuki K. Poulose | 87d1587 | 2015-10-19 14:19:27 +0100 | [diff] [blame] | 83 | |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 84 | #if ARM64_SWAPPER_USES_SECTION_MAPS |
Suzuki K. Poulose | 87d1587 | 2015-10-19 14:19:27 +0100 | [diff] [blame] | 85 | #define SWAPPER_MM_MMUFLAGS (PMD_ATTRINDX(MT_NORMAL) | SWAPPER_PMD_FLAGS) |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 86 | #else |
| 87 | #define SWAPPER_MM_MMUFLAGS (PTE_ATTRINDX(MT_NORMAL) | SWAPPER_PTE_FLAGS) |
Suzuki K. Poulose | 87d1587 | 2015-10-19 14:19:27 +0100 | [diff] [blame] | 88 | #endif |
| 89 | |
Ard Biesheuvel | a7f8de1 | 2016-02-16 13:52:42 +0100 | [diff] [blame] | 90 | /* |
| 91 | * To make optimal use of block mappings when laying out the linear |
| 92 | * mapping, round down the base of physical memory to a size that can |
| 93 | * be mapped efficiently, i.e., either PUD_SIZE (4k granule) or PMD_SIZE |
| 94 | * (64k granule), or a multiple that can be mapped using contiguous bits |
| 95 | * in the page tables: 32 * PMD_SIZE (16k granule) |
| 96 | */ |
Ard Biesheuvel | 06e9bf2 | 2016-03-30 14:25:47 +0200 | [diff] [blame] | 97 | #if defined(CONFIG_ARM64_4K_PAGES) |
| 98 | #define ARM64_MEMSTART_SHIFT PUD_SHIFT |
| 99 | #elif defined(CONFIG_ARM64_16K_PAGES) |
| 100 | #define ARM64_MEMSTART_SHIFT (PMD_SHIFT + 5) |
Ard Biesheuvel | a7f8de1 | 2016-02-16 13:52:42 +0100 | [diff] [blame] | 101 | #else |
Ard Biesheuvel | 06e9bf2 | 2016-03-30 14:25:47 +0200 | [diff] [blame] | 102 | #define ARM64_MEMSTART_SHIFT PMD_SHIFT |
| 103 | #endif |
| 104 | |
| 105 | /* |
| 106 | * sparsemem vmemmap imposes an additional requirement on the alignment of |
| 107 | * memstart_addr, due to the fact that the base of the vmemmap region |
| 108 | * has a direct correspondence, and needs to appear sufficiently aligned |
| 109 | * in the virtual address space. |
| 110 | */ |
| 111 | #if defined(CONFIG_SPARSEMEM_VMEMMAP) && ARM64_MEMSTART_SHIFT < SECTION_SIZE_BITS |
| 112 | #define ARM64_MEMSTART_ALIGN (1UL << SECTION_SIZE_BITS) |
| 113 | #else |
| 114 | #define ARM64_MEMSTART_ALIGN (1UL << ARM64_MEMSTART_SHIFT) |
Ard Biesheuvel | a7f8de1 | 2016-02-16 13:52:42 +0100 | [diff] [blame] | 115 | #endif |
Suzuki K. Poulose | 87d1587 | 2015-10-19 14:19:27 +0100 | [diff] [blame] | 116 | |
| 117 | #endif /* __ASM_KERNEL_PGTABLE_H */ |