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Vineet Guptacfdbc2e2013-01-18 15:12:20 +05301#
2# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License version 2 as
6# published by the Free Software Foundation.
7#
8
9config ARC
10 def_bool y
Vineet Guptaf06d19e2013-11-15 12:08:05 +053011 select BUILDTIME_EXTABLE_SORT
Vineet Guptad7f8a082014-09-10 11:10:54 +053012 select COMMON_CLK
Vineet Gupta4adeefe2013-01-18 15:12:18 +053013 select CLONE_BACKWARDS
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053014 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
15 select DEVTMPFS if !INITRAMFS_SOURCE=""
16 select GENERIC_ATOMIC64
17 select GENERIC_CLOCKEVENTS
18 select GENERIC_FIND_FIRST_BIT
19 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
20 select GENERIC_IRQ_SHOW
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053021 select GENERIC_PENDING_IRQ if SMP
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053022 select GENERIC_SMP_IDLE_THREAD
Mischa Jonkerf46121b2013-01-18 15:12:24 +053023 select HAVE_ARCH_KGDB
Vineet Gupta547f1122013-01-18 15:12:22 +053024 select HAVE_ARCH_TRACEHOOK
Gilad Ben-Yossef43689022013-01-22 16:48:45 +053025 select HAVE_IOREMAP_PROT
Vineet Gupta4d86dfb2013-01-22 17:03:59 +053026 select HAVE_KPROBES
27 select HAVE_KRETPROBES
Vineet Guptac121c502013-01-18 15:12:20 +053028 select HAVE_MEMBLOCK
Vineet Gupta854a0d92013-01-22 17:03:19 +053029 select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
Vineet Gupta769bc1f2013-01-22 17:02:38 +053030 select HAVE_OPROFILE
Vineet Gupta9c575642013-01-18 15:12:24 +053031 select HAVE_PERF_EVENTS
Vineet Gupta999159a2013-01-22 17:00:52 +053032 select IRQ_DOMAIN
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053033 select MODULES_USE_ELF_RELA
Vineet Guptac121c502013-01-18 15:12:20 +053034 select NO_BOOTMEM
Vineet Gupta999159a2013-01-22 17:00:52 +053035 select OF
36 select OF_EARLY_FLATTREE
Vineet Gupta9c575642013-01-18 15:12:24 +053037 select PERF_USE_VMALLOC
Dave Hansend1a1dc02013-07-01 13:04:42 -070038 select HAVE_DEBUG_STACKOVERFLOW
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053039
Vineet Gupta0dafafc2013-09-06 14:18:17 +053040config TRACE_IRQFLAGS_SUPPORT
41 def_bool y
42
43config LOCKDEP_SUPPORT
44 def_bool y
45
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053046config SCHED_OMIT_FRAME_POINTER
47 def_bool y
48
49config GENERIC_CSUM
50 def_bool y
51
52config RWSEM_GENERIC_SPINLOCK
53 def_bool y
54
55config ARCH_FLATMEM_ENABLE
56 def_bool y
57
58config MMU
59 def_bool y
60
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -070061config NO_IOPORT_MAP
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053062 def_bool y
63
64config GENERIC_CALIBRATE_DELAY
65 def_bool y
66
67config GENERIC_HWEIGHT
68 def_bool y
69
Vineet Gupta44c8bb92013-01-18 15:12:23 +053070config STACKTRACE_SUPPORT
71 def_bool y
72 select STACKTRACE
73
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053074config HAVE_LATENCYTOP_SUPPORT
75 def_bool y
76
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053077source "init/Kconfig"
78source "kernel/Kconfig.freezer"
79
80menu "ARC Architecture Configuration"
81
Vineet Gupta93ad7002013-01-22 16:51:50 +053082menu "ARC Platform/SoC/Board"
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053083
Vineet Guptafd155792015-02-20 19:12:18 +053084source "arch/arc/plat-sim/Kconfig"
Christian Ruppert072eb692013-04-12 08:40:59 +020085source "arch/arc/plat-tb10x/Kconfig"
Alexey Brodkin556cc1c2014-01-27 14:51:34 +010086source "arch/arc/plat-axs10x/Kconfig"
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053087#New platform adds here
Vineet Gupta93ad7002013-01-22 16:51:50 +053088
Vineet Gupta53d98952013-01-18 15:12:25 +053089endmenu
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053090
Vineet Gupta1f6ccff2013-05-13 18:30:41 +053091choice
92 prompt "ARC Instruction Set"
93 default ISA_ARCOMPACT
94
95config ISA_ARCOMPACT
96 bool "ARCompact ISA"
97 help
98 The original ARC ISA of ARC600/700 cores
99
100### For bisectability, disable ARCv2 support until we have all the bits in place
101#config ISA_ARCV2
102# bool "ARC ISA v2"
103# help
104# ISA for the Next Generation ARC-HS cores
105
106endchoice
107
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530108menu "ARC CPU Configuration"
109
110choice
111 prompt "ARC Core"
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530112 default ARC_CPU_770 if ISA_ARCOMPACT
113 default ARC_CPU_HS if ISA_ARCV2
114
115if ISA_ARCOMPACT
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530116
117config ARC_CPU_750D
118 bool "ARC750D"
119 help
120 Support for ARC750 core
121
122config ARC_CPU_770
123 bool "ARC770"
Vineet Gupta742f8af2013-11-07 14:47:16 +0530124 select ARC_HAS_SWAPE
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530125 help
126 Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
127 This core has a bunch of cool new features:
128 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
129 Shared Address Spaces (for sharing TLB entires in MMU)
130 -Caches: New Prog Model, Region Flush
131 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
132
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530133endif #ISA_ARCOMPACT
134
135config ARC_CPU_HS
136 bool "ARC-HS"
137 depends on ISA_ARCV2
138 help
139 Support for ARC HS38x Cores based on ARCv2 ISA
140 The notable features are:
141 - SMP configurations of upto 4 core with coherency
142 - Optional L2 Cache and IO-Coherency
143 - Revised Interrupt Architecture (multiple priorites, reg banks,
144 auto stack switch, auto regfile save/restore)
145 - MMUv4 (PIPT dcache, Huge Pages)
146 - Instructions for
147 * 64bit load/store: LDD, STD
148 * Hardware assisted divide/remainder: DIV, REM
149 * Function prologue/epilogue: ENTER_S, LEAVE_S
150 * IRQ enable/disable: CLRI, SETI
151 * pop count: FFS, FLS
152 * SETcc, BMSKN, XBFU...
153
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530154endchoice
155
156config CPU_BIG_ENDIAN
157 bool "Enable Big Endian Mode"
158 default n
159 help
160 Build kernel for Big Endian Mode of ARC CPU
161
Vineet Gupta41195d22013-01-18 15:12:23 +0530162config SMP
Vineet Gupta82fea5a2014-09-10 19:05:38 +0530163 bool "Symmetric Multi-Processing"
Vineet Gupta41195d22013-01-18 15:12:23 +0530164 default n
Vineet Gupta82fea5a2014-09-10 19:05:38 +0530165 select ARC_HAS_COH_CACHES if ISA_ARCV2
166 select ARC_MCIP if ISA_ARCV2
Vineet Gupta41195d22013-01-18 15:12:23 +0530167 help
Vineet Gupta82fea5a2014-09-10 19:05:38 +0530168 This enables support for systems with more than one CPU.
Vineet Gupta41195d22013-01-18 15:12:23 +0530169
170if SMP
171
172config ARC_HAS_COH_CACHES
173 def_bool n
174
Vineet Gupta41195d22013-01-18 15:12:23 +0530175config ARC_HAS_REENTRANT_IRQ_LV2
176 def_bool n
177
Vineet Gupta82fea5a2014-09-10 19:05:38 +0530178config ARC_MCIP
179 bool "ARConnect Multicore IP (MCIP) Support "
180 depends on ISA_ARCV2
181 help
182 This IP block enables SMP in ARC-HS38 cores.
183 It provides for cross-core interrupts, multi-core debug
184 hardware semaphores, shared memory,....
Vineet Gupta41195d22013-01-18 15:12:23 +0530185
186config NR_CPUS
Noam Camus3aa4f802013-06-03 15:19:59 +0300187 int "Maximum number of CPUs (2-4096)"
188 range 2 4096
Vineet Gupta82fea5a2014-09-10 19:05:38 +0530189 default "4"
190
191endif #SMP
Vineet Gupta41195d22013-01-18 15:12:23 +0530192
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530193menuconfig ARC_CACHE
194 bool "Enable Cache Support"
195 default y
Vineet Gupta41195d22013-01-18 15:12:23 +0530196 # if SMP, cache enabled ONLY if ARC implementation has cache coherency
197 depends on !SMP || ARC_HAS_COH_CACHES
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530198
199if ARC_CACHE
200
201config ARC_CACHE_LINE_SHIFT
202 int "Cache Line Length (as power of 2)"
203 range 5 7
204 default "6"
205 help
206 Starting with ARC700 4.9, Cache line length is configurable,
207 This option specifies "N", with Line-len = 2 power N
208 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
209 Linux only supports same line lengths for I and D caches.
210
211config ARC_HAS_ICACHE
212 bool "Use Instruction Cache"
213 default y
214
215config ARC_HAS_DCACHE
216 bool "Use Data Cache"
217 default y
218
219config ARC_CACHE_PAGES
220 bool "Per Page Cache Control"
221 default y
222 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
223 help
224 This can be used to over-ride the global I/D Cache Enable on a
225 per-page basis (but only for pages accessed via MMU such as
226 Kernel Virtual address or User Virtual Address)
227 TLB entries have a per-page Cache Enable Bit.
228 Note that Global I/D ENABLE + Per Page DISABLE works but corollary
229 Global DISABLE + Per Page ENABLE won't work
230
Vineet Gupta4102b532013-05-09 21:54:51 +0530231config ARC_CACHE_VIPT_ALIASING
232 bool "Support VIPT Aliasing D$"
Vineet Guptad1f317d2015-04-06 17:23:57 +0530233 depends on ARC_HAS_DCACHE && ISA_ARCOMPACT
Vineet Gupta4102b532013-05-09 21:54:51 +0530234 default n
235
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530236endif #ARC_CACHE
237
Vineet Gupta8b5850f2013-01-18 15:12:25 +0530238config ARC_HAS_ICCM
239 bool "Use ICCM"
240 help
241 Single Cycle RAMS to store Fast Path Code
242 default n
243
244config ARC_ICCM_SZ
245 int "ICCM Size in KB"
246 default "64"
247 depends on ARC_HAS_ICCM
248
249config ARC_HAS_DCCM
250 bool "Use DCCM"
251 help
252 Single Cycle RAMS to store Fast Path Data
253 default n
254
255config ARC_DCCM_SZ
256 int "DCCM Size in KB"
257 default "64"
258 depends on ARC_HAS_DCCM
259
260config ARC_DCCM_BASE
261 hex "DCCM map address"
262 default "0xA0000000"
263 depends on ARC_HAS_DCCM
264
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530265config ARC_HAS_HW_MPY
266 bool "Use Hardware Multiplier (Normal or Faster XMAC)"
267 default y
268 help
269 Influences how gcc generates code for MPY operations.
270 If enabled, MPYxx insns are generated, provided by Standard/XMAC
271 Multipler. Otherwise software multipy lib is used
272
273choice
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530274 prompt "MMU Version"
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530275 default ARC_MMU_V3 if ARC_CPU_770
276 default ARC_MMU_V2 if ARC_CPU_750D
Vineet Guptad7a512b2015-04-06 17:22:39 +0530277 default ARC_MMU_V4 if ARC_CPU_HS
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530278
279config ARC_MMU_V1
280 bool "MMU v1"
281 help
282 Orig ARC700 MMU
283
284config ARC_MMU_V2
285 bool "MMU v2"
286 help
287 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
288 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
289
290config ARC_MMU_V3
291 bool "MMU v3"
292 depends on ARC_CPU_770
293 help
294 Introduced with ARC700 4.10: New Features
295 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
296 Shared Address Spaces (SASID)
297
Vineet Guptad7a512b2015-04-06 17:22:39 +0530298config ARC_MMU_V4
299 bool "MMU v4"
300 depends on ISA_ARCV2
301
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530302endchoice
303
304
305choice
306 prompt "MMU Page Size"
307 default ARC_PAGE_SIZE_8K
308
309config ARC_PAGE_SIZE_8K
310 bool "8KB"
311 help
312 Choose between 8k vs 16k
313
314config ARC_PAGE_SIZE_16K
315 bool "16KB"
316 depends on ARC_MMU_V3
317
318config ARC_PAGE_SIZE_4K
319 bool "4KB"
320 depends on ARC_MMU_V3
321
322endchoice
323
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530324if ISA_ARCOMPACT
325
Vineet Gupta4788a592013-01-18 15:12:22 +0530326config ARC_COMPACT_IRQ_LEVELS
327 bool "ARCompact IRQ Priorities: High(2)/Low(1)"
328 default n
329 # Timer HAS to be high priority, for any other high priority config
330 select ARC_IRQ3_LV2
Vineet Gupta41195d22013-01-18 15:12:23 +0530331 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
332 depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
Vineet Gupta4788a592013-01-18 15:12:22 +0530333
334if ARC_COMPACT_IRQ_LEVELS
335
336config ARC_IRQ3_LV2
337 bool
338
339config ARC_IRQ5_LV2
340 bool
341
342config ARC_IRQ6_LV2
343 bool
344
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530345endif #ARC_COMPACT_IRQ_LEVELS
Vineet Gupta4788a592013-01-18 15:12:22 +0530346
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530347config ARC_FPU_SAVE_RESTORE
348 bool "Enable FPU state persistence across context switch"
349 default n
350 help
351 Double Precision Floating Point unit had dedictaed regs which
352 need to be saved/restored across context-switch.
353 Note that ARC FPU is overly simplistic, unlike say x86, which has
354 hardware pieces to allow software to conditionally save/restore,
355 based on actual usage of FPU by a task. Thus our implemn does
356 this for all tasks in system.
357
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530358endif #ISA_ARCOMPACT
359
Vineet Guptafbf8e132013-03-30 15:07:47 +0530360config ARC_CANT_LLSC
361 def_bool n
362
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530363config ARC_HAS_LLSC
364 bool "Insn: LLOCK/SCOND (efficient atomic ops)"
365 default y
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530366 depends on !ARC_CPU_750D && !ARC_CANT_LLSC
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530367
368config ARC_HAS_SWAPE
369 bool "Insn: SWAPE (endian-swap)"
370 default y
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530371
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530372if ISA_ARCV2
373
374config ARC_HAS_LL64
375 bool "Insn: 64bit LDD/STD"
376 help
377 Enable gcc to generate 64-bit load/store instructions
378 ISA mandates even/odd registers to allow encoding of two
379 dest operands with 2 possible source operands.
380 default y
381
Vineet Guptaaa93e8e2013-11-07 14:57:16 +0530382config ARC_HAS_RTC
383 bool "Local 64-bit r/o cycle counter"
384 default n
385 depends on !SMP
386
Vineet Gupta72d72882014-12-24 18:41:55 +0530387config ARC_HAS_GRTC
388 bool "SMP synchronized 64-bit cycle counter"
389 default y
390 depends on SMP
391
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530392config ARC_NUMBER_OF_INTERRUPTS
393 int "Number of interrupts"
394 range 8 240
395 default 32
396 help
397 This defines the number of interrupts on the ARCv2HS core.
398 It affects the size of vector table.
399 The initial 8 IRQs are fixed (Timer, ICI etc) and although configurable
400 in hardware, it keep things simple for Linux to assume they are always
401 present.
402
403endif # ISA_ARCV2
404
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530405endmenu # "ARC CPU Configuration"
406
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530407config LINUX_LINK_BASE
408 hex "Linux Link Address"
409 default "0x80000000"
410 help
411 ARC700 divides the 32 bit phy address space into two equal halves
412 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
413 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
414 Typically Linux kernel is linked at the start of untransalted addr,
415 hence the default value of 0x8zs.
416 However some customers have peripherals mapped at this addr, so
417 Linux needs to be scooted a bit.
418 If you don't know what the above means, leave this setting alone.
419
Vineet Gupta080c3742013-02-11 19:52:57 +0530420config ARC_CURR_IN_REG
421 bool "Dedicate Register r25 for current_task pointer"
422 default y
423 help
424 This reserved Register R25 to point to Current Task in
425 kernel mode. This saves memory access for each such access
426
Vineet Gupta2e651ea2013-01-23 16:30:36 +0530427
Vineet Gupta1736a562014-09-08 11:18:15 +0530428config ARC_EMUL_UNALIGNED
Vineet Gupta2e651ea2013-01-23 16:30:36 +0530429 bool "Emulate unaligned memory access (userspace only)"
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530430 default N
Vineet Gupta2e651ea2013-01-23 16:30:36 +0530431 select SYSCTL_ARCH_UNALIGN_NO_WARN
432 select SYSCTL_ARCH_UNALIGN_ALLOW
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530433 depends on ISA_ARCOMPACT
Vineet Gupta2e651ea2013-01-23 16:30:36 +0530434 help
435 This enables misaligned 16 & 32 bit memory access from user space.
436 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
437 potential bugs in code
438
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530439config HZ
440 int "Timer Frequency"
441 default 100
442
Vineet Guptacbe056f2013-01-18 15:12:25 +0530443config ARC_METAWARE_HLINK
444 bool "Support for Metaware debugger assisted Host access"
445 default n
446 help
447 This options allows a Linux userland apps to directly access
448 host file system (open/creat/read/write etc) with help from
449 Metaware Debugger. This can come in handy for Linux-host communication
450 when there is no real usable peripheral such as EMAC.
451
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530452menuconfig ARC_DBG
453 bool "ARC debugging"
454 default y
455
Vineet Guptaaa6083e2014-11-07 10:45:28 +0530456if ARC_DBG
457
Vineet Gupta854a0d92013-01-22 17:03:19 +0530458config ARC_DW2_UNWIND
459 bool "Enable DWARF specific kernel stack unwind"
Vineet Gupta854a0d92013-01-22 17:03:19 +0530460 default y
461 select KALLSYMS
462 help
463 Compiles the kernel with DWARF unwind information and can be used
464 to get stack backtraces.
465
466 If you say Y here the resulting kernel image will be slightly larger
467 but not slower, and it will give very useful debugging information.
468 If you don't debug the kernel, you can say N, but we may not be able
469 to solve problems without frame unwind information
470
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530471config ARC_DBG_TLB_PARANOIA
472 bool "Paranoia Checks in Low Level TLB Handlers"
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530473 default n
474
475config ARC_DBG_TLB_MISS_COUNT
476 bool "Profile TLB Misses"
477 default n
478 select DEBUG_FS
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530479 help
480 Counts number of I and D TLB Misses and exports them via Debugfs
481 The counters can be cleared via Debugfs as well
482
Vineet Guptaaa6083e2014-11-07 10:45:28 +0530483if SMP
484
485config ARC_IPI_DBG
486 bool "Debug Inter Core interrupts"
487 default n
488
489endif
490
491endif
492
Vineet Gupta036b2c52015-03-09 19:40:09 +0530493config ARC_UBOOT_SUPPORT
494 bool "Support uboot arg Handling"
495 default n
496 help
497 ARC Linux by default checks for uboot provided args as pointers to
498 external cmdline or DTB. This however breaks in absence of uboot,
499 when booting from Metaware debugger directly, as the registers are
500 not zeroed out on reset by mdb and/or ARCv2 based cores. The bogus
501 registers look like uboot args to kernel which then chokes.
502 So only enable the uboot arg checking/processing if users are sure
503 of uboot being in play.
504
Vineet Gupta999159a2013-01-22 17:00:52 +0530505config ARC_BUILTIN_DTB_NAME
506 string "Built in DTB"
507 help
508 Set the name of the DTB to embed in the vmlinux binary
509 Leaving it blank selects the minimal "skeleton" dtb
510
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530511source "kernel/Kconfig.preempt"
512
Vineet Gupta56288322013-04-06 14:16:20 +0530513menu "Executable file formats"
514source "fs/Kconfig.binfmt"
515endmenu
516
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530517endmenu # "ARC Architecture Configuration"
518
519source "mm/Kconfig"
520source "net/Kconfig"
521source "drivers/Kconfig"
522source "fs/Kconfig"
523source "arch/arc/Kconfig.debug"
524source "security/Kconfig"
525source "crypto/Kconfig"
526source "lib/Kconfig"
Alexey Brodkin996bad62014-10-29 15:26:25 +0300527source "kernel/power/Kconfig"