Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1 | |
| 2 | /* |
| 3 | * Linux device driver for RTL8180 / RTL8185 |
| 4 | * |
| 5 | * Copyright 2007 Michael Wu <flamingice@sourmilk.net> |
Andrea Merello | 93ba2a8 | 2013-08-26 13:53:30 +0200 | [diff] [blame] | 6 | * Copyright 2007 Andrea Merello <andrea.merello@gmail.com> |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 7 | * |
| 8 | * Based on the r8180 driver, which is: |
Andrea Merello | 93ba2a8 | 2013-08-26 13:53:30 +0200 | [diff] [blame] | 9 | * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al. |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 10 | * |
| 11 | * Thanks to Realtek for their support! |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or modify |
| 14 | * it under the terms of the GNU General Public License version 2 as |
| 15 | * published by the Free Software Foundation. |
| 16 | */ |
| 17 | |
Alexey Dobriyan | a6b7a40 | 2011-06-06 10:43:46 +0000 | [diff] [blame] | 18 | #include <linux/interrupt.h> |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 19 | #include <linux/pci.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 20 | #include <linux/slab.h> |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 21 | #include <linux/delay.h> |
| 22 | #include <linux/etherdevice.h> |
| 23 | #include <linux/eeprom_93cx6.h> |
Paul Gortmaker | 9d9779e | 2011-07-03 15:21:01 -0400 | [diff] [blame] | 24 | #include <linux/module.h> |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 25 | #include <net/mac80211.h> |
| 26 | |
| 27 | #include "rtl8180.h" |
John W. Linville | 3cfeb0c | 2010-12-20 15:16:53 -0500 | [diff] [blame] | 28 | #include "rtl8225.h" |
| 29 | #include "sa2400.h" |
| 30 | #include "max2820.h" |
| 31 | #include "grf5101.h" |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 32 | |
| 33 | MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); |
Andrea Merello | 93ba2a8 | 2013-08-26 13:53:30 +0200 | [diff] [blame] | 34 | MODULE_AUTHOR("Andrea Merello <andrea.merello@gmail.com>"); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 35 | MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver"); |
| 36 | MODULE_LICENSE("GPL"); |
| 37 | |
Alexey Dobriyan | a3aa188 | 2010-01-07 11:58:11 +0000 | [diff] [blame] | 38 | static DEFINE_PCI_DEVICE_TABLE(rtl8180_table) = { |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 39 | /* rtl8185 */ |
| 40 | { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) }, |
Adrian Bassett | 4fcc547 | 2008-01-23 16:38:33 +0000 | [diff] [blame] | 41 | { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) }, |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 42 | { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x701f) }, |
| 43 | |
| 44 | /* rtl8180 */ |
| 45 | { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8180) }, |
| 46 | { PCI_DEVICE(0x1799, 0x6001) }, |
| 47 | { PCI_DEVICE(0x1799, 0x6020) }, |
| 48 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x3300) }, |
Xose Vazquez Perez | 29a6b50 | 2012-06-15 17:27:05 +0200 | [diff] [blame] | 49 | { PCI_DEVICE(0x1186, 0x3301) }, |
| 50 | { PCI_DEVICE(0x1432, 0x7106) }, |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 51 | { } |
| 52 | }; |
| 53 | |
| 54 | MODULE_DEVICE_TABLE(pci, rtl8180_table); |
| 55 | |
Johannes Berg | 8318d78 | 2008-01-24 19:38:38 +0100 | [diff] [blame] | 56 | static const struct ieee80211_rate rtl818x_rates[] = { |
| 57 | { .bitrate = 10, .hw_value = 0, }, |
| 58 | { .bitrate = 20, .hw_value = 1, }, |
| 59 | { .bitrate = 55, .hw_value = 2, }, |
| 60 | { .bitrate = 110, .hw_value = 3, }, |
| 61 | { .bitrate = 60, .hw_value = 4, }, |
| 62 | { .bitrate = 90, .hw_value = 5, }, |
| 63 | { .bitrate = 120, .hw_value = 6, }, |
| 64 | { .bitrate = 180, .hw_value = 7, }, |
| 65 | { .bitrate = 240, .hw_value = 8, }, |
| 66 | { .bitrate = 360, .hw_value = 9, }, |
| 67 | { .bitrate = 480, .hw_value = 10, }, |
| 68 | { .bitrate = 540, .hw_value = 11, }, |
| 69 | }; |
| 70 | |
| 71 | static const struct ieee80211_channel rtl818x_channels[] = { |
| 72 | { .center_freq = 2412 }, |
| 73 | { .center_freq = 2417 }, |
| 74 | { .center_freq = 2422 }, |
| 75 | { .center_freq = 2427 }, |
| 76 | { .center_freq = 2432 }, |
| 77 | { .center_freq = 2437 }, |
| 78 | { .center_freq = 2442 }, |
| 79 | { .center_freq = 2447 }, |
| 80 | { .center_freq = 2452 }, |
| 81 | { .center_freq = 2457 }, |
| 82 | { .center_freq = 2462 }, |
| 83 | { .center_freq = 2467 }, |
| 84 | { .center_freq = 2472 }, |
| 85 | { .center_freq = 2484 }, |
| 86 | }; |
| 87 | |
Andrea Merello | fd6564f | 2014-03-22 18:51:20 +0100 | [diff] [blame] | 88 | /* Queues for rtl8180/rtl8185 cards |
| 89 | * |
| 90 | * name | reg | prio |
| 91 | * BC | 7 | 3 |
| 92 | * HI | 6 | 0 |
| 93 | * NO | 5 | 1 |
| 94 | * LO | 4 | 2 |
| 95 | * |
| 96 | * The complete map for DMA kick reg using all queue is: |
| 97 | * static const int rtl8180_queues_map[RTL8180_NR_TX_QUEUES] = {6, 5, 4, 7}; |
| 98 | * |
| 99 | * .. but .. Because the mac80211 needs at least 4 queues for QoS or |
| 100 | * otherwise QoS can't be done, we use just one. |
| 101 | * Beacon queue could be used, but this is not finished yet. |
| 102 | * Actual map is: |
| 103 | * |
| 104 | * name | reg | prio |
| 105 | * BC | 7 | 1 <- currently not used yet. |
| 106 | * HI | 6 | x <- not used |
| 107 | * NO | 5 | x <- not used |
| 108 | * LO | 4 | 0 <- used |
| 109 | */ |
| 110 | |
| 111 | static const int rtl8180_queues_map[RTL8180_NR_TX_QUEUES] = {4, 7}; |
Johannes Berg | 8318d78 | 2008-01-24 19:38:38 +0100 | [diff] [blame] | 112 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 113 | void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data) |
| 114 | { |
| 115 | struct rtl8180_priv *priv = dev->priv; |
| 116 | int i = 10; |
| 117 | u32 buf; |
| 118 | |
| 119 | buf = (data << 8) | addr; |
| 120 | |
| 121 | rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf | 0x80); |
| 122 | while (i--) { |
| 123 | rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf); |
| 124 | if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF)) |
| 125 | return; |
| 126 | } |
| 127 | } |
| 128 | |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 129 | static void rtl8180_handle_rx(struct ieee80211_hw *dev) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 130 | { |
| 131 | struct rtl8180_priv *priv = dev->priv; |
Andrea Merello | 2102592 | 2014-03-26 20:59:52 +0100 | [diff] [blame] | 132 | struct rtl818x_rx_cmd_desc *cmd_desc; |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 133 | unsigned int count = 32; |
John W. Linville | 8b73fb8 | 2010-07-21 16:26:40 -0400 | [diff] [blame] | 134 | u8 signal, agc, sq; |
andrea.merello | 2b4db05 | 2014-02-05 22:38:05 +0100 | [diff] [blame] | 135 | dma_addr_t mapping; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 136 | |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 137 | while (count--) { |
Andrea Merello | 2102592 | 2014-03-26 20:59:52 +0100 | [diff] [blame] | 138 | void *entry = priv->rx_ring + priv->rx_idx * priv->rx_ring_sz; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 139 | struct sk_buff *skb = priv->rx_buf[priv->rx_idx]; |
Andrea Merello | 2102592 | 2014-03-26 20:59:52 +0100 | [diff] [blame] | 140 | u32 flags, flags2; |
| 141 | u64 tsft; |
| 142 | |
| 143 | if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) { |
| 144 | struct rtl8187se_rx_desc *desc = entry; |
| 145 | |
| 146 | flags = le32_to_cpu(desc->flags); |
| 147 | flags2 = le32_to_cpu(desc->flags2); |
| 148 | tsft = le64_to_cpu(desc->tsft); |
| 149 | } else { |
| 150 | struct rtl8180_rx_desc *desc = entry; |
| 151 | |
| 152 | flags = le32_to_cpu(desc->flags); |
| 153 | flags2 = le32_to_cpu(desc->flags2); |
| 154 | tsft = le64_to_cpu(desc->tsft); |
| 155 | } |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 156 | |
Herton Ronaldo Krzesinski | 38e3b0d | 2008-07-16 11:44:18 -0300 | [diff] [blame] | 157 | if (flags & RTL818X_RX_DESC_FLAG_OWN) |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 158 | return; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 159 | |
Herton Ronaldo Krzesinski | 38e3b0d | 2008-07-16 11:44:18 -0300 | [diff] [blame] | 160 | if (unlikely(flags & (RTL818X_RX_DESC_FLAG_DMA_FAIL | |
| 161 | RTL818X_RX_DESC_FLAG_FOF | |
| 162 | RTL818X_RX_DESC_FLAG_RX_ERR))) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 163 | goto done; |
| 164 | else { |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 165 | struct ieee80211_rx_status rx_status = {0}; |
| 166 | struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_SIZE); |
| 167 | |
| 168 | if (unlikely(!new_skb)) |
| 169 | goto done; |
| 170 | |
andrea.merello | 2b4db05 | 2014-02-05 22:38:05 +0100 | [diff] [blame] | 171 | mapping = pci_map_single(priv->pdev, |
| 172 | skb_tail_pointer(new_skb), |
| 173 | MAX_RX_SIZE, PCI_DMA_FROMDEVICE); |
| 174 | |
| 175 | if (pci_dma_mapping_error(priv->pdev, mapping)) { |
| 176 | kfree_skb(new_skb); |
| 177 | dev_err(&priv->pdev->dev, "RX DMA map error\n"); |
| 178 | |
| 179 | goto done; |
| 180 | } |
| 181 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 182 | pci_unmap_single(priv->pdev, |
| 183 | *((dma_addr_t *)skb->cb), |
| 184 | MAX_RX_SIZE, PCI_DMA_FROMDEVICE); |
| 185 | skb_put(skb, flags & 0xFFF); |
| 186 | |
| 187 | rx_status.antenna = (flags2 >> 15) & 1; |
Johannes Berg | 8318d78 | 2008-01-24 19:38:38 +0100 | [diff] [blame] | 188 | rx_status.rate_idx = (flags >> 20) & 0xF; |
John W. Linville | 8b73fb8 | 2010-07-21 16:26:40 -0400 | [diff] [blame] | 189 | agc = (flags2 >> 17) & 0x7F; |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 190 | |
| 191 | if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8185) { |
John W. Linville | 8b73fb8 | 2010-07-21 16:26:40 -0400 | [diff] [blame] | 192 | if (rx_status.rate_idx > 3) |
| 193 | signal = 90 - clamp_t(u8, agc, 25, 90); |
| 194 | else |
| 195 | signal = 95 - clamp_t(u8, agc, 30, 95); |
Andrea Merello | 2102592 | 2014-03-26 20:59:52 +0100 | [diff] [blame] | 196 | } else if (priv->chip_family == |
| 197 | RTL818X_CHIP_FAMILY_RTL8180) { |
John W. Linville | 8b73fb8 | 2010-07-21 16:26:40 -0400 | [diff] [blame] | 198 | sq = flags2 & 0xff; |
| 199 | signal = priv->rf->calc_rssi(agc, sq); |
Andrea Merello | 2102592 | 2014-03-26 20:59:52 +0100 | [diff] [blame] | 200 | } else { |
| 201 | /* TODO: rtl8187se rssi */ |
| 202 | signal = 10; |
John W. Linville | 8b73fb8 | 2010-07-21 16:26:40 -0400 | [diff] [blame] | 203 | } |
John W. Linville | 8b74964 | 2010-07-19 16:35:20 -0400 | [diff] [blame] | 204 | rx_status.signal = signal; |
Karl Beldan | 675a0b0 | 2013-03-25 16:26:57 +0100 | [diff] [blame] | 205 | rx_status.freq = dev->conf.chandef.chan->center_freq; |
| 206 | rx_status.band = dev->conf.chandef.chan->band; |
Andrea Merello | 2102592 | 2014-03-26 20:59:52 +0100 | [diff] [blame] | 207 | rx_status.mactime = tsft; |
Thomas Pedersen | f4bda33 | 2012-11-13 10:46:27 -0800 | [diff] [blame] | 208 | rx_status.flag |= RX_FLAG_MACTIME_START; |
Herton Ronaldo Krzesinski | 38e3b0d | 2008-07-16 11:44:18 -0300 | [diff] [blame] | 209 | if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 210 | rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; |
| 211 | |
Johannes Berg | f1d58c2 | 2009-06-17 13:13:00 +0200 | [diff] [blame] | 212 | memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 213 | ieee80211_rx_irqsafe(dev, skb); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 214 | |
| 215 | skb = new_skb; |
| 216 | priv->rx_buf[priv->rx_idx] = skb; |
andrea.merello | 2b4db05 | 2014-02-05 22:38:05 +0100 | [diff] [blame] | 217 | *((dma_addr_t *) skb->cb) = mapping; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 218 | } |
| 219 | |
| 220 | done: |
Andrea Merello | 2102592 | 2014-03-26 20:59:52 +0100 | [diff] [blame] | 221 | cmd_desc = entry; |
| 222 | cmd_desc->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb)); |
| 223 | cmd_desc->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 224 | MAX_RX_SIZE); |
| 225 | if (priv->rx_idx == 31) |
Andrea Merello | 2102592 | 2014-03-26 20:59:52 +0100 | [diff] [blame] | 226 | cmd_desc->flags |= |
| 227 | cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 228 | priv->rx_idx = (priv->rx_idx + 1) % 32; |
| 229 | } |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 230 | } |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 231 | |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 232 | static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio) |
| 233 | { |
| 234 | struct rtl8180_priv *priv = dev->priv; |
| 235 | struct rtl8180_tx_ring *ring = &priv->tx_ring[prio]; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 236 | |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 237 | while (skb_queue_len(&ring->queue)) { |
| 238 | struct rtl8180_tx_desc *entry = &ring->desc[ring->idx]; |
| 239 | struct sk_buff *skb; |
| 240 | struct ieee80211_tx_info *info; |
| 241 | u32 flags = le32_to_cpu(entry->flags); |
| 242 | |
| 243 | if (flags & RTL818X_TX_DESC_FLAG_OWN) |
| 244 | return; |
| 245 | |
| 246 | ring->idx = (ring->idx + 1) % ring->entries; |
| 247 | skb = __skb_dequeue(&ring->queue); |
| 248 | pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf), |
| 249 | skb->len, PCI_DMA_TODEVICE); |
| 250 | |
| 251 | info = IEEE80211_SKB_CB(skb); |
| 252 | ieee80211_tx_info_clear_status(info); |
| 253 | |
| 254 | if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) && |
| 255 | (flags & RTL818X_TX_DESC_FLAG_TX_OK)) |
| 256 | info->flags |= IEEE80211_TX_STAT_ACK; |
| 257 | |
| 258 | info->status.rates[0].count = (flags & 0xFF) + 1; |
| 259 | info->status.rates[1].idx = -1; |
| 260 | |
| 261 | ieee80211_tx_status_irqsafe(dev, skb); |
| 262 | if (ring->entries - skb_queue_len(&ring->queue) == 2) |
| 263 | ieee80211_wake_queue(dev, prio); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 264 | } |
| 265 | } |
| 266 | |
Andrea Merello | a373ebc | 2014-03-26 21:00:06 +0100 | [diff] [blame] | 267 | static irqreturn_t rtl8187se_interrupt(int irq, void *dev_id) |
| 268 | { |
| 269 | struct ieee80211_hw *dev = dev_id; |
| 270 | struct rtl8180_priv *priv = dev->priv; |
| 271 | u32 reg; |
| 272 | unsigned long flags; |
| 273 | static int desc_err; |
| 274 | |
| 275 | spin_lock_irqsave(&priv->lock, flags); |
| 276 | /* Note: 32-bit interrupt status */ |
| 277 | reg = rtl818x_ioread32(priv, &priv->map->INT_STATUS_SE); |
| 278 | if (unlikely(reg == 0xFFFFFFFF)) { |
| 279 | spin_unlock_irqrestore(&priv->lock, flags); |
| 280 | return IRQ_HANDLED; |
| 281 | } |
| 282 | |
| 283 | rtl818x_iowrite32(priv, &priv->map->INT_STATUS_SE, reg); |
| 284 | |
| 285 | if (reg & IMR_TIMEOUT1) |
| 286 | rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0); |
| 287 | |
| 288 | if (reg & (IMR_TBDOK | IMR_TBDER)) |
| 289 | rtl8180_handle_tx(dev, 4); |
| 290 | |
| 291 | if (reg & (IMR_TVODOK | IMR_TVODER)) |
| 292 | rtl8180_handle_tx(dev, 0); |
| 293 | |
| 294 | if (reg & (IMR_TVIDOK | IMR_TVIDER)) |
| 295 | rtl8180_handle_tx(dev, 1); |
| 296 | |
| 297 | if (reg & (IMR_TBEDOK | IMR_TBEDER)) |
| 298 | rtl8180_handle_tx(dev, 2); |
| 299 | |
| 300 | if (reg & (IMR_TBKDOK | IMR_TBKDER)) |
| 301 | rtl8180_handle_tx(dev, 3); |
| 302 | |
| 303 | if (reg & (IMR_ROK | IMR_RER | RTL818X_INT_SE_RX_DU | IMR_RQOSOK)) |
| 304 | rtl8180_handle_rx(dev); |
| 305 | /* The interface sometimes generates several RX DMA descriptor errors |
| 306 | * at startup. Do not report these. |
| 307 | */ |
| 308 | if ((reg & RTL818X_INT_SE_RX_DU) && desc_err++ > 2) |
| 309 | if (net_ratelimit()) |
| 310 | wiphy_err(dev->wiphy, "No RX DMA Descriptor avail\n"); |
| 311 | |
| 312 | spin_unlock_irqrestore(&priv->lock, flags); |
| 313 | return IRQ_HANDLED; |
| 314 | } |
| 315 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 316 | static irqreturn_t rtl8180_interrupt(int irq, void *dev_id) |
| 317 | { |
| 318 | struct ieee80211_hw *dev = dev_id; |
| 319 | struct rtl8180_priv *priv = dev->priv; |
| 320 | u16 reg; |
| 321 | |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 322 | spin_lock(&priv->lock); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 323 | reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS); |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 324 | if (unlikely(reg == 0xFFFF)) { |
| 325 | spin_unlock(&priv->lock); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 326 | return IRQ_HANDLED; |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 327 | } |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 328 | |
| 329 | rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg); |
| 330 | |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 331 | if (reg & (RTL818X_INT_TXB_OK | RTL818X_INT_TXB_ERR)) |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 332 | rtl8180_handle_tx(dev, 1); |
| 333 | |
| 334 | if (reg & (RTL818X_INT_TXL_OK | RTL818X_INT_TXL_ERR)) |
| 335 | rtl8180_handle_tx(dev, 0); |
| 336 | |
| 337 | if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR)) |
| 338 | rtl8180_handle_rx(dev); |
| 339 | |
| 340 | spin_unlock(&priv->lock); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 341 | |
| 342 | return IRQ_HANDLED; |
| 343 | } |
| 344 | |
Thomas Huehn | 36323f8 | 2012-07-23 21:33:42 +0200 | [diff] [blame] | 345 | static void rtl8180_tx(struct ieee80211_hw *dev, |
| 346 | struct ieee80211_tx_control *control, |
| 347 | struct sk_buff *skb) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 348 | { |
Johannes Berg | e039fa4 | 2008-05-15 12:55:29 +0200 | [diff] [blame] | 349 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
John W. Linville | 51e080d | 2010-05-06 16:26:23 -0400 | [diff] [blame] | 350 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 351 | struct rtl8180_priv *priv = dev->priv; |
| 352 | struct rtl8180_tx_ring *ring; |
| 353 | struct rtl8180_tx_desc *entry; |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 354 | unsigned long flags; |
Andrea Merello | fd6564f | 2014-03-22 18:51:20 +0100 | [diff] [blame] | 355 | unsigned int idx, prio, hw_prio; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 356 | dma_addr_t mapping; |
| 357 | u32 tx_flags; |
Johannes Berg | e6a9854 | 2008-10-21 12:40:02 +0200 | [diff] [blame] | 358 | u8 rc_flags; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 359 | u16 plcp_len = 0; |
| 360 | __le16 rts_duration = 0; |
| 361 | |
Johannes Berg | e253008 | 2008-05-17 00:57:14 +0200 | [diff] [blame] | 362 | prio = skb_get_queue_mapping(skb); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 363 | ring = &priv->tx_ring[prio]; |
| 364 | |
| 365 | mapping = pci_map_single(priv->pdev, skb->data, |
| 366 | skb->len, PCI_DMA_TODEVICE); |
| 367 | |
andrea.merello | 348f7d4 | 2014-02-05 22:38:06 +0100 | [diff] [blame] | 368 | if (pci_dma_mapping_error(priv->pdev, mapping)) { |
| 369 | kfree_skb(skb); |
| 370 | dev_err(&priv->pdev->dev, "TX DMA mapping error\n"); |
| 371 | return; |
| 372 | |
| 373 | } |
| 374 | |
Herton Ronaldo Krzesinski | 38e3b0d | 2008-07-16 11:44:18 -0300 | [diff] [blame] | 375 | tx_flags = RTL818X_TX_DESC_FLAG_OWN | RTL818X_TX_DESC_FLAG_FS | |
| 376 | RTL818X_TX_DESC_FLAG_LS | |
Johannes Berg | e039fa4 | 2008-05-15 12:55:29 +0200 | [diff] [blame] | 377 | (ieee80211_get_tx_rate(dev, info)->hw_value << 24) | |
Johannes Berg | 2e92e6f | 2008-05-15 12:55:27 +0200 | [diff] [blame] | 378 | skb->len; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 379 | |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 380 | if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180) |
Herton Ronaldo Krzesinski | 38e3b0d | 2008-07-16 11:44:18 -0300 | [diff] [blame] | 381 | tx_flags |= RTL818X_TX_DESC_FLAG_DMA | |
| 382 | RTL818X_TX_DESC_FLAG_NO_ENC; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 383 | |
Johannes Berg | e6a9854 | 2008-10-21 12:40:02 +0200 | [diff] [blame] | 384 | rc_flags = info->control.rates[0].flags; |
| 385 | if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { |
Herton Ronaldo Krzesinski | 38e3b0d | 2008-07-16 11:44:18 -0300 | [diff] [blame] | 386 | tx_flags |= RTL818X_TX_DESC_FLAG_RTS; |
Johannes Berg | e039fa4 | 2008-05-15 12:55:29 +0200 | [diff] [blame] | 387 | tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; |
Johannes Berg | e6a9854 | 2008-10-21 12:40:02 +0200 | [diff] [blame] | 388 | } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { |
Herton Ronaldo Krzesinski | 38e3b0d | 2008-07-16 11:44:18 -0300 | [diff] [blame] | 389 | tx_flags |= RTL818X_TX_DESC_FLAG_CTS; |
Johannes Berg | e039fa4 | 2008-05-15 12:55:29 +0200 | [diff] [blame] | 390 | tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; |
Johannes Berg | aa68cbf | 2008-02-18 14:20:30 +0100 | [diff] [blame] | 391 | } |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 392 | |
Johannes Berg | e6a9854 | 2008-10-21 12:40:02 +0200 | [diff] [blame] | 393 | if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) |
Johannes Berg | 32bfd35 | 2007-12-19 01:31:26 +0100 | [diff] [blame] | 394 | rts_duration = ieee80211_rts_duration(dev, priv->vif, skb->len, |
Johannes Berg | e039fa4 | 2008-05-15 12:55:29 +0200 | [diff] [blame] | 395 | info); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 396 | |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 397 | if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180) { |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 398 | unsigned int remainder; |
| 399 | |
| 400 | plcp_len = DIV_ROUND_UP(16 * (skb->len + 4), |
Johannes Berg | e039fa4 | 2008-05-15 12:55:29 +0200 | [diff] [blame] | 401 | (ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 402 | remainder = (16 * (skb->len + 4)) % |
Johannes Berg | e039fa4 | 2008-05-15 12:55:29 +0200 | [diff] [blame] | 403 | ((ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10); |
Roel Kluin | 35a0ace | 2009-06-22 17:42:21 +0200 | [diff] [blame] | 404 | if (remainder <= 6) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 405 | plcp_len |= 1 << 15; |
| 406 | } |
| 407 | |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 408 | spin_lock_irqsave(&priv->lock, flags); |
John W. Linville | 51e080d | 2010-05-06 16:26:23 -0400 | [diff] [blame] | 409 | |
| 410 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { |
| 411 | if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) |
| 412 | priv->seqno += 0x10; |
| 413 | hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); |
| 414 | hdr->seq_ctrl |= cpu_to_le16(priv->seqno); |
| 415 | } |
| 416 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 417 | idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries; |
| 418 | entry = &ring->desc[idx]; |
| 419 | |
| 420 | entry->rts_duration = rts_duration; |
| 421 | entry->plcp_len = cpu_to_le16(plcp_len); |
| 422 | entry->tx_buf = cpu_to_le32(mapping); |
| 423 | entry->frame_len = cpu_to_le32(skb->len); |
Johannes Berg | e6a9854 | 2008-10-21 12:40:02 +0200 | [diff] [blame] | 424 | entry->flags2 = info->control.rates[1].idx >= 0 ? |
Felix Fietkau | 870abdf | 2008-10-05 18:04:24 +0200 | [diff] [blame] | 425 | ieee80211_get_alt_retry_rate(dev, info, 0)->bitrate << 4 : 0; |
Johannes Berg | e6a9854 | 2008-10-21 12:40:02 +0200 | [diff] [blame] | 426 | entry->retry_limit = info->control.rates[0].count; |
andrea merello | 4c552a5 | 2014-02-18 02:10:45 +0100 | [diff] [blame] | 427 | |
| 428 | /* We must be sure that tx_flags is written last because the HW |
| 429 | * looks at it to check if the rest of data is valid or not |
| 430 | */ |
| 431 | wmb(); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 432 | entry->flags = cpu_to_le32(tx_flags); |
andrea merello | c24782e | 2014-02-18 02:10:46 +0100 | [diff] [blame] | 433 | /* We must be sure this has been written before followings HW |
| 434 | * register write, because this write will made the HW attempts |
| 435 | * to DMA the just-written data |
| 436 | */ |
| 437 | wmb(); |
| 438 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 439 | __skb_queue_tail(&ring->queue, skb); |
| 440 | if (ring->entries - skb_queue_len(&ring->queue) < 2) |
John W. Linville | d10e2e0 | 2010-04-27 16:57:38 -0400 | [diff] [blame] | 441 | ieee80211_stop_queue(dev, prio); |
John W. Linville | 51e080d | 2010-05-06 16:26:23 -0400 | [diff] [blame] | 442 | |
John W. Linville | a6d27d2a | 2010-10-07 11:31:56 -0400 | [diff] [blame] | 443 | spin_unlock_irqrestore(&priv->lock, flags); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 444 | |
Andrea Merello | fd6564f | 2014-03-22 18:51:20 +0100 | [diff] [blame] | 445 | hw_prio = rtl8180_queues_map[prio]; |
| 446 | |
| 447 | rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, |
| 448 | (1 << hw_prio) | /* ring to poll */ |
| 449 | (1<<1) | (1<<2));/* stopped rings */ |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 450 | } |
| 451 | |
| 452 | void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam) |
| 453 | { |
| 454 | u8 reg; |
| 455 | |
| 456 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); |
| 457 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); |
| 458 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, |
| 459 | reg | RTL818X_CONFIG3_ANAPARAM_WRITE); |
| 460 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam); |
| 461 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, |
| 462 | reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE); |
| 463 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
| 464 | } |
| 465 | |
Andrea Merello | 732c893 | 2014-03-26 21:00:24 +0100 | [diff] [blame^] | 466 | static void rtl8180_int_enable(struct ieee80211_hw *dev) |
| 467 | { |
| 468 | struct rtl8180_priv *priv = dev->priv; |
| 469 | |
| 470 | if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) { |
| 471 | rtl818x_iowrite32(priv, &priv->map->IMR, IMR_TMGDOK | |
| 472 | IMR_TBDER | IMR_THPDER | |
| 473 | IMR_THPDER | IMR_THPDOK | |
| 474 | IMR_TVODER | IMR_TVODOK | |
| 475 | IMR_TVIDER | IMR_TVIDOK | |
| 476 | IMR_TBEDER | IMR_TBEDOK | |
| 477 | IMR_TBKDER | IMR_TBKDOK | |
| 478 | IMR_RDU | IMR_RER | |
| 479 | IMR_ROK | IMR_RQOSOK); |
| 480 | } else { |
| 481 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); |
| 482 | } |
| 483 | } |
| 484 | |
| 485 | static void rtl8180_int_disable(struct ieee80211_hw *dev) |
| 486 | { |
| 487 | struct rtl8180_priv *priv = dev->priv; |
| 488 | |
| 489 | if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) { |
| 490 | rtl818x_iowrite32(priv, &priv->map->IMR, 0); |
| 491 | } else { |
| 492 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); |
| 493 | } |
| 494 | } |
| 495 | |
Andrea Merello | 516a093 | 2014-03-15 18:29:36 +0100 | [diff] [blame] | 496 | static void rtl8180_conf_basic_rates(struct ieee80211_hw *dev, |
| 497 | u32 rates_mask) |
| 498 | { |
| 499 | struct rtl8180_priv *priv = dev->priv; |
| 500 | |
| 501 | u8 max, min; |
| 502 | u16 reg; |
| 503 | |
| 504 | max = fls(rates_mask) - 1; |
| 505 | min = ffs(rates_mask) - 1; |
| 506 | |
| 507 | switch (priv->chip_family) { |
| 508 | |
| 509 | case RTL818X_CHIP_FAMILY_RTL8180: |
| 510 | /* in 8180 this is NOT a BITMAP */ |
| 511 | reg = rtl818x_ioread16(priv, &priv->map->BRSR); |
| 512 | reg &= ~3; |
| 513 | reg |= max; |
| 514 | rtl818x_iowrite16(priv, &priv->map->BRSR, reg); |
Andrea Merello | 516a093 | 2014-03-15 18:29:36 +0100 | [diff] [blame] | 515 | break; |
| 516 | |
| 517 | case RTL818X_CHIP_FAMILY_RTL8185: |
| 518 | /* in 8185 this is a BITMAP */ |
| 519 | rtl818x_iowrite16(priv, &priv->map->BRSR, rates_mask); |
| 520 | rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (max << 4) | min); |
| 521 | break; |
Andrea Merello | d209f3b | 2014-03-26 20:59:25 +0100 | [diff] [blame] | 522 | |
| 523 | case RTL818X_CHIP_FAMILY_RTL8187SE: |
| 524 | /* in 8187se this is a BITMAP */ |
| 525 | rtl818x_iowrite16(priv, &priv->map->BRSR_8187SE, rates_mask); |
| 526 | break; |
Andrea Merello | 516a093 | 2014-03-15 18:29:36 +0100 | [diff] [blame] | 527 | } |
| 528 | } |
| 529 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 530 | static int rtl8180_init_hw(struct ieee80211_hw *dev) |
| 531 | { |
| 532 | struct rtl8180_priv *priv = dev->priv; |
| 533 | u16 reg; |
| 534 | |
| 535 | rtl818x_iowrite8(priv, &priv->map->CMD, 0); |
| 536 | rtl818x_ioread8(priv, &priv->map->CMD); |
| 537 | msleep(10); |
| 538 | |
| 539 | /* reset */ |
Andrea Merello | 732c893 | 2014-03-26 21:00:24 +0100 | [diff] [blame^] | 540 | rtl8180_int_disable(dev); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 541 | rtl818x_ioread8(priv, &priv->map->CMD); |
| 542 | |
| 543 | reg = rtl818x_ioread8(priv, &priv->map->CMD); |
| 544 | reg &= (1 << 1); |
| 545 | reg |= RTL818X_CMD_RESET; |
| 546 | rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET); |
| 547 | rtl818x_ioread8(priv, &priv->map->CMD); |
| 548 | msleep(200); |
| 549 | |
| 550 | /* check success of reset */ |
| 551 | if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) { |
Joe Perches | c96c31e | 2010-07-26 14:39:58 -0700 | [diff] [blame] | 552 | wiphy_err(dev->wiphy, "reset timeout!\n"); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 553 | return -ETIMEDOUT; |
| 554 | } |
| 555 | |
| 556 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD); |
| 557 | rtl818x_ioread8(priv, &priv->map->CMD); |
| 558 | msleep(200); |
| 559 | |
| 560 | if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) { |
| 561 | /* For cardbus */ |
| 562 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); |
| 563 | reg |= 1 << 1; |
| 564 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); |
| 565 | reg = rtl818x_ioread16(priv, &priv->map->FEMR); |
| 566 | reg |= (1 << 15) | (1 << 14) | (1 << 4); |
| 567 | rtl818x_iowrite16(priv, &priv->map->FEMR, reg); |
| 568 | } |
| 569 | |
| 570 | rtl818x_iowrite8(priv, &priv->map->MSR, 0); |
| 571 | |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 572 | if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 573 | rtl8180_set_anaparam(priv, priv->anaparam); |
| 574 | |
| 575 | rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma); |
Andrea Merello | fd6564f | 2014-03-22 18:51:20 +0100 | [diff] [blame] | 576 | rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[1].dma); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 577 | rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma); |
| 578 | |
| 579 | /* TODO: necessary? specs indicate not */ |
| 580 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); |
| 581 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG2); |
| 582 | rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3)); |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 583 | if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8185) { |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 584 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG2); |
| 585 | rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4)); |
| 586 | } |
| 587 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
| 588 | |
| 589 | /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */ |
| 590 | |
| 591 | /* TODO: turn off hw wep on rtl8180 */ |
| 592 | |
| 593 | rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0); |
| 594 | |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 595 | if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180) { |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 596 | rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); |
| 597 | rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 598 | |
| 599 | /* TODO: set ClkRun enable? necessary? */ |
| 600 | reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE); |
| 601 | rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6)); |
| 602 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); |
| 603 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); |
| 604 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2)); |
| 605 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
| 606 | } else { |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 607 | rtl818x_iowrite8(priv, &priv->map->SECURITY, 0); |
| 608 | |
| 609 | rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6); |
| 610 | rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C); |
| 611 | } |
| 612 | |
| 613 | priv->rf->init(dev); |
Andrea Merello | 516a093 | 2014-03-15 18:29:36 +0100 | [diff] [blame] | 614 | |
| 615 | /* default basic rates are 1,2 Mbps for rtl8180. 1,2,6,9,12,18,24 Mbps |
| 616 | * otherwise. bitmask 0x3 and 0x01f3 respectively. |
| 617 | * NOTE: currenty rtl8225 RF code changes basic rates, so we need to do |
| 618 | * this after rf init. |
| 619 | * TODO: try to find out whether RF code really needs to do this.. |
| 620 | */ |
| 621 | if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180) |
| 622 | rtl8180_conf_basic_rates(dev, 0x3); |
| 623 | else |
| 624 | rtl8180_conf_basic_rates(dev, 0x1f3); |
| 625 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 626 | return 0; |
| 627 | } |
| 628 | |
| 629 | static int rtl8180_init_rx_ring(struct ieee80211_hw *dev) |
| 630 | { |
| 631 | struct rtl8180_priv *priv = dev->priv; |
Andrea Merello | 2102592 | 2014-03-26 20:59:52 +0100 | [diff] [blame] | 632 | struct rtl818x_rx_cmd_desc *entry; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 633 | int i; |
| 634 | |
Andrea Merello | 2102592 | 2014-03-26 20:59:52 +0100 | [diff] [blame] | 635 | if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) |
| 636 | priv->rx_ring_sz = sizeof(struct rtl8187se_rx_desc); |
| 637 | else |
| 638 | priv->rx_ring_sz = sizeof(struct rtl8180_rx_desc); |
| 639 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 640 | priv->rx_ring = pci_alloc_consistent(priv->pdev, |
Andrea Merello | 2102592 | 2014-03-26 20:59:52 +0100 | [diff] [blame] | 641 | priv->rx_ring_sz * 32, |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 642 | &priv->rx_ring_dma); |
| 643 | |
| 644 | if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) { |
Joe Perches | 5db5584 | 2010-08-11 19:11:19 -0700 | [diff] [blame] | 645 | wiphy_err(dev->wiphy, "Cannot allocate RX ring\n"); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 646 | return -ENOMEM; |
| 647 | } |
| 648 | |
Andrea Merello | 2102592 | 2014-03-26 20:59:52 +0100 | [diff] [blame] | 649 | memset(priv->rx_ring, 0, priv->rx_ring_sz * 32); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 650 | priv->rx_idx = 0; |
| 651 | |
| 652 | for (i = 0; i < 32; i++) { |
| 653 | struct sk_buff *skb = dev_alloc_skb(MAX_RX_SIZE); |
| 654 | dma_addr_t *mapping; |
Andrea Merello | 2102592 | 2014-03-26 20:59:52 +0100 | [diff] [blame] | 655 | entry = priv->rx_ring + priv->rx_ring_sz*i; |
andrea merello | 4da18bb | 2014-02-18 02:10:43 +0100 | [diff] [blame] | 656 | if (!skb) { |
| 657 | wiphy_err(dev->wiphy, "Cannot allocate RX skb\n"); |
| 658 | return -ENOMEM; |
| 659 | } |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 660 | priv->rx_buf[i] = skb; |
| 661 | mapping = (dma_addr_t *)skb->cb; |
| 662 | *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb), |
| 663 | MAX_RX_SIZE, PCI_DMA_FROMDEVICE); |
andrea merello | ec1da08 | 2014-02-22 17:57:23 +0100 | [diff] [blame] | 664 | |
| 665 | if (pci_dma_mapping_error(priv->pdev, *mapping)) { |
| 666 | kfree_skb(skb); |
| 667 | wiphy_err(dev->wiphy, "Cannot map DMA for RX skb\n"); |
| 668 | return -ENOMEM; |
| 669 | } |
| 670 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 671 | entry->rx_buf = cpu_to_le32(*mapping); |
Herton Ronaldo Krzesinski | 38e3b0d | 2008-07-16 11:44:18 -0300 | [diff] [blame] | 672 | entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 673 | MAX_RX_SIZE); |
| 674 | } |
Herton Ronaldo Krzesinski | 38e3b0d | 2008-07-16 11:44:18 -0300 | [diff] [blame] | 675 | entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 676 | return 0; |
| 677 | } |
| 678 | |
| 679 | static void rtl8180_free_rx_ring(struct ieee80211_hw *dev) |
| 680 | { |
| 681 | struct rtl8180_priv *priv = dev->priv; |
| 682 | int i; |
| 683 | |
| 684 | for (i = 0; i < 32; i++) { |
| 685 | struct sk_buff *skb = priv->rx_buf[i]; |
| 686 | if (!skb) |
| 687 | continue; |
| 688 | |
| 689 | pci_unmap_single(priv->pdev, |
| 690 | *((dma_addr_t *)skb->cb), |
| 691 | MAX_RX_SIZE, PCI_DMA_FROMDEVICE); |
| 692 | kfree_skb(skb); |
| 693 | } |
| 694 | |
Andrea Merello | 2102592 | 2014-03-26 20:59:52 +0100 | [diff] [blame] | 695 | pci_free_consistent(priv->pdev, priv->rx_ring_sz * 32, |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 696 | priv->rx_ring, priv->rx_ring_dma); |
| 697 | priv->rx_ring = NULL; |
| 698 | } |
| 699 | |
| 700 | static int rtl8180_init_tx_ring(struct ieee80211_hw *dev, |
| 701 | unsigned int prio, unsigned int entries) |
| 702 | { |
| 703 | struct rtl8180_priv *priv = dev->priv; |
| 704 | struct rtl8180_tx_desc *ring; |
| 705 | dma_addr_t dma; |
| 706 | int i; |
| 707 | |
| 708 | ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma); |
| 709 | if (!ring || (unsigned long)ring & 0xFF) { |
Joe Perches | 5db5584 | 2010-08-11 19:11:19 -0700 | [diff] [blame] | 710 | wiphy_err(dev->wiphy, "Cannot allocate TX ring (prio = %d)\n", |
Joe Perches | c96c31e | 2010-07-26 14:39:58 -0700 | [diff] [blame] | 711 | prio); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 712 | return -ENOMEM; |
| 713 | } |
| 714 | |
| 715 | memset(ring, 0, sizeof(*ring)*entries); |
| 716 | priv->tx_ring[prio].desc = ring; |
| 717 | priv->tx_ring[prio].dma = dma; |
| 718 | priv->tx_ring[prio].idx = 0; |
| 719 | priv->tx_ring[prio].entries = entries; |
| 720 | skb_queue_head_init(&priv->tx_ring[prio].queue); |
| 721 | |
| 722 | for (i = 0; i < entries; i++) |
| 723 | ring[i].next_tx_desc = |
| 724 | cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring)); |
| 725 | |
| 726 | return 0; |
| 727 | } |
| 728 | |
| 729 | static void rtl8180_free_tx_ring(struct ieee80211_hw *dev, unsigned int prio) |
| 730 | { |
| 731 | struct rtl8180_priv *priv = dev->priv; |
| 732 | struct rtl8180_tx_ring *ring = &priv->tx_ring[prio]; |
| 733 | |
| 734 | while (skb_queue_len(&ring->queue)) { |
| 735 | struct rtl8180_tx_desc *entry = &ring->desc[ring->idx]; |
| 736 | struct sk_buff *skb = __skb_dequeue(&ring->queue); |
| 737 | |
| 738 | pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf), |
| 739 | skb->len, PCI_DMA_TODEVICE); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 740 | kfree_skb(skb); |
| 741 | ring->idx = (ring->idx + 1) % ring->entries; |
| 742 | } |
| 743 | |
| 744 | pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries, |
| 745 | ring->desc, ring->dma); |
| 746 | ring->desc = NULL; |
| 747 | } |
| 748 | |
| 749 | static int rtl8180_start(struct ieee80211_hw *dev) |
| 750 | { |
| 751 | struct rtl8180_priv *priv = dev->priv; |
| 752 | int ret, i; |
| 753 | u32 reg; |
| 754 | |
| 755 | ret = rtl8180_init_rx_ring(dev); |
| 756 | if (ret) |
| 757 | return ret; |
| 758 | |
Andrea Merello | fd6564f | 2014-03-22 18:51:20 +0100 | [diff] [blame] | 759 | for (i = 0; i < (dev->queues + 1); i++) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 760 | if ((ret = rtl8180_init_tx_ring(dev, i, 16))) |
| 761 | goto err_free_rings; |
| 762 | |
| 763 | ret = rtl8180_init_hw(dev); |
| 764 | if (ret) |
| 765 | goto err_free_rings; |
| 766 | |
Andrea Merello | a373ebc | 2014-03-26 21:00:06 +0100 | [diff] [blame] | 767 | if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) { |
| 768 | ret = request_irq(priv->pdev->irq, rtl8187se_interrupt, |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 769 | IRQF_SHARED, KBUILD_MODNAME, dev); |
Andrea Merello | a373ebc | 2014-03-26 21:00:06 +0100 | [diff] [blame] | 770 | } else { |
| 771 | ret = request_irq(priv->pdev->irq, rtl8180_interrupt, |
| 772 | IRQF_SHARED, KBUILD_MODNAME, dev); |
| 773 | } |
| 774 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 775 | if (ret) { |
Joe Perches | 5db5584 | 2010-08-11 19:11:19 -0700 | [diff] [blame] | 776 | wiphy_err(dev->wiphy, "failed to register IRQ handler\n"); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 777 | goto err_free_rings; |
| 778 | } |
| 779 | |
Andrea Merello | 732c893 | 2014-03-26 21:00:24 +0100 | [diff] [blame^] | 780 | rtl8180_int_enable(dev); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 781 | |
| 782 | rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0); |
| 783 | rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0); |
| 784 | |
| 785 | reg = RTL818X_RX_CONF_ONLYERLPKT | |
| 786 | RTL818X_RX_CONF_RX_AUTORESETPHY | |
| 787 | RTL818X_RX_CONF_MGMT | |
| 788 | RTL818X_RX_CONF_DATA | |
| 789 | (7 << 8 /* MAX RX DMA */) | |
| 790 | RTL818X_RX_CONF_BROADCAST | |
| 791 | RTL818X_RX_CONF_NICMAC; |
| 792 | |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 793 | if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8185) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 794 | reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2; |
| 795 | else { |
| 796 | reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1) |
| 797 | ? RTL818X_RX_CONF_CSDM1 : 0; |
| 798 | reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2) |
| 799 | ? RTL818X_RX_CONF_CSDM2 : 0; |
| 800 | } |
| 801 | |
| 802 | priv->rx_conf = reg; |
| 803 | rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); |
| 804 | |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 805 | if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180) { |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 806 | reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); |
andrea merello | 14c7615 | 2014-02-18 02:10:44 +0100 | [diff] [blame] | 807 | |
| 808 | /* CW is not on per-packet basis. |
| 809 | * in rtl8185 the CW_VALUE reg is used. |
| 810 | */ |
andrea merello | 6f7343d | 2014-01-21 20:16:43 +0100 | [diff] [blame] | 811 | reg &= ~RTL818X_CW_CONF_PERPACKET_CW; |
andrea merello | 14c7615 | 2014-02-18 02:10:44 +0100 | [diff] [blame] | 812 | /* retry limit IS on per-packet basis. |
| 813 | * the short and long retry limit in TX_CONF |
| 814 | * reg are ignored |
| 815 | */ |
andrea merello | 6f7343d | 2014-01-21 20:16:43 +0100 | [diff] [blame] | 816 | reg |= RTL818X_CW_CONF_PERPACKET_RETRY; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 817 | rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); |
| 818 | |
| 819 | reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); |
andrea merello | 14c7615 | 2014-02-18 02:10:44 +0100 | [diff] [blame] | 820 | /* TX antenna and TX gain are not on per-packet basis. |
| 821 | * TX Antenna is selected by ANTSEL reg (RX in BB regs). |
| 822 | * TX gain is selected with CCK_TX_AGC and OFDM_TX_AGC regs |
| 823 | */ |
andrea merello | 6f7343d | 2014-01-21 20:16:43 +0100 | [diff] [blame] | 824 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN; |
| 825 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 826 | reg |= RTL818X_TX_AGC_CTL_FEEDBACK_ANT; |
| 827 | rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); |
| 828 | |
| 829 | /* disable early TX */ |
| 830 | rtl818x_iowrite8(priv, (u8 __iomem *)priv->map + 0xec, 0x3f); |
| 831 | } |
| 832 | |
| 833 | reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); |
| 834 | reg |= (6 << 21 /* MAX TX DMA */) | |
| 835 | RTL818X_TX_CONF_NO_ICV; |
| 836 | |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 837 | |
| 838 | |
| 839 | if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 840 | reg &= ~RTL818X_TX_CONF_PROBE_DTS; |
| 841 | else |
| 842 | reg &= ~RTL818X_TX_CONF_HW_SEQNUM; |
| 843 | |
andrea merello | e74075a | 2014-02-18 02:10:40 +0100 | [diff] [blame] | 844 | reg &= ~RTL818X_TX_CONF_DISCW; |
| 845 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 846 | /* different meaning, same value on both rtl8185 and rtl8180 */ |
| 847 | reg &= ~RTL818X_TX_CONF_SAT_HWPLCP; |
| 848 | |
| 849 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); |
| 850 | |
| 851 | reg = rtl818x_ioread8(priv, &priv->map->CMD); |
| 852 | reg |= RTL818X_CMD_RX_ENABLE; |
| 853 | reg |= RTL818X_CMD_TX_ENABLE; |
| 854 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); |
| 855 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 856 | return 0; |
| 857 | |
| 858 | err_free_rings: |
| 859 | rtl8180_free_rx_ring(dev); |
Andrea Merello | fd6564f | 2014-03-22 18:51:20 +0100 | [diff] [blame] | 860 | for (i = 0; i < (dev->queues + 1); i++) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 861 | if (priv->tx_ring[i].desc) |
| 862 | rtl8180_free_tx_ring(dev, i); |
| 863 | |
| 864 | return ret; |
| 865 | } |
| 866 | |
| 867 | static void rtl8180_stop(struct ieee80211_hw *dev) |
| 868 | { |
| 869 | struct rtl8180_priv *priv = dev->priv; |
| 870 | u8 reg; |
| 871 | int i; |
| 872 | |
Andrea Merello | 732c893 | 2014-03-26 21:00:24 +0100 | [diff] [blame^] | 873 | rtl8180_int_disable(dev); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 874 | |
| 875 | reg = rtl818x_ioread8(priv, &priv->map->CMD); |
| 876 | reg &= ~RTL818X_CMD_TX_ENABLE; |
| 877 | reg &= ~RTL818X_CMD_RX_ENABLE; |
| 878 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); |
| 879 | |
| 880 | priv->rf->stop(dev); |
| 881 | |
| 882 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); |
| 883 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG4); |
| 884 | rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF); |
| 885 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
| 886 | |
| 887 | free_irq(priv->pdev->irq, dev); |
| 888 | |
| 889 | rtl8180_free_rx_ring(dev); |
Andrea Merello | fd6564f | 2014-03-22 18:51:20 +0100 | [diff] [blame] | 890 | for (i = 0; i < (dev->queues + 1); i++) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 891 | rtl8180_free_tx_ring(dev, i); |
| 892 | } |
| 893 | |
Eliad Peller | 37a41b4 | 2011-09-21 14:06:11 +0300 | [diff] [blame] | 894 | static u64 rtl8180_get_tsf(struct ieee80211_hw *dev, |
| 895 | struct ieee80211_vif *vif) |
John W. Linville | c809e86 | 2010-05-06 16:49:40 -0400 | [diff] [blame] | 896 | { |
| 897 | struct rtl8180_priv *priv = dev->priv; |
| 898 | |
| 899 | return rtl818x_ioread32(priv, &priv->map->TSFT[0]) | |
| 900 | (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32; |
| 901 | } |
| 902 | |
John W. Linville | a3275e2 | 2010-06-24 11:08:37 -0400 | [diff] [blame] | 903 | static void rtl8180_beacon_work(struct work_struct *work) |
John W. Linville | c809e86 | 2010-05-06 16:49:40 -0400 | [diff] [blame] | 904 | { |
| 905 | struct rtl8180_vif *vif_priv = |
| 906 | container_of(work, struct rtl8180_vif, beacon_work.work); |
| 907 | struct ieee80211_vif *vif = |
| 908 | container_of((void *)vif_priv, struct ieee80211_vif, drv_priv); |
| 909 | struct ieee80211_hw *dev = vif_priv->dev; |
| 910 | struct ieee80211_mgmt *mgmt; |
| 911 | struct sk_buff *skb; |
John W. Linville | c809e86 | 2010-05-06 16:49:40 -0400 | [diff] [blame] | 912 | |
| 913 | /* don't overflow the tx ring */ |
| 914 | if (ieee80211_queue_stopped(dev, 0)) |
| 915 | goto resched; |
| 916 | |
| 917 | /* grab a fresh beacon */ |
| 918 | skb = ieee80211_beacon_get(dev, vif); |
John W. Linville | 8f1d2d2 | 2010-08-05 13:46:27 -0400 | [diff] [blame] | 919 | if (!skb) |
| 920 | goto resched; |
John W. Linville | c809e86 | 2010-05-06 16:49:40 -0400 | [diff] [blame] | 921 | |
| 922 | /* |
| 923 | * update beacon timestamp w/ TSF value |
| 924 | * TODO: make hardware update beacon timestamp |
| 925 | */ |
| 926 | mgmt = (struct ieee80211_mgmt *)skb->data; |
Eliad Peller | 37a41b4 | 2011-09-21 14:06:11 +0300 | [diff] [blame] | 927 | mgmt->u.beacon.timestamp = cpu_to_le64(rtl8180_get_tsf(dev, vif)); |
John W. Linville | c809e86 | 2010-05-06 16:49:40 -0400 | [diff] [blame] | 928 | |
| 929 | /* TODO: use actual beacon queue */ |
| 930 | skb_set_queue_mapping(skb, 0); |
| 931 | |
Thomas Huehn | 36323f8 | 2012-07-23 21:33:42 +0200 | [diff] [blame] | 932 | rtl8180_tx(dev, NULL, skb); |
John W. Linville | c809e86 | 2010-05-06 16:49:40 -0400 | [diff] [blame] | 933 | |
| 934 | resched: |
| 935 | /* |
| 936 | * schedule next beacon |
| 937 | * TODO: use hardware support for beacon timing |
| 938 | */ |
| 939 | schedule_delayed_work(&vif_priv->beacon_work, |
| 940 | usecs_to_jiffies(1024 * vif->bss_conf.beacon_int)); |
| 941 | } |
| 942 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 943 | static int rtl8180_add_interface(struct ieee80211_hw *dev, |
Johannes Berg | 1ed32e4 | 2009-12-23 13:15:45 +0100 | [diff] [blame] | 944 | struct ieee80211_vif *vif) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 945 | { |
| 946 | struct rtl8180_priv *priv = dev->priv; |
John W. Linville | c809e86 | 2010-05-06 16:49:40 -0400 | [diff] [blame] | 947 | struct rtl8180_vif *vif_priv; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 948 | |
John W. Linville | 643aab6 | 2009-12-22 18:13:04 -0500 | [diff] [blame] | 949 | /* |
| 950 | * We only support one active interface at a time. |
| 951 | */ |
| 952 | if (priv->vif) |
| 953 | return -EBUSY; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 954 | |
Johannes Berg | 1ed32e4 | 2009-12-23 13:15:45 +0100 | [diff] [blame] | 955 | switch (vif->type) { |
Johannes Berg | 05c914f | 2008-09-11 00:01:58 +0200 | [diff] [blame] | 956 | case NL80211_IFTYPE_STATION: |
John W. Linville | c809e86 | 2010-05-06 16:49:40 -0400 | [diff] [blame] | 957 | case NL80211_IFTYPE_ADHOC: |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 958 | break; |
| 959 | default: |
| 960 | return -EOPNOTSUPP; |
| 961 | } |
| 962 | |
Johannes Berg | 1ed32e4 | 2009-12-23 13:15:45 +0100 | [diff] [blame] | 963 | priv->vif = vif; |
Johannes Berg | 32bfd35 | 2007-12-19 01:31:26 +0100 | [diff] [blame] | 964 | |
John W. Linville | c809e86 | 2010-05-06 16:49:40 -0400 | [diff] [blame] | 965 | /* Initialize driver private area */ |
| 966 | vif_priv = (struct rtl8180_vif *)&vif->drv_priv; |
| 967 | vif_priv->dev = dev; |
| 968 | INIT_DELAYED_WORK(&vif_priv->beacon_work, rtl8180_beacon_work); |
| 969 | vif_priv->enable_beacon = false; |
| 970 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 971 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); |
| 972 | rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0], |
Johannes Berg | 1ed32e4 | 2009-12-23 13:15:45 +0100 | [diff] [blame] | 973 | le32_to_cpu(*(__le32 *)vif->addr)); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 974 | rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4], |
Johannes Berg | 1ed32e4 | 2009-12-23 13:15:45 +0100 | [diff] [blame] | 975 | le16_to_cpu(*(__le16 *)(vif->addr + 4))); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 976 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
| 977 | |
| 978 | return 0; |
| 979 | } |
| 980 | |
| 981 | static void rtl8180_remove_interface(struct ieee80211_hw *dev, |
Johannes Berg | 1ed32e4 | 2009-12-23 13:15:45 +0100 | [diff] [blame] | 982 | struct ieee80211_vif *vif) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 983 | { |
| 984 | struct rtl8180_priv *priv = dev->priv; |
Johannes Berg | 32bfd35 | 2007-12-19 01:31:26 +0100 | [diff] [blame] | 985 | priv->vif = NULL; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 986 | } |
| 987 | |
Johannes Berg | e897558 | 2008-10-09 12:18:51 +0200 | [diff] [blame] | 988 | static int rtl8180_config(struct ieee80211_hw *dev, u32 changed) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 989 | { |
| 990 | struct rtl8180_priv *priv = dev->priv; |
Johannes Berg | e897558 | 2008-10-09 12:18:51 +0200 | [diff] [blame] | 991 | struct ieee80211_conf *conf = &dev->conf; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 992 | |
| 993 | priv->rf->set_chan(dev, conf); |
| 994 | |
| 995 | return 0; |
| 996 | } |
| 997 | |
Andrea Merello | 9069af7 | 2014-03-15 18:29:37 +0100 | [diff] [blame] | 998 | static int rtl8180_conf_tx(struct ieee80211_hw *dev, |
| 999 | struct ieee80211_vif *vif, u16 queue, |
| 1000 | const struct ieee80211_tx_queue_params *params) |
| 1001 | { |
| 1002 | struct rtl8180_priv *priv = dev->priv; |
| 1003 | u8 cw_min, cw_max; |
| 1004 | |
| 1005 | /* nothing to do ? */ |
| 1006 | if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180) |
| 1007 | return 0; |
| 1008 | |
| 1009 | cw_min = fls(params->cw_min); |
| 1010 | cw_max = fls(params->cw_max); |
| 1011 | |
| 1012 | rtl818x_iowrite8(priv, &priv->map->CW_VAL, (cw_max << 4) | cw_min); |
| 1013 | |
| 1014 | return 0; |
| 1015 | } |
| 1016 | |
| 1017 | static void rtl8180_conf_erp(struct ieee80211_hw *dev, |
| 1018 | struct ieee80211_bss_conf *info) |
| 1019 | { |
| 1020 | struct rtl8180_priv *priv = dev->priv; |
| 1021 | u8 sifs, difs; |
| 1022 | int eifs; |
| 1023 | u8 hw_eifs; |
| 1024 | |
| 1025 | /* TODO: should we do something ? */ |
| 1026 | if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180) |
| 1027 | return; |
| 1028 | |
| 1029 | /* I _hope_ this means 10uS for the HW. |
| 1030 | * In reference code it is 0x22 for |
| 1031 | * both rtl8187L and rtl8187SE |
| 1032 | */ |
| 1033 | sifs = 0x22; |
| 1034 | |
| 1035 | if (info->use_short_slot) |
| 1036 | priv->slot_time = 9; |
| 1037 | else |
| 1038 | priv->slot_time = 20; |
| 1039 | |
| 1040 | /* 10 is SIFS time in uS */ |
| 1041 | difs = 10 + 2 * priv->slot_time; |
| 1042 | eifs = 10 + difs + priv->ack_time; |
| 1043 | |
| 1044 | /* HW should use 4uS units for EIFS (I'm sure for rtl8185)*/ |
| 1045 | hw_eifs = DIV_ROUND_UP(eifs, 4); |
| 1046 | |
| 1047 | |
| 1048 | rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time); |
| 1049 | rtl818x_iowrite8(priv, &priv->map->SIFS, sifs); |
| 1050 | rtl818x_iowrite8(priv, &priv->map->DIFS, difs); |
| 1051 | |
| 1052 | /* from reference code. set ack timeout reg = eifs reg */ |
| 1053 | rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, hw_eifs); |
| 1054 | |
| 1055 | /* rtl8187/rtl8185 HW bug. After EIFS is elapsed, |
| 1056 | * the HW still wait for DIFS. |
| 1057 | * HW uses 4uS units for EIFS. |
| 1058 | */ |
| 1059 | hw_eifs = DIV_ROUND_UP(eifs - difs, 4); |
| 1060 | |
| 1061 | rtl818x_iowrite8(priv, &priv->map->EIFS, hw_eifs); |
| 1062 | } |
| 1063 | |
John W. Linville | da81ded | 2008-11-12 14:37:11 -0500 | [diff] [blame] | 1064 | static void rtl8180_bss_info_changed(struct ieee80211_hw *dev, |
| 1065 | struct ieee80211_vif *vif, |
| 1066 | struct ieee80211_bss_conf *info, |
| 1067 | u32 changed) |
| 1068 | { |
| 1069 | struct rtl8180_priv *priv = dev->priv; |
John W. Linville | c809e86 | 2010-05-06 16:49:40 -0400 | [diff] [blame] | 1070 | struct rtl8180_vif *vif_priv; |
Johannes Berg | 2d0ddec | 2009-04-23 16:13:26 +0200 | [diff] [blame] | 1071 | int i; |
John W. Linville | 0f956e7 | 2010-07-29 21:50:29 -0400 | [diff] [blame] | 1072 | u8 reg; |
Johannes Berg | 2d0ddec | 2009-04-23 16:13:26 +0200 | [diff] [blame] | 1073 | |
John W. Linville | c809e86 | 2010-05-06 16:49:40 -0400 | [diff] [blame] | 1074 | vif_priv = (struct rtl8180_vif *)&vif->drv_priv; |
| 1075 | |
Johannes Berg | 2d0ddec | 2009-04-23 16:13:26 +0200 | [diff] [blame] | 1076 | if (changed & BSS_CHANGED_BSSID) { |
| 1077 | for (i = 0; i < ETH_ALEN; i++) |
| 1078 | rtl818x_iowrite8(priv, &priv->map->BSSID[i], |
| 1079 | info->bssid[i]); |
| 1080 | |
John W. Linville | 0f956e7 | 2010-07-29 21:50:29 -0400 | [diff] [blame] | 1081 | if (is_valid_ether_addr(info->bssid)) { |
| 1082 | if (vif->type == NL80211_IFTYPE_ADHOC) |
| 1083 | reg = RTL818X_MSR_ADHOC; |
| 1084 | else |
| 1085 | reg = RTL818X_MSR_INFRA; |
| 1086 | } else |
| 1087 | reg = RTL818X_MSR_NO_LINK; |
| 1088 | rtl818x_iowrite8(priv, &priv->map->MSR, reg); |
Johannes Berg | 2d0ddec | 2009-04-23 16:13:26 +0200 | [diff] [blame] | 1089 | } |
John W. Linville | da81ded | 2008-11-12 14:37:11 -0500 | [diff] [blame] | 1090 | |
Andrea Merello | 516a093 | 2014-03-15 18:29:36 +0100 | [diff] [blame] | 1091 | if (changed & BSS_CHANGED_BASIC_RATES) |
| 1092 | rtl8180_conf_basic_rates(dev, info->basic_rates); |
| 1093 | |
Andrea Merello | 9069af7 | 2014-03-15 18:29:37 +0100 | [diff] [blame] | 1094 | if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) { |
| 1095 | |
| 1096 | /* when preamble changes, acktime duration changes, and erp must |
| 1097 | * be recalculated. ACK time is calculated at lowest rate. |
| 1098 | * Since mac80211 include SIFS time we remove it (-10) |
| 1099 | */ |
| 1100 | priv->ack_time = |
| 1101 | le16_to_cpu(ieee80211_generic_frame_duration(dev, |
| 1102 | priv->vif, |
| 1103 | IEEE80211_BAND_2GHZ, 10, |
| 1104 | &priv->rates[0])) - 10; |
| 1105 | |
| 1106 | rtl8180_conf_erp(dev, info); |
| 1107 | } |
John W. Linville | c809e86 | 2010-05-06 16:49:40 -0400 | [diff] [blame] | 1108 | |
| 1109 | if (changed & BSS_CHANGED_BEACON_ENABLED) |
| 1110 | vif_priv->enable_beacon = info->enable_beacon; |
| 1111 | |
| 1112 | if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) { |
| 1113 | cancel_delayed_work_sync(&vif_priv->beacon_work); |
| 1114 | if (vif_priv->enable_beacon) |
| 1115 | schedule_work(&vif_priv->beacon_work.work); |
| 1116 | } |
John W. Linville | da81ded | 2008-11-12 14:37:11 -0500 | [diff] [blame] | 1117 | } |
| 1118 | |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 1119 | static u64 rtl8180_prepare_multicast(struct ieee80211_hw *dev, |
| 1120 | struct netdev_hw_addr_list *mc_list) |
Johannes Berg | 3ac64be | 2009-08-17 16:16:53 +0200 | [diff] [blame] | 1121 | { |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 1122 | return netdev_hw_addr_list_count(mc_list); |
Johannes Berg | 3ac64be | 2009-08-17 16:16:53 +0200 | [diff] [blame] | 1123 | } |
| 1124 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1125 | static void rtl8180_configure_filter(struct ieee80211_hw *dev, |
| 1126 | unsigned int changed_flags, |
| 1127 | unsigned int *total_flags, |
Johannes Berg | 3ac64be | 2009-08-17 16:16:53 +0200 | [diff] [blame] | 1128 | u64 multicast) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1129 | { |
| 1130 | struct rtl8180_priv *priv = dev->priv; |
| 1131 | |
| 1132 | if (changed_flags & FIF_FCSFAIL) |
| 1133 | priv->rx_conf ^= RTL818X_RX_CONF_FCS; |
| 1134 | if (changed_flags & FIF_CONTROL) |
| 1135 | priv->rx_conf ^= RTL818X_RX_CONF_CTRL; |
| 1136 | if (changed_flags & FIF_OTHER_BSS) |
| 1137 | priv->rx_conf ^= RTL818X_RX_CONF_MONITOR; |
Johannes Berg | 3ac64be | 2009-08-17 16:16:53 +0200 | [diff] [blame] | 1138 | if (*total_flags & FIF_ALLMULTI || multicast > 0) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1139 | priv->rx_conf |= RTL818X_RX_CONF_MULTICAST; |
| 1140 | else |
| 1141 | priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST; |
| 1142 | |
| 1143 | *total_flags = 0; |
| 1144 | |
| 1145 | if (priv->rx_conf & RTL818X_RX_CONF_FCS) |
| 1146 | *total_flags |= FIF_FCSFAIL; |
| 1147 | if (priv->rx_conf & RTL818X_RX_CONF_CTRL) |
| 1148 | *total_flags |= FIF_CONTROL; |
| 1149 | if (priv->rx_conf & RTL818X_RX_CONF_MONITOR) |
| 1150 | *total_flags |= FIF_OTHER_BSS; |
| 1151 | if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST) |
| 1152 | *total_flags |= FIF_ALLMULTI; |
| 1153 | |
| 1154 | rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf); |
| 1155 | } |
| 1156 | |
| 1157 | static const struct ieee80211_ops rtl8180_ops = { |
| 1158 | .tx = rtl8180_tx, |
| 1159 | .start = rtl8180_start, |
| 1160 | .stop = rtl8180_stop, |
| 1161 | .add_interface = rtl8180_add_interface, |
| 1162 | .remove_interface = rtl8180_remove_interface, |
| 1163 | .config = rtl8180_config, |
John W. Linville | da81ded | 2008-11-12 14:37:11 -0500 | [diff] [blame] | 1164 | .bss_info_changed = rtl8180_bss_info_changed, |
Andrea Merello | 9069af7 | 2014-03-15 18:29:37 +0100 | [diff] [blame] | 1165 | .conf_tx = rtl8180_conf_tx, |
Johannes Berg | 3ac64be | 2009-08-17 16:16:53 +0200 | [diff] [blame] | 1166 | .prepare_multicast = rtl8180_prepare_multicast, |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1167 | .configure_filter = rtl8180_configure_filter, |
John W. Linville | d2bb8e0 | 2010-01-26 16:22:20 -0500 | [diff] [blame] | 1168 | .get_tsf = rtl8180_get_tsf, |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1169 | }; |
| 1170 | |
| 1171 | static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom) |
| 1172 | { |
Andrea Merello | 7d4b829 | 2014-03-15 18:29:38 +0100 | [diff] [blame] | 1173 | struct rtl8180_priv *priv = eeprom->data; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1174 | u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); |
| 1175 | |
| 1176 | eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE; |
| 1177 | eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ; |
| 1178 | eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK; |
| 1179 | eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS; |
| 1180 | } |
| 1181 | |
| 1182 | static void rtl8180_eeprom_register_write(struct eeprom_93cx6 *eeprom) |
| 1183 | { |
Andrea Merello | 7d4b829 | 2014-03-15 18:29:38 +0100 | [diff] [blame] | 1184 | struct rtl8180_priv *priv = eeprom->data; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1185 | u8 reg = 2 << 6; |
| 1186 | |
| 1187 | if (eeprom->reg_data_in) |
| 1188 | reg |= RTL818X_EEPROM_CMD_WRITE; |
| 1189 | if (eeprom->reg_data_out) |
| 1190 | reg |= RTL818X_EEPROM_CMD_READ; |
| 1191 | if (eeprom->reg_data_clock) |
| 1192 | reg |= RTL818X_EEPROM_CMD_CK; |
| 1193 | if (eeprom->reg_chip_select) |
| 1194 | reg |= RTL818X_EEPROM_CMD_CS; |
| 1195 | |
| 1196 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg); |
| 1197 | rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); |
| 1198 | udelay(10); |
| 1199 | } |
| 1200 | |
Andrea Merello | 7d4b829 | 2014-03-15 18:29:38 +0100 | [diff] [blame] | 1201 | static void rtl8180_eeprom_read(struct rtl8180_priv *priv) |
| 1202 | { |
| 1203 | struct eeprom_93cx6 eeprom; |
| 1204 | int eeprom_cck_table_adr; |
| 1205 | u16 eeprom_val; |
| 1206 | int i; |
| 1207 | |
| 1208 | eeprom.data = priv; |
| 1209 | eeprom.register_read = rtl8180_eeprom_register_read; |
| 1210 | eeprom.register_write = rtl8180_eeprom_register_write; |
| 1211 | if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6)) |
| 1212 | eeprom.width = PCI_EEPROM_WIDTH_93C66; |
| 1213 | else |
| 1214 | eeprom.width = PCI_EEPROM_WIDTH_93C46; |
| 1215 | |
| 1216 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, |
| 1217 | RTL818X_EEPROM_CMD_PROGRAM); |
| 1218 | rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); |
| 1219 | udelay(10); |
| 1220 | |
| 1221 | eeprom_93cx6_read(&eeprom, 0x06, &eeprom_val); |
| 1222 | eeprom_val &= 0xFF; |
| 1223 | priv->rf_type = eeprom_val; |
| 1224 | |
| 1225 | eeprom_93cx6_read(&eeprom, 0x17, &eeprom_val); |
| 1226 | priv->csthreshold = eeprom_val >> 8; |
| 1227 | |
| 1228 | eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)priv->mac_addr, 3); |
| 1229 | |
| 1230 | eeprom_cck_table_adr = 0x10; |
| 1231 | |
| 1232 | /* CCK TX power */ |
| 1233 | for (i = 0; i < 14; i += 2) { |
| 1234 | u16 txpwr; |
| 1235 | eeprom_93cx6_read(&eeprom, eeprom_cck_table_adr + (i >> 1), |
| 1236 | &txpwr); |
| 1237 | priv->channels[i].hw_value = txpwr & 0xFF; |
| 1238 | priv->channels[i + 1].hw_value = txpwr >> 8; |
| 1239 | } |
| 1240 | |
| 1241 | /* OFDM TX power */ |
| 1242 | if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180) { |
| 1243 | for (i = 0; i < 14; i += 2) { |
| 1244 | u16 txpwr; |
| 1245 | eeprom_93cx6_read(&eeprom, 0x20 + (i >> 1), &txpwr); |
| 1246 | priv->channels[i].hw_value |= (txpwr & 0xFF) << 8; |
| 1247 | priv->channels[i + 1].hw_value |= txpwr & 0xFF00; |
| 1248 | } |
| 1249 | } |
| 1250 | |
| 1251 | if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180) { |
| 1252 | __le32 anaparam; |
| 1253 | eeprom_93cx6_multiread(&eeprom, 0xD, (__le16 *)&anaparam, 2); |
| 1254 | priv->anaparam = le32_to_cpu(anaparam); |
| 1255 | eeprom_93cx6_read(&eeprom, 0x19, &priv->rfparam); |
| 1256 | } |
| 1257 | |
| 1258 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, |
| 1259 | RTL818X_EEPROM_CMD_NORMAL); |
| 1260 | } |
| 1261 | |
Bill Pemberton | fb4e899 | 2012-12-03 09:56:40 -0500 | [diff] [blame] | 1262 | static int rtl8180_probe(struct pci_dev *pdev, |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1263 | const struct pci_device_id *id) |
| 1264 | { |
| 1265 | struct ieee80211_hw *dev; |
| 1266 | struct rtl8180_priv *priv; |
| 1267 | unsigned long mem_addr, mem_len; |
| 1268 | unsigned int io_addr, io_len; |
Andrea Merello | 7d4b829 | 2014-03-15 18:29:38 +0100 | [diff] [blame] | 1269 | int err; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1270 | const char *chip_name, *rf_name = NULL; |
| 1271 | u32 reg; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1272 | |
| 1273 | err = pci_enable_device(pdev); |
| 1274 | if (err) { |
| 1275 | printk(KERN_ERR "%s (rtl8180): Cannot enable new PCI device\n", |
| 1276 | pci_name(pdev)); |
| 1277 | return err; |
| 1278 | } |
| 1279 | |
| 1280 | err = pci_request_regions(pdev, KBUILD_MODNAME); |
| 1281 | if (err) { |
| 1282 | printk(KERN_ERR "%s (rtl8180): Cannot obtain PCI resources\n", |
| 1283 | pci_name(pdev)); |
| 1284 | return err; |
| 1285 | } |
| 1286 | |
| 1287 | io_addr = pci_resource_start(pdev, 0); |
| 1288 | io_len = pci_resource_len(pdev, 0); |
| 1289 | mem_addr = pci_resource_start(pdev, 1); |
| 1290 | mem_len = pci_resource_len(pdev, 1); |
| 1291 | |
| 1292 | if (mem_len < sizeof(struct rtl818x_csr) || |
| 1293 | io_len < sizeof(struct rtl818x_csr)) { |
| 1294 | printk(KERN_ERR "%s (rtl8180): Too short PCI resources\n", |
| 1295 | pci_name(pdev)); |
| 1296 | err = -ENOMEM; |
| 1297 | goto err_free_reg; |
| 1298 | } |
| 1299 | |
John W. Linville | 9e385c5 | 2010-05-10 14:24:34 -0400 | [diff] [blame] | 1300 | if ((err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) || |
| 1301 | (err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))) { |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1302 | printk(KERN_ERR "%s (rtl8180): No suitable DMA available\n", |
| 1303 | pci_name(pdev)); |
| 1304 | goto err_free_reg; |
| 1305 | } |
| 1306 | |
| 1307 | pci_set_master(pdev); |
| 1308 | |
| 1309 | dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8180_ops); |
| 1310 | if (!dev) { |
| 1311 | printk(KERN_ERR "%s (rtl8180): ieee80211 alloc failed\n", |
| 1312 | pci_name(pdev)); |
| 1313 | err = -ENOMEM; |
| 1314 | goto err_free_reg; |
| 1315 | } |
| 1316 | |
| 1317 | priv = dev->priv; |
| 1318 | priv->pdev = pdev; |
| 1319 | |
Johannes Berg | e6a9854 | 2008-10-21 12:40:02 +0200 | [diff] [blame] | 1320 | dev->max_rates = 2; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1321 | SET_IEEE80211_DEV(dev, &pdev->dev); |
| 1322 | pci_set_drvdata(pdev, dev); |
| 1323 | |
| 1324 | priv->map = pci_iomap(pdev, 1, mem_len); |
| 1325 | if (!priv->map) |
| 1326 | priv->map = pci_iomap(pdev, 0, io_len); |
| 1327 | |
| 1328 | if (!priv->map) { |
| 1329 | printk(KERN_ERR "%s (rtl8180): Cannot map device memory\n", |
| 1330 | pci_name(pdev)); |
| 1331 | goto err_free_dev; |
| 1332 | } |
| 1333 | |
Johannes Berg | 8318d78 | 2008-01-24 19:38:38 +0100 | [diff] [blame] | 1334 | BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels)); |
| 1335 | BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates)); |
| 1336 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1337 | memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels)); |
| 1338 | memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates)); |
Johannes Berg | 8318d78 | 2008-01-24 19:38:38 +0100 | [diff] [blame] | 1339 | |
| 1340 | priv->band.band = IEEE80211_BAND_2GHZ; |
| 1341 | priv->band.channels = priv->channels; |
| 1342 | priv->band.n_channels = ARRAY_SIZE(rtl818x_channels); |
| 1343 | priv->band.bitrates = priv->rates; |
| 1344 | priv->band.n_bitrates = 4; |
| 1345 | dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band; |
| 1346 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1347 | dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
Bruno Randolf | 566bfe5 | 2008-05-08 19:15:40 +0200 | [diff] [blame] | 1348 | IEEE80211_HW_RX_INCLUDES_FCS | |
| 1349 | IEEE80211_HW_SIGNAL_UNSPEC; |
John W. Linville | c809e86 | 2010-05-06 16:49:40 -0400 | [diff] [blame] | 1350 | dev->vif_data_size = sizeof(struct rtl8180_vif); |
| 1351 | dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | |
| 1352 | BIT(NL80211_IFTYPE_ADHOC); |
Bruno Randolf | 566bfe5 | 2008-05-08 19:15:40 +0200 | [diff] [blame] | 1353 | dev->max_signal = 65; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1354 | |
| 1355 | reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); |
| 1356 | reg &= RTL818X_TX_CONF_HWVER_MASK; |
| 1357 | switch (reg) { |
| 1358 | case RTL818X_TX_CONF_R8180_ABCD: |
| 1359 | chip_name = "RTL8180"; |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 1360 | priv->chip_family = RTL818X_CHIP_FAMILY_RTL8180; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1361 | break; |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 1362 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1363 | case RTL818X_TX_CONF_R8180_F: |
| 1364 | chip_name = "RTL8180vF"; |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 1365 | priv->chip_family = RTL818X_CHIP_FAMILY_RTL8180; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1366 | break; |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 1367 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1368 | case RTL818X_TX_CONF_R8185_ABC: |
| 1369 | chip_name = "RTL8185"; |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 1370 | priv->chip_family = RTL818X_CHIP_FAMILY_RTL8185; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1371 | break; |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 1372 | |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1373 | case RTL818X_TX_CONF_R8185_D: |
| 1374 | chip_name = "RTL8185vD"; |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 1375 | priv->chip_family = RTL818X_CHIP_FAMILY_RTL8185; |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1376 | break; |
| 1377 | default: |
| 1378 | printk(KERN_ERR "%s (rtl8180): Unknown chip! (0x%x)\n", |
| 1379 | pci_name(pdev), reg >> 25); |
| 1380 | goto err_iounmap; |
| 1381 | } |
| 1382 | |
Andrea Merello | fd6564f | 2014-03-22 18:51:20 +0100 | [diff] [blame] | 1383 | /* we declare to MAC80211 all the queues except for beacon queue |
| 1384 | * that will be eventually handled by DRV. |
| 1385 | * TX rings are arranged in such a way that lower is the IDX, |
| 1386 | * higher is the priority, in order to achieve direct mapping |
| 1387 | * with mac80211, however the beacon queue is an exception and it |
| 1388 | * is mapped on the highst tx ring IDX. |
| 1389 | */ |
| 1390 | dev->queues = RTL8180_NR_TX_QUEUES - 1; |
| 1391 | |
Andrea Merello | 6caefd1 | 2014-03-08 18:36:37 +0100 | [diff] [blame] | 1392 | if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180) { |
Johannes Berg | 8318d78 | 2008-01-24 19:38:38 +0100 | [diff] [blame] | 1393 | priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1394 | pci_try_set_mwi(pdev); |
| 1395 | } |
| 1396 | |
Andrea Merello | 7d4b829 | 2014-03-15 18:29:38 +0100 | [diff] [blame] | 1397 | rtl8180_eeprom_read(priv); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1398 | |
Andrea Merello | 7d4b829 | 2014-03-15 18:29:38 +0100 | [diff] [blame] | 1399 | switch (priv->rf_type) { |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1400 | case 1: rf_name = "Intersil"; |
| 1401 | break; |
| 1402 | case 2: rf_name = "RFMD"; |
| 1403 | break; |
| 1404 | case 3: priv->rf = &sa2400_rf_ops; |
| 1405 | break; |
| 1406 | case 4: priv->rf = &max2820_rf_ops; |
| 1407 | break; |
| 1408 | case 5: priv->rf = &grf5101_rf_ops; |
| 1409 | break; |
| 1410 | case 9: priv->rf = rtl8180_detect_rf(dev); |
| 1411 | break; |
| 1412 | case 10: |
| 1413 | rf_name = "RTL8255"; |
| 1414 | break; |
| 1415 | default: |
| 1416 | printk(KERN_ERR "%s (rtl8180): Unknown RF! (0x%x)\n", |
Andrea Merello | 7d4b829 | 2014-03-15 18:29:38 +0100 | [diff] [blame] | 1417 | pci_name(pdev), priv->rf_type); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1418 | goto err_iounmap; |
| 1419 | } |
| 1420 | |
| 1421 | if (!priv->rf) { |
| 1422 | printk(KERN_ERR "%s (rtl8180): %s RF frontend not supported!\n", |
| 1423 | pci_name(pdev), rf_name); |
| 1424 | goto err_iounmap; |
| 1425 | } |
| 1426 | |
Andrea Merello | 7d4b829 | 2014-03-15 18:29:38 +0100 | [diff] [blame] | 1427 | if (!is_valid_ether_addr(priv->mac_addr)) { |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1428 | printk(KERN_WARNING "%s (rtl8180): Invalid hwaddr! Using" |
| 1429 | " randomly generated MAC addr\n", pci_name(pdev)); |
Andrea Merello | 7d4b829 | 2014-03-15 18:29:38 +0100 | [diff] [blame] | 1430 | eth_random_addr(priv->mac_addr); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1431 | } |
Andrea Merello | 7d4b829 | 2014-03-15 18:29:38 +0100 | [diff] [blame] | 1432 | SET_IEEE80211_PERM_ADDR(dev, priv->mac_addr); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1433 | |
| 1434 | spin_lock_init(&priv->lock); |
| 1435 | |
| 1436 | err = ieee80211_register_hw(dev); |
| 1437 | if (err) { |
| 1438 | printk(KERN_ERR "%s (rtl8180): Cannot register device\n", |
| 1439 | pci_name(pdev)); |
| 1440 | goto err_iounmap; |
| 1441 | } |
| 1442 | |
Joe Perches | c96c31e | 2010-07-26 14:39:58 -0700 | [diff] [blame] | 1443 | wiphy_info(dev->wiphy, "hwaddr %pm, %s + %s\n", |
Andrea Merello | 7d4b829 | 2014-03-15 18:29:38 +0100 | [diff] [blame] | 1444 | priv->mac_addr, chip_name, priv->rf->name); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1445 | |
| 1446 | return 0; |
| 1447 | |
| 1448 | err_iounmap: |
andrea merello | 0269da2 | 2014-02-18 02:10:41 +0100 | [diff] [blame] | 1449 | pci_iounmap(pdev, priv->map); |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1450 | |
| 1451 | err_free_dev: |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1452 | ieee80211_free_hw(dev); |
| 1453 | |
| 1454 | err_free_reg: |
| 1455 | pci_release_regions(pdev); |
| 1456 | pci_disable_device(pdev); |
| 1457 | return err; |
| 1458 | } |
| 1459 | |
Bill Pemberton | fb4e899 | 2012-12-03 09:56:40 -0500 | [diff] [blame] | 1460 | static void rtl8180_remove(struct pci_dev *pdev) |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1461 | { |
| 1462 | struct ieee80211_hw *dev = pci_get_drvdata(pdev); |
| 1463 | struct rtl8180_priv *priv; |
| 1464 | |
| 1465 | if (!dev) |
| 1466 | return; |
| 1467 | |
| 1468 | ieee80211_unregister_hw(dev); |
| 1469 | |
| 1470 | priv = dev->priv; |
| 1471 | |
| 1472 | pci_iounmap(pdev, priv->map); |
| 1473 | pci_release_regions(pdev); |
| 1474 | pci_disable_device(pdev); |
| 1475 | ieee80211_free_hw(dev); |
| 1476 | } |
| 1477 | |
| 1478 | #ifdef CONFIG_PM |
| 1479 | static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state) |
| 1480 | { |
| 1481 | pci_save_state(pdev); |
| 1482 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
| 1483 | return 0; |
| 1484 | } |
| 1485 | |
| 1486 | static int rtl8180_resume(struct pci_dev *pdev) |
| 1487 | { |
| 1488 | pci_set_power_state(pdev, PCI_D0); |
| 1489 | pci_restore_state(pdev); |
| 1490 | return 0; |
| 1491 | } |
| 1492 | |
| 1493 | #endif /* CONFIG_PM */ |
| 1494 | |
| 1495 | static struct pci_driver rtl8180_driver = { |
| 1496 | .name = KBUILD_MODNAME, |
| 1497 | .id_table = rtl8180_table, |
| 1498 | .probe = rtl8180_probe, |
Bill Pemberton | fb4e899 | 2012-12-03 09:56:40 -0500 | [diff] [blame] | 1499 | .remove = rtl8180_remove, |
Michael Wu | f653211 | 2007-10-14 14:43:16 -0400 | [diff] [blame] | 1500 | #ifdef CONFIG_PM |
| 1501 | .suspend = rtl8180_suspend, |
| 1502 | .resume = rtl8180_resume, |
| 1503 | #endif /* CONFIG_PM */ |
| 1504 | }; |
| 1505 | |
Axel Lin | 5b0a3b7 | 2012-04-14 10:38:36 +0800 | [diff] [blame] | 1506 | module_pci_driver(rtl8180_driver); |