| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | if ARCH_CLPS711X |
| 2 | |
| 3 | menu "CLPS711X/EP721X Implementations" |
| 4 | |
| 5 | config ARCH_AUTCPU12 |
| 6 | bool "AUTCPU12" |
| 7 | help |
| 8 | Say Y if you intend to run the kernel on the autronix autcpu12 |
| 9 | board. This board is based on a Cirrus Logic CS89712. |
| 10 | |
| 11 | config ARCH_CDB89712 |
| 12 | bool "CDB89712" |
| Russell King | f7e68bb | 2005-05-05 14:49:01 +0100 | [diff] [blame] | 13 | select ISA |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | help |
| 15 | This is an evaluation board from Cirrus for the CS89712 processor. |
| 16 | The board includes 2 serial ports, Ethernet, IRDA, and expansion |
| 17 | headers. It comes with 16 MB SDRAM and 8 MB flash ROM. |
| 18 | |
| 19 | config ARCH_CEIVA |
| 20 | bool "CEIVA" |
| 21 | help |
| 22 | Say Y here if you intend to run this kernel on the Ceiva/Polaroid |
| 23 | PhotoMax Digital Picture Frame. |
| 24 | |
| 25 | config ARCH_CLEP7312 |
| 26 | bool "CLEP7312" |
| Martin Michlmayr | f999b8b | 2006-02-08 21:09:05 +0000 | [diff] [blame] | 27 | help |
| 28 | Boards based on the Cirrus Logic 7212/7312 chips. |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
| 30 | config ARCH_EDB7211 |
| 31 | bool "EDB7211" |
| Russell King | f7e68bb | 2005-05-05 14:49:01 +0100 | [diff] [blame] | 32 | select ISA |
| Russell King | 05944d7 | 2006-11-30 20:43:51 +0000 | [diff] [blame] | 33 | select ARCH_SPARSEMEM_ENABLE |
| 34 | select ARCH_SELECT_MEMORY_MODEL |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | help |
| 36 | Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211 |
| 37 | evaluation board. |
| 38 | |
| 39 | config ARCH_P720T |
| 40 | bool "P720T" |
| 41 | help |
| 42 | Say Y here if you intend to run this kernel on the ARM Prospector |
| 43 | 720T. |
| 44 | |
| 45 | config ARCH_FORTUNET |
| 46 | bool "FORTUNET" |
| 47 | |
| 48 | # XXX Maybe these should indicate register compatibility |
| 49 | # instead of being mutually exclusive. |
| 50 | config ARCH_EP7211 |
| 51 | bool |
| 52 | depends on ARCH_EDB7211 |
| 53 | default y |
| 54 | |
| 55 | config ARCH_EP7212 |
| 56 | bool |
| 57 | depends on ARCH_P720T || ARCH_CEIVA |
| 58 | default y |
| 59 | |
| 60 | config EP72XX_ROM_BOOT |
| 61 | bool "EP72xx ROM boot" |
| 62 | depends on ARCH_EP7211 || ARCH_EP7212 |
| 63 | ---help--- |
| 64 | If you say Y here, your CLPS711x-based kernel will use the bootstrap |
| 65 | mode memory map instead of the normal memory map. |
| 66 | |
| 67 | Processors derived from the Cirrus CLPS-711X core support two boot |
| 68 | modes. Normal mode boots from the external memory device at CS0. |
| 69 | Bootstrap mode rearranges parts of the memory map, placing an |
| 70 | internal 128 byte bootstrap ROM at CS0. This option performs the |
| 71 | address map changes required to support booting in this mode. |
| 72 | |
| 73 | You almost surely want to say N here. |
| 74 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 75 | endmenu |
| 76 | |
| 77 | endif |